Tedd OKANO / MARY_CAMERA
Committer:
okano
Date:
Mon Feb 17 23:44:08 2014 +0000
Revision:
4:cb0ef3fd89c9
Parent:
3:e5752853eb26
Child:
6:7363c7bc620e
add comments, cleaned-up

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okano 0:f4584dba3bac 1 #include "mbed.h"
okano 0:f4584dba3bac 2 #include "MARY_CAMERA.h"
okano 0:f4584dba3bac 3
okano 2:ee71ffdf317e 4 #define PARAM_NUM 99
okano 2:ee71ffdf317e 5 #define CAM_I2C_ADDR 0x42
okano 2:ee71ffdf317e 6
okano 0:f4584dba3bac 7 const char param[2][PARAM_NUM] = {
okano 0:f4584dba3bac 8 {
okano 0:f4584dba3bac 9 0x01,0x02,0x03,0x0c,0x0e,0x0f,0x11,0x12,0x15,0x16,0x17,0x18,0x19,0x1a,0x1e,0x21,0x22,
okano 0:f4584dba3bac 10 0x29,0x32,0x33,0x34,0x35,0x37,0x38,0x39,0x3b,0x3c,0x3d,0x3e,0x3f,0x40,0x41,0x41,
okano 0:f4584dba3bac 11 0x43,0x44,0x45,0x46,0x47,0x48,0x4b,0x4c,0x4d,0x4e,0x4f,0x50,0x51,0x52,0x53,
okano 0:f4584dba3bac 12 0x54,0x56,0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,
okano 0:f4584dba3bac 13 0x6f,0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,0x78,0x79,0x8d,0x8e,0x8f,0x90,
okano 0:f4584dba3bac 14 0x91,0x96,0x96,0x97,0x98,0x99,0x9a,0x9a,0x9b,0x9c,0x9d,0x9e,0xa2,0xa4,0xb0,
okano 0:f4584dba3bac 15 0xb1,0xb2,0xb3,0xb8,0xc8,0xc9
okano 0:f4584dba3bac 16 },
okano 0:f4584dba3bac 17 {
okano 0:f4584dba3bac 18 0x40,0x60,0x02,0x0c,0x61,0x4b,0x81,0x04 ,0x00,0x02,0x39,0x03,0x03,0x7b,0x37,0x02,0x91,
okano 0:f4584dba3bac 19 0x07,0x80,0x0b,0x11,0x0b,0x1d,0x71,0x2a,0x12,0x78,0xc3,0x11,0x00,0xd0,0x08,0x38,
okano 0:f4584dba3bac 20 0x0a,0xf0,0x34,0x58,0x28,0x3a,0x09,0x00,0x40,0x20,0x80,0x80,0x00,0x22,0x5e,
okano 0:f4584dba3bac 21 0x80,0x40,0x9e,0x88,0x88,0x44,0x67,0x49,0x0e,0x00,0x40,0x0a,0x0a,0x55,0x11,
okano 0:f4584dba3bac 22 0x9f,0x3a,0x35,0x11,0xf1,0x10,0x05,0xe1,0x01,0x04,0x01,0x4f,0x00,0x00,0x00,
okano 0:f4584dba3bac 23 0x00,0x00,0x00,0x30,0x20,0x30,0x00,0x84,0x29,0x03,0x4c,0x3f,0x52,0x88,0x84,
okano 0:f4584dba3bac 24 0x0c,0x0e,0x82,0x0a,0xf0,0x60
okano 0:f4584dba3bac 25 }
okano 0:f4584dba3bac 26 };
okano 0:f4584dba3bac 27
okano 0:f4584dba3bac 28 #define RESET_PULSE_WIDTH 100 // mili-seconds
okano 0:f4584dba3bac 29 #define RESET_RECOVERY_TIME 100 // mili-seconds
okano 0:f4584dba3bac 30
okano 2:ee71ffdf317e 31 #define COMMAND_WRITE 0x00
okano 2:ee71ffdf317e 32 #define COMMAND_READ 0x80
okano 2:ee71ffdf317e 33 #define COMMAND_ADDR_INCREMENT 0x20
okano 0:f4584dba3bac 34
okano 2:ee71ffdf317e 35 #define MEMORY_ADDR_LOW__REGISTER 0x0
okano 2:ee71ffdf317e 36 #define MEMORY_ADDR_MID__REGISTER 0x1
okano 2:ee71ffdf317e 37 #define MEMORY_ADDR_HIGH_REGISTER 0x2
okano 2:ee71ffdf317e 38 #define CAMERA_DATA_REGISTER 0x8
okano 2:ee71ffdf317e 39 #define CONTROL_DATA_REGISTER 0x3
okano 2:ee71ffdf317e 40 #define STATUS_REGISTER 0x4
okano 2:ee71ffdf317e 41
okano 2:ee71ffdf317e 42 #define CONTROL__PAUSE_BUFFER_UPDATE 0x01
okano 2:ee71ffdf317e 43 #define CONTROL__RESUME_BUFFER_UPDATE 0x00
okano 0:f4584dba3bac 44
okano 0:f4584dba3bac 45
okano 0:f4584dba3bac 46
okano 0:f4584dba3bac 47 MARY_CAMERA::MARY_CAMERA(
okano 4:cb0ef3fd89c9 48 PinName SPI_mosi,
okano 4:cb0ef3fd89c9 49 PinName SPI_miso,
okano 4:cb0ef3fd89c9 50 PinName SPI_sck,
okano 4:cb0ef3fd89c9 51 PinName SPI_cs,
okano 0:f4584dba3bac 52 PinName cam_reset,
okano 4:cb0ef3fd89c9 53 PinName I2C_sda,
okano 4:cb0ef3fd89c9 54 PinName I2C_scl
okano 2:ee71ffdf317e 55 ) :
okano 4:cb0ef3fd89c9 56 _spi( SPI_mosi, SPI_miso, SPI_sck ),
okano 4:cb0ef3fd89c9 57 _cs( SPI_cs ),
okano 4:cb0ef3fd89c9 58 _reset( cam_reset ),
okano 4:cb0ef3fd89c9 59 _i2c( I2C_sda, I2C_scl )
okano 0:f4584dba3bac 60 {
okano 0:f4584dba3bac 61 init();
okano 0:f4584dba3bac 62 }
okano 0:f4584dba3bac 63
okano 0:f4584dba3bac 64
okano 0:f4584dba3bac 65
okano 0:f4584dba3bac 66 /** initialiation
okano 0:f4584dba3bac 67 *
okano 0:f4584dba3bac 68 * Performs reset and initialization
okano 0:f4584dba3bac 69 */
okano 0:f4584dba3bac 70 void MARY_CAMERA::init( void )
okano 0:f4584dba3bac 71 {
okano 4:cb0ef3fd89c9 72 _cs = 1;
okano 0:f4584dba3bac 73
okano 4:cb0ef3fd89c9 74 _reset = 0;
okano 0:f4584dba3bac 75 wait_ms( RESET_PULSE_WIDTH );
okano 0:f4584dba3bac 76
okano 4:cb0ef3fd89c9 77 _reset = 1;
okano 0:f4584dba3bac 78 wait_ms( RESET_RECOVERY_TIME );
okano 0:f4584dba3bac 79
okano 0:f4584dba3bac 80
okano 0:f4584dba3bac 81 for ( int i = 0; i < PARAM_NUM; i++ ) {
okano 2:ee71ffdf317e 82 #if 1
okano 4:cb0ef3fd89c9 83 _i2c.start();
okano 4:cb0ef3fd89c9 84 _i2c.write( CAM_I2C_ADDR );
okano 4:cb0ef3fd89c9 85 _i2c.write( param[ 0 ][ i ] );
okano 4:cb0ef3fd89c9 86 _i2c.write( param[ 1 ][ i ] );
okano 4:cb0ef3fd89c9 87 _i2c.stop();
okano 2:ee71ffdf317e 88 #else
okano 2:ee71ffdf317e 89
okano 2:ee71ffdf317e 90 char s[ 2 ];
okano 2:ee71ffdf317e 91
okano 2:ee71ffdf317e 92 s[ 0 ] = param[ 0 ][ i ];
okano 2:ee71ffdf317e 93 s[ 1 ] = param[ 1 ][ i ];
okano 2:ee71ffdf317e 94
okano 4:cb0ef3fd89c9 95 _i2c.write( CAM_I2C_ADDR, s, 2 );
okano 2:ee71ffdf317e 96
okano 2:ee71ffdf317e 97 #endif
okano 0:f4584dba3bac 98 wait_ms( 20 );
okano 0:f4584dba3bac 99 }
okano 0:f4584dba3bac 100
okano 4:cb0ef3fd89c9 101 _spi.format( 8 );
okano 4:cb0ef3fd89c9 102 _spi.frequency( SPI_FREQUENCY );
okano 0:f4584dba3bac 103 }
okano 0:f4584dba3bac 104
okano 0:f4584dba3bac 105 void MARY_CAMERA::transfer_a_line( short *p, int line_number, int x_offset, int n_of_pixels )
okano 0:f4584dba3bac 106 {
okano 0:f4584dba3bac 107 set_address( line_number * BYTE_PER_LINE + x_offset * BYTE_PER_PIXEL );
okano 0:f4584dba3bac 108
okano 0:f4584dba3bac 109 read_register( CAMERA_DATA_REGISTER );
okano 0:f4584dba3bac 110
okano 0:f4584dba3bac 111 for( int x = 0; x < n_of_pixels; x++ )
okano 0:f4584dba3bac 112 *p++ = (read_register( CAMERA_DATA_REGISTER ) << 8) | (read_register( CAMERA_DATA_REGISTER ) << 0);
okano 0:f4584dba3bac 113 }
okano 0:f4584dba3bac 114
okano 0:f4584dba3bac 115 void MARY_CAMERA::write_register( char reg, char value )
okano 0:f4584dba3bac 116 {
okano 0:f4584dba3bac 117 send_spi( COMMAND_WRITE | reg );
okano 0:f4584dba3bac 118 send_spi( value );
okano 0:f4584dba3bac 119 }
okano 0:f4584dba3bac 120
okano 0:f4584dba3bac 121 int MARY_CAMERA::read_register( char reg )
okano 0:f4584dba3bac 122 {
okano 0:f4584dba3bac 123 return ( send_spi( COMMAND_READ | reg | ((reg == CAMERA_DATA_REGISTER) ? COMMAND_ADDR_INCREMENT : 0x00) ) );
okano 0:f4584dba3bac 124 }
okano 0:f4584dba3bac 125
okano 0:f4584dba3bac 126 void MARY_CAMERA::open_transfer( void )
okano 0:f4584dba3bac 127 {
okano 0:f4584dba3bac 128 write_register( CONTROL_DATA_REGISTER, CONTROL__PAUSE_BUFFER_UPDATE );
okano 0:f4584dba3bac 129
okano 0:f4584dba3bac 130 read_register( STATUS_REGISTER );
okano 4:cb0ef3fd89c9 131
okano 4:cb0ef3fd89c9 132 while ( !(read_register( STATUS_REGISTER ) & 0x1) );
okano 0:f4584dba3bac 133 }
okano 0:f4584dba3bac 134
okano 0:f4584dba3bac 135 void MARY_CAMERA::close_transfer( void )
okano 0:f4584dba3bac 136 {
okano 0:f4584dba3bac 137 write_register( CONTROL_DATA_REGISTER, CONTROL__RESUME_BUFFER_UPDATE );
okano 0:f4584dba3bac 138
okano 0:f4584dba3bac 139 read_register( STATUS_REGISTER );
okano 4:cb0ef3fd89c9 140
okano 4:cb0ef3fd89c9 141 while ( read_register( STATUS_REGISTER ) & 0x1 );
okano 0:f4584dba3bac 142 }
okano 0:f4584dba3bac 143
okano 0:f4584dba3bac 144
okano 0:f4584dba3bac 145 void MARY_CAMERA::set_address( int address )
okano 0:f4584dba3bac 146 {
okano 0:f4584dba3bac 147 write_register( MEMORY_ADDR_LOW__REGISTER, (address >> 0) & 0xFF );
okano 0:f4584dba3bac 148 write_register( MEMORY_ADDR_MID__REGISTER, (address >> 8) & 0xFF );
okano 0:f4584dba3bac 149 write_register( MEMORY_ADDR_HIGH_REGISTER, (address >> 16) & 0xFF );
okano 0:f4584dba3bac 150 }
okano 0:f4584dba3bac 151
okano 0:f4584dba3bac 152 int MARY_CAMERA::send_spi( char data )
okano 0:f4584dba3bac 153 {
okano 0:f4584dba3bac 154 int tmp;
okano 0:f4584dba3bac 155
okano 4:cb0ef3fd89c9 156 _cs = 0;
okano 4:cb0ef3fd89c9 157 tmp = _spi.write( data );
okano 4:cb0ef3fd89c9 158 _cs = 1;
okano 4:cb0ef3fd89c9 159
okano 0:f4584dba3bac 160 return ( tmp );
okano 0:f4584dba3bac 161 }