Tedd OKANO / IAP

IAP class library for LPC1768, LPC11U24, LPC1114, LPC812 and LPC824

Dependents:   MakerBotServer SystemManagement IAP_testing Arch_Pro_TCPSocket ... more

IAP.cpp@2:17f3464672c1, 2015-01-09 (annotated)

Committer:
okano
Date:
Fri Jan 09 06:36:56 2015 +0000
Revision:
2:17f3464672c1
Parent:
1:ff906ad52cf9
Child:
3:87e117b1bdf2
ver3 : LPC812, LPC824 support

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okano 0:ada7fb504504 1 /** IAP : internal Flash memory access library
okano 0:ada7fb504504 2 *
okano 2:17f3464672c1 3 * The internal Flash memory access is described in the LPC1768 and LPC11U24 usermanual.
okano 0:ada7fb504504 4 * http://www.nxp.com/documents/user_manual/UM10360.pdf
okano 0:ada7fb504504 5 * http://www.nxp.com/documents/user_manual/UM10462.pdf
okano 0:ada7fb504504 6 *
okano 0:ada7fb504504 7 * LPC1768 --
okano 0:ada7fb504504 8 * Chapter 2: "LPC17xx Memory map"
okano 0:ada7fb504504 9 * Chapter 32: "LPC17xx Flash memory interface and programming"
okano 0:ada7fb504504 10 * refering Rev. 01 - 4 January 2010
okano 2:17f3464672c1 11 *
okano 0:ada7fb504504 12 * LPC11U24 --
okano 0:ada7fb504504 13 * Chapter 2: "LPC11Uxx Memory mapping"
okano 0:ada7fb504504 14 * Chapter 20: "LPC11Uxx Flash programming firmware"
okano 0:ada7fb504504 15 * refering Rev. 03 - 16 July 2012
okano 2:17f3464672c1 16 *
okano 0:ada7fb504504 17 * Released under the MIT License: http://mbed.org/license/mit
okano 0:ada7fb504504 18 *
okano 0:ada7fb504504 19 * revision 1.0 09-Mar-2010 1st release
okano 0:ada7fb504504 20 * revision 1.1 12-Mar-2010 chaged: to make possible to reserve flash area for user
okano 0:ada7fb504504 21 * it can be set by USER_FLASH_AREA_START and USER_FLASH_AREA_SIZE in IAP.h
okano 1:ff906ad52cf9 22 * revision 2.0 26-Nov-2012 LPC11U24 code added
okano 1:ff906ad52cf9 23 * revision 2.1 26-Nov-2012 EEPROM access code imported from Suga koubou san's (http://mbed.org/users/okini3939/) library
okano 1:ff906ad52cf9 24 * http://mbed.org/users/okini3939/code/M0_EEPROM_test/
okano 2:17f3464672c1 25 * revision 3.0 09-Jan-2014 LPC812 and LPC824 support added
okano 0:ada7fb504504 26 */
okano 0:ada7fb504504 27
okano 0:ada7fb504504 28 #include "mbed.h"
okano 0:ada7fb504504 29 #include "IAP.h"
okano 0:ada7fb504504 30
okano 0:ada7fb504504 31 #define USER_FLASH_AREA_START_STR( x ) STR( x )
okano 0:ada7fb504504 32 #define STR( x ) #x
okano 0:ada7fb504504 33
okano 0:ada7fb504504 34 unsigned char user_area[ USER_FLASH_AREA_SIZE ] __attribute__((section( ".ARM.__at_" USER_FLASH_AREA_START_STR( USER_FLASH_AREA_START ) ), zero_init));
okano 0:ada7fb504504 35
okano 0:ada7fb504504 36 /*
okano 0:ada7fb504504 37 * Reserve of flash area is explained by Igor. Please refer next URL
okano 0:ada7fb504504 38 * http://mbed.org/users/okano/notebook/iap-in-application-programming-internal-flash-eras/?page=1#comment-271
okano 0:ada7fb504504 39 */
okano 2:17f3464672c1 40
okano 0:ada7fb504504 41 //unsigned char user_area[ size ] __attribute__((section(".ARM.__at_0x78000"), zero_init));
okano 0:ada7fb504504 42
okano 0:ada7fb504504 43 /*
okano 0:ada7fb504504 44 * IAP command codes
okano 0:ada7fb504504 45 * Table 589. "IAP Command Summary", Chapter 8. "IAP commands", usermanual
okano 0:ada7fb504504 46 */
okano 0:ada7fb504504 47
okano 2:17f3464672c1 48 enum command_code {
okano 2:17f3464672c1 49 IAPCommand_Prepare_sector_for_write_operation = 50,
okano 2:17f3464672c1 50 IAPCommand_Copy_RAM_to_Flash,
okano 2:17f3464672c1 51 IAPCommand_Erase_sector,
okano 2:17f3464672c1 52 IAPCommand_Blank_check_sector,
okano 2:17f3464672c1 53 IAPCommand_Read_part_ID,
okano 2:17f3464672c1 54 IAPCommand_Read_Boot_Code_version,
okano 2:17f3464672c1 55 IAPCommand_Compare,
okano 2:17f3464672c1 56 IAPCommand_Reinvoke_ISP,
okano 2:17f3464672c1 57 IAPCommand_Read_device_serial_number,
okano 1:ff906ad52cf9 58 #if defined(TARGET_LPC11U24)
okano 2:17f3464672c1 59 IAPCommand_EEPROM_Write = 61,
okano 2:17f3464672c1 60 IAPCommand_EEPROM_Read,
okano 2:17f3464672c1 61 #elif defined(TARGET_LPC812) || defined(TARGET_LPC824)
okano 2:17f3464672c1 62 IAPCommand_Erase_page = 59,
okano 1:ff906ad52cf9 63 #endif
okano 2:17f3464672c1 64 };
okano 0:ada7fb504504 65
okano 2:17f3464672c1 66 int IAP::read_ID( void )
okano 2:17f3464672c1 67 {
okano 2:17f3464672c1 68 IAP_command[ 0 ] = IAPCommand_Read_part_ID;
okano 0:ada7fb504504 69
okano 0:ada7fb504504 70 iap_entry( IAP_command, IAP_result );
okano 2:17f3464672c1 71
okano 0:ada7fb504504 72 // return ( (int)IAP_result[ 0 ] );
okano 0:ada7fb504504 73 return ( (int)IAP_result[ 1 ] ); // to return the number itself (this command always returns CMD_SUCCESS)
okano 0:ada7fb504504 74 }
okano 0:ada7fb504504 75
okano 2:17f3464672c1 76 int IAP::read_serial( void )
okano 2:17f3464672c1 77 {
okano 2:17f3464672c1 78 IAP_command[ 0 ] = IAPCommand_Read_device_serial_number;
okano 0:ada7fb504504 79
okano 2:17f3464672c1 80 iap_entry( IAP_command, IAP_result );
okano 0:ada7fb504504 81
okano 0:ada7fb504504 82 // return ( (int)IAP_result[ 0 ] );
okano 0:ada7fb504504 83 return ( (int)IAP_result[ 1 ] ); // to return the number itself (this command always returns CMD_SUCCESS)
okano 0:ada7fb504504 84 }
okano 0:ada7fb504504 85
okano 2:17f3464672c1 86 int IAP::blank_check( int start, int end )
okano 2:17f3464672c1 87 {
okano 0:ada7fb504504 88 IAP_command[ 0 ] = IAPCommand_Blank_check_sector;
okano 0:ada7fb504504 89 IAP_command[ 1 ] = (unsigned int)start; // Start Sector Number
okano 0:ada7fb504504 90 IAP_command[ 2 ] = (unsigned int)end; // End Sector Number (should be greater than or equal to start sector number)
okano 0:ada7fb504504 91
okano 0:ada7fb504504 92 iap_entry( IAP_command, IAP_result );
okano 0:ada7fb504504 93
okano 0:ada7fb504504 94 return ( (int)IAP_result[ 0 ] );
okano 0:ada7fb504504 95 }
okano 0:ada7fb504504 96
okano 2:17f3464672c1 97 int IAP::erase( int start, int end )
okano 2:17f3464672c1 98 {
okano 0:ada7fb504504 99 IAP_command[ 0 ] = IAPCommand_Erase_sector;
okano 0:ada7fb504504 100 IAP_command[ 1 ] = (unsigned int)start; // Start Sector Number
okano 0:ada7fb504504 101 IAP_command[ 2 ] = (unsigned int)end; // End Sector Number (should be greater than or equal to start sector number)
okano 0:ada7fb504504 102 IAP_command[ 3 ] = cclk_kHz; // CPU Clock Frequency (CCLK) in kHz
okano 0:ada7fb504504 103
okano 0:ada7fb504504 104 iap_entry( IAP_command, IAP_result );
okano 0:ada7fb504504 105
okano 0:ada7fb504504 106 return ( (int)IAP_result[ 0 ] );
okano 0:ada7fb504504 107 }
okano 0:ada7fb504504 108
okano 2:17f3464672c1 109 int IAP::prepare( int start, int end )
okano 2:17f3464672c1 110 {
okano 0:ada7fb504504 111 IAP_command[ 0 ] = IAPCommand_Prepare_sector_for_write_operation;
okano 0:ada7fb504504 112 IAP_command[ 1 ] = (unsigned int)start; // Start Sector Number
okano 0:ada7fb504504 113 IAP_command[ 2 ] = (unsigned int)end; // End Sector Number (should be greater than or equal to start sector number).
okano 2:17f3464672c1 114
okano 0:ada7fb504504 115 iap_entry( IAP_command, IAP_result );
okano 2:17f3464672c1 116
okano 0:ada7fb504504 117 return ( (int)IAP_result[ 0 ] );
okano 0:ada7fb504504 118 }
okano 0:ada7fb504504 119
okano 2:17f3464672c1 120 int IAP::write( char *source_addr, char *target_addr, int size )
okano 2:17f3464672c1 121 {
okano 0:ada7fb504504 122 IAP_command[ 0 ] = IAPCommand_Copy_RAM_to_Flash;
okano 0:ada7fb504504 123 IAP_command[ 1 ] = (unsigned int)target_addr; // Destination flash address where data bytes are to be written. This address should be a 256 byte boundary.
okano 0:ada7fb504504 124 IAP_command[ 2 ] = (unsigned int)source_addr; // Source RAM address from which data bytes are to be read. This address should be a word boundary.
okano 0:ada7fb504504 125 IAP_command[ 3 ] = size; // Number of bytes to be written. Should be 256 | 512 | 1024 | 4096.
okano 0:ada7fb504504 126 IAP_command[ 4 ] = cclk_kHz; // CPU Clock Frequency (CCLK) in kHz.
okano 0:ada7fb504504 127
okano 0:ada7fb504504 128 iap_entry( IAP_command, IAP_result );
okano 0:ada7fb504504 129
okano 0:ada7fb504504 130 return ( (int)IAP_result[ 0 ] );
okano 0:ada7fb504504 131 }
okano 0:ada7fb504504 132
okano 2:17f3464672c1 133 int IAP::compare( char *source_addr, char *target_addr, int size )
okano 2:17f3464672c1 134 {
okano 0:ada7fb504504 135 IAP_command[ 0 ] = IAPCommand_Compare;
okano 0:ada7fb504504 136 IAP_command[ 1 ] = (unsigned int)target_addr; // Starting flash or RAM address of data bytes to be compared. This address should be a word boundary.
okano 0:ada7fb504504 137 IAP_command[ 2 ] = (unsigned int)source_addr; // Starting flash or RAM address of data bytes to be compared. This address should be a word boundary.
okano 0:ada7fb504504 138 IAP_command[ 3 ] = size; // Number of bytes to be compared; should be a multiple of 4.
okano 0:ada7fb504504 139
okano 0:ada7fb504504 140 iap_entry( IAP_command, IAP_result );
okano 0:ada7fb504504 141
okano 0:ada7fb504504 142 return ( (int)IAP_result[ 0 ] );
okano 0:ada7fb504504 143 }
okano 0:ada7fb504504 144
okano 2:17f3464672c1 145 int IAP::read_BootVer(void)
okano 2:17f3464672c1 146 {
okano 0:ada7fb504504 147 IAP_command[0] = IAPCommand_Read_Boot_Code_version;
okano 0:ada7fb504504 148 IAP_result[1] = 0; // not sure if in high or low bits.
okano 0:ada7fb504504 149 iap_entry(IAP_command, IAP_result);
okano 0:ada7fb504504 150 return ((int)IAP_result[1]);
okano 0:ada7fb504504 151 }
okano 0:ada7fb504504 152
okano 0:ada7fb504504 153 char * IAP::reserved_flash_area_start( void )
okano 0:ada7fb504504 154 {
okano 0:ada7fb504504 155 return ( (char *)USER_FLASH_AREA_START );
okano 0:ada7fb504504 156 }
okano 0:ada7fb504504 157
okano 0:ada7fb504504 158 int IAP::reserved_flash_area_size( void )
okano 0:ada7fb504504 159 {
okano 0:ada7fb504504 160 return ( USER_FLASH_AREA_SIZE );
okano 0:ada7fb504504 161 }
okano 0:ada7fb504504 162
okano 1:ff906ad52cf9 163 #if defined(TARGET_LPC11U24)
okano 2:17f3464672c1 164
okano 2:17f3464672c1 165 int IAP::write_eeprom( char *source_addr, char *target_addr, int size )
okano 2:17f3464672c1 166 {
okano 1:ff906ad52cf9 167 IAP_command[ 0 ] = IAPCommand_EEPROM_Write;
okano 1:ff906ad52cf9 168 IAP_command[ 1 ] = (unsigned int)target_addr; // Destination EEPROM address where data bytes are to be written. This address should be a 256 byte boundary.
okano 1:ff906ad52cf9 169 IAP_command[ 2 ] = (unsigned int)source_addr; // Source RAM address from which data bytes are to be read. This address should be a word boundary.
okano 1:ff906ad52cf9 170 IAP_command[ 3 ] = size; // Number of bytes to be written. Should be 256 | 512 | 1024 | 4096.
okano 1:ff906ad52cf9 171 IAP_command[ 4 ] = cclk_kHz; // CPU Clock Frequency (CCLK) in kHz.
okano 2:17f3464672c1 172
okano 1:ff906ad52cf9 173 iap_entry( IAP_command, IAP_result );
okano 2:17f3464672c1 174
okano 1:ff906ad52cf9 175 return ( (int)IAP_result[ 0 ] );
okano 1:ff906ad52cf9 176 }
okano 2:17f3464672c1 177
okano 2:17f3464672c1 178 int IAP::read_eeprom( char *source_addr, char *target_addr, int size )
okano 2:17f3464672c1 179 {
okano 1:ff906ad52cf9 180 IAP_command[ 0 ] = IAPCommand_EEPROM_Read;
okano 1:ff906ad52cf9 181 IAP_command[ 1 ] = (unsigned int)source_addr; // Source EEPROM address from which data bytes are to be read. This address should be a word boundary.
okano 1:ff906ad52cf9 182 IAP_command[ 2 ] = (unsigned int)target_addr; // Destination RAM address where data bytes are to be written. This address should be a 256 byte boundary.
okano 1:ff906ad52cf9 183 IAP_command[ 3 ] = size; // Number of bytes to be written. Should be 256 | 512 | 1024 | 4096.
okano 1:ff906ad52cf9 184 IAP_command[ 4 ] = cclk_kHz; // CPU Clock Frequency (CCLK) in kHz.
okano 2:17f3464672c1 185
okano 1:ff906ad52cf9 186 iap_entry( IAP_command, IAP_result );
okano 2:17f3464672c1 187
okano 1:ff906ad52cf9 188 return ( (int)IAP_result[ 0 ] );
okano 1:ff906ad52cf9 189 }
okano 2:17f3464672c1 190
okano 2:17f3464672c1 191 #elif defined(TARGET_LPC812) || defined(TARGET_LPC824)
okano 2:17f3464672c1 192
okano 2:17f3464672c1 193 int IAP::erase_page( int start, int end )
okano 2:17f3464672c1 194 {
okano 2:17f3464672c1 195 IAP_command[ 0 ] = IAPCommand_Erase_page;
okano 2:17f3464672c1 196 IAP_command[ 1 ] = (unsigned int)start; // Start Sector Number
okano 2:17f3464672c1 197 IAP_command[ 2 ] = (unsigned int)end; // End Sector Number (should be greater than or equal to start sector number)
okano 2:17f3464672c1 198 IAP_command[ 3 ] = cclk_kHz; // CPU Clock Frequency (CCLK) in kHz
okano 2:17f3464672c1 199
okano 2:17f3464672c1 200 iap_entry( IAP_command, IAP_result );
okano 2:17f3464672c1 201
okano 2:17f3464672c1 202 return ( (int)IAP_result[ 0 ] );
okano 2:17f3464672c1 203 }
okano 2:17f3464672c1 204
okano 1:ff906ad52cf9 205 #endif