Ryo Iizuka / NyFileSystems

SDFileSystem/LocalFileSystem等の不具合や機種依存性を少なくしたライブラリ。 MiMic用

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Fork of NySDFileSystem by Ryo Iizuka

SDFileSystem.cpp@11:509d2ac0ba4f, 2014-07-11 (annotated)

Committer:
nyatla
Date:
Fri Jul 11 01:16:56 2014 +0000
Revision:
11:509d2ac0ba4f
Parent:
8:22ce3449b224
Child:
9:b2ca0e66c1f7
FATFS?TINY??????1???

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:7153ee70df01 1 /* mbed Microcontroller Library
emilmont 1:7153ee70df01 2 * Copyright (c) 2006-2012 ARM Limited
emilmont 1:7153ee70df01 3 *
emilmont 1:7153ee70df01 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
emilmont 1:7153ee70df01 5 * of this software and associated documentation files (the "Software"), to deal
emilmont 1:7153ee70df01 6 * in the Software without restriction, including without limitation the rights
emilmont 1:7153ee70df01 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
emilmont 1:7153ee70df01 8 * copies of the Software, and to permit persons to whom the Software is
emilmont 1:7153ee70df01 9 * furnished to do so, subject to the following conditions:
emilmont 1:7153ee70df01 10 *
emilmont 1:7153ee70df01 11 * The above copyright notice and this permission notice shall be included in
emilmont 1:7153ee70df01 12 * all copies or substantial portions of the Software.
emilmont 1:7153ee70df01 13 *
emilmont 1:7153ee70df01 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
emilmont 1:7153ee70df01 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
emilmont 1:7153ee70df01 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
emilmont 1:7153ee70df01 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
emilmont 1:7153ee70df01 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
emilmont 1:7153ee70df01 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
emilmont 1:7153ee70df01 20 * SOFTWARE.
emilmont 1:7153ee70df01 21 */
emilmont 1:7153ee70df01 22 /* Introduction
emilmont 1:7153ee70df01 23 * ------------
emilmont 1:7153ee70df01 24 * SD and MMC cards support a number of interfaces, but common to them all
emilmont 1:7153ee70df01 25 * is one based on SPI. This is the one I'm implmenting because it means
emilmont 1:7153ee70df01 26 * it is much more portable even though not so performant, and we already
emilmont 1:7153ee70df01 27 * have the mbed SPI Interface!
emilmont 1:7153ee70df01 28 *
emilmont 1:7153ee70df01 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
emilmont 1:7153ee70df01 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
emilmont 1:7153ee70df01 31 *
emilmont 1:7153ee70df01 32 * SPI Startup
emilmont 1:7153ee70df01 33 * -----------
emilmont 1:7153ee70df01 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
emilmont 1:7153ee70df01 35 * asserting CS low and sending the reset command (CMD0). The card will
emilmont 1:7153ee70df01 36 * respond with a (R1) response.
emilmont 1:7153ee70df01 37 *
emilmont 1:7153ee70df01 38 * CMD8 is optionally sent to determine the voltage range supported, and
emilmont 1:7153ee70df01 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
emilmont 1:7153ee70df01 40 * version 2.x. I'll just ignore this for now.
emilmont 1:7153ee70df01 41 *
emilmont 1:7153ee70df01 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
emilmont 1:7153ee70df01 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
emilmont 1:7153ee70df01 44 *
emilmont 1:7153ee70df01 45 * You should also indicate whether the host supports High Capicity cards,
emilmont 1:7153ee70df01 46 * and check whether the card is high capacity - i'll also ignore this
emilmont 1:7153ee70df01 47 *
emilmont 1:7153ee70df01 48 * SPI Protocol
emilmont 1:7153ee70df01 49 * ------------
emilmont 1:7153ee70df01 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
emilmont 1:7153ee70df01 51 * the host starting every bus transaction by asserting the CS signal low. The
emilmont 1:7153ee70df01 52 * card always responds to commands, data blocks and errors.
emilmont 1:7153ee70df01 53 *
emilmont 1:7153ee70df01 54 * The protocol supports a CRC, but by default it is off (except for the
emilmont 1:7153ee70df01 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
emilmont 1:7153ee70df01 56 * I'll leave the CRC off I think!
emilmont 1:7153ee70df01 57 *
emilmont 1:7153ee70df01 58 * Standard capacity cards have variable data block sizes, whereas High
emilmont 1:7153ee70df01 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
emilmont 1:7153ee70df01 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
emilmont 1:7153ee70df01 61 * This is set with CMD16.
emilmont 1:7153ee70df01 62 *
emilmont 1:7153ee70df01 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
emilmont 1:7153ee70df01 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
emilmont 1:7153ee70df01 65 * the card gets a read command, it responds with a response token, and then
emilmont 1:7153ee70df01 66 * a data token or an error.
emilmont 1:7153ee70df01 67 *
emilmont 1:7153ee70df01 68 * SPI Command Format
emilmont 1:7153ee70df01 69 * ------------------
emilmont 1:7153ee70df01 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
emilmont 1:7153ee70df01 71 *
emilmont 1:7153ee70df01 72 * +---------------+------------+------------+-----------+----------+--------------+
emilmont 1:7153ee70df01 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
emilmont 1:7153ee70df01 74 * +---------------+------------+------------+-----------+----------+--------------+
emilmont 1:7153ee70df01 75 *
emilmont 1:7153ee70df01 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
emilmont 1:7153ee70df01 77 *
emilmont 1:7153ee70df01 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
emilmont 1:7153ee70df01 79 *
emilmont 1:7153ee70df01 80 * SPI Response Format
emilmont 1:7153ee70df01 81 * -------------------
emilmont 1:7153ee70df01 82 * The main response format (R1) is a status byte (normally zero). Key flags:
emilmont 1:7153ee70df01 83 * idle - 1 if the card is in an idle state/initialising
emilmont 1:7153ee70df01 84 * cmd - 1 if an illegal command code was detected
emilmont 1:7153ee70df01 85 *
emilmont 1:7153ee70df01 86 * +-------------------------------------------------+
emilmont 1:7153ee70df01 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
emilmont 1:7153ee70df01 88 * +-------------------------------------------------+
emilmont 1:7153ee70df01 89 *
emilmont 1:7153ee70df01 90 * R1b is the same, except it is followed by a busy signal (zeros) until
emilmont 1:7153ee70df01 91 * the first non-zero byte when it is ready again.
emilmont 1:7153ee70df01 92 *
emilmont 1:7153ee70df01 93 * Data Response Token
emilmont 1:7153ee70df01 94 * -------------------
emilmont 1:7153ee70df01 95 * Every data block written to the card is acknowledged by a byte
emilmont 1:7153ee70df01 96 * response token
emilmont 1:7153ee70df01 97 *
emilmont 1:7153ee70df01 98 * +----------------------+
emilmont 1:7153ee70df01 99 * | xxx | 0 | status | 1 |
emilmont 1:7153ee70df01 100 * +----------------------+
emilmont 1:7153ee70df01 101 * 010 - OK!
emilmont 1:7153ee70df01 102 * 101 - CRC Error
emilmont 1:7153ee70df01 103 * 110 - Write Error
emilmont 1:7153ee70df01 104 *
emilmont 1:7153ee70df01 105 * Single Block Read and Write
emilmont 1:7153ee70df01 106 * ---------------------------
emilmont 1:7153ee70df01 107 *
emilmont 1:7153ee70df01 108 * Block transfers have a byte header, followed by the data, followed
emilmont 1:7153ee70df01 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
emilmont 1:7153ee70df01 110 *
emilmont 1:7153ee70df01 111 * +------+---------+---------+- - - -+---------+-----------+----------+
emilmont 1:7153ee70df01 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
emilmont 1:7153ee70df01 113 * +------+---------+---------+- - - -+---------+-----------+----------+
emilmont 1:7153ee70df01 114 */
emilmont 1:7153ee70df01 115 #include "SDFileSystem.h"
nyatla 8:22ce3449b224 116
nyatla 7:5429e81addde 117
emilmont 1:7153ee70df01 118
emilmont 1:7153ee70df01 119 #define SD_COMMAND_TIMEOUT 5000
emilmont 1:7153ee70df01 120
emilmont 1:7153ee70df01 121 #define SD_DBG 0
emilmont 1:7153ee70df01 122
emilmont 1:7153ee70df01 123 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
emilmont 1:7153ee70df01 124 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
emilmont 1:7153ee70df01 125 _cs = 1;
emilmont 1:7153ee70df01 126 }
emilmont 1:7153ee70df01 127
emilmont 1:7153ee70df01 128 #define R1_IDLE_STATE (1 << 0)
emilmont 1:7153ee70df01 129 #define R1_ERASE_RESET (1 << 1)
emilmont 1:7153ee70df01 130 #define R1_ILLEGAL_COMMAND (1 << 2)
emilmont 1:7153ee70df01 131 #define R1_COM_CRC_ERROR (1 << 3)
emilmont 1:7153ee70df01 132 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
emilmont 1:7153ee70df01 133 #define R1_ADDRESS_ERROR (1 << 5)
emilmont 1:7153ee70df01 134 #define R1_PARAMETER_ERROR (1 << 6)
emilmont 1:7153ee70df01 135
emilmont 1:7153ee70df01 136 // Types
emilmont 1:7153ee70df01 137 // - v1.x Standard Capacity
emilmont 1:7153ee70df01 138 // - v2.x Standard Capacity
emilmont 1:7153ee70df01 139 // - v2.x High Capacity
emilmont 1:7153ee70df01 140 // - Not recognised as an SD Card
emilmont 1:7153ee70df01 141 #define SDCARD_FAIL 0
emilmont 1:7153ee70df01 142 #define SDCARD_V1 1
emilmont 1:7153ee70df01 143 #define SDCARD_V2 2
emilmont 1:7153ee70df01 144 #define SDCARD_V2HC 3
emilmont 1:7153ee70df01 145
emilmont 1:7153ee70df01 146 int SDFileSystem::initialise_card() {
nyatla 3:3fe3e381dd37 147
emilmont 1:7153ee70df01 148 // Set to 100kHz for initialisation, and clock card with cs = 1
emilmont 1:7153ee70df01 149 _spi.frequency(100000);
emilmont 1:7153ee70df01 150 _cs = 1;
emilmont 1:7153ee70df01 151 for (int i = 0; i < 16; i++) {
emilmont 1:7153ee70df01 152 _spi.write(0xFF);
emilmont 1:7153ee70df01 153 }
emilmont 1:7153ee70df01 154
emilmont 1:7153ee70df01 155 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
emilmont 1:7153ee70df01 156 if (_cmd(0, 0) != R1_IDLE_STATE) {
emilmont 1:7153ee70df01 157 return SDCARD_FAIL;
emilmont 1:7153ee70df01 158 }
emilmont 1:7153ee70df01 159
emilmont 1:7153ee70df01 160 // send CMD8 to determine whther it is ver 2.x
emilmont 1:7153ee70df01 161 int r = _cmd8();
emilmont 1:7153ee70df01 162 if (r == R1_IDLE_STATE) {
emilmont 1:7153ee70df01 163 return initialise_card_v2();
emilmont 1:7153ee70df01 164 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
emilmont 1:7153ee70df01 165 return initialise_card_v1();
emilmont 1:7153ee70df01 166 } else {
emilmont 1:7153ee70df01 167 return SDCARD_FAIL;
emilmont 1:7153ee70df01 168 }
emilmont 1:7153ee70df01 169 }
emilmont 1:7153ee70df01 170
emilmont 1:7153ee70df01 171 int SDFileSystem::initialise_card_v1() {
emilmont 1:7153ee70df01 172 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 173 _cmd(55, 0);
emilmont 1:7153ee70df01 174 if (_cmd(41, 0) == 0) {
emilmont 1:7153ee70df01 175 cdv = 512;
emilmont 1:7153ee70df01 176 return SDCARD_V1;
emilmont 1:7153ee70df01 177 }
emilmont 1:7153ee70df01 178 }
emilmont 1:7153ee70df01 179
emilmont 1:7153ee70df01 180 return SDCARD_FAIL;
emilmont 1:7153ee70df01 181 }
emilmont 1:7153ee70df01 182
emilmont 1:7153ee70df01 183 int SDFileSystem::initialise_card_v2() {
emilmont 1:7153ee70df01 184 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 185 wait_ms(50);
emilmont 1:7153ee70df01 186 _cmd58();
emilmont 1:7153ee70df01 187 _cmd(55, 0);
emilmont 1:7153ee70df01 188 if (_cmd(41, 0x40000000) == 0) {
emilmont 1:7153ee70df01 189 _cmd58();
emilmont 1:7153ee70df01 190 cdv = 1;
emilmont 1:7153ee70df01 191 return SDCARD_V2;
emilmont 1:7153ee70df01 192 }
emilmont 1:7153ee70df01 193 }
emilmont 1:7153ee70df01 194
emilmont 1:7153ee70df01 195 return SDCARD_FAIL;
emilmont 1:7153ee70df01 196 }
emilmont 1:7153ee70df01 197
emilmont 1:7153ee70df01 198 int SDFileSystem::disk_initialize() {
emilmont 1:7153ee70df01 199 int i = initialise_card();
nyatla 3:3fe3e381dd37 200 if(i==SDCARD_FAIL){
nyatla 3:3fe3e381dd37 201 return 1;
nyatla 3:3fe3e381dd37 202 }
emilmont 1:7153ee70df01 203 _sectors = _sd_sectors();
emilmont 1:7153ee70df01 204
emilmont 1:7153ee70df01 205 // Set block length to 512 (CMD16)
emilmont 1:7153ee70df01 206 if (_cmd(16, 512) != 0) {
emilmont 1:7153ee70df01 207 return 1;
emilmont 1:7153ee70df01 208 }
emilmont 1:7153ee70df01 209
emilmont 1:7153ee70df01 210 _spi.frequency(1000000); // Set to 1MHz for data transfer
emilmont 1:7153ee70df01 211 return 0;
emilmont 1:7153ee70df01 212 }
emilmont 1:7153ee70df01 213
emilmont 1:7153ee70df01 214 int SDFileSystem::disk_write(const uint8_t *buffer, uint64_t block_number) {
emilmont 1:7153ee70df01 215 // set write address for single block (CMD24)
emilmont 1:7153ee70df01 216 if (_cmd(24, block_number * cdv) != 0) {
emilmont 1:7153ee70df01 217 return 1;
emilmont 1:7153ee70df01 218 }
emilmont 1:7153ee70df01 219
emilmont 1:7153ee70df01 220 // send the data block
emilmont 1:7153ee70df01 221 _write(buffer, 512);
emilmont 1:7153ee70df01 222 return 0;
emilmont 1:7153ee70df01 223 }
emilmont 1:7153ee70df01 224
emilmont 1:7153ee70df01 225 int SDFileSystem::disk_read(uint8_t *buffer, uint64_t block_number) {
emilmont 1:7153ee70df01 226 // set read address for single block (CMD17)
emilmont 1:7153ee70df01 227 if (_cmd(17, block_number * cdv) != 0) {
emilmont 1:7153ee70df01 228 return 1;
emilmont 1:7153ee70df01 229 }
emilmont 1:7153ee70df01 230
emilmont 1:7153ee70df01 231 // receive the data
emilmont 1:7153ee70df01 232 _read(buffer, 512);
emilmont 1:7153ee70df01 233 return 0;
emilmont 1:7153ee70df01 234 }
emilmont 1:7153ee70df01 235
emilmont 1:7153ee70df01 236 int SDFileSystem::disk_status() { return 0; }
emilmont 1:7153ee70df01 237 int SDFileSystem::disk_sync() { return 0; }
emilmont 1:7153ee70df01 238 uint64_t SDFileSystem::disk_sectors() { return _sectors; }
emilmont 1:7153ee70df01 239
emilmont 1:7153ee70df01 240
emilmont 1:7153ee70df01 241 // PRIVATE FUNCTIONS
emilmont 1:7153ee70df01 242 int SDFileSystem::_cmd(int cmd, int arg) {
emilmont 1:7153ee70df01 243 _cs = 0;
emilmont 1:7153ee70df01 244
emilmont 1:7153ee70df01 245 // send a command
emilmont 1:7153ee70df01 246 _spi.write(0x40 | cmd);
emilmont 1:7153ee70df01 247 _spi.write(arg >> 24);
emilmont 1:7153ee70df01 248 _spi.write(arg >> 16);
emilmont 1:7153ee70df01 249 _spi.write(arg >> 8);
emilmont 1:7153ee70df01 250 _spi.write(arg >> 0);
emilmont 1:7153ee70df01 251 _spi.write(0x95);
emilmont 1:7153ee70df01 252
emilmont 1:7153ee70df01 253 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 254 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 255 int response = _spi.write(0xFF);
emilmont 1:7153ee70df01 256 if (!(response & 0x80)) {
emilmont 1:7153ee70df01 257 _cs = 1;
emilmont 1:7153ee70df01 258 _spi.write(0xFF);
emilmont 1:7153ee70df01 259 return response;
emilmont 1:7153ee70df01 260 }
emilmont 1:7153ee70df01 261 }
emilmont 1:7153ee70df01 262 _cs = 1;
emilmont 1:7153ee70df01 263 _spi.write(0xFF);
emilmont 1:7153ee70df01 264 return -1; // timeout
emilmont 1:7153ee70df01 265 }
emilmont 1:7153ee70df01 266 int SDFileSystem::_cmdx(int cmd, int arg) {
emilmont 1:7153ee70df01 267 _cs = 0;
emilmont 1:7153ee70df01 268
emilmont 1:7153ee70df01 269 // send a command
emilmont 1:7153ee70df01 270 _spi.write(0x40 | cmd);
emilmont 1:7153ee70df01 271 _spi.write(arg >> 24);
emilmont 1:7153ee70df01 272 _spi.write(arg >> 16);
emilmont 1:7153ee70df01 273 _spi.write(arg >> 8);
emilmont 1:7153ee70df01 274 _spi.write(arg >> 0);
emilmont 1:7153ee70df01 275 _spi.write(0x95);
emilmont 1:7153ee70df01 276
emilmont 1:7153ee70df01 277 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 278 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 279 int response = _spi.write(0xFF);
emilmont 1:7153ee70df01 280 if (!(response & 0x80)) {
emilmont 1:7153ee70df01 281 return response;
emilmont 1:7153ee70df01 282 }
emilmont 1:7153ee70df01 283 }
emilmont 1:7153ee70df01 284 _cs = 1;
emilmont 1:7153ee70df01 285 _spi.write(0xFF);
emilmont 1:7153ee70df01 286 return -1; // timeout
emilmont 1:7153ee70df01 287 }
emilmont 1:7153ee70df01 288
emilmont 1:7153ee70df01 289
emilmont 1:7153ee70df01 290 int SDFileSystem::_cmd58() {
emilmont 1:7153ee70df01 291 _cs = 0;
emilmont 1:7153ee70df01 292 int arg = 0;
emilmont 1:7153ee70df01 293
emilmont 1:7153ee70df01 294 // send a command
emilmont 1:7153ee70df01 295 _spi.write(0x40 | 58);
emilmont 1:7153ee70df01 296 _spi.write(arg >> 24);
emilmont 1:7153ee70df01 297 _spi.write(arg >> 16);
emilmont 1:7153ee70df01 298 _spi.write(arg >> 8);
emilmont 1:7153ee70df01 299 _spi.write(arg >> 0);
emilmont 1:7153ee70df01 300 _spi.write(0x95);
emilmont 1:7153ee70df01 301
emilmont 1:7153ee70df01 302 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 303 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
emilmont 1:7153ee70df01 304 int response = _spi.write(0xFF);
emilmont 1:7153ee70df01 305 if (!(response & 0x80)) {
emilmont 1:7153ee70df01 306 int ocr = _spi.write(0xFF) << 24;
emilmont 1:7153ee70df01 307 ocr |= _spi.write(0xFF) << 16;
emilmont 1:7153ee70df01 308 ocr |= _spi.write(0xFF) << 8;
emilmont 1:7153ee70df01 309 ocr |= _spi.write(0xFF) << 0;
emilmont 1:7153ee70df01 310 _cs = 1;
emilmont 1:7153ee70df01 311 _spi.write(0xFF);
emilmont 1:7153ee70df01 312 return response;
emilmont 1:7153ee70df01 313 }
emilmont 1:7153ee70df01 314 }
emilmont 1:7153ee70df01 315 _cs = 1;
emilmont 1:7153ee70df01 316 _spi.write(0xFF);
emilmont 1:7153ee70df01 317 return -1; // timeout
emilmont 1:7153ee70df01 318 }
emilmont 1:7153ee70df01 319
emilmont 1:7153ee70df01 320 int SDFileSystem::_cmd8() {
emilmont 1:7153ee70df01 321 _cs = 0;
emilmont 1:7153ee70df01 322
emilmont 1:7153ee70df01 323 // send a command
emilmont 1:7153ee70df01 324 _spi.write(0x40 | 8); // CMD8
emilmont 1:7153ee70df01 325 _spi.write(0x00); // reserved
emilmont 1:7153ee70df01 326 _spi.write(0x00); // reserved
emilmont 1:7153ee70df01 327 _spi.write(0x01); // 3.3v
emilmont 1:7153ee70df01 328 _spi.write(0xAA); // check pattern
emilmont 1:7153ee70df01 329 _spi.write(0x87); // crc
emilmont 1:7153ee70df01 330
emilmont 1:7153ee70df01 331 // wait for the repsonse (response[7] == 0)
emilmont 1:7153ee70df01 332 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
emilmont 1:7153ee70df01 333 char response[5];
emilmont 1:7153ee70df01 334 response[0] = _spi.write(0xFF);
emilmont 1:7153ee70df01 335 if (!(response[0] & 0x80)) {
emilmont 1:7153ee70df01 336 for (int j = 1; j < 5; j++) {
emilmont 1:7153ee70df01 337 response[i] = _spi.write(0xFF);
emilmont 1:7153ee70df01 338 }
emilmont 1:7153ee70df01 339 _cs = 1;
emilmont 1:7153ee70df01 340 _spi.write(0xFF);
emilmont 1:7153ee70df01 341 return response[0];
emilmont 1:7153ee70df01 342 }
emilmont 1:7153ee70df01 343 }
emilmont 1:7153ee70df01 344 _cs = 1;
emilmont 1:7153ee70df01 345 _spi.write(0xFF);
emilmont 1:7153ee70df01 346 return -1; // timeout
emilmont 1:7153ee70df01 347 }
emilmont 1:7153ee70df01 348
emilmont 1:7153ee70df01 349 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
emilmont 1:7153ee70df01 350 _cs = 0;
emilmont 1:7153ee70df01 351
emilmont 1:7153ee70df01 352 // read until start byte (0xFF)
emilmont 1:7153ee70df01 353 while (_spi.write(0xFF) != 0xFE);
emilmont 1:7153ee70df01 354
emilmont 1:7153ee70df01 355 // read data
emilmont 1:7153ee70df01 356 for (int i = 0; i < length; i++) {
emilmont 1:7153ee70df01 357 buffer[i] = _spi.write(0xFF);
emilmont 1:7153ee70df01 358 }
emilmont 1:7153ee70df01 359 _spi.write(0xFF); // checksum
emilmont 1:7153ee70df01 360 _spi.write(0xFF);
emilmont 1:7153ee70df01 361
emilmont 1:7153ee70df01 362 _cs = 1;
emilmont 1:7153ee70df01 363 _spi.write(0xFF);
emilmont 1:7153ee70df01 364 return 0;
emilmont 1:7153ee70df01 365 }
emilmont 1:7153ee70df01 366
emilmont 1:7153ee70df01 367 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
emilmont 1:7153ee70df01 368 _cs = 0;
emilmont 1:7153ee70df01 369
emilmont 1:7153ee70df01 370 // indicate start of block
emilmont 1:7153ee70df01 371 _spi.write(0xFE);
emilmont 1:7153ee70df01 372
emilmont 1:7153ee70df01 373 // write the data
emilmont 1:7153ee70df01 374 for (int i = 0; i < length; i++) {
emilmont 1:7153ee70df01 375 _spi.write(buffer[i]);
emilmont 1:7153ee70df01 376 }
emilmont 1:7153ee70df01 377
emilmont 1:7153ee70df01 378 // write the checksum
emilmont 1:7153ee70df01 379 _spi.write(0xFF);
emilmont 1:7153ee70df01 380 _spi.write(0xFF);
emilmont 1:7153ee70df01 381
emilmont 1:7153ee70df01 382 // check the response token
emilmont 1:7153ee70df01 383 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
emilmont 1:7153ee70df01 384 _cs = 1;
emilmont 1:7153ee70df01 385 _spi.write(0xFF);
emilmont 1:7153ee70df01 386 return 1;
emilmont 1:7153ee70df01 387 }
emilmont 1:7153ee70df01 388
emilmont 1:7153ee70df01 389 // wait for write to finish
emilmont 1:7153ee70df01 390 while (_spi.write(0xFF) == 0);
emilmont 1:7153ee70df01 391
emilmont 1:7153ee70df01 392 _cs = 1;
emilmont 1:7153ee70df01 393 _spi.write(0xFF);
emilmont 1:7153ee70df01 394 return 0;
emilmont 1:7153ee70df01 395 }
emilmont 1:7153ee70df01 396
emilmont 1:7153ee70df01 397 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
emilmont 1:7153ee70df01 398 uint32_t bits = 0;
emilmont 1:7153ee70df01 399 uint32_t size = 1 + msb - lsb;
emilmont 1:7153ee70df01 400 for (int i = 0; i < size; i++) {
emilmont 1:7153ee70df01 401 uint32_t position = lsb + i;
emilmont 1:7153ee70df01 402 uint32_t byte = 15 - (position >> 3);
emilmont 1:7153ee70df01 403 uint32_t bit = position & 0x7;
emilmont 1:7153ee70df01 404 uint32_t value = (data[byte] >> bit) & 1;
emilmont 1:7153ee70df01 405 bits |= value << i;
emilmont 1:7153ee70df01 406 }
emilmont 1:7153ee70df01 407 return bits;
emilmont 1:7153ee70df01 408 }
emilmont 1:7153ee70df01 409
emilmont 1:7153ee70df01 410 uint64_t SDFileSystem::_sd_sectors() {
emilmont 1:7153ee70df01 411 uint32_t c_size, c_size_mult, read_bl_len;
emilmont 1:7153ee70df01 412 uint32_t block_len, mult, blocknr, capacity;
emilmont 1:7153ee70df01 413 uint32_t hc_c_size;
emilmont 1:7153ee70df01 414 uint64_t blocks;
emilmont 1:7153ee70df01 415
emilmont 1:7153ee70df01 416 // CMD9, Response R2 (R1 byte + 16-byte block read)
emilmont 1:7153ee70df01 417 if (_cmdx(9, 0) != 0) {
emilmont 1:7153ee70df01 418 return 0;
emilmont 1:7153ee70df01 419 }
emilmont 1:7153ee70df01 420
emilmont 1:7153ee70df01 421 uint8_t csd[16];
emilmont 1:7153ee70df01 422 if (_read(csd, 16) != 0) {
emilmont 1:7153ee70df01 423 return 0;
emilmont 1:7153ee70df01 424 }
emilmont 1:7153ee70df01 425
emilmont 1:7153ee70df01 426 // csd_structure : csd[127:126]
emilmont 1:7153ee70df01 427 // c_size : csd[73:62]
emilmont 1:7153ee70df01 428 // c_size_mult : csd[49:47]
emilmont 1:7153ee70df01 429 // read_bl_len : csd[83:80] - the *maximum* read block length
emilmont 1:7153ee70df01 430
emilmont 1:7153ee70df01 431 int csd_structure = ext_bits(csd, 127, 126);
emilmont 1:7153ee70df01 432
emilmont 1:7153ee70df01 433 switch (csd_structure) {
emilmont 1:7153ee70df01 434 case 0:
emilmont 1:7153ee70df01 435 cdv = 512;
emilmont 1:7153ee70df01 436 c_size = ext_bits(csd, 73, 62);
emilmont 1:7153ee70df01 437 c_size_mult = ext_bits(csd, 49, 47);
emilmont 1:7153ee70df01 438 read_bl_len = ext_bits(csd, 83, 80);
emilmont 1:7153ee70df01 439
emilmont 1:7153ee70df01 440 block_len = 1 << read_bl_len;
emilmont 1:7153ee70df01 441 mult = 1 << (c_size_mult + 2);
emilmont 1:7153ee70df01 442 blocknr = (c_size + 1) * mult;
emilmont 1:7153ee70df01 443 capacity = blocknr * block_len;
emilmont 1:7153ee70df01 444 blocks = capacity / 512;
emilmont 1:7153ee70df01 445 break;
emilmont 1:7153ee70df01 446
emilmont 1:7153ee70df01 447 case 1:
emilmont 1:7153ee70df01 448 cdv = 1;
emilmont 1:7153ee70df01 449 hc_c_size = ext_bits(csd, 63, 48);
emilmont 1:7153ee70df01 450 blocks = (hc_c_size+1)*1024;
emilmont 1:7153ee70df01 451 break;
emilmont 1:7153ee70df01 452
emilmont 1:7153ee70df01 453 default:
emilmont 1:7153ee70df01 454 return 0;
emilmont 1:7153ee70df01 455 };
emilmont 1:7153ee70df01 456 return blocks;
emilmont 1:7153ee70df01 457 }