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CMSIS DSP library

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cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q31.c@2:da51fb522205, 2013-05-30 (annotated)

Committer:
emilmont
Date:
Thu May 30 17:10:11 2013 +0100
Revision:
2:da51fb522205
Parent:
1:fdd22bb7aa52
Child:
3:7a284390b0ce
Keep "cmsis-dsp" module in synch with its source

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /*-----------------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 2:da51fb522205 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 1:fdd22bb7aa52 8 * Title: arm_lms_norm_init_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 1:fdd22bb7aa52 10 * Description: Q31 NLMS initialization function.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated
emilmont 1:fdd22bb7aa52 31 *
emilmont 1:fdd22bb7aa52 32 * Version 0.0.7 2010/06/10
emilmont 1:fdd22bb7aa52 33 * Misra-C changes done
emilmont 1:fdd22bb7aa52 34 * ---------------------------------------------------------------------------*/
emilmont 1:fdd22bb7aa52 35
emilmont 1:fdd22bb7aa52 36 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 37 #include "arm_common_tables.h"
emilmont 1:fdd22bb7aa52 38
emilmont 1:fdd22bb7aa52 39 /**
emilmont 1:fdd22bb7aa52 40 * @addtogroup LMS_NORM
emilmont 1:fdd22bb7aa52 41 * @{
emilmont 1:fdd22bb7aa52 42 */
emilmont 1:fdd22bb7aa52 43
emilmont 1:fdd22bb7aa52 44 /**
emilmont 1:fdd22bb7aa52 45 * @brief Initialization function for Q31 normalized LMS filter.
emilmont 1:fdd22bb7aa52 46 * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
emilmont 1:fdd22bb7aa52 47 * @param[in] numTaps number of filter coefficients.
emilmont 1:fdd22bb7aa52 48 * @param[in] *pCoeffs points to coefficient buffer.
emilmont 1:fdd22bb7aa52 49 * @param[in] *pState points to state buffer.
emilmont 1:fdd22bb7aa52 50 * @param[in] mu step size that controls filter coefficient updates.
emilmont 1:fdd22bb7aa52 51 * @param[in] blockSize number of samples to process.
emilmont 1:fdd22bb7aa52 52 * @param[in] postShift bit shift applied to coefficients.
emilmont 1:fdd22bb7aa52 53 * @return none.
emilmont 1:fdd22bb7aa52 54 *
emilmont 1:fdd22bb7aa52 55 * <b>Description:</b>
emilmont 1:fdd22bb7aa52 56 * \par
emilmont 1:fdd22bb7aa52 57 * <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
emilmont 1:fdd22bb7aa52 58 * <pre>
emilmont 1:fdd22bb7aa52 59 * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
emilmont 1:fdd22bb7aa52 60 * </pre>
emilmont 1:fdd22bb7aa52 61 * The initial filter coefficients serve as a starting point for the adaptive filter.
emilmont 1:fdd22bb7aa52 62 * <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
emilmont 1:fdd22bb7aa52 63 * where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_q31()</code>.
emilmont 1:fdd22bb7aa52 64 */
emilmont 1:fdd22bb7aa52 65
emilmont 1:fdd22bb7aa52 66 void arm_lms_norm_init_q31(
emilmont 1:fdd22bb7aa52 67 arm_lms_norm_instance_q31 * S,
emilmont 1:fdd22bb7aa52 68 uint16_t numTaps,
emilmont 1:fdd22bb7aa52 69 q31_t * pCoeffs,
emilmont 1:fdd22bb7aa52 70 q31_t * pState,
emilmont 1:fdd22bb7aa52 71 q31_t mu,
emilmont 1:fdd22bb7aa52 72 uint32_t blockSize,
emilmont 1:fdd22bb7aa52 73 uint8_t postShift)
emilmont 1:fdd22bb7aa52 74 {
emilmont 1:fdd22bb7aa52 75 /* Assign filter taps */
emilmont 1:fdd22bb7aa52 76 S->numTaps = numTaps;
emilmont 1:fdd22bb7aa52 77
emilmont 1:fdd22bb7aa52 78 /* Assign coefficient pointer */
emilmont 1:fdd22bb7aa52 79 S->pCoeffs = pCoeffs;
emilmont 1:fdd22bb7aa52 80
emilmont 1:fdd22bb7aa52 81 /* Clear state buffer and size is always blockSize + numTaps - 1 */
emilmont 1:fdd22bb7aa52 82 memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t));
emilmont 1:fdd22bb7aa52 83
emilmont 1:fdd22bb7aa52 84 /* Assign post Shift value applied to coefficients */
emilmont 1:fdd22bb7aa52 85 S->postShift = postShift;
emilmont 1:fdd22bb7aa52 86
emilmont 1:fdd22bb7aa52 87 /* Assign state pointer */
emilmont 1:fdd22bb7aa52 88 S->pState = pState;
emilmont 1:fdd22bb7aa52 89
emilmont 1:fdd22bb7aa52 90 /* Assign Step size value */
emilmont 1:fdd22bb7aa52 91 S->mu = mu;
emilmont 1:fdd22bb7aa52 92
emilmont 1:fdd22bb7aa52 93 /* Initialize reciprocal pointer table */
emilmont 1:fdd22bb7aa52 94 S->recipTable = (q31_t *) armRecipTableQ31;
emilmont 1:fdd22bb7aa52 95
emilmont 1:fdd22bb7aa52 96 /* Initialise Energy to zero */
emilmont 1:fdd22bb7aa52 97 S->energy = 0;
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 /* Initialise x0 to zero */
emilmont 1:fdd22bb7aa52 100 S->x0 = 0;
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 }
emilmont 1:fdd22bb7aa52 103
emilmont 1:fdd22bb7aa52 104 /**
emilmont 1:fdd22bb7aa52 105 * @} end of LMS_NORM group
emilmont 1:fdd22bb7aa52 106 */