mbed official / mbed-dsp

CMSIS DSP library

Dependents:   performance_timer Surfboard_ gps2rtty Capstone ... more

Legacy Warning

This is an mbed 2 library. To learn more about mbed OS 5, visit the docs.

cmsis_dsp/StatisticsFunctions/arm_min_q15.c@5:3762170b6d4d, 2015-11-20 (annotated)

Committer:
mbed_official
Date:
Fri Nov 20 08:45:18 2015 +0000
Revision:
5:3762170b6d4d
Parent:
3:7a284390b0ce 
Synchronized with git revision 2eb940b9a73af188d3004a2575fdfbb05febe62b



Full URL: https://github.com/mbedmicro/mbed/commit/2eb940b9a73af188d3004a2575fdfbb05febe62b/



Added option to build rpc library. closes #1426

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 5:3762170b6d4d 2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 5:3762170b6d4d 4 * $Date: 19. March 2015
mbed_official 5:3762170b6d4d 5 * $Revision: V.1.4.5
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_min_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Minimum value of a Q15 vector.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * ---------------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupStats
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47
emilmont 1:fdd22bb7aa52 48 /**
emilmont 1:fdd22bb7aa52 49 * @addtogroup Min
emilmont 1:fdd22bb7aa52 50 * @{
emilmont 1:fdd22bb7aa52 51 */
emilmont 1:fdd22bb7aa52 52
emilmont 1:fdd22bb7aa52 53
emilmont 1:fdd22bb7aa52 54 /**
emilmont 1:fdd22bb7aa52 55 * @brief Minimum value of a Q15 vector.
emilmont 1:fdd22bb7aa52 56 * @param[in] *pSrc points to the input vector
emilmont 1:fdd22bb7aa52 57 * @param[in] blockSize length of the input vector
emilmont 1:fdd22bb7aa52 58 * @param[out] *pResult minimum value returned here
emilmont 1:fdd22bb7aa52 59 * @param[out] *pIndex index of minimum value returned here
emilmont 1:fdd22bb7aa52 60 * @return none.
emilmont 1:fdd22bb7aa52 61 *
emilmont 1:fdd22bb7aa52 62 */
emilmont 1:fdd22bb7aa52 63
emilmont 1:fdd22bb7aa52 64 void arm_min_q15(
emilmont 1:fdd22bb7aa52 65 q15_t * pSrc,
emilmont 1:fdd22bb7aa52 66 uint32_t blockSize,
emilmont 1:fdd22bb7aa52 67 q15_t * pResult,
emilmont 1:fdd22bb7aa52 68 uint32_t * pIndex)
emilmont 1:fdd22bb7aa52 69 {
mbed_official 3:7a284390b0ce 70 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 71
emilmont 1:fdd22bb7aa52 72 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 73 q15_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
emilmont 1:fdd22bb7aa52 74 uint32_t blkCnt, outIndex, count; /* loop counter */
emilmont 1:fdd22bb7aa52 75
emilmont 1:fdd22bb7aa52 76 /* Initialise the count value. */
emilmont 1:fdd22bb7aa52 77 count = 0u;
emilmont 1:fdd22bb7aa52 78 /* Initialise the index value to zero. */
emilmont 1:fdd22bb7aa52 79 outIndex = 0u;
emilmont 1:fdd22bb7aa52 80 /* Load first input value that act as reference value for comparision */
emilmont 1:fdd22bb7aa52 81 out = *pSrc++;
emilmont 1:fdd22bb7aa52 82
emilmont 1:fdd22bb7aa52 83 /* Loop unrolling */
emilmont 1:fdd22bb7aa52 84 blkCnt = (blockSize - 1u) >> 2u;
emilmont 1:fdd22bb7aa52 85
emilmont 1:fdd22bb7aa52 86 while(blkCnt > 0)
emilmont 1:fdd22bb7aa52 87 {
emilmont 1:fdd22bb7aa52 88 /* Initialize minVal to the next consecutive values one by one */
emilmont 1:fdd22bb7aa52 89 minVal1 = *pSrc++;
emilmont 1:fdd22bb7aa52 90 minVal2 = *pSrc++;
emilmont 1:fdd22bb7aa52 91
emilmont 1:fdd22bb7aa52 92 /* compare for the minimum value */
emilmont 1:fdd22bb7aa52 93 if(out > minVal1)
emilmont 1:fdd22bb7aa52 94 {
emilmont 1:fdd22bb7aa52 95 /* Update the minimum value and its index */
emilmont 1:fdd22bb7aa52 96 out = minVal1;
emilmont 1:fdd22bb7aa52 97 outIndex = count + 1u;
emilmont 1:fdd22bb7aa52 98 }
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 minVal1 = *pSrc++;
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 /* compare for the minimum value */
emilmont 1:fdd22bb7aa52 103 if(out > minVal2)
emilmont 1:fdd22bb7aa52 104 {
emilmont 1:fdd22bb7aa52 105 /* Update the minimum value and its index */
emilmont 1:fdd22bb7aa52 106 out = minVal2;
emilmont 1:fdd22bb7aa52 107 outIndex = count + 2u;
emilmont 1:fdd22bb7aa52 108 }
emilmont 1:fdd22bb7aa52 109
emilmont 1:fdd22bb7aa52 110 minVal2 = *pSrc++;
emilmont 1:fdd22bb7aa52 111
emilmont 1:fdd22bb7aa52 112 /* compare for the minimum value */
emilmont 1:fdd22bb7aa52 113 if(out > minVal1)
emilmont 1:fdd22bb7aa52 114 {
emilmont 1:fdd22bb7aa52 115 /* Update the minimum value and its index */
emilmont 1:fdd22bb7aa52 116 out = minVal1;
emilmont 1:fdd22bb7aa52 117 outIndex = count + 3u;
emilmont 1:fdd22bb7aa52 118 }
emilmont 1:fdd22bb7aa52 119
emilmont 1:fdd22bb7aa52 120 /* compare for the minimum value */
emilmont 1:fdd22bb7aa52 121 if(out > minVal2)
emilmont 1:fdd22bb7aa52 122 {
emilmont 1:fdd22bb7aa52 123 /* Update the minimum value and its index */
emilmont 1:fdd22bb7aa52 124 out = minVal2;
emilmont 1:fdd22bb7aa52 125 outIndex = count + 4u;
emilmont 1:fdd22bb7aa52 126 }
emilmont 1:fdd22bb7aa52 127
emilmont 1:fdd22bb7aa52 128 count += 4u;
emilmont 1:fdd22bb7aa52 129
emilmont 1:fdd22bb7aa52 130 blkCnt--;
emilmont 1:fdd22bb7aa52 131 }
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 /* if (blockSize - 1u ) is not multiple of 4 */
emilmont 1:fdd22bb7aa52 134 blkCnt = (blockSize - 1u) % 4u;
emilmont 1:fdd22bb7aa52 135
emilmont 1:fdd22bb7aa52 136 #else
emilmont 1:fdd22bb7aa52 137
emilmont 1:fdd22bb7aa52 138 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 139 q15_t minVal1, out; /* Temporary variables to store the output value. */
emilmont 1:fdd22bb7aa52 140 uint32_t blkCnt, outIndex; /* loop counter */
emilmont 1:fdd22bb7aa52 141
emilmont 1:fdd22bb7aa52 142 blkCnt = (blockSize - 1u);
emilmont 1:fdd22bb7aa52 143
emilmont 1:fdd22bb7aa52 144 /* Initialise the index value to zero. */
emilmont 1:fdd22bb7aa52 145 outIndex = 0u;
emilmont 1:fdd22bb7aa52 146 /* Load first input value that act as reference value for comparision */
emilmont 1:fdd22bb7aa52 147 out = *pSrc++;
emilmont 1:fdd22bb7aa52 148
mbed_official 3:7a284390b0ce 149 #endif // #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 150
emilmont 1:fdd22bb7aa52 151 while(blkCnt > 0)
emilmont 1:fdd22bb7aa52 152 {
emilmont 1:fdd22bb7aa52 153 /* Initialize minVal to the next consecutive values one by one */
emilmont 1:fdd22bb7aa52 154 minVal1 = *pSrc++;
emilmont 1:fdd22bb7aa52 155
emilmont 1:fdd22bb7aa52 156 /* compare for the minimum value */
emilmont 1:fdd22bb7aa52 157 if(out > minVal1)
emilmont 1:fdd22bb7aa52 158 {
emilmont 1:fdd22bb7aa52 159 /* Update the minimum value and it's index */
emilmont 1:fdd22bb7aa52 160 out = minVal1;
emilmont 1:fdd22bb7aa52 161 outIndex = blockSize - blkCnt;
emilmont 1:fdd22bb7aa52 162 }
emilmont 1:fdd22bb7aa52 163
emilmont 1:fdd22bb7aa52 164 blkCnt--;
emilmont 1:fdd22bb7aa52 165
emilmont 1:fdd22bb7aa52 166 }
emilmont 1:fdd22bb7aa52 167
emilmont 1:fdd22bb7aa52 168
emilmont 1:fdd22bb7aa52 169
emilmont 1:fdd22bb7aa52 170 /* Store the minimum value and its index into destination pointers */
emilmont 1:fdd22bb7aa52 171 *pResult = out;
emilmont 1:fdd22bb7aa52 172 *pIndex = outIndex;
emilmont 1:fdd22bb7aa52 173 }
emilmont 1:fdd22bb7aa52 174
emilmont 1:fdd22bb7aa52 175 /**
emilmont 1:fdd22bb7aa52 176 * @} end of Min group
emilmont 1:fdd22bb7aa52 177 */