L VD / MAX113XX_Pixi

Library for the MAX11300

MAX113XX_Pixi.cpp@13:546dd29b1c7a, 2017-05-09 (annotated)

Committer:
j3
Date:
Tue May 09 22:06:19 2017 +0000
Revision:
13:546dd29b1c7a
Parent:
12:8054ee101bad
Child:
15:fb674d741844
Working on Library

Who changed what in which revision?

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j3 7:8669a53acd0d 1 /**********************************************************************
j3 7:8669a53acd0d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 7:8669a53acd0d 3 *
j3 7:8669a53acd0d 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 7:8669a53acd0d 5 * copy of this software and associated documentation files (the "Software"),
j3 7:8669a53acd0d 6 * to deal in the Software without restriction, including without limitation
j3 7:8669a53acd0d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 7:8669a53acd0d 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 7:8669a53acd0d 9 * Software is furnished to do so, subject to the following conditions:
j3 7:8669a53acd0d 10 *
j3 7:8669a53acd0d 11 * The above copyright notice and this permission notice shall be included
j3 7:8669a53acd0d 12 * in all copies or substantial portions of the Software.
j3 7:8669a53acd0d 13 *
j3 7:8669a53acd0d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 7:8669a53acd0d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 7:8669a53acd0d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 7:8669a53acd0d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 7:8669a53acd0d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 7:8669a53acd0d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 7:8669a53acd0d 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 7:8669a53acd0d 21 *
j3 7:8669a53acd0d 22 * Except as contained in this notice, the name of Maxim Integrated
j3 7:8669a53acd0d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 7:8669a53acd0d 24 * Products, Inc. Branding Policy.
j3 7:8669a53acd0d 25 *
j3 7:8669a53acd0d 26 * The mere transfer of this software does not imply any licenses
j3 7:8669a53acd0d 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 7:8669a53acd0d 28 * trademarks, maskwork rights, or any other form of intellectual
j3 7:8669a53acd0d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 7:8669a53acd0d 30 * ownership rights.
j3 7:8669a53acd0d 31 **********************************************************************/
j3 7:8669a53acd0d 32
j3 9:094df3de3616 33
j3 7:8669a53acd0d 34 #include "MAX113XX_Pixi.h"
j3 7:8669a53acd0d 35
j3 9:094df3de3616 36
j3 9:094df3de3616 37 //20 port devices
j3 9:094df3de3616 38 #if defined(_MAX11300_DESIGNVALUE_H_) || defined(_MAX11301_DESIGNVALUE_H_)
j3 12:8054ee101bad 39
j3 12:8054ee101bad 40 static const uint16_t configDesignVals[18] = {
j3 12:8054ee101bad 41 gpo_data_15_to_0_DESIGNVALUE,
j3 12:8054ee101bad 42 gpo_data_19_to_16_DESIGNVALUE,
j3 12:8054ee101bad 43 0, //reserved
j3 12:8054ee101bad 44 device_control_DESIGNVALUE,
j3 12:8054ee101bad 45 interrupt_mask_DESIGNVALUE,
j3 12:8054ee101bad 46 gpi_irqmode_7_to_0_DESIGNVALUE,
j3 12:8054ee101bad 47 gpi_irqmode_15_to_8_DESIGNVALUE,
j3 12:8054ee101bad 48 gpi_irqmode_19_to_16_DESIGNVALUE,
j3 12:8054ee101bad 49 0, //reserved
j3 12:8054ee101bad 50 dac_preset_data_1_DESIGNVALUE,
j3 12:8054ee101bad 51 dac_preset_data_2_DESIGNVALUE,
j3 12:8054ee101bad 52 tmp_mon_cfg_DESIGNVALUE,
j3 12:8054ee101bad 53 tmp_mon_int_hi_thresh_DESIGNVALUE,
j3 12:8054ee101bad 54 tmp_mon_int_lo_thresh_DESIGNVALUE,
j3 12:8054ee101bad 55 tmp_mon_ext1_hi_thresh_DESIGNVALUE,
j3 12:8054ee101bad 56 tmp_mon_ext1_lo_thresh_DESIGNVALUE,
j3 12:8054ee101bad 57 tmp_mon_ext2_hi_thresh_DESIGNVALUE,
j3 12:8054ee101bad 58 tmp_mon_ext2_lo_thresh_DESIGNVALUE};
j3 12:8054ee101bad 59
j3 9:094df3de3616 60 static const uint16_t portConfigDesignVals[20] = {
j3 7:8669a53acd0d 61 port_cfg_00_DESIGNVALUE,
j3 7:8669a53acd0d 62 port_cfg_01_DESIGNVALUE,
j3 7:8669a53acd0d 63 port_cfg_02_DESIGNVALUE,
j3 7:8669a53acd0d 64 port_cfg_03_DESIGNVALUE,
j3 7:8669a53acd0d 65 port_cfg_04_DESIGNVALUE,
j3 7:8669a53acd0d 66 port_cfg_05_DESIGNVALUE,
j3 7:8669a53acd0d 67 port_cfg_06_DESIGNVALUE,
j3 7:8669a53acd0d 68 port_cfg_07_DESIGNVALUE,
j3 7:8669a53acd0d 69 port_cfg_08_DESIGNVALUE,
j3 7:8669a53acd0d 70 port_cfg_09_DESIGNVALUE,
j3 7:8669a53acd0d 71 port_cfg_10_DESIGNVALUE,
j3 7:8669a53acd0d 72 port_cfg_11_DESIGNVALUE,
j3 7:8669a53acd0d 73 port_cfg_12_DESIGNVALUE,
j3 7:8669a53acd0d 74 port_cfg_13_DESIGNVALUE,
j3 7:8669a53acd0d 75 port_cfg_14_DESIGNVALUE,
j3 7:8669a53acd0d 76 port_cfg_15_DESIGNVALUE,
j3 7:8669a53acd0d 77 port_cfg_16_DESIGNVALUE,
j3 7:8669a53acd0d 78 port_cfg_17_DESIGNVALUE,
j3 7:8669a53acd0d 79 port_cfg_18_DESIGNVALUE,
j3 7:8669a53acd0d 80 port_cfg_19_DESIGNVALUE};
j3 12:8054ee101bad 81
j3 12:8054ee101bad 82 static const uint16_t dacDesignVals[20]= {
j3 12:8054ee101bad 83 dac_data_port_00_DESIGNVALUE,
j3 12:8054ee101bad 84 dac_data_port_01_DESIGNVALUE,
j3 12:8054ee101bad 85 dac_data_port_02_DESIGNVALUE,
j3 12:8054ee101bad 86 dac_data_port_03_DESIGNVALUE,
j3 12:8054ee101bad 87 dac_data_port_04_DESIGNVALUE,
j3 12:8054ee101bad 88 dac_data_port_05_DESIGNVALUE,
j3 12:8054ee101bad 89 dac_data_port_06_DESIGNVALUE,
j3 12:8054ee101bad 90 dac_data_port_07_DESIGNVALUE,
j3 12:8054ee101bad 91 dac_data_port_08_DESIGNVALUE,
j3 12:8054ee101bad 92 dac_data_port_09_DESIGNVALUE,
j3 12:8054ee101bad 93 dac_data_port_10_DESIGNVALUE,
j3 12:8054ee101bad 94 dac_data_port_11_DESIGNVALUE,
j3 12:8054ee101bad 95 dac_data_port_12_DESIGNVALUE,
j3 12:8054ee101bad 96 dac_data_port_13_DESIGNVALUE,
j3 12:8054ee101bad 97 dac_data_port_14_DESIGNVALUE,
j3 12:8054ee101bad 98 dac_data_port_15_DESIGNVALUE,
j3 12:8054ee101bad 99 dac_data_port_16_DESIGNVALUE,
j3 12:8054ee101bad 100 dac_data_port_17_DESIGNVALUE,
j3 12:8054ee101bad 101 dac_data_port_18_DESIGNVALUE,
j3 12:8054ee101bad 102 dac_data_port_19_DESIGNVALUE};
j3 12:8054ee101bad 103
j3 9:094df3de3616 104 #endif
j3 9:094df3de3616 105
j3 9:094df3de3616 106 //12 port devices...
j3 9:094df3de3616 107 #if defined(_MAX11311_DESIGNVALUE_H_) || defined(_MAX11312_DESIGNVALUE_H_)
j3 9:094df3de3616 108 static const uint16_t portConfigDesignVals[12] = {
j3 9:094df3de3616 109 port_cfg_p0_DESIGNVALUE,
j3 9:094df3de3616 110 port_cfg_p1_DESIGNVALUE,
j3 9:094df3de3616 111 port_cfg_p2_DESIGNVALUE,
j3 9:094df3de3616 112 port_cfg_p3_DESIGNVALUE,
j3 9:094df3de3616 113 port_cfg_p4_DESIGNVALUE,
j3 9:094df3de3616 114 port_cfg_p5_DESIGNVALUE,
j3 9:094df3de3616 115 port_cfg_p6_DESIGNVALUE,
j3 9:094df3de3616 116 port_cfg_p7_DESIGNVALUE,
j3 9:094df3de3616 117 port_cfg_p8_DESIGNVALUE,
j3 9:094df3de3616 118 port_cfg_p9_DESIGNVALUE,
j3 9:094df3de3616 119 port_cfg_p10_DESIGNVALUE,
j3 9:094df3de3616 120 port_cfg_p11_DESIGNVALUE};
j3 9:094df3de3616 121 #endif
j3 9:094df3de3616 122
j3 7:8669a53acd0d 123
j3 7:8669a53acd0d 124 //************************** Base Class member fxs *****************************
j3 9:094df3de3616 125 MAX113XX_Pixi::MAX113XX_Pixi(Device_e device, PinName cnvt):
j3 9:094df3de3616 126 m_device(device), m_cnvt(cnvt, 1)
j3 7:8669a53acd0d 127 {
j3 11:31e7ca030b8f 128 }
j3 11:31e7ca030b8f 129
j3 12:8054ee101bad 130 //*********************************************************************
j3 12:8054ee101bad 131 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::singleEndedADCRead(Ports_e port,
j3 12:8054ee101bad 132 uint16_t &data)
j3 12:8054ee101bad 133 {
j3 12:8054ee101bad 134 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 135
j3 12:8054ee101bad 136 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 137 {
j3 12:8054ee101bad 138 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_7)
j3 12:8054ee101bad 139 {
j3 12:8054ee101bad 140 uint8_t num_samples = ((portConfigDesignVals[port] & port_cfg_00_funcprm_nsamples) >> 5);
j3 12:8054ee101bad 141 num_samples = (1 << num_samples);
j3 12:8054ee101bad 142
j3 12:8054ee101bad 143 while(num_samples--)
j3 12:8054ee101bad 144 {
j3 12:8054ee101bad 145 m_cnvt = 0;
j3 12:8054ee101bad 146 wait_us(1);
j3 12:8054ee101bad 147 m_cnvt = 1;
j3 12:8054ee101bad 148 wait_us(100);
j3 12:8054ee101bad 149 }
j3 12:8054ee101bad 150 data = readRegister((adc_data_port_00 + port));
j3 12:8054ee101bad 151
j3 12:8054ee101bad 152 result = MAX113XX_Pixi::Success;
j3 12:8054ee101bad 153 }
j3 12:8054ee101bad 154 }
j3 12:8054ee101bad 155 else //12 port device
j3 12:8054ee101bad 156 {
j3 12:8054ee101bad 157 }
j3 12:8054ee101bad 158
j3 12:8054ee101bad 159 return result;
j3 12:8054ee101bad 160 }
j3 12:8054ee101bad 161
j3 12:8054ee101bad 162 //*********************************************************************
j3 12:8054ee101bad 163 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::differentialADCRead(Ports_e posPort,
j3 13:546dd29b1c7a 164 int16_t &data)
j3 12:8054ee101bad 165 {
j3 12:8054ee101bad 166 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 167
j3 12:8054ee101bad 168 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 169 {
j3 13:546dd29b1c7a 170 if(((portConfigDesignVals[posPort] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_8)
j3 13:546dd29b1c7a 171 {
j3 13:546dd29b1c7a 172 uint8_t num_samples = ((portConfigDesignVals[posPort] & port_cfg_00_funcprm_nsamples) >> 5);
j3 13:546dd29b1c7a 173 num_samples = (1 << num_samples);
j3 13:546dd29b1c7a 174
j3 13:546dd29b1c7a 175 while(num_samples--)
j3 13:546dd29b1c7a 176 {
j3 13:546dd29b1c7a 177 m_cnvt = 0;
j3 13:546dd29b1c7a 178 wait_us(1);
j3 13:546dd29b1c7a 179 m_cnvt = 1;
j3 13:546dd29b1c7a 180 wait_us(100);
j3 13:546dd29b1c7a 181 }
j3 13:546dd29b1c7a 182 data = readRegister((adc_data_port_00 + posPort));
j3 13:546dd29b1c7a 183 if(data & 0x0800)
j3 13:546dd29b1c7a 184 {
j3 13:546dd29b1c7a 185 data |= 0xF000;
j3 13:546dd29b1c7a 186 }
j3 13:546dd29b1c7a 187
j3 13:546dd29b1c7a 188 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 189 }
j3 12:8054ee101bad 190 }
j3 12:8054ee101bad 191 else //12 port device
j3 12:8054ee101bad 192 {
j3 12:8054ee101bad 193 }
j3 12:8054ee101bad 194
j3 12:8054ee101bad 195 return result;
j3 12:8054ee101bad 196 }
j3 12:8054ee101bad 197
j3 12:8054ee101bad 198 //*********************************************************************
j3 12:8054ee101bad 199 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::dacWrite(Ports_e port,
j3 12:8054ee101bad 200 const uint16_t data)
j3 12:8054ee101bad 201 {
j3 12:8054ee101bad 202 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 203
j3 12:8054ee101bad 204 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 205 {
j3 12:8054ee101bad 206 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_5)
j3 12:8054ee101bad 207 {
j3 12:8054ee101bad 208 writeRegister((dac_data_port_00 + port) , data);
j3 12:8054ee101bad 209 result = MAX113XX_Pixi::Success;
j3 12:8054ee101bad 210 }
j3 12:8054ee101bad 211 }
j3 12:8054ee101bad 212 else //12 port device
j3 12:8054ee101bad 213 {
j3 12:8054ee101bad 214 }
j3 12:8054ee101bad 215
j3 12:8054ee101bad 216 return result;
j3 12:8054ee101bad 217 }
j3 12:8054ee101bad 218
j3 12:8054ee101bad 219 //*********************************************************************
j3 13:546dd29b1c7a 220 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::dacWriteADCMonitor(Ports_e port,
j3 13:546dd29b1c7a 221 const uint16_t data,
j3 13:546dd29b1c7a 222 uint16_t &adcData)
j3 13:546dd29b1c7a 223 {
j3 13:546dd29b1c7a 224 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 13:546dd29b1c7a 225
j3 13:546dd29b1c7a 226 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 13:546dd29b1c7a 227 {
j3 13:546dd29b1c7a 228 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_6)
j3 13:546dd29b1c7a 229 {
j3 13:546dd29b1c7a 230 writeRegister((dac_data_port_00 + port) , data);
j3 13:546dd29b1c7a 231
j3 13:546dd29b1c7a 232 m_cnvt = 0;
j3 13:546dd29b1c7a 233 wait_us(1);
j3 13:546dd29b1c7a 234 m_cnvt = 1;
j3 13:546dd29b1c7a 235 wait_us(100);
j3 13:546dd29b1c7a 236
j3 13:546dd29b1c7a 237 adcData = readRegister((adc_data_port_00 + port));
j3 13:546dd29b1c7a 238
j3 13:546dd29b1c7a 239 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 240 }
j3 13:546dd29b1c7a 241 }
j3 13:546dd29b1c7a 242 else //12 port device
j3 13:546dd29b1c7a 243 {
j3 13:546dd29b1c7a 244 }
j3 13:546dd29b1c7a 245
j3 13:546dd29b1c7a 246 return result;
j3 13:546dd29b1c7a 247 }
j3 13:546dd29b1c7a 248
j3 13:546dd29b1c7a 249 //*********************************************************************
j3 12:8054ee101bad 250 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioRead(Ports_e port, uint8_t &state)
j3 12:8054ee101bad 251 {
j3 12:8054ee101bad 252 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 253
j3 12:8054ee101bad 254 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 255 {
j3 12:8054ee101bad 256 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_1)
j3 12:8054ee101bad 257 {
j3 12:8054ee101bad 258 if(port < MAX113XX_Pixi::PORT16)
j3 12:8054ee101bad 259 {
j3 12:8054ee101bad 260 state = (readRegister(gpi_data_15_to_0) >> port);
j3 12:8054ee101bad 261 }
j3 12:8054ee101bad 262 else
j3 12:8054ee101bad 263 {
j3 12:8054ee101bad 264 state = (readRegister(gpi_data_19_to_16) >> (port - MAX113XX_Pixi::PORT16));
j3 12:8054ee101bad 265 }
j3 12:8054ee101bad 266
j3 12:8054ee101bad 267 result = MAX113XX_Pixi::Success;
j3 12:8054ee101bad 268 }
j3 12:8054ee101bad 269 }
j3 12:8054ee101bad 270 else //12 port device
j3 12:8054ee101bad 271 {
j3 12:8054ee101bad 272 }
j3 12:8054ee101bad 273
j3 12:8054ee101bad 274 return result;
j3 12:8054ee101bad 275 }
j3 7:8669a53acd0d 276
j3 7:8669a53acd0d 277 //*********************************************************************
j3 9:094df3de3616 278 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioWrite(Ports_e port,
j3 9:094df3de3616 279 const uint8_t state)
j3 7:8669a53acd0d 280 {
j3 10:6efe114ef882 281 uint16_t temp;
j3 10:6efe114ef882 282 uint16_t port_mask;
j3 10:6efe114ef882 283
j3 7:8669a53acd0d 284 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 9:094df3de3616 285
j3 10:6efe114ef882 286 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 287 {
j3 10:6efe114ef882 288 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_3)
j3 10:6efe114ef882 289 {
j3 10:6efe114ef882 290 if(port < MAX113XX_Pixi::PORT16)
j3 10:6efe114ef882 291 {
j3 10:6efe114ef882 292 port_mask = (1 << port);
j3 10:6efe114ef882 293 temp = readRegister(gpo_data_15_to_0);
j3 10:6efe114ef882 294 if(state & 0x01)
j3 10:6efe114ef882 295 {
j3 10:6efe114ef882 296 temp |= port_mask;
j3 10:6efe114ef882 297 }
j3 10:6efe114ef882 298 else
j3 10:6efe114ef882 299 {
j3 10:6efe114ef882 300 temp &= ~port_mask;
j3 10:6efe114ef882 301 }
j3 10:6efe114ef882 302 writeRegister(gpo_data_15_to_0, temp);
j3 10:6efe114ef882 303 }
j3 10:6efe114ef882 304 else
j3 10:6efe114ef882 305 {
j3 10:6efe114ef882 306 port_mask = (1 << (port - MAX113XX_Pixi::PORT16));
j3 10:6efe114ef882 307 temp = readRegister(gpo_data_19_to_16);
j3 10:6efe114ef882 308 if(state & 0x01)
j3 10:6efe114ef882 309 {
j3 10:6efe114ef882 310 temp |= port_mask;
j3 10:6efe114ef882 311 }
j3 10:6efe114ef882 312 else
j3 10:6efe114ef882 313 {
j3 10:6efe114ef882 314 temp &= ~port_mask;
j3 10:6efe114ef882 315 }
j3 10:6efe114ef882 316 writeRegister(gpo_data_19_to_16, temp);
j3 10:6efe114ef882 317 }
j3 10:6efe114ef882 318
j3 10:6efe114ef882 319 result = MAX113XX_Pixi::Success;
j3 10:6efe114ef882 320 }
j3 9:094df3de3616 321 }
j3 9:094df3de3616 322 else //12 port device
j3 9:094df3de3616 323 {
j3 9:094df3de3616 324 }
j3 7:8669a53acd0d 325
j3 7:8669a53acd0d 326 return result;
j3 7:8669a53acd0d 327 }
j3 7:8669a53acd0d 328
j3 7:8669a53acd0d 329 //*********************************************************************
j3 13:546dd29b1c7a 330 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::setAnalogSwitchState(Ports_e lowPort,
j3 12:8054ee101bad 331 bool state)
j3 7:8669a53acd0d 332 {
j3 7:8669a53acd0d 333 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 334
j3 10:6efe114ef882 335 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 336 {
j3 13:546dd29b1c7a 337 if(((portConfigDesignVals[lowPort] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_12)
j3 13:546dd29b1c7a 338 {
j3 13:546dd29b1c7a 339 uint16_t data = readRegister(port_cfg_00 + lowPort);
j3 13:546dd29b1c7a 340 if(state)
j3 13:546dd29b1c7a 341 {
j3 13:546dd29b1c7a 342 data = ((data & 0x0FFF) | (MAX113XX_Pixi::MODE_12 << 12));
j3 13:546dd29b1c7a 343 }
j3 13:546dd29b1c7a 344 else
j3 13:546dd29b1c7a 345 {
j3 13:546dd29b1c7a 346 data = ((data & 0x0FFF) | (MAX113XX_Pixi::MODE_0 << 12));
j3 13:546dd29b1c7a 347 }
j3 13:546dd29b1c7a 348 writeRegister((port_cfg_00 + lowPort), data);
j3 13:546dd29b1c7a 349
j3 13:546dd29b1c7a 350 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 351 }
j3 13:546dd29b1c7a 352 }
j3 13:546dd29b1c7a 353 else //12 port device
j3 13:546dd29b1c7a 354 {
j3 13:546dd29b1c7a 355 }
j3 13:546dd29b1c7a 356
j3 13:546dd29b1c7a 357 return result;
j3 13:546dd29b1c7a 358 }
j3 13:546dd29b1c7a 359
j3 13:546dd29b1c7a 360 //*********************************************************************
j3 13:546dd29b1c7a 361 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::readTempSensor(TempSensor_e sensor,
j3 13:546dd29b1c7a 362 float &data)
j3 13:546dd29b1c7a 363 {
j3 13:546dd29b1c7a 364 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 13:546dd29b1c7a 365 int16_t temp;
j3 13:546dd29b1c7a 366
j3 13:546dd29b1c7a 367 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 13:546dd29b1c7a 368 {
j3 13:546dd29b1c7a 369 switch(sensor)
j3 13:546dd29b1c7a 370 {
j3 13:546dd29b1c7a 371 case Internal:
j3 13:546dd29b1c7a 372 if(device_control_DESIGNVALUE & device_control_TMPCTLINT)
j3 13:546dd29b1c7a 373 {
j3 13:546dd29b1c7a 374 temp = readRegister(tmp_int_data);
j3 13:546dd29b1c7a 375 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 376 }
j3 13:546dd29b1c7a 377 break;
j3 13:546dd29b1c7a 378
j3 13:546dd29b1c7a 379 case External1:
j3 13:546dd29b1c7a 380 if(device_control_DESIGNVALUE & device_control_TMPCTLEXT0)
j3 13:546dd29b1c7a 381 {
j3 13:546dd29b1c7a 382 temp = readRegister(tmp_ext1_data);
j3 13:546dd29b1c7a 383 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 384 }
j3 13:546dd29b1c7a 385 break;
j3 13:546dd29b1c7a 386
j3 13:546dd29b1c7a 387 case External2:
j3 13:546dd29b1c7a 388 if(device_control_DESIGNVALUE & device_control_TMPCTLEXT1)
j3 13:546dd29b1c7a 389 {
j3 13:546dd29b1c7a 390 temp = readRegister(tmp_ext2_data);
j3 13:546dd29b1c7a 391 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 392 }
j3 13:546dd29b1c7a 393 break;
j3 13:546dd29b1c7a 394 };
j3 13:546dd29b1c7a 395
j3 13:546dd29b1c7a 396 if(result == MAX113XX_Pixi::Success)
j3 13:546dd29b1c7a 397 {
j3 13:546dd29b1c7a 398 if(temp & 0x0800)
j3 13:546dd29b1c7a 399 {
j3 13:546dd29b1c7a 400 temp |= 0xF000;
j3 13:546dd29b1c7a 401 }
j3 13:546dd29b1c7a 402 data = (temp/8.0F);
j3 13:546dd29b1c7a 403 }
j3 9:094df3de3616 404 }
j3 9:094df3de3616 405 else //12 port device
j3 9:094df3de3616 406 {
j3 9:094df3de3616 407 }
j3 9:094df3de3616 408
j3 7:8669a53acd0d 409 return result;
j3 7:8669a53acd0d 410 }
j3 7:8669a53acd0d 411
j3 7:8669a53acd0d 412 //*********************************************************************
j3 12:8054ee101bad 413 void MAX113XX_Pixi::dumpMemory(Serial &ser)
j3 7:8669a53acd0d 414 {
j3 10:6efe114ef882 415 uint16_t mem[0x74];
j3 7:8669a53acd0d 416
j3 12:8054ee101bad 417 blockRead(dev_id, mem, 0x74);
j3 7:8669a53acd0d 418 for(uint8_t idx = 0; idx < 0x74; idx++)
j3 7:8669a53acd0d 419 {
j3 12:8054ee101bad 420 ser.printf("Register 0x%02x = 0x%04x\r\n", idx, mem[idx]);
j3 7:8669a53acd0d 421 }
j3 7:8669a53acd0d 422 ser.printf("\r\n");
j3 7:8669a53acd0d 423 }
j3 7:8669a53acd0d 424
j3 7:8669a53acd0d 425
j3 9:094df3de3616 426 /// SPI first byte when writing MAX11300/11
j3 9:094df3de3616 427 //(7-bit address in bits 0x7E; LSB=0 for write)
j3 9:094df3de3616 428 #define MAX113XXAddr_SPI_Write(RegAddr) ( (RegAddr << 1) )
j3 9:094df3de3616 429
j3 9:094df3de3616 430 /// SPI first byte when reading MAX11300/11
j3 9:094df3de3616 431 //(7-bit address in bits 0x7E; LSB=1 for read)
j3 9:094df3de3616 432 #define MAX113XXAddr_SPI_Read(RegAddr) ( (RegAddr << 1) | 1 )
j3 9:094df3de3616 433
j3 7:8669a53acd0d 434 //*************************** SPI Implementation ******************************
j3 9:094df3de3616 435 MAX113XX_SPI::MAX113XX_SPI(SPI & spiBus, PinName cs,
j3 9:094df3de3616 436 MAX113XX_Pixi::Device_e device, PinName cnvt):
j3 9:094df3de3616 437 MAX113XX_Pixi(device, cnvt), m_spiBus(spiBus), m_cs(cs, 1)
j3 7:8669a53acd0d 438 {
j3 11:31e7ca030b8f 439 if((m_device == MAX11300) || (m_device == MAX11301)) //20 port device
j3 11:31e7ca030b8f 440 {
j3 12:8054ee101bad 441 blockWrite(gpo_data_15_to_0, configDesignVals, 18);
j3 11:31e7ca030b8f 442 blockWrite(port_cfg_00, portConfigDesignVals, 20);
j3 12:8054ee101bad 443 blockWrite(dac_data_port_00, dacDesignVals, 20);
j3 11:31e7ca030b8f 444 wait(0.1);
j3 11:31e7ca030b8f 445 }
j3 11:31e7ca030b8f 446 else //12 port device
j3 11:31e7ca030b8f 447 {
j3 11:31e7ca030b8f 448 }
j3 7:8669a53acd0d 449 }
j3 7:8669a53acd0d 450
j3 7:8669a53acd0d 451 //*********************************************************************
j3 7:8669a53acd0d 452 MAX113XX_SPI::~MAX113XX_SPI()
j3 7:8669a53acd0d 453 {
j3 7:8669a53acd0d 454 //empty block
j3 7:8669a53acd0d 455 }
j3 7:8669a53acd0d 456
j3 7:8669a53acd0d 457 //*********************************************************************
j3 9:094df3de3616 458 void MAX113XX_SPI::writeRegister(uint8_t reg, const uint16_t data)
j3 7:8669a53acd0d 459 {
j3 7:8669a53acd0d 460 m_cs = 0;
j3 9:094df3de3616 461 m_spiBus.write(MAX113XXAddr_SPI_Write(reg));
j3 7:8669a53acd0d 462 m_spiBus.write(((0xFF00 & data) >> 8));
j3 7:8669a53acd0d 463 m_spiBus.write((0x00FF & data));
j3 7:8669a53acd0d 464 m_cs = 1;
j3 7:8669a53acd0d 465 }
j3 7:8669a53acd0d 466
j3 7:8669a53acd0d 467 //*********************************************************************
j3 9:094df3de3616 468 uint16_t MAX113XX_SPI::readRegister(uint8_t reg)
j3 7:8669a53acd0d 469 {
j3 7:8669a53acd0d 470 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 471
j3 7:8669a53acd0d 472 m_cs = 0;
j3 9:094df3de3616 473 m_spiBus.write(MAX113XXAddr_SPI_Read(reg));
j3 7:8669a53acd0d 474 rtn_val |= (m_spiBus.write(0xFF) << 8);
j3 7:8669a53acd0d 475 rtn_val |= m_spiBus.write(0xFF);
j3 7:8669a53acd0d 476 m_cs = 1;
j3 7:8669a53acd0d 477
j3 7:8669a53acd0d 478 return rtn_val;
j3 7:8669a53acd0d 479 }
j3 7:8669a53acd0d 480
j3 7:8669a53acd0d 481 //*********************************************************************
j3 9:094df3de3616 482 void MAX113XX_SPI::blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 483 const uint8_t num_reg)
j3 7:8669a53acd0d 484 {
j3 11:31e7ca030b8f 485 m_cs = 0;
j3 11:31e7ca030b8f 486 m_spiBus.write(MAX113XXAddr_SPI_Write(reg));
j3 7:8669a53acd0d 487 for(uint8_t idx = 0; idx < num_reg; idx++)
j3 7:8669a53acd0d 488 {
j3 11:31e7ca030b8f 489 m_spiBus.write(((0xFF00 & data[idx]) >> 8));
j3 11:31e7ca030b8f 490 m_spiBus.write((0x00FF & data[idx]));
j3 7:8669a53acd0d 491 }
j3 11:31e7ca030b8f 492 m_cs = 1;
j3 7:8669a53acd0d 493 }
j3 7:8669a53acd0d 494
j3 7:8669a53acd0d 495 //*********************************************************************
j3 9:094df3de3616 496 void MAX113XX_SPI::blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg)
j3 7:8669a53acd0d 497 {
j3 11:31e7ca030b8f 498 uint16_t temp;
j3 11:31e7ca030b8f 499 m_cs = 0;
j3 11:31e7ca030b8f 500 m_spiBus.write(MAX113XXAddr_SPI_Read(reg));
j3 11:31e7ca030b8f 501 for(uint8_t idx = 0; idx < num_reg; idx ++)
j3 7:8669a53acd0d 502 {
j3 11:31e7ca030b8f 503 temp = 0;
j3 11:31e7ca030b8f 504 temp |= (m_spiBus.write(0xFF) << 8);
j3 11:31e7ca030b8f 505 temp |= m_spiBus.write(0xFF);
j3 11:31e7ca030b8f 506 data[idx] = temp;
j3 7:8669a53acd0d 507 }
j3 11:31e7ca030b8f 508 m_cs = 1;
j3 7:8669a53acd0d 509 }
j3 7:8669a53acd0d 510
j3 7:8669a53acd0d 511
j3 7:8669a53acd0d 512 //*************************** I2C Implementation ******************************
j3 9:094df3de3616 513 MAX113XX_I2C::MAX113XX_I2C(I2C &i2cBus, MAX113XX_Pixi::Device_e device, PinName cnvt):
j3 9:094df3de3616 514 MAX113XX_Pixi(device, cnvt), m_i2cBus(i2cBus)
j3 7:8669a53acd0d 515 {
j3 11:31e7ca030b8f 516 if((m_device == MAX11300) || (m_device == MAX11301)) //20 port device
j3 11:31e7ca030b8f 517 {
j3 12:8054ee101bad 518 blockWrite(gpo_data_15_to_0, configDesignVals, 18);
j3 11:31e7ca030b8f 519 blockWrite(port_cfg_00, portConfigDesignVals, 20);
j3 12:8054ee101bad 520 blockWrite(dac_data_port_00, dacDesignVals, 20);
j3 11:31e7ca030b8f 521 wait(0.1);
j3 11:31e7ca030b8f 522 }
j3 11:31e7ca030b8f 523 else //12 port device
j3 11:31e7ca030b8f 524 {
j3 11:31e7ca030b8f 525 }
j3 7:8669a53acd0d 526 }
j3 7:8669a53acd0d 527
j3 7:8669a53acd0d 528 //*********************************************************************
j3 7:8669a53acd0d 529 MAX113XX_I2C::~MAX113XX_I2C()
j3 7:8669a53acd0d 530 {
j3 7:8669a53acd0d 531 //empty block
j3 7:8669a53acd0d 532 }
j3 7:8669a53acd0d 533
j3 7:8669a53acd0d 534 //*********************************************************************
j3 9:094df3de3616 535 void MAX113XX_I2C::writeRegister(uint8_t reg, const uint16_t data)
j3 7:8669a53acd0d 536 {
j3 7:8669a53acd0d 537
j3 7:8669a53acd0d 538 }
j3 7:8669a53acd0d 539
j3 7:8669a53acd0d 540 //*********************************************************************
j3 9:094df3de3616 541 uint16_t MAX113XX_I2C::readRegister(uint8_t reg)
j3 7:8669a53acd0d 542 {
j3 7:8669a53acd0d 543 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 544
j3 7:8669a53acd0d 545 return rtn_val;
j3 7:8669a53acd0d 546 }
j3 7:8669a53acd0d 547
j3 7:8669a53acd0d 548 //*********************************************************************
j3 9:094df3de3616 549 void MAX113XX_I2C::blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 550 const uint8_t num_reg)
j3 7:8669a53acd0d 551 {
j3 7:8669a53acd0d 552
j3 7:8669a53acd0d 553 }
j3 7:8669a53acd0d 554
j3 7:8669a53acd0d 555 //*********************************************************************
j3 9:094df3de3616 556 void MAX113XX_I2C::blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg)
j3 7:8669a53acd0d 557 {
j3 7:8669a53acd0d 558
j3 7:8669a53acd0d 559 }