L VD / MAX113XX_Pixi

Library for the MAX11300

MAX113XX_Pixi.cpp@7:8669a53acd0d, 2017-05-05 (annotated)

Committer:
j3
Date:
Fri May 05 19:13:28 2017 +0000
Revision:
7:8669a53acd0d
Child:
9:094df3de3616
Adding support for both I2C and SPI.  Removed convoluted init process, unnecessary, configuration can be written contiguously.  Library requires configuration header from config GUI.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 7:8669a53acd0d 1 /**********************************************************************
j3 7:8669a53acd0d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 7:8669a53acd0d 3 *
j3 7:8669a53acd0d 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 7:8669a53acd0d 5 * copy of this software and associated documentation files (the "Software"),
j3 7:8669a53acd0d 6 * to deal in the Software without restriction, including without limitation
j3 7:8669a53acd0d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 7:8669a53acd0d 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 7:8669a53acd0d 9 * Software is furnished to do so, subject to the following conditions:
j3 7:8669a53acd0d 10 *
j3 7:8669a53acd0d 11 * The above copyright notice and this permission notice shall be included
j3 7:8669a53acd0d 12 * in all copies or substantial portions of the Software.
j3 7:8669a53acd0d 13 *
j3 7:8669a53acd0d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 7:8669a53acd0d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 7:8669a53acd0d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 7:8669a53acd0d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 7:8669a53acd0d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 7:8669a53acd0d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 7:8669a53acd0d 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 7:8669a53acd0d 21 *
j3 7:8669a53acd0d 22 * Except as contained in this notice, the name of Maxim Integrated
j3 7:8669a53acd0d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 7:8669a53acd0d 24 * Products, Inc. Branding Policy.
j3 7:8669a53acd0d 25 *
j3 7:8669a53acd0d 26 * The mere transfer of this software does not imply any licenses
j3 7:8669a53acd0d 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 7:8669a53acd0d 28 * trademarks, maskwork rights, or any other form of intellectual
j3 7:8669a53acd0d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 7:8669a53acd0d 30 * ownership rights.
j3 7:8669a53acd0d 31 **********************************************************************/
j3 7:8669a53acd0d 32
j3 7:8669a53acd0d 33 #include "MAX113XX_Pixi.h"
j3 7:8669a53acd0d 34
j3 7:8669a53acd0d 35 static const uint16_t port_config_design_vals[20] = {
j3 7:8669a53acd0d 36 port_cfg_00_DESIGNVALUE,
j3 7:8669a53acd0d 37 port_cfg_01_DESIGNVALUE,
j3 7:8669a53acd0d 38 port_cfg_02_DESIGNVALUE,
j3 7:8669a53acd0d 39 port_cfg_03_DESIGNVALUE,
j3 7:8669a53acd0d 40 port_cfg_04_DESIGNVALUE,
j3 7:8669a53acd0d 41 port_cfg_05_DESIGNVALUE,
j3 7:8669a53acd0d 42 port_cfg_06_DESIGNVALUE,
j3 7:8669a53acd0d 43 port_cfg_07_DESIGNVALUE,
j3 7:8669a53acd0d 44 port_cfg_08_DESIGNVALUE,
j3 7:8669a53acd0d 45 port_cfg_09_DESIGNVALUE,
j3 7:8669a53acd0d 46 port_cfg_10_DESIGNVALUE,
j3 7:8669a53acd0d 47 port_cfg_11_DESIGNVALUE,
j3 7:8669a53acd0d 48 port_cfg_12_DESIGNVALUE,
j3 7:8669a53acd0d 49 port_cfg_13_DESIGNVALUE,
j3 7:8669a53acd0d 50 port_cfg_14_DESIGNVALUE,
j3 7:8669a53acd0d 51 port_cfg_15_DESIGNVALUE,
j3 7:8669a53acd0d 52 port_cfg_16_DESIGNVALUE,
j3 7:8669a53acd0d 53 port_cfg_17_DESIGNVALUE,
j3 7:8669a53acd0d 54 port_cfg_18_DESIGNVALUE,
j3 7:8669a53acd0d 55 port_cfg_19_DESIGNVALUE};
j3 7:8669a53acd0d 56
j3 7:8669a53acd0d 57 //************************** Base Class member fxs *****************************
j3 7:8669a53acd0d 58 MAX113XX_Pixi::MAX113XX_Pixi(PinName cnvt):
j3 7:8669a53acd0d 59 m_cnvt(cnvt, 1)
j3 7:8669a53acd0d 60 {
j3 7:8669a53acd0d 61 }
j3 7:8669a53acd0d 62
j3 7:8669a53acd0d 63 //*********************************************************************
j3 7:8669a53acd0d 64 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioWrite(MAX113XX_Ports_e port,
j3 7:8669a53acd0d 65 const uint8_t state)
j3 7:8669a53acd0d 66 {
j3 7:8669a53acd0d 67 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 68 uint16_t temp;
j3 7:8669a53acd0d 69 uint16_t port_mask;
j3 7:8669a53acd0d 70
j3 7:8669a53acd0d 71 if(((port_config_design_vals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_3)
j3 7:8669a53acd0d 72 {
j3 7:8669a53acd0d 73 if(port < MAX113XX_Pixi::PORT16)
j3 7:8669a53acd0d 74 {
j3 7:8669a53acd0d 75 port_mask = (1 << port);
j3 7:8669a53acd0d 76 temp = readRegister(gpo_data_15_to_0);
j3 7:8669a53acd0d 77 if(state & 0x01)
j3 7:8669a53acd0d 78 {
j3 7:8669a53acd0d 79 temp |= port_mask;
j3 7:8669a53acd0d 80 }
j3 7:8669a53acd0d 81 else
j3 7:8669a53acd0d 82 {
j3 7:8669a53acd0d 83 temp &= ~port_mask;
j3 7:8669a53acd0d 84 }
j3 7:8669a53acd0d 85 writeRegister(gpo_data_15_to_0, temp);
j3 7:8669a53acd0d 86 }
j3 7:8669a53acd0d 87 else
j3 7:8669a53acd0d 88 {
j3 7:8669a53acd0d 89 port_mask = (1 << (port - MAX113XX_Pixi::PORT16));
j3 7:8669a53acd0d 90 temp = readRegister(gpo_data_19_to_16);
j3 7:8669a53acd0d 91 if(state & 0x01)
j3 7:8669a53acd0d 92 {
j3 7:8669a53acd0d 93 temp |= port_mask;
j3 7:8669a53acd0d 94 }
j3 7:8669a53acd0d 95 else
j3 7:8669a53acd0d 96 {
j3 7:8669a53acd0d 97 temp &= ~port_mask;
j3 7:8669a53acd0d 98 }
j3 7:8669a53acd0d 99 writeRegister(gpo_data_19_to_16, temp);
j3 7:8669a53acd0d 100 }
j3 7:8669a53acd0d 101
j3 7:8669a53acd0d 102 result = MAX113XX_Pixi::Success;
j3 7:8669a53acd0d 103 }
j3 7:8669a53acd0d 104
j3 7:8669a53acd0d 105 return result;
j3 7:8669a53acd0d 106 }
j3 7:8669a53acd0d 107
j3 7:8669a53acd0d 108 //*********************************************************************
j3 7:8669a53acd0d 109 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioRead(MAX113XX_Ports_e port, uint8_t &state)
j3 7:8669a53acd0d 110 {
j3 7:8669a53acd0d 111 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 112
j3 7:8669a53acd0d 113 if(((port_config_design_vals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_1)
j3 7:8669a53acd0d 114 {
j3 7:8669a53acd0d 115 if(port < MAX113XX_Pixi::PORT16)
j3 7:8669a53acd0d 116 {
j3 7:8669a53acd0d 117 state = (readRegister(gpi_data_15_to_0) >> port);
j3 7:8669a53acd0d 118 }
j3 7:8669a53acd0d 119 else
j3 7:8669a53acd0d 120 {
j3 7:8669a53acd0d 121 state = (readRegister(gpi_data_19_to_16) >> (port - MAX113XX_Pixi::PORT16));
j3 7:8669a53acd0d 122 }
j3 7:8669a53acd0d 123
j3 7:8669a53acd0d 124 result = MAX113XX_Pixi::Success;
j3 7:8669a53acd0d 125 }
j3 7:8669a53acd0d 126
j3 7:8669a53acd0d 127 return result;
j3 7:8669a53acd0d 128 }
j3 7:8669a53acd0d 129
j3 7:8669a53acd0d 130 //*********************************************************************
j3 7:8669a53acd0d 131 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::singleEndedADCRead(MAX113XX_Ports_e port, uint16_t &data)
j3 7:8669a53acd0d 132 {
j3 7:8669a53acd0d 133 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 134
j3 7:8669a53acd0d 135 if(((port_config_design_vals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_7)
j3 7:8669a53acd0d 136 {
j3 7:8669a53acd0d 137 uint8_t num_samples = ((port_config_design_vals[port] & port_cfg_00_funcprm_nsamples) >> 5);
j3 7:8669a53acd0d 138 num_samples = (1 << num_samples);
j3 7:8669a53acd0d 139
j3 7:8669a53acd0d 140 while(num_samples--)
j3 7:8669a53acd0d 141 {
j3 7:8669a53acd0d 142 this->m_cnvt = 0;
j3 7:8669a53acd0d 143 wait_us(1);
j3 7:8669a53acd0d 144 this->m_cnvt = 1;
j3 7:8669a53acd0d 145 wait_us(100);
j3 7:8669a53acd0d 146 }
j3 7:8669a53acd0d 147 data = readRegister(static_cast<MAX11300RegAddress_t>(adc_data_port_00 + port));
j3 7:8669a53acd0d 148
j3 7:8669a53acd0d 149 result = MAX113XX_Pixi::Success;
j3 7:8669a53acd0d 150 }
j3 7:8669a53acd0d 151
j3 7:8669a53acd0d 152 return result;
j3 7:8669a53acd0d 153 }
j3 7:8669a53acd0d 154
j3 7:8669a53acd0d 155 //*********************************************************************
j3 7:8669a53acd0d 156 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::singleEndedDACWrite(MAX113XX_Ports_e port,
j3 7:8669a53acd0d 157 const uint16_t data)
j3 7:8669a53acd0d 158 {
j3 7:8669a53acd0d 159 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 160
j3 7:8669a53acd0d 161 if(((port_config_design_vals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_5)
j3 7:8669a53acd0d 162 {
j3 7:8669a53acd0d 163 writeRegister(static_cast<MAX11300RegAddress_t>(dac_data_port_00 + port) , data);
j3 7:8669a53acd0d 164 result = MAX113XX_Pixi::Success;
j3 7:8669a53acd0d 165 }
j3 7:8669a53acd0d 166
j3 7:8669a53acd0d 167 return result;
j3 7:8669a53acd0d 168 }
j3 7:8669a53acd0d 169
j3 7:8669a53acd0d 170 //*********************************************************************
j3 7:8669a53acd0d 171 void MAX113XX_Pixi::dumpPixiMemory(Serial &ser, MAX113XX_Pixi &pixi)
j3 7:8669a53acd0d 172 {
j3 7:8669a53acd0d 173 uint16_t mem[256];
j3 7:8669a53acd0d 174
j3 7:8669a53acd0d 175 pixi.blockRead(dev_id, mem, 0x74);
j3 7:8669a53acd0d 176 for(uint8_t idx = 0; idx < 0x74; idx++)
j3 7:8669a53acd0d 177 {
j3 7:8669a53acd0d 178 ser.printf("Register 0x%2x = 0x%4x\r\n", idx, mem[idx]);
j3 7:8669a53acd0d 179 }
j3 7:8669a53acd0d 180 ser.printf("\r\n");
j3 7:8669a53acd0d 181 }
j3 7:8669a53acd0d 182
j3 7:8669a53acd0d 183
j3 7:8669a53acd0d 184 //*************************** SPI Implementation ******************************
j3 7:8669a53acd0d 185 MAX113XX_SPI::MAX113XX_SPI(SPI & spiBus, PinName cs, PinName cnvt):
j3 7:8669a53acd0d 186 MAX113XX_Pixi(cnvt), m_spiBus(spiBus), m_cs(cs, 1)
j3 7:8669a53acd0d 187 {
j3 7:8669a53acd0d 188
j3 7:8669a53acd0d 189 }
j3 7:8669a53acd0d 190
j3 7:8669a53acd0d 191 //*********************************************************************
j3 7:8669a53acd0d 192 MAX113XX_SPI::~MAX113XX_SPI()
j3 7:8669a53acd0d 193 {
j3 7:8669a53acd0d 194 //empty block
j3 7:8669a53acd0d 195 }
j3 7:8669a53acd0d 196
j3 7:8669a53acd0d 197 //*********************************************************************
j3 7:8669a53acd0d 198 void MAX113XX_SPI::writeRegister(MAX11300RegAddress_t reg, const uint16_t data)
j3 7:8669a53acd0d 199 {
j3 7:8669a53acd0d 200 m_cs = 0;
j3 7:8669a53acd0d 201 m_spiBus.write(MAX11300Addr_SPI_Write(reg));
j3 7:8669a53acd0d 202 m_spiBus.write(((0xFF00 & data) >> 8));
j3 7:8669a53acd0d 203 m_spiBus.write((0x00FF & data));
j3 7:8669a53acd0d 204 m_cs = 1;
j3 7:8669a53acd0d 205 }
j3 7:8669a53acd0d 206
j3 7:8669a53acd0d 207 //*********************************************************************
j3 7:8669a53acd0d 208 uint16_t MAX113XX_SPI::readRegister(MAX11300RegAddress_t reg)
j3 7:8669a53acd0d 209 {
j3 7:8669a53acd0d 210 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 211
j3 7:8669a53acd0d 212 m_cs = 0;
j3 7:8669a53acd0d 213 m_spiBus.write(MAX11300Addr_SPI_Read(reg));
j3 7:8669a53acd0d 214 rtn_val |= (m_spiBus.write(0xFF) << 8);
j3 7:8669a53acd0d 215 rtn_val |= m_spiBus.write(0xFF);
j3 7:8669a53acd0d 216 m_cs = 1;
j3 7:8669a53acd0d 217
j3 7:8669a53acd0d 218 return rtn_val;
j3 7:8669a53acd0d 219 }
j3 7:8669a53acd0d 220
j3 7:8669a53acd0d 221 //*********************************************************************
j3 7:8669a53acd0d 222 void MAX113XX_SPI::blockWrite(MAX11300RegAddress_t reg, const uint16_t *data,
j3 7:8669a53acd0d 223 const uint8_t num_reg)
j3 7:8669a53acd0d 224 {
j3 7:8669a53acd0d 225 for(uint8_t idx = 0; idx < num_reg; idx++)
j3 7:8669a53acd0d 226 {
j3 7:8669a53acd0d 227 writeRegister(static_cast<MAX11300RegAddress_t>(reg + idx), data[idx]);
j3 7:8669a53acd0d 228 }
j3 7:8669a53acd0d 229 }
j3 7:8669a53acd0d 230
j3 7:8669a53acd0d 231 //*********************************************************************
j3 7:8669a53acd0d 232 void MAX113XX_SPI::blockRead(MAX11300RegAddress_t reg, uint16_t *data,
j3 7:8669a53acd0d 233 const uint8_t num_reg)
j3 7:8669a53acd0d 234 {
j3 7:8669a53acd0d 235 for(uint8_t idx = 0; idx < num_reg; idx++)
j3 7:8669a53acd0d 236 {
j3 7:8669a53acd0d 237 data[idx] = readRegister(static_cast<MAX11300RegAddress_t>(reg + idx));
j3 7:8669a53acd0d 238 }
j3 7:8669a53acd0d 239 }
j3 7:8669a53acd0d 240
j3 7:8669a53acd0d 241
j3 7:8669a53acd0d 242 //*************************** I2C Implementation ******************************
j3 7:8669a53acd0d 243 MAX113XX_I2C::MAX113XX_I2C(I2C &i2cBus, PinName cnvt):
j3 7:8669a53acd0d 244 MAX113XX_Pixi(cnvt), m_i2cBus(i2cBus)
j3 7:8669a53acd0d 245 {
j3 7:8669a53acd0d 246
j3 7:8669a53acd0d 247 }
j3 7:8669a53acd0d 248
j3 7:8669a53acd0d 249 //*********************************************************************
j3 7:8669a53acd0d 250 MAX113XX_I2C::~MAX113XX_I2C()
j3 7:8669a53acd0d 251 {
j3 7:8669a53acd0d 252 //empty block
j3 7:8669a53acd0d 253 }
j3 7:8669a53acd0d 254
j3 7:8669a53acd0d 255 //*********************************************************************
j3 7:8669a53acd0d 256 void MAX113XX_I2C::writeRegister(MAX11300RegAddress_t reg, const uint16_t data)
j3 7:8669a53acd0d 257 {
j3 7:8669a53acd0d 258
j3 7:8669a53acd0d 259 }
j3 7:8669a53acd0d 260
j3 7:8669a53acd0d 261 //*********************************************************************
j3 7:8669a53acd0d 262 uint16_t MAX113XX_I2C::readRegister(MAX11300RegAddress_t reg)
j3 7:8669a53acd0d 263 {
j3 7:8669a53acd0d 264 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 265
j3 7:8669a53acd0d 266 return rtn_val;
j3 7:8669a53acd0d 267 }
j3 7:8669a53acd0d 268
j3 7:8669a53acd0d 269 //*********************************************************************
j3 7:8669a53acd0d 270 void MAX113XX_I2C::blockWrite(MAX11300RegAddress_t reg, const uint16_t *data,
j3 7:8669a53acd0d 271 const uint8_t num_reg)
j3 7:8669a53acd0d 272 {
j3 7:8669a53acd0d 273
j3 7:8669a53acd0d 274 }
j3 7:8669a53acd0d 275
j3 7:8669a53acd0d 276 //*********************************************************************
j3 7:8669a53acd0d 277 void MAX113XX_I2C::blockRead(MAX11300RegAddress_t reg, uint16_t *data,
j3 7:8669a53acd0d 278 const uint8_t num_reg)
j3 7:8669a53acd0d 279 {
j3 7:8669a53acd0d 280
j3 7:8669a53acd0d 281 }
j3 7:8669a53acd0d 282