L VD / MAX113XX_Pixi

Library for the MAX11300

MAX113XX_Pixi.cpp@10:6efe114ef882, 2017-05-08 (annotated)

Committer:
j3
Date:
Mon May 08 17:49:57 2017 +0000
Revision:
10:6efe114ef882
Parent:
9:094df3de3616
Child:
11:31e7ca030b8f
Added support for determining if 20 or 12 port devices.  Memory map slightly different, so read/write paths different.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 7:8669a53acd0d 1 /**********************************************************************
j3 7:8669a53acd0d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 7:8669a53acd0d 3 *
j3 7:8669a53acd0d 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 7:8669a53acd0d 5 * copy of this software and associated documentation files (the "Software"),
j3 7:8669a53acd0d 6 * to deal in the Software without restriction, including without limitation
j3 7:8669a53acd0d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 7:8669a53acd0d 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 7:8669a53acd0d 9 * Software is furnished to do so, subject to the following conditions:
j3 7:8669a53acd0d 10 *
j3 7:8669a53acd0d 11 * The above copyright notice and this permission notice shall be included
j3 7:8669a53acd0d 12 * in all copies or substantial portions of the Software.
j3 7:8669a53acd0d 13 *
j3 7:8669a53acd0d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 7:8669a53acd0d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 7:8669a53acd0d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 7:8669a53acd0d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 7:8669a53acd0d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 7:8669a53acd0d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 7:8669a53acd0d 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 7:8669a53acd0d 21 *
j3 7:8669a53acd0d 22 * Except as contained in this notice, the name of Maxim Integrated
j3 7:8669a53acd0d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 7:8669a53acd0d 24 * Products, Inc. Branding Policy.
j3 7:8669a53acd0d 25 *
j3 7:8669a53acd0d 26 * The mere transfer of this software does not imply any licenses
j3 7:8669a53acd0d 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 7:8669a53acd0d 28 * trademarks, maskwork rights, or any other form of intellectual
j3 7:8669a53acd0d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 7:8669a53acd0d 30 * ownership rights.
j3 7:8669a53acd0d 31 **********************************************************************/
j3 7:8669a53acd0d 32
j3 9:094df3de3616 33
j3 7:8669a53acd0d 34 #include "MAX113XX_Pixi.h"
j3 7:8669a53acd0d 35
j3 9:094df3de3616 36
j3 9:094df3de3616 37 //20 port devices
j3 9:094df3de3616 38 #if defined(_MAX11300_DESIGNVALUE_H_) || defined(_MAX11301_DESIGNVALUE_H_)
j3 9:094df3de3616 39 static const uint16_t portConfigDesignVals[20] = {
j3 7:8669a53acd0d 40 port_cfg_00_DESIGNVALUE,
j3 7:8669a53acd0d 41 port_cfg_01_DESIGNVALUE,
j3 7:8669a53acd0d 42 port_cfg_02_DESIGNVALUE,
j3 7:8669a53acd0d 43 port_cfg_03_DESIGNVALUE,
j3 7:8669a53acd0d 44 port_cfg_04_DESIGNVALUE,
j3 7:8669a53acd0d 45 port_cfg_05_DESIGNVALUE,
j3 7:8669a53acd0d 46 port_cfg_06_DESIGNVALUE,
j3 7:8669a53acd0d 47 port_cfg_07_DESIGNVALUE,
j3 7:8669a53acd0d 48 port_cfg_08_DESIGNVALUE,
j3 7:8669a53acd0d 49 port_cfg_09_DESIGNVALUE,
j3 7:8669a53acd0d 50 port_cfg_10_DESIGNVALUE,
j3 7:8669a53acd0d 51 port_cfg_11_DESIGNVALUE,
j3 7:8669a53acd0d 52 port_cfg_12_DESIGNVALUE,
j3 7:8669a53acd0d 53 port_cfg_13_DESIGNVALUE,
j3 7:8669a53acd0d 54 port_cfg_14_DESIGNVALUE,
j3 7:8669a53acd0d 55 port_cfg_15_DESIGNVALUE,
j3 7:8669a53acd0d 56 port_cfg_16_DESIGNVALUE,
j3 7:8669a53acd0d 57 port_cfg_17_DESIGNVALUE,
j3 7:8669a53acd0d 58 port_cfg_18_DESIGNVALUE,
j3 7:8669a53acd0d 59 port_cfg_19_DESIGNVALUE};
j3 9:094df3de3616 60 #endif
j3 9:094df3de3616 61
j3 9:094df3de3616 62 //12 port devices...
j3 9:094df3de3616 63 #if defined(_MAX11311_DESIGNVALUE_H_) || defined(_MAX11312_DESIGNVALUE_H_)
j3 9:094df3de3616 64 static const uint16_t portConfigDesignVals[12] = {
j3 9:094df3de3616 65 port_cfg_p0_DESIGNVALUE,
j3 9:094df3de3616 66 port_cfg_p1_DESIGNVALUE,
j3 9:094df3de3616 67 port_cfg_p2_DESIGNVALUE,
j3 9:094df3de3616 68 port_cfg_p3_DESIGNVALUE,
j3 9:094df3de3616 69 port_cfg_p4_DESIGNVALUE,
j3 9:094df3de3616 70 port_cfg_p5_DESIGNVALUE,
j3 9:094df3de3616 71 port_cfg_p6_DESIGNVALUE,
j3 9:094df3de3616 72 port_cfg_p7_DESIGNVALUE,
j3 9:094df3de3616 73 port_cfg_p8_DESIGNVALUE,
j3 9:094df3de3616 74 port_cfg_p9_DESIGNVALUE,
j3 9:094df3de3616 75 port_cfg_p10_DESIGNVALUE,
j3 9:094df3de3616 76 port_cfg_p11_DESIGNVALUE};
j3 9:094df3de3616 77 #endif
j3 9:094df3de3616 78
j3 7:8669a53acd0d 79
j3 7:8669a53acd0d 80 //************************** Base Class member fxs *****************************
j3 9:094df3de3616 81 MAX113XX_Pixi::MAX113XX_Pixi(Device_e device, PinName cnvt):
j3 9:094df3de3616 82 m_device(device), m_cnvt(cnvt, 1)
j3 7:8669a53acd0d 83 {
j3 9:094df3de3616 84 }
j3 7:8669a53acd0d 85
j3 7:8669a53acd0d 86 //*********************************************************************
j3 9:094df3de3616 87 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioWrite(Ports_e port,
j3 9:094df3de3616 88 const uint8_t state)
j3 7:8669a53acd0d 89 {
j3 10:6efe114ef882 90 uint16_t temp;
j3 10:6efe114ef882 91 uint16_t port_mask;
j3 10:6efe114ef882 92
j3 7:8669a53acd0d 93 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 9:094df3de3616 94
j3 10:6efe114ef882 95 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 96 {
j3 10:6efe114ef882 97 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_3)
j3 10:6efe114ef882 98 {
j3 10:6efe114ef882 99 if(port < MAX113XX_Pixi::PORT16)
j3 10:6efe114ef882 100 {
j3 10:6efe114ef882 101 port_mask = (1 << port);
j3 10:6efe114ef882 102 temp = readRegister(gpo_data_15_to_0);
j3 10:6efe114ef882 103 if(state & 0x01)
j3 10:6efe114ef882 104 {
j3 10:6efe114ef882 105 temp |= port_mask;
j3 10:6efe114ef882 106 }
j3 10:6efe114ef882 107 else
j3 10:6efe114ef882 108 {
j3 10:6efe114ef882 109 temp &= ~port_mask;
j3 10:6efe114ef882 110 }
j3 10:6efe114ef882 111 writeRegister(gpo_data_15_to_0, temp);
j3 10:6efe114ef882 112 }
j3 10:6efe114ef882 113 else
j3 10:6efe114ef882 114 {
j3 10:6efe114ef882 115 port_mask = (1 << (port - MAX113XX_Pixi::PORT16));
j3 10:6efe114ef882 116 temp = readRegister(gpo_data_19_to_16);
j3 10:6efe114ef882 117 if(state & 0x01)
j3 10:6efe114ef882 118 {
j3 10:6efe114ef882 119 temp |= port_mask;
j3 10:6efe114ef882 120 }
j3 10:6efe114ef882 121 else
j3 10:6efe114ef882 122 {
j3 10:6efe114ef882 123 temp &= ~port_mask;
j3 10:6efe114ef882 124 }
j3 10:6efe114ef882 125 writeRegister(gpo_data_19_to_16, temp);
j3 10:6efe114ef882 126 }
j3 10:6efe114ef882 127
j3 10:6efe114ef882 128 result = MAX113XX_Pixi::Success;
j3 10:6efe114ef882 129 }
j3 9:094df3de3616 130 }
j3 9:094df3de3616 131 else //12 port device
j3 9:094df3de3616 132 {
j3 9:094df3de3616 133 }
j3 7:8669a53acd0d 134
j3 7:8669a53acd0d 135 return result;
j3 7:8669a53acd0d 136 }
j3 7:8669a53acd0d 137
j3 7:8669a53acd0d 138 //*********************************************************************
j3 9:094df3de3616 139 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioRead(Ports_e port, uint8_t &state)
j3 7:8669a53acd0d 140 {
j3 7:8669a53acd0d 141 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 142
j3 10:6efe114ef882 143 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 144 {
j3 10:6efe114ef882 145 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_1)
j3 10:6efe114ef882 146 {
j3 10:6efe114ef882 147 if(port < MAX113XX_Pixi::PORT16)
j3 10:6efe114ef882 148 {
j3 10:6efe114ef882 149 state = (readRegister(gpi_data_15_to_0) >> port);
j3 10:6efe114ef882 150 }
j3 10:6efe114ef882 151 else
j3 10:6efe114ef882 152 {
j3 10:6efe114ef882 153 state = (readRegister(gpi_data_19_to_16) >> (port - MAX113XX_Pixi::PORT16));
j3 10:6efe114ef882 154 }
j3 10:6efe114ef882 155
j3 10:6efe114ef882 156 result = MAX113XX_Pixi::Success;
j3 10:6efe114ef882 157 }
j3 9:094df3de3616 158 }
j3 9:094df3de3616 159 else //12 port device
j3 9:094df3de3616 160 {
j3 9:094df3de3616 161 }
j3 9:094df3de3616 162
j3 7:8669a53acd0d 163 return result;
j3 7:8669a53acd0d 164 }
j3 7:8669a53acd0d 165
j3 7:8669a53acd0d 166 //*********************************************************************
j3 9:094df3de3616 167 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::singleEndedADCRead(Ports_e port, uint16_t &data)
j3 7:8669a53acd0d 168 {
j3 7:8669a53acd0d 169 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 170
j3 10:6efe114ef882 171 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 172 {
j3 10:6efe114ef882 173 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_7)
j3 10:6efe114ef882 174 {
j3 10:6efe114ef882 175 uint8_t num_samples = ((portConfigDesignVals[port] & port_cfg_00_funcprm_nsamples) >> 5);
j3 10:6efe114ef882 176 num_samples = (1 << num_samples);
j3 10:6efe114ef882 177
j3 10:6efe114ef882 178 while(num_samples--)
j3 10:6efe114ef882 179 {
j3 10:6efe114ef882 180 m_cnvt = 0;
j3 10:6efe114ef882 181 wait_us(1);
j3 10:6efe114ef882 182 m_cnvt = 1;
j3 10:6efe114ef882 183 wait_us(100);
j3 10:6efe114ef882 184 }
j3 10:6efe114ef882 185 data = readRegister((adc_data_port_00 + port));
j3 10:6efe114ef882 186
j3 10:6efe114ef882 187 result = MAX113XX_Pixi::Success;
j3 10:6efe114ef882 188 }
j3 9:094df3de3616 189 }
j3 9:094df3de3616 190 else //12 port device
j3 9:094df3de3616 191 {
j3 9:094df3de3616 192 }
j3 9:094df3de3616 193
j3 7:8669a53acd0d 194 return result;
j3 7:8669a53acd0d 195 }
j3 7:8669a53acd0d 196
j3 7:8669a53acd0d 197 //*********************************************************************
j3 9:094df3de3616 198 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::singleEndedDACWrite(Ports_e port,
j3 7:8669a53acd0d 199 const uint16_t data)
j3 7:8669a53acd0d 200 {
j3 7:8669a53acd0d 201 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 202
j3 10:6efe114ef882 203 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 204 {
j3 10:6efe114ef882 205 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_5)
j3 10:6efe114ef882 206 {
j3 10:6efe114ef882 207 writeRegister((dac_data_port_00 + port) , data);
j3 10:6efe114ef882 208 result = MAX113XX_Pixi::Success;
j3 10:6efe114ef882 209 }
j3 9:094df3de3616 210 }
j3 9:094df3de3616 211 else //12 port device
j3 9:094df3de3616 212 {
j3 9:094df3de3616 213 }
j3 9:094df3de3616 214
j3 7:8669a53acd0d 215 return result;
j3 7:8669a53acd0d 216 }
j3 7:8669a53acd0d 217
j3 7:8669a53acd0d 218 //*********************************************************************
j3 7:8669a53acd0d 219 void MAX113XX_Pixi::dumpPixiMemory(Serial &ser, MAX113XX_Pixi &pixi)
j3 7:8669a53acd0d 220 {
j3 10:6efe114ef882 221 uint16_t mem[0x74];
j3 7:8669a53acd0d 222
j3 7:8669a53acd0d 223 pixi.blockRead(dev_id, mem, 0x74);
j3 7:8669a53acd0d 224 for(uint8_t idx = 0; idx < 0x74; idx++)
j3 7:8669a53acd0d 225 {
j3 7:8669a53acd0d 226 ser.printf("Register 0x%2x = 0x%4x\r\n", idx, mem[idx]);
j3 7:8669a53acd0d 227 }
j3 7:8669a53acd0d 228 ser.printf("\r\n");
j3 7:8669a53acd0d 229 }
j3 7:8669a53acd0d 230
j3 7:8669a53acd0d 231
j3 9:094df3de3616 232 /// SPI first byte when writing MAX11300/11
j3 9:094df3de3616 233 //(7-bit address in bits 0x7E; LSB=0 for write)
j3 9:094df3de3616 234 #define MAX113XXAddr_SPI_Write(RegAddr) ( (RegAddr << 1) )
j3 9:094df3de3616 235
j3 9:094df3de3616 236 /// SPI first byte when reading MAX11300/11
j3 9:094df3de3616 237 //(7-bit address in bits 0x7E; LSB=1 for read)
j3 9:094df3de3616 238 #define MAX113XXAddr_SPI_Read(RegAddr) ( (RegAddr << 1) | 1 )
j3 9:094df3de3616 239
j3 7:8669a53acd0d 240 //*************************** SPI Implementation ******************************
j3 9:094df3de3616 241 MAX113XX_SPI::MAX113XX_SPI(SPI & spiBus, PinName cs,
j3 9:094df3de3616 242 MAX113XX_Pixi::Device_e device, PinName cnvt):
j3 9:094df3de3616 243 MAX113XX_Pixi(device, cnvt), m_spiBus(spiBus), m_cs(cs, 1)
j3 7:8669a53acd0d 244 {
j3 7:8669a53acd0d 245
j3 7:8669a53acd0d 246 }
j3 7:8669a53acd0d 247
j3 7:8669a53acd0d 248 //*********************************************************************
j3 7:8669a53acd0d 249 MAX113XX_SPI::~MAX113XX_SPI()
j3 7:8669a53acd0d 250 {
j3 7:8669a53acd0d 251 //empty block
j3 7:8669a53acd0d 252 }
j3 7:8669a53acd0d 253
j3 7:8669a53acd0d 254 //*********************************************************************
j3 9:094df3de3616 255 void MAX113XX_SPI::writeRegister(uint8_t reg, const uint16_t data)
j3 7:8669a53acd0d 256 {
j3 7:8669a53acd0d 257 m_cs = 0;
j3 9:094df3de3616 258 m_spiBus.write(MAX113XXAddr_SPI_Write(reg));
j3 7:8669a53acd0d 259 m_spiBus.write(((0xFF00 & data) >> 8));
j3 7:8669a53acd0d 260 m_spiBus.write((0x00FF & data));
j3 7:8669a53acd0d 261 m_cs = 1;
j3 7:8669a53acd0d 262 }
j3 7:8669a53acd0d 263
j3 7:8669a53acd0d 264 //*********************************************************************
j3 9:094df3de3616 265 uint16_t MAX113XX_SPI::readRegister(uint8_t reg)
j3 7:8669a53acd0d 266 {
j3 7:8669a53acd0d 267 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 268
j3 7:8669a53acd0d 269 m_cs = 0;
j3 9:094df3de3616 270 m_spiBus.write(MAX113XXAddr_SPI_Read(reg));
j3 7:8669a53acd0d 271 rtn_val |= (m_spiBus.write(0xFF) << 8);
j3 7:8669a53acd0d 272 rtn_val |= m_spiBus.write(0xFF);
j3 7:8669a53acd0d 273 m_cs = 1;
j3 7:8669a53acd0d 274
j3 7:8669a53acd0d 275 return rtn_val;
j3 7:8669a53acd0d 276 }
j3 7:8669a53acd0d 277
j3 7:8669a53acd0d 278 //*********************************************************************
j3 9:094df3de3616 279 void MAX113XX_SPI::blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 280 const uint8_t num_reg)
j3 7:8669a53acd0d 281 {
j3 7:8669a53acd0d 282 for(uint8_t idx = 0; idx < num_reg; idx++)
j3 7:8669a53acd0d 283 {
j3 9:094df3de3616 284 writeRegister((reg + idx), data[idx]);
j3 7:8669a53acd0d 285 }
j3 7:8669a53acd0d 286 }
j3 7:8669a53acd0d 287
j3 7:8669a53acd0d 288 //*********************************************************************
j3 9:094df3de3616 289 void MAX113XX_SPI::blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg)
j3 7:8669a53acd0d 290 {
j3 7:8669a53acd0d 291 for(uint8_t idx = 0; idx < num_reg; idx++)
j3 7:8669a53acd0d 292 {
j3 9:094df3de3616 293 data[idx] = readRegister((reg + idx));
j3 7:8669a53acd0d 294 }
j3 7:8669a53acd0d 295 }
j3 7:8669a53acd0d 296
j3 7:8669a53acd0d 297
j3 7:8669a53acd0d 298 //*************************** I2C Implementation ******************************
j3 9:094df3de3616 299 MAX113XX_I2C::MAX113XX_I2C(I2C &i2cBus, MAX113XX_Pixi::Device_e device, PinName cnvt):
j3 9:094df3de3616 300 MAX113XX_Pixi(device, cnvt), m_i2cBus(i2cBus)
j3 7:8669a53acd0d 301 {
j3 7:8669a53acd0d 302
j3 7:8669a53acd0d 303 }
j3 7:8669a53acd0d 304
j3 7:8669a53acd0d 305 //*********************************************************************
j3 7:8669a53acd0d 306 MAX113XX_I2C::~MAX113XX_I2C()
j3 7:8669a53acd0d 307 {
j3 7:8669a53acd0d 308 //empty block
j3 7:8669a53acd0d 309 }
j3 7:8669a53acd0d 310
j3 7:8669a53acd0d 311 //*********************************************************************
j3 9:094df3de3616 312 void MAX113XX_I2C::writeRegister(uint8_t reg, const uint16_t data)
j3 7:8669a53acd0d 313 {
j3 7:8669a53acd0d 314
j3 7:8669a53acd0d 315 }
j3 7:8669a53acd0d 316
j3 7:8669a53acd0d 317 //*********************************************************************
j3 9:094df3de3616 318 uint16_t MAX113XX_I2C::readRegister(uint8_t reg)
j3 7:8669a53acd0d 319 {
j3 7:8669a53acd0d 320 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 321
j3 7:8669a53acd0d 322 return rtn_val;
j3 7:8669a53acd0d 323 }
j3 7:8669a53acd0d 324
j3 7:8669a53acd0d 325 //*********************************************************************
j3 9:094df3de3616 326 void MAX113XX_I2C::blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 327 const uint8_t num_reg)
j3 7:8669a53acd0d 328 {
j3 7:8669a53acd0d 329
j3 7:8669a53acd0d 330 }
j3 7:8669a53acd0d 331
j3 7:8669a53acd0d 332 //*********************************************************************
j3 9:094df3de3616 333 void MAX113XX_I2C::blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg)
j3 7:8669a53acd0d 334 {
j3 7:8669a53acd0d 335
j3 7:8669a53acd0d 336 }