L VD / MAX113XX_Pixi

Library for the MAX11300

MAX113XX_Pixi.cpp@12:8054ee101bad, 2017-05-09 (annotated)

Committer:
j3
Date:
Tue May 09 19:04:38 2017 +0000
Revision:
12:8054ee101bad
Parent:
11:31e7ca030b8f
Child:
13:546dd29b1c7a
fixed error in config array and other updates

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 7:8669a53acd0d 1 /**********************************************************************
j3 7:8669a53acd0d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 7:8669a53acd0d 3 *
j3 7:8669a53acd0d 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 7:8669a53acd0d 5 * copy of this software and associated documentation files (the "Software"),
j3 7:8669a53acd0d 6 * to deal in the Software without restriction, including without limitation
j3 7:8669a53acd0d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 7:8669a53acd0d 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 7:8669a53acd0d 9 * Software is furnished to do so, subject to the following conditions:
j3 7:8669a53acd0d 10 *
j3 7:8669a53acd0d 11 * The above copyright notice and this permission notice shall be included
j3 7:8669a53acd0d 12 * in all copies or substantial portions of the Software.
j3 7:8669a53acd0d 13 *
j3 7:8669a53acd0d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 7:8669a53acd0d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 7:8669a53acd0d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 7:8669a53acd0d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 7:8669a53acd0d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 7:8669a53acd0d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 7:8669a53acd0d 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 7:8669a53acd0d 21 *
j3 7:8669a53acd0d 22 * Except as contained in this notice, the name of Maxim Integrated
j3 7:8669a53acd0d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 7:8669a53acd0d 24 * Products, Inc. Branding Policy.
j3 7:8669a53acd0d 25 *
j3 7:8669a53acd0d 26 * The mere transfer of this software does not imply any licenses
j3 7:8669a53acd0d 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 7:8669a53acd0d 28 * trademarks, maskwork rights, or any other form of intellectual
j3 7:8669a53acd0d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 7:8669a53acd0d 30 * ownership rights.
j3 7:8669a53acd0d 31 **********************************************************************/
j3 7:8669a53acd0d 32
j3 9:094df3de3616 33
j3 7:8669a53acd0d 34 #include "MAX113XX_Pixi.h"
j3 7:8669a53acd0d 35
j3 9:094df3de3616 36
j3 9:094df3de3616 37 //20 port devices
j3 9:094df3de3616 38 #if defined(_MAX11300_DESIGNVALUE_H_) || defined(_MAX11301_DESIGNVALUE_H_)
j3 12:8054ee101bad 39
j3 12:8054ee101bad 40 static const uint16_t configDesignVals[18] = {
j3 12:8054ee101bad 41 gpo_data_15_to_0_DESIGNVALUE,
j3 12:8054ee101bad 42 gpo_data_19_to_16_DESIGNVALUE,
j3 12:8054ee101bad 43 0, //reserved
j3 12:8054ee101bad 44 device_control_DESIGNVALUE,
j3 12:8054ee101bad 45 interrupt_mask_DESIGNVALUE,
j3 12:8054ee101bad 46 gpi_irqmode_7_to_0_DESIGNVALUE,
j3 12:8054ee101bad 47 gpi_irqmode_15_to_8_DESIGNVALUE,
j3 12:8054ee101bad 48 gpi_irqmode_19_to_16_DESIGNVALUE,
j3 12:8054ee101bad 49 0, //reserved
j3 12:8054ee101bad 50 dac_preset_data_1_DESIGNVALUE,
j3 12:8054ee101bad 51 dac_preset_data_2_DESIGNVALUE,
j3 12:8054ee101bad 52 tmp_mon_cfg_DESIGNVALUE,
j3 12:8054ee101bad 53 tmp_mon_int_hi_thresh_DESIGNVALUE,
j3 12:8054ee101bad 54 tmp_mon_int_lo_thresh_DESIGNVALUE,
j3 12:8054ee101bad 55 tmp_mon_ext1_hi_thresh_DESIGNVALUE,
j3 12:8054ee101bad 56 tmp_mon_ext1_lo_thresh_DESIGNVALUE,
j3 12:8054ee101bad 57 tmp_mon_ext2_hi_thresh_DESIGNVALUE,
j3 12:8054ee101bad 58 tmp_mon_ext2_lo_thresh_DESIGNVALUE};
j3 12:8054ee101bad 59
j3 9:094df3de3616 60 static const uint16_t portConfigDesignVals[20] = {
j3 7:8669a53acd0d 61 port_cfg_00_DESIGNVALUE,
j3 7:8669a53acd0d 62 port_cfg_01_DESIGNVALUE,
j3 7:8669a53acd0d 63 port_cfg_02_DESIGNVALUE,
j3 7:8669a53acd0d 64 port_cfg_03_DESIGNVALUE,
j3 7:8669a53acd0d 65 port_cfg_04_DESIGNVALUE,
j3 7:8669a53acd0d 66 port_cfg_05_DESIGNVALUE,
j3 7:8669a53acd0d 67 port_cfg_06_DESIGNVALUE,
j3 7:8669a53acd0d 68 port_cfg_07_DESIGNVALUE,
j3 7:8669a53acd0d 69 port_cfg_08_DESIGNVALUE,
j3 7:8669a53acd0d 70 port_cfg_09_DESIGNVALUE,
j3 7:8669a53acd0d 71 port_cfg_10_DESIGNVALUE,
j3 7:8669a53acd0d 72 port_cfg_11_DESIGNVALUE,
j3 7:8669a53acd0d 73 port_cfg_12_DESIGNVALUE,
j3 7:8669a53acd0d 74 port_cfg_13_DESIGNVALUE,
j3 7:8669a53acd0d 75 port_cfg_14_DESIGNVALUE,
j3 7:8669a53acd0d 76 port_cfg_15_DESIGNVALUE,
j3 7:8669a53acd0d 77 port_cfg_16_DESIGNVALUE,
j3 7:8669a53acd0d 78 port_cfg_17_DESIGNVALUE,
j3 7:8669a53acd0d 79 port_cfg_18_DESIGNVALUE,
j3 7:8669a53acd0d 80 port_cfg_19_DESIGNVALUE};
j3 12:8054ee101bad 81
j3 12:8054ee101bad 82 static const uint16_t dacDesignVals[20]= {
j3 12:8054ee101bad 83 dac_data_port_00_DESIGNVALUE,
j3 12:8054ee101bad 84 dac_data_port_01_DESIGNVALUE,
j3 12:8054ee101bad 85 dac_data_port_02_DESIGNVALUE,
j3 12:8054ee101bad 86 dac_data_port_03_DESIGNVALUE,
j3 12:8054ee101bad 87 dac_data_port_04_DESIGNVALUE,
j3 12:8054ee101bad 88 dac_data_port_05_DESIGNVALUE,
j3 12:8054ee101bad 89 dac_data_port_06_DESIGNVALUE,
j3 12:8054ee101bad 90 dac_data_port_07_DESIGNVALUE,
j3 12:8054ee101bad 91 dac_data_port_08_DESIGNVALUE,
j3 12:8054ee101bad 92 dac_data_port_09_DESIGNVALUE,
j3 12:8054ee101bad 93 dac_data_port_10_DESIGNVALUE,
j3 12:8054ee101bad 94 dac_data_port_11_DESIGNVALUE,
j3 12:8054ee101bad 95 dac_data_port_12_DESIGNVALUE,
j3 12:8054ee101bad 96 dac_data_port_13_DESIGNVALUE,
j3 12:8054ee101bad 97 dac_data_port_14_DESIGNVALUE,
j3 12:8054ee101bad 98 dac_data_port_15_DESIGNVALUE,
j3 12:8054ee101bad 99 dac_data_port_16_DESIGNVALUE,
j3 12:8054ee101bad 100 dac_data_port_17_DESIGNVALUE,
j3 12:8054ee101bad 101 dac_data_port_18_DESIGNVALUE,
j3 12:8054ee101bad 102 dac_data_port_19_DESIGNVALUE};
j3 12:8054ee101bad 103
j3 9:094df3de3616 104 #endif
j3 9:094df3de3616 105
j3 9:094df3de3616 106 //12 port devices...
j3 9:094df3de3616 107 #if defined(_MAX11311_DESIGNVALUE_H_) || defined(_MAX11312_DESIGNVALUE_H_)
j3 9:094df3de3616 108 static const uint16_t portConfigDesignVals[12] = {
j3 9:094df3de3616 109 port_cfg_p0_DESIGNVALUE,
j3 9:094df3de3616 110 port_cfg_p1_DESIGNVALUE,
j3 9:094df3de3616 111 port_cfg_p2_DESIGNVALUE,
j3 9:094df3de3616 112 port_cfg_p3_DESIGNVALUE,
j3 9:094df3de3616 113 port_cfg_p4_DESIGNVALUE,
j3 9:094df3de3616 114 port_cfg_p5_DESIGNVALUE,
j3 9:094df3de3616 115 port_cfg_p6_DESIGNVALUE,
j3 9:094df3de3616 116 port_cfg_p7_DESIGNVALUE,
j3 9:094df3de3616 117 port_cfg_p8_DESIGNVALUE,
j3 9:094df3de3616 118 port_cfg_p9_DESIGNVALUE,
j3 9:094df3de3616 119 port_cfg_p10_DESIGNVALUE,
j3 9:094df3de3616 120 port_cfg_p11_DESIGNVALUE};
j3 9:094df3de3616 121 #endif
j3 9:094df3de3616 122
j3 7:8669a53acd0d 123
j3 7:8669a53acd0d 124 //************************** Base Class member fxs *****************************
j3 9:094df3de3616 125 MAX113XX_Pixi::MAX113XX_Pixi(Device_e device, PinName cnvt):
j3 9:094df3de3616 126 m_device(device), m_cnvt(cnvt, 1)
j3 7:8669a53acd0d 127 {
j3 11:31e7ca030b8f 128 }
j3 11:31e7ca030b8f 129
j3 12:8054ee101bad 130 //*********************************************************************
j3 12:8054ee101bad 131 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::singleEndedADCRead(Ports_e port,
j3 12:8054ee101bad 132 uint16_t &data)
j3 12:8054ee101bad 133 {
j3 12:8054ee101bad 134 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 135
j3 12:8054ee101bad 136 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 137 {
j3 12:8054ee101bad 138 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_7)
j3 12:8054ee101bad 139 {
j3 12:8054ee101bad 140 uint8_t num_samples = ((portConfigDesignVals[port] & port_cfg_00_funcprm_nsamples) >> 5);
j3 12:8054ee101bad 141 num_samples = (1 << num_samples);
j3 12:8054ee101bad 142
j3 12:8054ee101bad 143 while(num_samples--)
j3 12:8054ee101bad 144 {
j3 12:8054ee101bad 145 m_cnvt = 0;
j3 12:8054ee101bad 146 wait_us(1);
j3 12:8054ee101bad 147 m_cnvt = 1;
j3 12:8054ee101bad 148 wait_us(100);
j3 12:8054ee101bad 149 }
j3 12:8054ee101bad 150 data = readRegister((adc_data_port_00 + port));
j3 12:8054ee101bad 151
j3 12:8054ee101bad 152 result = MAX113XX_Pixi::Success;
j3 12:8054ee101bad 153 }
j3 12:8054ee101bad 154 }
j3 12:8054ee101bad 155 else //12 port device
j3 12:8054ee101bad 156 {
j3 12:8054ee101bad 157 }
j3 12:8054ee101bad 158
j3 12:8054ee101bad 159 return result;
j3 12:8054ee101bad 160 }
j3 12:8054ee101bad 161
j3 12:8054ee101bad 162 //*********************************************************************
j3 12:8054ee101bad 163 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::differentialADCRead(Ports_e posPort,
j3 12:8054ee101bad 164 Ports_e negPort,
j3 12:8054ee101bad 165 uint16_t &data)
j3 12:8054ee101bad 166 {
j3 12:8054ee101bad 167 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 168
j3 12:8054ee101bad 169 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 170 {
j3 12:8054ee101bad 171 }
j3 12:8054ee101bad 172 else //12 port device
j3 12:8054ee101bad 173 {
j3 12:8054ee101bad 174 }
j3 12:8054ee101bad 175
j3 12:8054ee101bad 176 return result;
j3 12:8054ee101bad 177 }
j3 12:8054ee101bad 178
j3 12:8054ee101bad 179 //*********************************************************************
j3 12:8054ee101bad 180 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::dacWrite(Ports_e port,
j3 12:8054ee101bad 181 const uint16_t data)
j3 12:8054ee101bad 182 {
j3 12:8054ee101bad 183 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 184
j3 12:8054ee101bad 185 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 186 {
j3 12:8054ee101bad 187 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_5)
j3 12:8054ee101bad 188 {
j3 12:8054ee101bad 189 writeRegister((dac_data_port_00 + port) , data);
j3 12:8054ee101bad 190 result = MAX113XX_Pixi::Success;
j3 12:8054ee101bad 191 }
j3 12:8054ee101bad 192 }
j3 12:8054ee101bad 193 else //12 port device
j3 12:8054ee101bad 194 {
j3 12:8054ee101bad 195 }
j3 12:8054ee101bad 196
j3 12:8054ee101bad 197 return result;
j3 12:8054ee101bad 198 }
j3 12:8054ee101bad 199
j3 12:8054ee101bad 200 //*********************************************************************
j3 12:8054ee101bad 201 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioRead(Ports_e port, uint8_t &state)
j3 12:8054ee101bad 202 {
j3 12:8054ee101bad 203 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 204
j3 12:8054ee101bad 205 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 206 {
j3 12:8054ee101bad 207 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_1)
j3 12:8054ee101bad 208 {
j3 12:8054ee101bad 209 if(port < MAX113XX_Pixi::PORT16)
j3 12:8054ee101bad 210 {
j3 12:8054ee101bad 211 state = (readRegister(gpi_data_15_to_0) >> port);
j3 12:8054ee101bad 212 }
j3 12:8054ee101bad 213 else
j3 12:8054ee101bad 214 {
j3 12:8054ee101bad 215 state = (readRegister(gpi_data_19_to_16) >> (port - MAX113XX_Pixi::PORT16));
j3 12:8054ee101bad 216 }
j3 12:8054ee101bad 217
j3 12:8054ee101bad 218 result = MAX113XX_Pixi::Success;
j3 12:8054ee101bad 219 }
j3 12:8054ee101bad 220 }
j3 12:8054ee101bad 221 else //12 port device
j3 12:8054ee101bad 222 {
j3 12:8054ee101bad 223 }
j3 12:8054ee101bad 224
j3 12:8054ee101bad 225 return result;
j3 12:8054ee101bad 226 }
j3 7:8669a53acd0d 227
j3 7:8669a53acd0d 228 //*********************************************************************
j3 9:094df3de3616 229 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioWrite(Ports_e port,
j3 9:094df3de3616 230 const uint8_t state)
j3 7:8669a53acd0d 231 {
j3 10:6efe114ef882 232 uint16_t temp;
j3 10:6efe114ef882 233 uint16_t port_mask;
j3 10:6efe114ef882 234
j3 7:8669a53acd0d 235 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 9:094df3de3616 236
j3 10:6efe114ef882 237 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 238 {
j3 10:6efe114ef882 239 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_3)
j3 10:6efe114ef882 240 {
j3 10:6efe114ef882 241 if(port < MAX113XX_Pixi::PORT16)
j3 10:6efe114ef882 242 {
j3 10:6efe114ef882 243 port_mask = (1 << port);
j3 10:6efe114ef882 244 temp = readRegister(gpo_data_15_to_0);
j3 10:6efe114ef882 245 if(state & 0x01)
j3 10:6efe114ef882 246 {
j3 10:6efe114ef882 247 temp |= port_mask;
j3 10:6efe114ef882 248 }
j3 10:6efe114ef882 249 else
j3 10:6efe114ef882 250 {
j3 10:6efe114ef882 251 temp &= ~port_mask;
j3 10:6efe114ef882 252 }
j3 10:6efe114ef882 253 writeRegister(gpo_data_15_to_0, temp);
j3 10:6efe114ef882 254 }
j3 10:6efe114ef882 255 else
j3 10:6efe114ef882 256 {
j3 10:6efe114ef882 257 port_mask = (1 << (port - MAX113XX_Pixi::PORT16));
j3 10:6efe114ef882 258 temp = readRegister(gpo_data_19_to_16);
j3 10:6efe114ef882 259 if(state & 0x01)
j3 10:6efe114ef882 260 {
j3 10:6efe114ef882 261 temp |= port_mask;
j3 10:6efe114ef882 262 }
j3 10:6efe114ef882 263 else
j3 10:6efe114ef882 264 {
j3 10:6efe114ef882 265 temp &= ~port_mask;
j3 10:6efe114ef882 266 }
j3 10:6efe114ef882 267 writeRegister(gpo_data_19_to_16, temp);
j3 10:6efe114ef882 268 }
j3 10:6efe114ef882 269
j3 10:6efe114ef882 270 result = MAX113XX_Pixi::Success;
j3 10:6efe114ef882 271 }
j3 9:094df3de3616 272 }
j3 9:094df3de3616 273 else //12 port device
j3 9:094df3de3616 274 {
j3 9:094df3de3616 275 }
j3 7:8669a53acd0d 276
j3 7:8669a53acd0d 277 return result;
j3 7:8669a53acd0d 278 }
j3 7:8669a53acd0d 279
j3 7:8669a53acd0d 280 //*********************************************************************
j3 12:8054ee101bad 281 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::setAnalogSwitchState(Ports_e portA,
j3 12:8054ee101bad 282 Ports_e portB,
j3 12:8054ee101bad 283 bool state)
j3 7:8669a53acd0d 284 {
j3 7:8669a53acd0d 285 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 286
j3 10:6efe114ef882 287 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 288 {
j3 9:094df3de3616 289 }
j3 9:094df3de3616 290 else //12 port device
j3 9:094df3de3616 291 {
j3 9:094df3de3616 292 }
j3 9:094df3de3616 293
j3 7:8669a53acd0d 294 return result;
j3 7:8669a53acd0d 295 }
j3 7:8669a53acd0d 296
j3 7:8669a53acd0d 297 //*********************************************************************
j3 12:8054ee101bad 298 void MAX113XX_Pixi::dumpMemory(Serial &ser)
j3 7:8669a53acd0d 299 {
j3 10:6efe114ef882 300 uint16_t mem[0x74];
j3 7:8669a53acd0d 301
j3 12:8054ee101bad 302 blockRead(dev_id, mem, 0x74);
j3 7:8669a53acd0d 303 for(uint8_t idx = 0; idx < 0x74; idx++)
j3 7:8669a53acd0d 304 {
j3 12:8054ee101bad 305 ser.printf("Register 0x%02x = 0x%04x\r\n", idx, mem[idx]);
j3 7:8669a53acd0d 306 }
j3 7:8669a53acd0d 307 ser.printf("\r\n");
j3 7:8669a53acd0d 308 }
j3 7:8669a53acd0d 309
j3 7:8669a53acd0d 310
j3 9:094df3de3616 311 /// SPI first byte when writing MAX11300/11
j3 9:094df3de3616 312 //(7-bit address in bits 0x7E; LSB=0 for write)
j3 9:094df3de3616 313 #define MAX113XXAddr_SPI_Write(RegAddr) ( (RegAddr << 1) )
j3 9:094df3de3616 314
j3 9:094df3de3616 315 /// SPI first byte when reading MAX11300/11
j3 9:094df3de3616 316 //(7-bit address in bits 0x7E; LSB=1 for read)
j3 9:094df3de3616 317 #define MAX113XXAddr_SPI_Read(RegAddr) ( (RegAddr << 1) | 1 )
j3 9:094df3de3616 318
j3 7:8669a53acd0d 319 //*************************** SPI Implementation ******************************
j3 9:094df3de3616 320 MAX113XX_SPI::MAX113XX_SPI(SPI & spiBus, PinName cs,
j3 9:094df3de3616 321 MAX113XX_Pixi::Device_e device, PinName cnvt):
j3 9:094df3de3616 322 MAX113XX_Pixi(device, cnvt), m_spiBus(spiBus), m_cs(cs, 1)
j3 7:8669a53acd0d 323 {
j3 11:31e7ca030b8f 324 if((m_device == MAX11300) || (m_device == MAX11301)) //20 port device
j3 11:31e7ca030b8f 325 {
j3 12:8054ee101bad 326 blockWrite(gpo_data_15_to_0, configDesignVals, 18);
j3 11:31e7ca030b8f 327 blockWrite(port_cfg_00, portConfigDesignVals, 20);
j3 12:8054ee101bad 328 blockWrite(dac_data_port_00, dacDesignVals, 20);
j3 11:31e7ca030b8f 329 wait(0.1);
j3 11:31e7ca030b8f 330 }
j3 11:31e7ca030b8f 331 else //12 port device
j3 11:31e7ca030b8f 332 {
j3 11:31e7ca030b8f 333 }
j3 7:8669a53acd0d 334 }
j3 7:8669a53acd0d 335
j3 7:8669a53acd0d 336 //*********************************************************************
j3 7:8669a53acd0d 337 MAX113XX_SPI::~MAX113XX_SPI()
j3 7:8669a53acd0d 338 {
j3 7:8669a53acd0d 339 //empty block
j3 7:8669a53acd0d 340 }
j3 7:8669a53acd0d 341
j3 7:8669a53acd0d 342 //*********************************************************************
j3 9:094df3de3616 343 void MAX113XX_SPI::writeRegister(uint8_t reg, const uint16_t data)
j3 7:8669a53acd0d 344 {
j3 7:8669a53acd0d 345 m_cs = 0;
j3 9:094df3de3616 346 m_spiBus.write(MAX113XXAddr_SPI_Write(reg));
j3 7:8669a53acd0d 347 m_spiBus.write(((0xFF00 & data) >> 8));
j3 7:8669a53acd0d 348 m_spiBus.write((0x00FF & data));
j3 7:8669a53acd0d 349 m_cs = 1;
j3 7:8669a53acd0d 350 }
j3 7:8669a53acd0d 351
j3 7:8669a53acd0d 352 //*********************************************************************
j3 9:094df3de3616 353 uint16_t MAX113XX_SPI::readRegister(uint8_t reg)
j3 7:8669a53acd0d 354 {
j3 7:8669a53acd0d 355 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 356
j3 7:8669a53acd0d 357 m_cs = 0;
j3 9:094df3de3616 358 m_spiBus.write(MAX113XXAddr_SPI_Read(reg));
j3 7:8669a53acd0d 359 rtn_val |= (m_spiBus.write(0xFF) << 8);
j3 7:8669a53acd0d 360 rtn_val |= m_spiBus.write(0xFF);
j3 7:8669a53acd0d 361 m_cs = 1;
j3 7:8669a53acd0d 362
j3 7:8669a53acd0d 363 return rtn_val;
j3 7:8669a53acd0d 364 }
j3 7:8669a53acd0d 365
j3 7:8669a53acd0d 366 //*********************************************************************
j3 9:094df3de3616 367 void MAX113XX_SPI::blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 368 const uint8_t num_reg)
j3 7:8669a53acd0d 369 {
j3 11:31e7ca030b8f 370 m_cs = 0;
j3 11:31e7ca030b8f 371 m_spiBus.write(MAX113XXAddr_SPI_Write(reg));
j3 7:8669a53acd0d 372 for(uint8_t idx = 0; idx < num_reg; idx++)
j3 7:8669a53acd0d 373 {
j3 11:31e7ca030b8f 374 m_spiBus.write(((0xFF00 & data[idx]) >> 8));
j3 11:31e7ca030b8f 375 m_spiBus.write((0x00FF & data[idx]));
j3 7:8669a53acd0d 376 }
j3 11:31e7ca030b8f 377 m_cs = 1;
j3 7:8669a53acd0d 378 }
j3 7:8669a53acd0d 379
j3 7:8669a53acd0d 380 //*********************************************************************
j3 9:094df3de3616 381 void MAX113XX_SPI::blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg)
j3 7:8669a53acd0d 382 {
j3 11:31e7ca030b8f 383 uint16_t temp;
j3 11:31e7ca030b8f 384 m_cs = 0;
j3 11:31e7ca030b8f 385 m_spiBus.write(MAX113XXAddr_SPI_Read(reg));
j3 11:31e7ca030b8f 386 for(uint8_t idx = 0; idx < num_reg; idx ++)
j3 7:8669a53acd0d 387 {
j3 11:31e7ca030b8f 388 temp = 0;
j3 11:31e7ca030b8f 389 temp |= (m_spiBus.write(0xFF) << 8);
j3 11:31e7ca030b8f 390 temp |= m_spiBus.write(0xFF);
j3 11:31e7ca030b8f 391 data[idx] = temp;
j3 7:8669a53acd0d 392 }
j3 11:31e7ca030b8f 393 m_cs = 1;
j3 7:8669a53acd0d 394 }
j3 7:8669a53acd0d 395
j3 7:8669a53acd0d 396
j3 7:8669a53acd0d 397 //*************************** I2C Implementation ******************************
j3 9:094df3de3616 398 MAX113XX_I2C::MAX113XX_I2C(I2C &i2cBus, MAX113XX_Pixi::Device_e device, PinName cnvt):
j3 9:094df3de3616 399 MAX113XX_Pixi(device, cnvt), m_i2cBus(i2cBus)
j3 7:8669a53acd0d 400 {
j3 11:31e7ca030b8f 401 if((m_device == MAX11300) || (m_device == MAX11301)) //20 port device
j3 11:31e7ca030b8f 402 {
j3 12:8054ee101bad 403 blockWrite(gpo_data_15_to_0, configDesignVals, 18);
j3 11:31e7ca030b8f 404 blockWrite(port_cfg_00, portConfigDesignVals, 20);
j3 12:8054ee101bad 405 blockWrite(dac_data_port_00, dacDesignVals, 20);
j3 11:31e7ca030b8f 406 wait(0.1);
j3 11:31e7ca030b8f 407 }
j3 11:31e7ca030b8f 408 else //12 port device
j3 11:31e7ca030b8f 409 {
j3 11:31e7ca030b8f 410 }
j3 7:8669a53acd0d 411 }
j3 7:8669a53acd0d 412
j3 7:8669a53acd0d 413 //*********************************************************************
j3 7:8669a53acd0d 414 MAX113XX_I2C::~MAX113XX_I2C()
j3 7:8669a53acd0d 415 {
j3 7:8669a53acd0d 416 //empty block
j3 7:8669a53acd0d 417 }
j3 7:8669a53acd0d 418
j3 7:8669a53acd0d 419 //*********************************************************************
j3 9:094df3de3616 420 void MAX113XX_I2C::writeRegister(uint8_t reg, const uint16_t data)
j3 7:8669a53acd0d 421 {
j3 7:8669a53acd0d 422
j3 7:8669a53acd0d 423 }
j3 7:8669a53acd0d 424
j3 7:8669a53acd0d 425 //*********************************************************************
j3 9:094df3de3616 426 uint16_t MAX113XX_I2C::readRegister(uint8_t reg)
j3 7:8669a53acd0d 427 {
j3 7:8669a53acd0d 428 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 429
j3 7:8669a53acd0d 430 return rtn_val;
j3 7:8669a53acd0d 431 }
j3 7:8669a53acd0d 432
j3 7:8669a53acd0d 433 //*********************************************************************
j3 9:094df3de3616 434 void MAX113XX_I2C::blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 435 const uint8_t num_reg)
j3 7:8669a53acd0d 436 {
j3 7:8669a53acd0d 437
j3 7:8669a53acd0d 438 }
j3 7:8669a53acd0d 439
j3 7:8669a53acd0d 440 //*********************************************************************
j3 9:094df3de3616 441 void MAX113XX_I2C::blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg)
j3 7:8669a53acd0d 442 {
j3 7:8669a53acd0d 443
j3 7:8669a53acd0d 444 }