L VD / MAX113XX_Pixi

Library for the MAX11300

MAX113XX_Pixi.cpp@16:01d793a25548, 2017-05-11 (annotated)

Committer:
j3
Date:
Thu May 11 20:28:40 2017 +0000
Revision:
16:01d793a25548
Parent:
15:fb674d741844
Child:
17:658202c79f33
...

Who changed what in which revision?

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j3 7:8669a53acd0d 1 /**********************************************************************
j3 7:8669a53acd0d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 7:8669a53acd0d 3 *
j3 7:8669a53acd0d 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 7:8669a53acd0d 5 * copy of this software and associated documentation files (the "Software"),
j3 7:8669a53acd0d 6 * to deal in the Software without restriction, including without limitation
j3 7:8669a53acd0d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 7:8669a53acd0d 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 7:8669a53acd0d 9 * Software is furnished to do so, subject to the following conditions:
j3 7:8669a53acd0d 10 *
j3 7:8669a53acd0d 11 * The above copyright notice and this permission notice shall be included
j3 7:8669a53acd0d 12 * in all copies or substantial portions of the Software.
j3 7:8669a53acd0d 13 *
j3 7:8669a53acd0d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 7:8669a53acd0d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 7:8669a53acd0d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 7:8669a53acd0d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 7:8669a53acd0d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 7:8669a53acd0d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 7:8669a53acd0d 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 7:8669a53acd0d 21 *
j3 7:8669a53acd0d 22 * Except as contained in this notice, the name of Maxim Integrated
j3 7:8669a53acd0d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 7:8669a53acd0d 24 * Products, Inc. Branding Policy.
j3 7:8669a53acd0d 25 *
j3 7:8669a53acd0d 26 * The mere transfer of this software does not imply any licenses
j3 7:8669a53acd0d 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 7:8669a53acd0d 28 * trademarks, maskwork rights, or any other form of intellectual
j3 7:8669a53acd0d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 7:8669a53acd0d 30 * ownership rights.
j3 7:8669a53acd0d 31 **********************************************************************/
j3 7:8669a53acd0d 32
j3 9:094df3de3616 33
j3 7:8669a53acd0d 34 #include "MAX113XX_Pixi.h"
j3 7:8669a53acd0d 35
j3 9:094df3de3616 36
j3 9:094df3de3616 37 //20 port devices
j3 9:094df3de3616 38 #if defined(_MAX11300_DESIGNVALUE_H_) || defined(_MAX11301_DESIGNVALUE_H_)
j3 12:8054ee101bad 39
j3 12:8054ee101bad 40 static const uint16_t configDesignVals[18] = {
j3 12:8054ee101bad 41 gpo_data_15_to_0_DESIGNVALUE,
j3 12:8054ee101bad 42 gpo_data_19_to_16_DESIGNVALUE,
j3 12:8054ee101bad 43 0, //reserved
j3 12:8054ee101bad 44 device_control_DESIGNVALUE,
j3 12:8054ee101bad 45 interrupt_mask_DESIGNVALUE,
j3 12:8054ee101bad 46 gpi_irqmode_7_to_0_DESIGNVALUE,
j3 12:8054ee101bad 47 gpi_irqmode_15_to_8_DESIGNVALUE,
j3 12:8054ee101bad 48 gpi_irqmode_19_to_16_DESIGNVALUE,
j3 12:8054ee101bad 49 0, //reserved
j3 12:8054ee101bad 50 dac_preset_data_1_DESIGNVALUE,
j3 12:8054ee101bad 51 dac_preset_data_2_DESIGNVALUE,
j3 12:8054ee101bad 52 tmp_mon_cfg_DESIGNVALUE,
j3 12:8054ee101bad 53 tmp_mon_int_hi_thresh_DESIGNVALUE,
j3 12:8054ee101bad 54 tmp_mon_int_lo_thresh_DESIGNVALUE,
j3 12:8054ee101bad 55 tmp_mon_ext1_hi_thresh_DESIGNVALUE,
j3 12:8054ee101bad 56 tmp_mon_ext1_lo_thresh_DESIGNVALUE,
j3 12:8054ee101bad 57 tmp_mon_ext2_hi_thresh_DESIGNVALUE,
j3 12:8054ee101bad 58 tmp_mon_ext2_lo_thresh_DESIGNVALUE};
j3 12:8054ee101bad 59
j3 9:094df3de3616 60 static const uint16_t portConfigDesignVals[20] = {
j3 7:8669a53acd0d 61 port_cfg_00_DESIGNVALUE,
j3 7:8669a53acd0d 62 port_cfg_01_DESIGNVALUE,
j3 7:8669a53acd0d 63 port_cfg_02_DESIGNVALUE,
j3 7:8669a53acd0d 64 port_cfg_03_DESIGNVALUE,
j3 7:8669a53acd0d 65 port_cfg_04_DESIGNVALUE,
j3 7:8669a53acd0d 66 port_cfg_05_DESIGNVALUE,
j3 7:8669a53acd0d 67 port_cfg_06_DESIGNVALUE,
j3 7:8669a53acd0d 68 port_cfg_07_DESIGNVALUE,
j3 7:8669a53acd0d 69 port_cfg_08_DESIGNVALUE,
j3 7:8669a53acd0d 70 port_cfg_09_DESIGNVALUE,
j3 7:8669a53acd0d 71 port_cfg_10_DESIGNVALUE,
j3 7:8669a53acd0d 72 port_cfg_11_DESIGNVALUE,
j3 7:8669a53acd0d 73 port_cfg_12_DESIGNVALUE,
j3 7:8669a53acd0d 74 port_cfg_13_DESIGNVALUE,
j3 7:8669a53acd0d 75 port_cfg_14_DESIGNVALUE,
j3 7:8669a53acd0d 76 port_cfg_15_DESIGNVALUE,
j3 7:8669a53acd0d 77 port_cfg_16_DESIGNVALUE,
j3 7:8669a53acd0d 78 port_cfg_17_DESIGNVALUE,
j3 7:8669a53acd0d 79 port_cfg_18_DESIGNVALUE,
j3 7:8669a53acd0d 80 port_cfg_19_DESIGNVALUE};
j3 12:8054ee101bad 81
j3 12:8054ee101bad 82 static const uint16_t dacDesignVals[20]= {
j3 12:8054ee101bad 83 dac_data_port_00_DESIGNVALUE,
j3 12:8054ee101bad 84 dac_data_port_01_DESIGNVALUE,
j3 12:8054ee101bad 85 dac_data_port_02_DESIGNVALUE,
j3 12:8054ee101bad 86 dac_data_port_03_DESIGNVALUE,
j3 12:8054ee101bad 87 dac_data_port_04_DESIGNVALUE,
j3 12:8054ee101bad 88 dac_data_port_05_DESIGNVALUE,
j3 12:8054ee101bad 89 dac_data_port_06_DESIGNVALUE,
j3 12:8054ee101bad 90 dac_data_port_07_DESIGNVALUE,
j3 12:8054ee101bad 91 dac_data_port_08_DESIGNVALUE,
j3 12:8054ee101bad 92 dac_data_port_09_DESIGNVALUE,
j3 12:8054ee101bad 93 dac_data_port_10_DESIGNVALUE,
j3 12:8054ee101bad 94 dac_data_port_11_DESIGNVALUE,
j3 12:8054ee101bad 95 dac_data_port_12_DESIGNVALUE,
j3 12:8054ee101bad 96 dac_data_port_13_DESIGNVALUE,
j3 12:8054ee101bad 97 dac_data_port_14_DESIGNVALUE,
j3 12:8054ee101bad 98 dac_data_port_15_DESIGNVALUE,
j3 12:8054ee101bad 99 dac_data_port_16_DESIGNVALUE,
j3 12:8054ee101bad 100 dac_data_port_17_DESIGNVALUE,
j3 12:8054ee101bad 101 dac_data_port_18_DESIGNVALUE,
j3 12:8054ee101bad 102 dac_data_port_19_DESIGNVALUE};
j3 12:8054ee101bad 103
j3 9:094df3de3616 104 #endif
j3 9:094df3de3616 105
j3 9:094df3de3616 106 //12 port devices...
j3 9:094df3de3616 107 #if defined(_MAX11311_DESIGNVALUE_H_) || defined(_MAX11312_DESIGNVALUE_H_)
j3 9:094df3de3616 108 static const uint16_t portConfigDesignVals[12] = {
j3 9:094df3de3616 109 port_cfg_p0_DESIGNVALUE,
j3 9:094df3de3616 110 port_cfg_p1_DESIGNVALUE,
j3 9:094df3de3616 111 port_cfg_p2_DESIGNVALUE,
j3 9:094df3de3616 112 port_cfg_p3_DESIGNVALUE,
j3 9:094df3de3616 113 port_cfg_p4_DESIGNVALUE,
j3 9:094df3de3616 114 port_cfg_p5_DESIGNVALUE,
j3 9:094df3de3616 115 port_cfg_p6_DESIGNVALUE,
j3 9:094df3de3616 116 port_cfg_p7_DESIGNVALUE,
j3 9:094df3de3616 117 port_cfg_p8_DESIGNVALUE,
j3 9:094df3de3616 118 port_cfg_p9_DESIGNVALUE,
j3 9:094df3de3616 119 port_cfg_p10_DESIGNVALUE,
j3 9:094df3de3616 120 port_cfg_p11_DESIGNVALUE};
j3 9:094df3de3616 121 #endif
j3 9:094df3de3616 122
j3 7:8669a53acd0d 123
j3 7:8669a53acd0d 124 //************************** Base Class member fxs *****************************
j3 9:094df3de3616 125 MAX113XX_Pixi::MAX113XX_Pixi(Device_e device, PinName cnvt):
j3 9:094df3de3616 126 m_device(device), m_cnvt(cnvt, 1)
j3 7:8669a53acd0d 127 {
j3 11:31e7ca030b8f 128 }
j3 11:31e7ca030b8f 129
j3 12:8054ee101bad 130 //*********************************************************************
j3 12:8054ee101bad 131 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::singleEndedADCRead(Ports_e port,
j3 12:8054ee101bad 132 uint16_t &data)
j3 12:8054ee101bad 133 {
j3 12:8054ee101bad 134 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 135
j3 15:fb674d741844 136 //check for type of device
j3 12:8054ee101bad 137 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 138 {
j3 15:fb674d741844 139 //is this port configured for this operation?
j3 12:8054ee101bad 140 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_7)
j3 12:8054ee101bad 141 {
j3 15:fb674d741844 142 //Is device configured for continuous sweep?
j3 15:fb674d741844 143 if((device_control_DESIGNVALUE & device_control_ADCCTL) != MAX113XX_Pixi::ContinuousSweep)
j3 12:8054ee101bad 144 {
j3 15:fb674d741844 145 //No, generate sample requests for averaging
j3 15:fb674d741844 146 uint8_t num_samples = ((portConfigDesignVals[port] & port_cfg_00_funcprm_nsamples) >> 5);
j3 15:fb674d741844 147 num_samples = (1 << num_samples);
j3 15:fb674d741844 148
j3 15:fb674d741844 149 while(num_samples--)
j3 15:fb674d741844 150 {
j3 15:fb674d741844 151 m_cnvt = 0;
j3 15:fb674d741844 152 wait_us(1);
j3 15:fb674d741844 153 m_cnvt = 1;
j3 15:fb674d741844 154 wait_us(100);
j3 15:fb674d741844 155 }
j3 12:8054ee101bad 156 }
j3 15:fb674d741844 157
j3 12:8054ee101bad 158 data = readRegister((adc_data_port_00 + port));
j3 12:8054ee101bad 159
j3 12:8054ee101bad 160 result = MAX113XX_Pixi::Success;
j3 12:8054ee101bad 161 }
j3 12:8054ee101bad 162 }
j3 12:8054ee101bad 163 else //12 port device
j3 12:8054ee101bad 164 {
j3 12:8054ee101bad 165 }
j3 12:8054ee101bad 166
j3 12:8054ee101bad 167 return result;
j3 12:8054ee101bad 168 }
j3 12:8054ee101bad 169
j3 12:8054ee101bad 170 //*********************************************************************
j3 12:8054ee101bad 171 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::differentialADCRead(Ports_e posPort,
j3 13:546dd29b1c7a 172 int16_t &data)
j3 12:8054ee101bad 173 {
j3 12:8054ee101bad 174 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 175
j3 15:fb674d741844 176 //check for type of device
j3 12:8054ee101bad 177 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 178 {
j3 15:fb674d741844 179 //is this port configured for this operation?
j3 13:546dd29b1c7a 180 if(((portConfigDesignVals[posPort] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_8)
j3 13:546dd29b1c7a 181 {
j3 15:fb674d741844 182 //Is device configured for continuous sweep?
j3 15:fb674d741844 183 if((device_control_DESIGNVALUE & device_control_ADCCTL) != MAX113XX_Pixi::ContinuousSweep)
j3 13:546dd29b1c7a 184 {
j3 15:fb674d741844 185 //No, generate sample requests for averaging
j3 16:01d793a25548 186 uint8_t num_samples = ((portConfigDesignVals[posPort] & port_cfg_00_funcprm_nsamples) >> 5);
j3 15:fb674d741844 187 num_samples = (1 << num_samples);
j3 15:fb674d741844 188
j3 15:fb674d741844 189 while(num_samples--)
j3 15:fb674d741844 190 {
j3 15:fb674d741844 191 m_cnvt = 0;
j3 15:fb674d741844 192 wait_us(1);
j3 15:fb674d741844 193 m_cnvt = 1;
j3 15:fb674d741844 194 wait_us(100);
j3 15:fb674d741844 195 }
j3 13:546dd29b1c7a 196 }
j3 15:fb674d741844 197
j3 13:546dd29b1c7a 198 data = readRegister((adc_data_port_00 + posPort));
j3 13:546dd29b1c7a 199 if(data & 0x0800)
j3 13:546dd29b1c7a 200 {
j3 13:546dd29b1c7a 201 data |= 0xF000;
j3 13:546dd29b1c7a 202 }
j3 13:546dd29b1c7a 203
j3 13:546dd29b1c7a 204 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 205 }
j3 12:8054ee101bad 206 }
j3 12:8054ee101bad 207 else //12 port device
j3 12:8054ee101bad 208 {
j3 12:8054ee101bad 209 }
j3 12:8054ee101bad 210
j3 12:8054ee101bad 211 return result;
j3 12:8054ee101bad 212 }
j3 12:8054ee101bad 213
j3 12:8054ee101bad 214 //*********************************************************************
j3 12:8054ee101bad 215 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::dacWrite(Ports_e port,
j3 12:8054ee101bad 216 const uint16_t data)
j3 12:8054ee101bad 217 {
j3 12:8054ee101bad 218 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 219
j3 12:8054ee101bad 220 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 221 {
j3 12:8054ee101bad 222 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_5)
j3 12:8054ee101bad 223 {
j3 12:8054ee101bad 224 writeRegister((dac_data_port_00 + port) , data);
j3 12:8054ee101bad 225 result = MAX113XX_Pixi::Success;
j3 12:8054ee101bad 226 }
j3 12:8054ee101bad 227 }
j3 12:8054ee101bad 228 else //12 port device
j3 12:8054ee101bad 229 {
j3 12:8054ee101bad 230 }
j3 12:8054ee101bad 231
j3 12:8054ee101bad 232 return result;
j3 12:8054ee101bad 233 }
j3 12:8054ee101bad 234
j3 12:8054ee101bad 235 //*********************************************************************
j3 13:546dd29b1c7a 236 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::dacWriteADCMonitor(Ports_e port,
j3 13:546dd29b1c7a 237 const uint16_t data,
j3 13:546dd29b1c7a 238 uint16_t &adcData)
j3 13:546dd29b1c7a 239 {
j3 13:546dd29b1c7a 240 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 13:546dd29b1c7a 241
j3 13:546dd29b1c7a 242 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 13:546dd29b1c7a 243 {
j3 13:546dd29b1c7a 244 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_6)
j3 13:546dd29b1c7a 245 {
j3 13:546dd29b1c7a 246 writeRegister((dac_data_port_00 + port) , data);
j3 13:546dd29b1c7a 247
j3 13:546dd29b1c7a 248 m_cnvt = 0;
j3 13:546dd29b1c7a 249 wait_us(1);
j3 13:546dd29b1c7a 250 m_cnvt = 1;
j3 13:546dd29b1c7a 251 wait_us(100);
j3 13:546dd29b1c7a 252
j3 13:546dd29b1c7a 253 adcData = readRegister((adc_data_port_00 + port));
j3 13:546dd29b1c7a 254
j3 13:546dd29b1c7a 255 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 256 }
j3 13:546dd29b1c7a 257 }
j3 13:546dd29b1c7a 258 else //12 port device
j3 13:546dd29b1c7a 259 {
j3 13:546dd29b1c7a 260 }
j3 13:546dd29b1c7a 261
j3 13:546dd29b1c7a 262 return result;
j3 13:546dd29b1c7a 263 }
j3 13:546dd29b1c7a 264
j3 13:546dd29b1c7a 265 //*********************************************************************
j3 12:8054ee101bad 266 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioRead(Ports_e port, uint8_t &state)
j3 12:8054ee101bad 267 {
j3 12:8054ee101bad 268 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 12:8054ee101bad 269
j3 12:8054ee101bad 270 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 12:8054ee101bad 271 {
j3 12:8054ee101bad 272 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_1)
j3 12:8054ee101bad 273 {
j3 12:8054ee101bad 274 if(port < MAX113XX_Pixi::PORT16)
j3 12:8054ee101bad 275 {
j3 12:8054ee101bad 276 state = (readRegister(gpi_data_15_to_0) >> port);
j3 12:8054ee101bad 277 }
j3 12:8054ee101bad 278 else
j3 12:8054ee101bad 279 {
j3 12:8054ee101bad 280 state = (readRegister(gpi_data_19_to_16) >> (port - MAX113XX_Pixi::PORT16));
j3 12:8054ee101bad 281 }
j3 12:8054ee101bad 282
j3 12:8054ee101bad 283 result = MAX113XX_Pixi::Success;
j3 12:8054ee101bad 284 }
j3 12:8054ee101bad 285 }
j3 12:8054ee101bad 286 else //12 port device
j3 12:8054ee101bad 287 {
j3 12:8054ee101bad 288 }
j3 12:8054ee101bad 289
j3 12:8054ee101bad 290 return result;
j3 12:8054ee101bad 291 }
j3 7:8669a53acd0d 292
j3 7:8669a53acd0d 293 //*********************************************************************
j3 9:094df3de3616 294 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::gpioWrite(Ports_e port,
j3 9:094df3de3616 295 const uint8_t state)
j3 7:8669a53acd0d 296 {
j3 10:6efe114ef882 297 uint16_t temp;
j3 10:6efe114ef882 298 uint16_t port_mask;
j3 10:6efe114ef882 299
j3 7:8669a53acd0d 300 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 9:094df3de3616 301
j3 10:6efe114ef882 302 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 303 {
j3 10:6efe114ef882 304 if(((portConfigDesignVals[port] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_3)
j3 10:6efe114ef882 305 {
j3 10:6efe114ef882 306 if(port < MAX113XX_Pixi::PORT16)
j3 10:6efe114ef882 307 {
j3 10:6efe114ef882 308 port_mask = (1 << port);
j3 10:6efe114ef882 309 temp = readRegister(gpo_data_15_to_0);
j3 10:6efe114ef882 310 if(state & 0x01)
j3 10:6efe114ef882 311 {
j3 10:6efe114ef882 312 temp |= port_mask;
j3 10:6efe114ef882 313 }
j3 10:6efe114ef882 314 else
j3 10:6efe114ef882 315 {
j3 10:6efe114ef882 316 temp &= ~port_mask;
j3 10:6efe114ef882 317 }
j3 10:6efe114ef882 318 writeRegister(gpo_data_15_to_0, temp);
j3 10:6efe114ef882 319 }
j3 10:6efe114ef882 320 else
j3 10:6efe114ef882 321 {
j3 10:6efe114ef882 322 port_mask = (1 << (port - MAX113XX_Pixi::PORT16));
j3 10:6efe114ef882 323 temp = readRegister(gpo_data_19_to_16);
j3 10:6efe114ef882 324 if(state & 0x01)
j3 10:6efe114ef882 325 {
j3 10:6efe114ef882 326 temp |= port_mask;
j3 10:6efe114ef882 327 }
j3 10:6efe114ef882 328 else
j3 10:6efe114ef882 329 {
j3 10:6efe114ef882 330 temp &= ~port_mask;
j3 10:6efe114ef882 331 }
j3 10:6efe114ef882 332 writeRegister(gpo_data_19_to_16, temp);
j3 10:6efe114ef882 333 }
j3 10:6efe114ef882 334
j3 10:6efe114ef882 335 result = MAX113XX_Pixi::Success;
j3 10:6efe114ef882 336 }
j3 9:094df3de3616 337 }
j3 9:094df3de3616 338 else //12 port device
j3 9:094df3de3616 339 {
j3 9:094df3de3616 340 }
j3 7:8669a53acd0d 341
j3 7:8669a53acd0d 342 return result;
j3 7:8669a53acd0d 343 }
j3 7:8669a53acd0d 344
j3 7:8669a53acd0d 345 //*********************************************************************
j3 13:546dd29b1c7a 346 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::setAnalogSwitchState(Ports_e lowPort,
j3 12:8054ee101bad 347 bool state)
j3 7:8669a53acd0d 348 {
j3 7:8669a53acd0d 349 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 7:8669a53acd0d 350
j3 10:6efe114ef882 351 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 9:094df3de3616 352 {
j3 13:546dd29b1c7a 353 if(((portConfigDesignVals[lowPort] & 0xF000) >> 12) == MAX113XX_Pixi::MODE_12)
j3 13:546dd29b1c7a 354 {
j3 13:546dd29b1c7a 355 uint16_t data = readRegister(port_cfg_00 + lowPort);
j3 13:546dd29b1c7a 356 if(state)
j3 13:546dd29b1c7a 357 {
j3 13:546dd29b1c7a 358 data = ((data & 0x0FFF) | (MAX113XX_Pixi::MODE_12 << 12));
j3 13:546dd29b1c7a 359 }
j3 13:546dd29b1c7a 360 else
j3 13:546dd29b1c7a 361 {
j3 13:546dd29b1c7a 362 data = ((data & 0x0FFF) | (MAX113XX_Pixi::MODE_0 << 12));
j3 13:546dd29b1c7a 363 }
j3 13:546dd29b1c7a 364 writeRegister((port_cfg_00 + lowPort), data);
j3 13:546dd29b1c7a 365
j3 13:546dd29b1c7a 366 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 367 }
j3 13:546dd29b1c7a 368 }
j3 13:546dd29b1c7a 369 else //12 port device
j3 13:546dd29b1c7a 370 {
j3 13:546dd29b1c7a 371 }
j3 13:546dd29b1c7a 372
j3 13:546dd29b1c7a 373 return result;
j3 13:546dd29b1c7a 374 }
j3 13:546dd29b1c7a 375
j3 13:546dd29b1c7a 376 //*********************************************************************
j3 13:546dd29b1c7a 377 MAX113XX_Pixi::CmdResult_e MAX113XX_Pixi::readTempSensor(TempSensor_e sensor,
j3 13:546dd29b1c7a 378 float &data)
j3 13:546dd29b1c7a 379 {
j3 13:546dd29b1c7a 380 MAX113XX_Pixi::CmdResult_e result = MAX113XX_Pixi::OpFailure;
j3 13:546dd29b1c7a 381 int16_t temp;
j3 13:546dd29b1c7a 382
j3 13:546dd29b1c7a 383 if(m_device == MAX11300 || m_device == MAX11301) //20 port device
j3 13:546dd29b1c7a 384 {
j3 13:546dd29b1c7a 385 switch(sensor)
j3 13:546dd29b1c7a 386 {
j3 13:546dd29b1c7a 387 case Internal:
j3 13:546dd29b1c7a 388 if(device_control_DESIGNVALUE & device_control_TMPCTLINT)
j3 13:546dd29b1c7a 389 {
j3 13:546dd29b1c7a 390 temp = readRegister(tmp_int_data);
j3 13:546dd29b1c7a 391 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 392 }
j3 13:546dd29b1c7a 393 break;
j3 13:546dd29b1c7a 394
j3 13:546dd29b1c7a 395 case External1:
j3 13:546dd29b1c7a 396 if(device_control_DESIGNVALUE & device_control_TMPCTLEXT0)
j3 13:546dd29b1c7a 397 {
j3 13:546dd29b1c7a 398 temp = readRegister(tmp_ext1_data);
j3 13:546dd29b1c7a 399 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 400 }
j3 13:546dd29b1c7a 401 break;
j3 13:546dd29b1c7a 402
j3 13:546dd29b1c7a 403 case External2:
j3 13:546dd29b1c7a 404 if(device_control_DESIGNVALUE & device_control_TMPCTLEXT1)
j3 13:546dd29b1c7a 405 {
j3 13:546dd29b1c7a 406 temp = readRegister(tmp_ext2_data);
j3 13:546dd29b1c7a 407 result = MAX113XX_Pixi::Success;
j3 13:546dd29b1c7a 408 }
j3 13:546dd29b1c7a 409 break;
j3 13:546dd29b1c7a 410 };
j3 13:546dd29b1c7a 411
j3 13:546dd29b1c7a 412 if(result == MAX113XX_Pixi::Success)
j3 13:546dd29b1c7a 413 {
j3 13:546dd29b1c7a 414 if(temp & 0x0800)
j3 13:546dd29b1c7a 415 {
j3 13:546dd29b1c7a 416 temp |= 0xF000;
j3 13:546dd29b1c7a 417 }
j3 13:546dd29b1c7a 418 data = (temp/8.0F);
j3 13:546dd29b1c7a 419 }
j3 9:094df3de3616 420 }
j3 9:094df3de3616 421 else //12 port device
j3 9:094df3de3616 422 {
j3 9:094df3de3616 423 }
j3 9:094df3de3616 424
j3 7:8669a53acd0d 425 return result;
j3 7:8669a53acd0d 426 }
j3 7:8669a53acd0d 427
j3 7:8669a53acd0d 428 //*********************************************************************
j3 12:8054ee101bad 429 void MAX113XX_Pixi::dumpMemory(Serial &ser)
j3 7:8669a53acd0d 430 {
j3 10:6efe114ef882 431 uint16_t mem[0x74];
j3 7:8669a53acd0d 432
j3 12:8054ee101bad 433 blockRead(dev_id, mem, 0x74);
j3 7:8669a53acd0d 434 for(uint8_t idx = 0; idx < 0x74; idx++)
j3 7:8669a53acd0d 435 {
j3 12:8054ee101bad 436 ser.printf("Register 0x%02x = 0x%04x\r\n", idx, mem[idx]);
j3 7:8669a53acd0d 437 }
j3 7:8669a53acd0d 438 ser.printf("\r\n");
j3 7:8669a53acd0d 439 }
j3 7:8669a53acd0d 440
j3 7:8669a53acd0d 441
j3 9:094df3de3616 442 /// SPI first byte when writing MAX11300/11
j3 9:094df3de3616 443 //(7-bit address in bits 0x7E; LSB=0 for write)
j3 9:094df3de3616 444 #define MAX113XXAddr_SPI_Write(RegAddr) ( (RegAddr << 1) )
j3 9:094df3de3616 445
j3 9:094df3de3616 446 /// SPI first byte when reading MAX11300/11
j3 9:094df3de3616 447 //(7-bit address in bits 0x7E; LSB=1 for read)
j3 9:094df3de3616 448 #define MAX113XXAddr_SPI_Read(RegAddr) ( (RegAddr << 1) | 1 )
j3 9:094df3de3616 449
j3 7:8669a53acd0d 450 //*************************** SPI Implementation ******************************
j3 9:094df3de3616 451 MAX113XX_SPI::MAX113XX_SPI(SPI & spiBus, PinName cs,
j3 9:094df3de3616 452 MAX113XX_Pixi::Device_e device, PinName cnvt):
j3 9:094df3de3616 453 MAX113XX_Pixi(device, cnvt), m_spiBus(spiBus), m_cs(cs, 1)
j3 7:8669a53acd0d 454 {
j3 11:31e7ca030b8f 455 if((m_device == MAX11300) || (m_device == MAX11301)) //20 port device
j3 11:31e7ca030b8f 456 {
j3 12:8054ee101bad 457 blockWrite(gpo_data_15_to_0, configDesignVals, 18);
j3 11:31e7ca030b8f 458 blockWrite(port_cfg_00, portConfigDesignVals, 20);
j3 12:8054ee101bad 459 blockWrite(dac_data_port_00, dacDesignVals, 20);
j3 11:31e7ca030b8f 460 wait(0.1);
j3 11:31e7ca030b8f 461 }
j3 11:31e7ca030b8f 462 else //12 port device
j3 11:31e7ca030b8f 463 {
j3 11:31e7ca030b8f 464 }
j3 7:8669a53acd0d 465 }
j3 7:8669a53acd0d 466
j3 7:8669a53acd0d 467 //*********************************************************************
j3 7:8669a53acd0d 468 MAX113XX_SPI::~MAX113XX_SPI()
j3 7:8669a53acd0d 469 {
j3 7:8669a53acd0d 470 //empty block
j3 7:8669a53acd0d 471 }
j3 7:8669a53acd0d 472
j3 7:8669a53acd0d 473 //*********************************************************************
j3 9:094df3de3616 474 void MAX113XX_SPI::writeRegister(uint8_t reg, const uint16_t data)
j3 7:8669a53acd0d 475 {
j3 7:8669a53acd0d 476 m_cs = 0;
j3 9:094df3de3616 477 m_spiBus.write(MAX113XXAddr_SPI_Write(reg));
j3 7:8669a53acd0d 478 m_spiBus.write(((0xFF00 & data) >> 8));
j3 7:8669a53acd0d 479 m_spiBus.write((0x00FF & data));
j3 7:8669a53acd0d 480 m_cs = 1;
j3 7:8669a53acd0d 481 }
j3 7:8669a53acd0d 482
j3 7:8669a53acd0d 483 //*********************************************************************
j3 9:094df3de3616 484 uint16_t MAX113XX_SPI::readRegister(uint8_t reg)
j3 7:8669a53acd0d 485 {
j3 7:8669a53acd0d 486 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 487
j3 7:8669a53acd0d 488 m_cs = 0;
j3 9:094df3de3616 489 m_spiBus.write(MAX113XXAddr_SPI_Read(reg));
j3 7:8669a53acd0d 490 rtn_val |= (m_spiBus.write(0xFF) << 8);
j3 7:8669a53acd0d 491 rtn_val |= m_spiBus.write(0xFF);
j3 7:8669a53acd0d 492 m_cs = 1;
j3 7:8669a53acd0d 493
j3 7:8669a53acd0d 494 return rtn_val;
j3 7:8669a53acd0d 495 }
j3 7:8669a53acd0d 496
j3 7:8669a53acd0d 497 //*********************************************************************
j3 9:094df3de3616 498 void MAX113XX_SPI::blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 499 const uint8_t num_reg)
j3 7:8669a53acd0d 500 {
j3 11:31e7ca030b8f 501 m_cs = 0;
j3 11:31e7ca030b8f 502 m_spiBus.write(MAX113XXAddr_SPI_Write(reg));
j3 7:8669a53acd0d 503 for(uint8_t idx = 0; idx < num_reg; idx++)
j3 7:8669a53acd0d 504 {
j3 11:31e7ca030b8f 505 m_spiBus.write(((0xFF00 & data[idx]) >> 8));
j3 11:31e7ca030b8f 506 m_spiBus.write((0x00FF & data[idx]));
j3 7:8669a53acd0d 507 }
j3 11:31e7ca030b8f 508 m_cs = 1;
j3 7:8669a53acd0d 509 }
j3 7:8669a53acd0d 510
j3 7:8669a53acd0d 511 //*********************************************************************
j3 9:094df3de3616 512 void MAX113XX_SPI::blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg)
j3 7:8669a53acd0d 513 {
j3 11:31e7ca030b8f 514 uint16_t temp;
j3 11:31e7ca030b8f 515 m_cs = 0;
j3 11:31e7ca030b8f 516 m_spiBus.write(MAX113XXAddr_SPI_Read(reg));
j3 11:31e7ca030b8f 517 for(uint8_t idx = 0; idx < num_reg; idx ++)
j3 7:8669a53acd0d 518 {
j3 11:31e7ca030b8f 519 temp = 0;
j3 11:31e7ca030b8f 520 temp |= (m_spiBus.write(0xFF) << 8);
j3 11:31e7ca030b8f 521 temp |= m_spiBus.write(0xFF);
j3 11:31e7ca030b8f 522 data[idx] = temp;
j3 7:8669a53acd0d 523 }
j3 11:31e7ca030b8f 524 m_cs = 1;
j3 7:8669a53acd0d 525 }
j3 7:8669a53acd0d 526
j3 7:8669a53acd0d 527
j3 7:8669a53acd0d 528 //*************************** I2C Implementation ******************************
j3 9:094df3de3616 529 MAX113XX_I2C::MAX113XX_I2C(I2C &i2cBus, MAX113XX_Pixi::Device_e device, PinName cnvt):
j3 9:094df3de3616 530 MAX113XX_Pixi(device, cnvt), m_i2cBus(i2cBus)
j3 7:8669a53acd0d 531 {
j3 11:31e7ca030b8f 532 if((m_device == MAX11300) || (m_device == MAX11301)) //20 port device
j3 11:31e7ca030b8f 533 {
j3 12:8054ee101bad 534 blockWrite(gpo_data_15_to_0, configDesignVals, 18);
j3 11:31e7ca030b8f 535 blockWrite(port_cfg_00, portConfigDesignVals, 20);
j3 12:8054ee101bad 536 blockWrite(dac_data_port_00, dacDesignVals, 20);
j3 11:31e7ca030b8f 537 wait(0.1);
j3 11:31e7ca030b8f 538 }
j3 11:31e7ca030b8f 539 else //12 port device
j3 11:31e7ca030b8f 540 {
j3 11:31e7ca030b8f 541 }
j3 7:8669a53acd0d 542 }
j3 7:8669a53acd0d 543
j3 7:8669a53acd0d 544 //*********************************************************************
j3 7:8669a53acd0d 545 MAX113XX_I2C::~MAX113XX_I2C()
j3 7:8669a53acd0d 546 {
j3 7:8669a53acd0d 547 //empty block
j3 7:8669a53acd0d 548 }
j3 7:8669a53acd0d 549
j3 7:8669a53acd0d 550 //*********************************************************************
j3 9:094df3de3616 551 void MAX113XX_I2C::writeRegister(uint8_t reg, const uint16_t data)
j3 7:8669a53acd0d 552 {
j3 7:8669a53acd0d 553
j3 7:8669a53acd0d 554 }
j3 7:8669a53acd0d 555
j3 7:8669a53acd0d 556 //*********************************************************************
j3 9:094df3de3616 557 uint16_t MAX113XX_I2C::readRegister(uint8_t reg)
j3 7:8669a53acd0d 558 {
j3 7:8669a53acd0d 559 uint16_t rtn_val = 0;
j3 7:8669a53acd0d 560
j3 7:8669a53acd0d 561 return rtn_val;
j3 7:8669a53acd0d 562 }
j3 7:8669a53acd0d 563
j3 7:8669a53acd0d 564 //*********************************************************************
j3 9:094df3de3616 565 void MAX113XX_I2C::blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 566 const uint8_t num_reg)
j3 7:8669a53acd0d 567 {
j3 7:8669a53acd0d 568
j3 7:8669a53acd0d 569 }
j3 7:8669a53acd0d 570
j3 7:8669a53acd0d 571 //*********************************************************************
j3 9:094df3de3616 572 void MAX113XX_I2C::blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg)
j3 7:8669a53acd0d 573 {
j3 7:8669a53acd0d 574
j3 7:8669a53acd0d 575 }