Library to control a QVGA TFT connected to SPI. You can use printf to print text The lib can handle different fonts, draw lines, circles, rect and bmp

Dependents:   TFT_Test1 SourceCodePro31-SB Mandelbrot Mindwave-screen ... more

See http://mbed.org/cookbook/SPI-driven-QVGA-TFT for details.

Committer:
dreschpe
Date:
Thu Sep 20 23:24:43 2012 +0000
Revision:
3:7f1d793b90df
Parent:
2:f30ea1eb3681
Child:
4:824715115046
Bugfix: load from filesystem works again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dreschpe 0:de9d1462a835 1 /* mbed library for 240*320 pixel display TFT based on HX8347D LCD Controller
dreschpe 0:de9d1462a835 2 * Copyright (c) 2011 Peter Drescher - DC2PD
dreschpe 0:de9d1462a835 3 *
dreschpe 0:de9d1462a835 4 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
dreschpe 0:de9d1462a835 5 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
dreschpe 0:de9d1462a835 6 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
dreschpe 0:de9d1462a835 7 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
dreschpe 0:de9d1462a835 8 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
dreschpe 0:de9d1462a835 9 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
dreschpe 0:de9d1462a835 10 * THE SOFTWARE.
dreschpe 0:de9d1462a835 11 */
dreschpe 0:de9d1462a835 12
dreschpe 0:de9d1462a835 13
dreschpe 0:de9d1462a835 14 // fix bmp padding for Bitmap function
dreschpe 0:de9d1462a835 15 // speed up pixel
dreschpe 0:de9d1462a835 16 // 30.12.11 fix cls
dreschpe 0:de9d1462a835 17 // 11.03.12 use DMA to speed up
dreschpe 0:de9d1462a835 18 // 15.03.12 use SSEL for TFT CS to enable DMA Register writes
dreschpe 0:de9d1462a835 19 // 06.04.12 fix SSEL CS problem
dreschpe 0:de9d1462a835 20 // 06.04.12 use direct access to the spi register to speed up the library.
dreschpe 3:7f1d793b90df 21 // 11.09.12 switch back to using io pin as cs to avoid problems with SSEL CS.
dreschpe 3:7f1d793b90df 22
dreschpe 0:de9d1462a835 23
dreschpe 0:de9d1462a835 24 #include "SPI_TFT.h"
dreschpe 0:de9d1462a835 25 #include "mbed.h"
dreschpe 0:de9d1462a835 26
dreschpe 0:de9d1462a835 27
dreschpe 0:de9d1462a835 28 #define BPP 16 // Bits per pixel
dreschpe 0:de9d1462a835 29
dreschpe 0:de9d1462a835 30
dreschpe 3:7f1d793b90df 31 extern Serial pc;
dreschpe 0:de9d1462a835 32 //extern DigitalOut xx; // debug !!
dreschpe 0:de9d1462a835 33
dreschpe 0:de9d1462a835 34 SPI_TFT::SPI_TFT(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset, const char *name)
dreschpe 3:7f1d793b90df 35 : _spi(mosi, miso, sclk), _cs(cs), _reset(reset),GraphicsDisplay(name)
dreschpe 3:7f1d793b90df 36 {
dreschpe 0:de9d1462a835 37 tft_reset();
dreschpe 0:de9d1462a835 38 orientation = 0;
dreschpe 0:de9d1462a835 39 char_x = 0;
dreschpe 0:de9d1462a835 40 if (mosi == p11 || mosi == P0_18) spi_port = 0; // we must know the used SPI port to setup the DMA
dreschpe 0:de9d1462a835 41 else spi_port = 1;
dreschpe 0:de9d1462a835 42 }
dreschpe 0:de9d1462a835 43
dreschpe 3:7f1d793b90df 44 int SPI_TFT::width()
dreschpe 3:7f1d793b90df 45 {
dreschpe 0:de9d1462a835 46 if (orientation == 0 || orientation == 2) return 240;
dreschpe 0:de9d1462a835 47 else return 320;
dreschpe 0:de9d1462a835 48 }
dreschpe 0:de9d1462a835 49
dreschpe 0:de9d1462a835 50
dreschpe 3:7f1d793b90df 51 int SPI_TFT::height()
dreschpe 3:7f1d793b90df 52 {
dreschpe 0:de9d1462a835 53 if (orientation == 0 || orientation == 2) return 320;
dreschpe 0:de9d1462a835 54 else return 240;
dreschpe 0:de9d1462a835 55 }
dreschpe 0:de9d1462a835 56
dreschpe 0:de9d1462a835 57
dreschpe 3:7f1d793b90df 58 void SPI_TFT::set_orientation(unsigned int o)
dreschpe 3:7f1d793b90df 59 {
dreschpe 0:de9d1462a835 60 orientation = o;
dreschpe 0:de9d1462a835 61 switch (orientation) {
dreschpe 0:de9d1462a835 62 case 0:
dreschpe 0:de9d1462a835 63 wr_reg(0x16, 0x08);
dreschpe 0:de9d1462a835 64 break;
dreschpe 0:de9d1462a835 65 case 1:
dreschpe 0:de9d1462a835 66 wr_reg(0x16, 0x68);
dreschpe 0:de9d1462a835 67 break;
dreschpe 0:de9d1462a835 68 case 2:
dreschpe 0:de9d1462a835 69 wr_reg(0x16, 0xC8);
dreschpe 0:de9d1462a835 70 break;
dreschpe 0:de9d1462a835 71 case 3:
dreschpe 0:de9d1462a835 72 wr_reg(0x16, 0xA8);
dreschpe 0:de9d1462a835 73 break;
dreschpe 0:de9d1462a835 74 }
dreschpe 0:de9d1462a835 75 WindowMax();
dreschpe 0:de9d1462a835 76 }
dreschpe 0:de9d1462a835 77
dreschpe 0:de9d1462a835 78
dreschpe 0:de9d1462a835 79 // write command to tft register
dreschpe 0:de9d1462a835 80
dreschpe 3:7f1d793b90df 81 void SPI_TFT::wr_cmd(unsigned char cmd)
dreschpe 3:7f1d793b90df 82 {
dreschpe 0:de9d1462a835 83 unsigned short spi_d;
dreschpe 0:de9d1462a835 84 spi_d = 0x7000 | cmd ;
dreschpe 1:17e12e4e149f 85 _cs = 0;
dreschpe 0:de9d1462a835 86 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 87 LPC_SSP0->DR = spi_d;
dreschpe 1:17e12e4e149f 88 // we have to wait for SPI IDLE to set CS back to high
dreschpe 0:de9d1462a835 89 do {
dreschpe 0:de9d1462a835 90 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 0:de9d1462a835 91 } else {
dreschpe 0:de9d1462a835 92 LPC_SSP1->DR = spi_d;
dreschpe 0:de9d1462a835 93 do {
dreschpe 0:de9d1462a835 94 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 0:de9d1462a835 95 }
dreschpe 1:17e12e4e149f 96 _cs = 1;
dreschpe 0:de9d1462a835 97 }
dreschpe 0:de9d1462a835 98
dreschpe 0:de9d1462a835 99
dreschpe 0:de9d1462a835 100
dreschpe 3:7f1d793b90df 101 void SPI_TFT::wr_dat(unsigned char dat)
dreschpe 3:7f1d793b90df 102 {
dreschpe 0:de9d1462a835 103 unsigned short spi_d;
dreschpe 0:de9d1462a835 104 spi_d = 0x7200 | dat;
dreschpe 1:17e12e4e149f 105 _cs = 0;
dreschpe 0:de9d1462a835 106 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 107 LPC_SSP0->DR = spi_d;
dreschpe 1:17e12e4e149f 108 // we have to wait for SPI IDLE to set CS back to high
dreschpe 0:de9d1462a835 109 do {
dreschpe 0:de9d1462a835 110 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 0:de9d1462a835 111 } else {
dreschpe 0:de9d1462a835 112 LPC_SSP1->DR = spi_d;
dreschpe 0:de9d1462a835 113 do {
dreschpe 0:de9d1462a835 114 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 0:de9d1462a835 115 }
dreschpe 1:17e12e4e149f 116 _cs = 1;
dreschpe 0:de9d1462a835 117 }
dreschpe 0:de9d1462a835 118
dreschpe 0:de9d1462a835 119
dreschpe 0:de9d1462a835 120
dreschpe 0:de9d1462a835 121 // the HX8347-D controller do not use the MISO (SDO) Signal.
dreschpe 1:17e12e4e149f 122 // This is a bug - ?
dreschpe 1:17e12e4e149f 123 // A read will return 0 at the moment
dreschpe 0:de9d1462a835 124
dreschpe 3:7f1d793b90df 125 unsigned short SPI_TFT::rd_dat (void)
dreschpe 3:7f1d793b90df 126 {
dreschpe 0:de9d1462a835 127 unsigned short val = 0;
dreschpe 0:de9d1462a835 128
dreschpe 1:17e12e4e149f 129 //val = _spi.write(0x73ff); /* Dummy read 1 */
dreschpe 1:17e12e4e149f 130 //val = _spi.write(0x0000); /* Read D8..D15 */
dreschpe 0:de9d1462a835 131 return (val);
dreschpe 0:de9d1462a835 132 }
dreschpe 0:de9d1462a835 133
dreschpe 3:7f1d793b90df 134 void SPI_TFT::wr_reg (unsigned char reg, unsigned char val)
dreschpe 3:7f1d793b90df 135 {
dreschpe 0:de9d1462a835 136 wr_cmd(reg);
dreschpe 0:de9d1462a835 137 wr_dat(val);
dreschpe 0:de9d1462a835 138 }
dreschpe 0:de9d1462a835 139
dreschpe 3:7f1d793b90df 140 unsigned short SPI_TFT::rd_reg (unsigned char reg)
dreschpe 3:7f1d793b90df 141 {
dreschpe 0:de9d1462a835 142 wr_cmd(reg);
dreschpe 0:de9d1462a835 143 return(rd_dat());
dreschpe 0:de9d1462a835 144 }
dreschpe 0:de9d1462a835 145
dreschpe 3:7f1d793b90df 146 void SPI_TFT::tft_reset()
dreschpe 3:7f1d793b90df 147 {
dreschpe 1:17e12e4e149f 148 //static unsigned short driverCode;
dreschpe 0:de9d1462a835 149 _spi.format(16,3); // 16 bit spi mode 3
dreschpe 0:de9d1462a835 150 _spi.frequency(48000000); // 48 Mhz SPI clock
dreschpe 1:17e12e4e149f 151 _cs = 1; // cs high
dreschpe 0:de9d1462a835 152 _reset = 0; // display reset
dreschpe 3:7f1d793b90df 153
dreschpe 0:de9d1462a835 154 wait_us(50);
dreschpe 0:de9d1462a835 155 _reset = 1; // end reset
dreschpe 0:de9d1462a835 156 wait_ms(5);
dreschpe 0:de9d1462a835 157
dreschpe 0:de9d1462a835 158 /* Start Initial Sequence ----------------------------------------------------*/
dreschpe 0:de9d1462a835 159 wr_reg(0xEA, 0x00); /* Reset Power Control 1 */
dreschpe 0:de9d1462a835 160 wr_reg(0xEB, 0x20); /* Power Control 2 */
dreschpe 0:de9d1462a835 161 wr_reg(0xEC, 0x0C); /* Power Control 3 */
dreschpe 0:de9d1462a835 162 wr_reg(0xED, 0xC4); /* Power Control 4 */
dreschpe 0:de9d1462a835 163 wr_reg(0xE8, 0x40); /* Source OPON_N */
dreschpe 0:de9d1462a835 164 wr_reg(0xE9, 0x38); /* Source OPON_I */
dreschpe 0:de9d1462a835 165 wr_reg(0xF1, 0x01); /* */
dreschpe 0:de9d1462a835 166 wr_reg(0xF2, 0x10); /* */
dreschpe 0:de9d1462a835 167 wr_reg(0x27, 0xA3); /* Display Control 2 */
dreschpe 0:de9d1462a835 168
dreschpe 0:de9d1462a835 169 /* Power On sequence ---------------------------------------------------------*/
dreschpe 0:de9d1462a835 170 wr_reg(0x1B, 0x1B); /* Power Control 2 */
dreschpe 0:de9d1462a835 171 wr_reg(0x1A, 0x01); /* Power Control 1 */
dreschpe 0:de9d1462a835 172 wr_reg(0x24, 0x2F); /* Vcom Control 2 */
dreschpe 0:de9d1462a835 173 wr_reg(0x25, 0x57); /* Vcom Control 3 */
dreschpe 0:de9d1462a835 174 wr_reg(0x23, 0x8D); /* Vcom Control 1 */
dreschpe 0:de9d1462a835 175
dreschpe 0:de9d1462a835 176 /* Gamma settings -----------------------------------------------------------*/
dreschpe 0:de9d1462a835 177 wr_reg(0x40,0x00); //
dreschpe 0:de9d1462a835 178 wr_reg(0x41,0x00); //
dreschpe 0:de9d1462a835 179 wr_reg(0x42,0x01); //
dreschpe 0:de9d1462a835 180 wr_reg(0x43,0x13); //
dreschpe 0:de9d1462a835 181 wr_reg(0x44,0x10); //
dreschpe 0:de9d1462a835 182 wr_reg(0x45,0x26); //
dreschpe 0:de9d1462a835 183 wr_reg(0x46,0x08); //
dreschpe 0:de9d1462a835 184 wr_reg(0x47,0x51); //
dreschpe 0:de9d1462a835 185 wr_reg(0x48,0x02); //
dreschpe 0:de9d1462a835 186 wr_reg(0x49,0x12); //
dreschpe 0:de9d1462a835 187 wr_reg(0x4A,0x18); //
dreschpe 0:de9d1462a835 188 wr_reg(0x4B,0x19); //
dreschpe 0:de9d1462a835 189 wr_reg(0x4C,0x14); //
dreschpe 0:de9d1462a835 190 wr_reg(0x50,0x19); //
dreschpe 0:de9d1462a835 191 wr_reg(0x51,0x2F); //
dreschpe 0:de9d1462a835 192 wr_reg(0x52,0x2C); //
dreschpe 0:de9d1462a835 193 wr_reg(0x53,0x3E); //
dreschpe 0:de9d1462a835 194 wr_reg(0x54,0x3F); //
dreschpe 0:de9d1462a835 195 wr_reg(0x55,0x3F); //
dreschpe 0:de9d1462a835 196 wr_reg(0x56,0x2E); //
dreschpe 0:de9d1462a835 197 wr_reg(0x57,0x77); //
dreschpe 0:de9d1462a835 198 wr_reg(0x58,0x0B); //
dreschpe 0:de9d1462a835 199 wr_reg(0x59,0x06); //
dreschpe 0:de9d1462a835 200 wr_reg(0x5A,0x07); //
dreschpe 0:de9d1462a835 201 wr_reg(0x5B,0x0D); //
dreschpe 0:de9d1462a835 202 wr_reg(0x5C,0x1D); //
dreschpe 0:de9d1462a835 203 wr_reg(0x5D,0xCC); //
dreschpe 0:de9d1462a835 204
dreschpe 0:de9d1462a835 205 /* Power + Osc ---------------------------------------------------------------*/
dreschpe 0:de9d1462a835 206 wr_reg(0x18, 0x0036); /* OSC Control 1 */
dreschpe 0:de9d1462a835 207 wr_reg(0x19, 0x0001); /* OSC Control 2 */
dreschpe 0:de9d1462a835 208 wr_reg(0x01, 0x0000); /* Display Mode Control */
dreschpe 0:de9d1462a835 209 wr_reg(0x1F, 0x0088); /* Power Control 6 */
dreschpe 0:de9d1462a835 210 wait_ms(5); /* Delay 5 ms */
dreschpe 0:de9d1462a835 211 wr_reg(0x1F, 0x0080); /* Power Control 6 */
dreschpe 0:de9d1462a835 212 wait_ms(5); /* Delay 5 ms */
dreschpe 0:de9d1462a835 213 wr_reg(0x1F, 0x0090); /* Power Control 6 */
dreschpe 0:de9d1462a835 214 wait_ms(5); /* Delay 5 ms */
dreschpe 0:de9d1462a835 215 wr_reg(0x1F, 0x00D0); /* Power Control 6 */
dreschpe 0:de9d1462a835 216 wait_ms(5); /* Delay 5 ms */
dreschpe 0:de9d1462a835 217
dreschpe 0:de9d1462a835 218 wr_reg(0x17, 0x0005); /* Colmod 16Bit/Pixel */
dreschpe 0:de9d1462a835 219
dreschpe 0:de9d1462a835 220 wr_reg(0x36, 0x0000); /* Panel Characteristic */
dreschpe 0:de9d1462a835 221 wr_reg(0x28, 0x0038); /* Display Control 3 */
dreschpe 0:de9d1462a835 222 wait_ms(40);
dreschpe 0:de9d1462a835 223 wr_reg(0x28, 0x003C); /* Display Control 3 */
dreschpe 0:de9d1462a835 224 switch (orientation) {
dreschpe 0:de9d1462a835 225 case 0:
dreschpe 0:de9d1462a835 226 wr_reg(0x16, 0x0008);
dreschpe 0:de9d1462a835 227 break;
dreschpe 0:de9d1462a835 228 case 1:
dreschpe 0:de9d1462a835 229 wr_reg(0x16, 0x0068);
dreschpe 0:de9d1462a835 230 break;
dreschpe 0:de9d1462a835 231 case 2:
dreschpe 0:de9d1462a835 232 wr_reg(0x16, 0x00C8);
dreschpe 0:de9d1462a835 233 break;
dreschpe 0:de9d1462a835 234 case 3:
dreschpe 0:de9d1462a835 235 wr_reg(0x16, 0x00A8);
dreschpe 0:de9d1462a835 236 break;
dreschpe 0:de9d1462a835 237 }
dreschpe 0:de9d1462a835 238
dreschpe 0:de9d1462a835 239 // setup DMA channel 0
dreschpe 0:de9d1462a835 240 // Power up the GPDMA.
dreschpe 0:de9d1462a835 241 LPC_SC->PCONP |= (1UL << 29);
dreschpe 0:de9d1462a835 242 LPC_GPDMA->DMACConfig = 1; // enable DMA controller
dreschpe 0:de9d1462a835 243 // Reset the Interrupt status
dreschpe 0:de9d1462a835 244 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 0:de9d1462a835 245 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 0:de9d1462a835 246 LPC_GPDMACH0->DMACCLLI = 0;
dreschpe 0:de9d1462a835 247
dreschpe 0:de9d1462a835 248 WindowMax ();
dreschpe 0:de9d1462a835 249 }
dreschpe 0:de9d1462a835 250
dreschpe 0:de9d1462a835 251
dreschpe 3:7f1d793b90df 252 void SPI_TFT::pixel(int x, int y, int color)
dreschpe 3:7f1d793b90df 253 {
dreschpe 0:de9d1462a835 254 unsigned char u,l;
dreschpe 0:de9d1462a835 255 wr_reg(0x03, (x >> 0));
dreschpe 0:de9d1462a835 256 wr_reg(0x02, (x >> 8));
dreschpe 0:de9d1462a835 257 wr_reg(0x07, (y >> 0));
dreschpe 0:de9d1462a835 258 wr_reg(0x06, (y >> 8));
dreschpe 0:de9d1462a835 259 wr_cmd(0x22);
dreschpe 0:de9d1462a835 260 u = color >> 8;
dreschpe 0:de9d1462a835 261 l = color & 0xff;
dreschpe 3:7f1d793b90df 262 _cs = 0;
dreschpe 0:de9d1462a835 263 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 264 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 265 LPC_SSP0->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 266 LPC_SSP0->DR = u; // high byte
dreschpe 0:de9d1462a835 267 LPC_SSP0->DR = l; // low byte
dreschpe 0:de9d1462a835 268 LPC_SSP0->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 1:17e12e4e149f 269 // we have to wait for SPI IDLE to set CS back to high
dreschpe 0:de9d1462a835 270 do {
dreschpe 0:de9d1462a835 271 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 0:de9d1462a835 272 } else {
dreschpe 0:de9d1462a835 273 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 274 LPC_SSP1->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 275 LPC_SSP1->DR = u;
dreschpe 0:de9d1462a835 276 LPC_SSP1->DR = l;
dreschpe 0:de9d1462a835 277 LPC_SSP1->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 1:17e12e4e149f 278 // we have to wait for SPI IDLE to set CS back to high
dreschpe 0:de9d1462a835 279 do {
dreschpe 0:de9d1462a835 280 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 0:de9d1462a835 281 }
dreschpe 1:17e12e4e149f 282 _cs = 1;
dreschpe 0:de9d1462a835 283 }
dreschpe 0:de9d1462a835 284
dreschpe 0:de9d1462a835 285
dreschpe 3:7f1d793b90df 286 void SPI_TFT::window (unsigned int x, unsigned int y, unsigned int w, unsigned int h)
dreschpe 3:7f1d793b90df 287 {
dreschpe 0:de9d1462a835 288 wr_reg(0x03, x );
dreschpe 0:de9d1462a835 289 wr_reg(0x02, (x >> 8));
dreschpe 0:de9d1462a835 290 wr_reg(0x05, x+w-1 );
dreschpe 0:de9d1462a835 291 wr_reg(0x04, (x+w-1 >> 8));
dreschpe 0:de9d1462a835 292 wr_reg(0x07, y );
dreschpe 0:de9d1462a835 293 wr_reg(0x06, ( y >> 8));
dreschpe 0:de9d1462a835 294 wr_reg(0x09, ( y+h-1 ));
dreschpe 0:de9d1462a835 295 wr_reg(0x08, ( y+h-1 >> 8));
dreschpe 0:de9d1462a835 296 }
dreschpe 0:de9d1462a835 297
dreschpe 0:de9d1462a835 298
dreschpe 3:7f1d793b90df 299 void SPI_TFT::WindowMax (void)
dreschpe 3:7f1d793b90df 300 {
dreschpe 0:de9d1462a835 301 window (0, 0, width(), height());
dreschpe 0:de9d1462a835 302 }
dreschpe 0:de9d1462a835 303
dreschpe 0:de9d1462a835 304
dreschpe 3:7f1d793b90df 305 void SPI_TFT::cls (void)
dreschpe 3:7f1d793b90df 306 {
dreschpe 0:de9d1462a835 307 //unsigned int i
dreschpe 0:de9d1462a835 308
dreschpe 0:de9d1462a835 309 int pixel = ( width() * height());
dreschpe 0:de9d1462a835 310 int dma_count;
dreschpe 0:de9d1462a835 311 int color = _background;
dreschpe 0:de9d1462a835 312 WindowMax();
dreschpe 0:de9d1462a835 313 wr_cmd(0x22);
dreschpe 0:de9d1462a835 314
dreschpe 0:de9d1462a835 315 // The SSEL signal is held low until the spi FIFO is emty.
dreschpe 0:de9d1462a835 316 // We have to lower the SPI clock for the 8 bit start to get the spi running
dreschpe 0:de9d1462a835 317 // until the next data word
dreschpe 3:7f1d793b90df 318
dreschpe 0:de9d1462a835 319 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 0:de9d1462a835 320
dreschpe 1:17e12e4e149f 321 _cs = 0;
dreschpe 0:de9d1462a835 322 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 323 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 0:de9d1462a835 324 /* Enable SSP0 for DMA. */
dreschpe 0:de9d1462a835 325 LPC_SSP0->DMACR = 0x2;
dreschpe 0:de9d1462a835 326 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 327 LPC_SSP0->DR = 0x72; // start byte
dreschpe 0:de9d1462a835 328 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 0:de9d1462a835 329 } else {
dreschpe 0:de9d1462a835 330 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 0:de9d1462a835 331 /* Enable SSP1 for DMA. */
dreschpe 0:de9d1462a835 332 LPC_SSP1->DMACR = 0x2;
dreschpe 0:de9d1462a835 333 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 334 LPC_SSP1->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 335 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 3:7f1d793b90df 336 }
dreschpe 0:de9d1462a835 337
dreschpe 0:de9d1462a835 338 // start DMA
dreschpe 0:de9d1462a835 339 do {
dreschpe 0:de9d1462a835 340 if (pixel > 4095) {
dreschpe 0:de9d1462a835 341 dma_count = 4095;
dreschpe 0:de9d1462a835 342 pixel = pixel - 4095;
dreschpe 0:de9d1462a835 343 } else {
dreschpe 0:de9d1462a835 344 dma_count = pixel;
dreschpe 0:de9d1462a835 345 pixel = 0;
dreschpe 0:de9d1462a835 346 }
dreschpe 0:de9d1462a835 347 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 0:de9d1462a835 348 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 0:de9d1462a835 349 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 0:de9d1462a835 350 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P ;
dreschpe 0:de9d1462a835 351 LPC_GPDMA->DMACSoftSReq = 0x1; // DMA request
dreschpe 0:de9d1462a835 352
dreschpe 0:de9d1462a835 353 do {
dreschpe 0:de9d1462a835 354 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 0:de9d1462a835 355
dreschpe 0:de9d1462a835 356 } while (pixel > 0);
dreschpe 0:de9d1462a835 357 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 358 do {
dreschpe 0:de9d1462a835 359 } while ((0x0010 & LPC_SSP0->SR) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 360 /* disable SSP0 for DMA. */
dreschpe 0:de9d1462a835 361 LPC_SSP0->DMACR = 0x0;
dreschpe 0:de9d1462a835 362 } else {
dreschpe 0:de9d1462a835 363 do {
dreschpe 0:de9d1462a835 364 } while ((0x0010 & LPC_SSP1->SR) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 365 /* disable SSP1 for DMA. */
dreschpe 0:de9d1462a835 366 LPC_SSP1->DMACR = 0x0;
dreschpe 0:de9d1462a835 367 }
dreschpe 1:17e12e4e149f 368 _cs = 1;
dreschpe 0:de9d1462a835 369 }
dreschpe 0:de9d1462a835 370
dreschpe 0:de9d1462a835 371
dreschpe 3:7f1d793b90df 372 void SPI_TFT::circle(int x0, int y0, int r, int color)
dreschpe 3:7f1d793b90df 373 {
dreschpe 0:de9d1462a835 374
dreschpe 0:de9d1462a835 375 int draw_x0, draw_y0;
dreschpe 0:de9d1462a835 376 int draw_x1, draw_y1;
dreschpe 0:de9d1462a835 377 int draw_x2, draw_y2;
dreschpe 0:de9d1462a835 378 int draw_x3, draw_y3;
dreschpe 0:de9d1462a835 379 int draw_x4, draw_y4;
dreschpe 0:de9d1462a835 380 int draw_x5, draw_y5;
dreschpe 0:de9d1462a835 381 int draw_x6, draw_y6;
dreschpe 0:de9d1462a835 382 int draw_x7, draw_y7;
dreschpe 0:de9d1462a835 383 int xx, yy;
dreschpe 0:de9d1462a835 384 int di;
dreschpe 0:de9d1462a835 385 //WindowMax();
dreschpe 0:de9d1462a835 386 if (r == 0) { /* no radius */
dreschpe 0:de9d1462a835 387 return;
dreschpe 0:de9d1462a835 388 }
dreschpe 0:de9d1462a835 389
dreschpe 0:de9d1462a835 390 draw_x0 = draw_x1 = x0;
dreschpe 0:de9d1462a835 391 draw_y0 = draw_y1 = y0 + r;
dreschpe 0:de9d1462a835 392 if (draw_y0 < height()) {
dreschpe 0:de9d1462a835 393 pixel(draw_x0, draw_y0, color); /* 90 degree */
dreschpe 0:de9d1462a835 394 }
dreschpe 0:de9d1462a835 395
dreschpe 0:de9d1462a835 396 draw_x2 = draw_x3 = x0;
dreschpe 0:de9d1462a835 397 draw_y2 = draw_y3 = y0 - r;
dreschpe 0:de9d1462a835 398 if (draw_y2 >= 0) {
dreschpe 0:de9d1462a835 399 pixel(draw_x2, draw_y2, color); /* 270 degree */
dreschpe 0:de9d1462a835 400 }
dreschpe 0:de9d1462a835 401
dreschpe 0:de9d1462a835 402 draw_x4 = draw_x6 = x0 + r;
dreschpe 0:de9d1462a835 403 draw_y4 = draw_y6 = y0;
dreschpe 0:de9d1462a835 404 if (draw_x4 < width()) {
dreschpe 0:de9d1462a835 405 pixel(draw_x4, draw_y4, color); /* 0 degree */
dreschpe 0:de9d1462a835 406 }
dreschpe 0:de9d1462a835 407
dreschpe 0:de9d1462a835 408 draw_x5 = draw_x7 = x0 - r;
dreschpe 0:de9d1462a835 409 draw_y5 = draw_y7 = y0;
dreschpe 0:de9d1462a835 410 if (draw_x5>=0) {
dreschpe 0:de9d1462a835 411 pixel(draw_x5, draw_y5, color); /* 180 degree */
dreschpe 0:de9d1462a835 412 }
dreschpe 0:de9d1462a835 413
dreschpe 0:de9d1462a835 414 if (r == 1) {
dreschpe 0:de9d1462a835 415 return;
dreschpe 0:de9d1462a835 416 }
dreschpe 0:de9d1462a835 417
dreschpe 0:de9d1462a835 418 di = 3 - 2*r;
dreschpe 0:de9d1462a835 419 xx = 0;
dreschpe 0:de9d1462a835 420 yy = r;
dreschpe 0:de9d1462a835 421 while (xx < yy) {
dreschpe 0:de9d1462a835 422
dreschpe 0:de9d1462a835 423 if (di < 0) {
dreschpe 0:de9d1462a835 424 di += 4*xx + 6;
dreschpe 0:de9d1462a835 425 } else {
dreschpe 0:de9d1462a835 426 di += 4*(xx - yy) + 10;
dreschpe 0:de9d1462a835 427 yy--;
dreschpe 0:de9d1462a835 428 draw_y0--;
dreschpe 0:de9d1462a835 429 draw_y1--;
dreschpe 0:de9d1462a835 430 draw_y2++;
dreschpe 0:de9d1462a835 431 draw_y3++;
dreschpe 0:de9d1462a835 432 draw_x4--;
dreschpe 0:de9d1462a835 433 draw_x5++;
dreschpe 0:de9d1462a835 434 draw_x6--;
dreschpe 0:de9d1462a835 435 draw_x7++;
dreschpe 0:de9d1462a835 436 }
dreschpe 0:de9d1462a835 437 xx++;
dreschpe 0:de9d1462a835 438 draw_x0++;
dreschpe 0:de9d1462a835 439 draw_x1--;
dreschpe 0:de9d1462a835 440 draw_x2++;
dreschpe 0:de9d1462a835 441 draw_x3--;
dreschpe 0:de9d1462a835 442 draw_y4++;
dreschpe 0:de9d1462a835 443 draw_y5++;
dreschpe 0:de9d1462a835 444 draw_y6--;
dreschpe 0:de9d1462a835 445 draw_y7--;
dreschpe 0:de9d1462a835 446
dreschpe 0:de9d1462a835 447 if ( (draw_x0 <= width()) && (draw_y0>=0) ) {
dreschpe 0:de9d1462a835 448 pixel(draw_x0, draw_y0, color);
dreschpe 0:de9d1462a835 449 }
dreschpe 0:de9d1462a835 450
dreschpe 0:de9d1462a835 451 if ( (draw_x1 >= 0) && (draw_y1 >= 0) ) {
dreschpe 0:de9d1462a835 452 pixel(draw_x1, draw_y1, color);
dreschpe 0:de9d1462a835 453 }
dreschpe 0:de9d1462a835 454
dreschpe 0:de9d1462a835 455 if ( (draw_x2 <= width()) && (draw_y2 <= height()) ) {
dreschpe 0:de9d1462a835 456 pixel(draw_x2, draw_y2, color);
dreschpe 0:de9d1462a835 457 }
dreschpe 0:de9d1462a835 458
dreschpe 0:de9d1462a835 459 if ( (draw_x3 >=0 ) && (draw_y3 <= height()) ) {
dreschpe 0:de9d1462a835 460 pixel(draw_x3, draw_y3, color);
dreschpe 0:de9d1462a835 461 }
dreschpe 0:de9d1462a835 462
dreschpe 0:de9d1462a835 463 if ( (draw_x4 <= width()) && (draw_y4 >= 0) ) {
dreschpe 0:de9d1462a835 464 pixel(draw_x4, draw_y4, color);
dreschpe 0:de9d1462a835 465 }
dreschpe 0:de9d1462a835 466
dreschpe 0:de9d1462a835 467 if ( (draw_x5 >= 0) && (draw_y5 >= 0) ) {
dreschpe 0:de9d1462a835 468 pixel(draw_x5, draw_y5, color);
dreschpe 0:de9d1462a835 469 }
dreschpe 0:de9d1462a835 470 if ( (draw_x6 <=width()) && (draw_y6 <= height()) ) {
dreschpe 0:de9d1462a835 471 pixel(draw_x6, draw_y6, color);
dreschpe 0:de9d1462a835 472 }
dreschpe 0:de9d1462a835 473 if ( (draw_x7 >= 0) && (draw_y7 <= height()) ) {
dreschpe 0:de9d1462a835 474 pixel(draw_x7, draw_y7, color);
dreschpe 0:de9d1462a835 475 }
dreschpe 0:de9d1462a835 476 }
dreschpe 0:de9d1462a835 477 return;
dreschpe 0:de9d1462a835 478 }
dreschpe 0:de9d1462a835 479
dreschpe 3:7f1d793b90df 480 void SPI_TFT::fillcircle(int x, int y, int r, int color)
dreschpe 3:7f1d793b90df 481 {
dreschpe 0:de9d1462a835 482 int i;
dreschpe 0:de9d1462a835 483 for (i = 0; i <= r; i++)
dreschpe 0:de9d1462a835 484 circle(x,y,i,color);
dreschpe 0:de9d1462a835 485 }
dreschpe 0:de9d1462a835 486
dreschpe 0:de9d1462a835 487
dreschpe 0:de9d1462a835 488
dreschpe 3:7f1d793b90df 489 void SPI_TFT::hline(int x0, int x1, int y, int color)
dreschpe 3:7f1d793b90df 490 {
dreschpe 0:de9d1462a835 491 int w;
dreschpe 0:de9d1462a835 492 w = x1 - x0 + 1;
dreschpe 0:de9d1462a835 493 window(x0,y,w,1);
dreschpe 0:de9d1462a835 494 wr_cmd(0x22);
dreschpe 1:17e12e4e149f 495 _cs = 0;
dreschpe 0:de9d1462a835 496 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 497 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 0:de9d1462a835 498 /* Enable SSP0 for DMA. */
dreschpe 0:de9d1462a835 499 LPC_SSP0->DMACR = 0x2;
dreschpe 0:de9d1462a835 500 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 501 LPC_SSP0->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 502 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 0:de9d1462a835 503 } else {
dreschpe 0:de9d1462a835 504 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 0:de9d1462a835 505 /* Enable SSP1 for DMA. */
dreschpe 0:de9d1462a835 506 LPC_SSP1->DMACR = 0x2;
dreschpe 0:de9d1462a835 507 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 508 LPC_SSP1->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 509 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 0:de9d1462a835 510 }
dreschpe 0:de9d1462a835 511
dreschpe 0:de9d1462a835 512 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 0:de9d1462a835 513 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 0:de9d1462a835 514 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 0:de9d1462a835 515 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 0:de9d1462a835 516 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P ;
dreschpe 0:de9d1462a835 517 LPC_GPDMA->DMACSoftSReq = 0x1; // start DMA
dreschpe 0:de9d1462a835 518 do {
dreschpe 0:de9d1462a835 519 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 0:de9d1462a835 520 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 521 do {
dreschpe 0:de9d1462a835 522 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 523 } else {
dreschpe 0:de9d1462a835 524 do {
dreschpe 0:de9d1462a835 525 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 526 }
dreschpe 1:17e12e4e149f 527 _cs = 1;
dreschpe 0:de9d1462a835 528 WindowMax();
dreschpe 0:de9d1462a835 529 return;
dreschpe 0:de9d1462a835 530 }
dreschpe 0:de9d1462a835 531
dreschpe 3:7f1d793b90df 532 void SPI_TFT::vline(int x, int y0, int y1, int color)
dreschpe 3:7f1d793b90df 533 {
dreschpe 0:de9d1462a835 534 int h;
dreschpe 0:de9d1462a835 535 h = y1 - y0 + 1;
dreschpe 0:de9d1462a835 536 window(x,y0,1,h);
dreschpe 0:de9d1462a835 537 wr_cmd(0x22);
dreschpe 1:17e12e4e149f 538 _cs = 0;
dreschpe 0:de9d1462a835 539 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 540 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 0:de9d1462a835 541 /* Enable SSP0 for DMA. */
dreschpe 0:de9d1462a835 542 LPC_SSP0->DMACR = 0x2;
dreschpe 0:de9d1462a835 543 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 544 LPC_SSP0->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 545 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 3:7f1d793b90df 546 } else {
dreschpe 0:de9d1462a835 547 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 0:de9d1462a835 548 /* Enable SSP1 for DMA. */
dreschpe 0:de9d1462a835 549 LPC_SSP1->DMACR = 0x2;
dreschpe 0:de9d1462a835 550 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 551 LPC_SSP1->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 552 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 0:de9d1462a835 553 }
dreschpe 0:de9d1462a835 554
dreschpe 0:de9d1462a835 555 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 0:de9d1462a835 556 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 0:de9d1462a835 557 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 0:de9d1462a835 558 LPC_GPDMACH0->DMACCControl = h | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 0:de9d1462a835 559 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P ;
dreschpe 0:de9d1462a835 560 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 0:de9d1462a835 561 do {
dreschpe 0:de9d1462a835 562 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 0:de9d1462a835 563
dreschpe 0:de9d1462a835 564 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 565 do {
dreschpe 0:de9d1462a835 566 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 567 } else {
dreschpe 0:de9d1462a835 568 do {
dreschpe 0:de9d1462a835 569 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 570 }
dreschpe 1:17e12e4e149f 571 _cs = 1;
dreschpe 0:de9d1462a835 572 WindowMax();
dreschpe 0:de9d1462a835 573 return;
dreschpe 0:de9d1462a835 574 }
dreschpe 0:de9d1462a835 575
dreschpe 0:de9d1462a835 576
dreschpe 0:de9d1462a835 577
dreschpe 3:7f1d793b90df 578 void SPI_TFT::line(int x0, int y0, int x1, int y1, int color)
dreschpe 3:7f1d793b90df 579 {
dreschpe 0:de9d1462a835 580 //WindowMax();
dreschpe 0:de9d1462a835 581 int dx = 0, dy = 0;
dreschpe 0:de9d1462a835 582 int dx_sym = 0, dy_sym = 0;
dreschpe 0:de9d1462a835 583 int dx_x2 = 0, dy_x2 = 0;
dreschpe 0:de9d1462a835 584 int di = 0;
dreschpe 0:de9d1462a835 585
dreschpe 0:de9d1462a835 586 dx = x1-x0;
dreschpe 0:de9d1462a835 587 dy = y1-y0;
dreschpe 0:de9d1462a835 588
dreschpe 0:de9d1462a835 589 if (dx == 0) { /* vertical line */
dreschpe 0:de9d1462a835 590 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 0:de9d1462a835 591 else vline(x0,y1,y0,color);
dreschpe 0:de9d1462a835 592 return;
dreschpe 0:de9d1462a835 593 }
dreschpe 0:de9d1462a835 594
dreschpe 0:de9d1462a835 595 if (dx > 0) {
dreschpe 0:de9d1462a835 596 dx_sym = 1;
dreschpe 0:de9d1462a835 597 } else {
dreschpe 0:de9d1462a835 598 dx_sym = -1;
dreschpe 0:de9d1462a835 599 }
dreschpe 0:de9d1462a835 600 if (dy == 0) { /* horizontal line */
dreschpe 0:de9d1462a835 601 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 0:de9d1462a835 602 else hline(x1,x0,y0,color);
dreschpe 0:de9d1462a835 603 return;
dreschpe 0:de9d1462a835 604 }
dreschpe 0:de9d1462a835 605
dreschpe 0:de9d1462a835 606 if (dy > 0) {
dreschpe 0:de9d1462a835 607 dy_sym = 1;
dreschpe 0:de9d1462a835 608 } else {
dreschpe 0:de9d1462a835 609 dy_sym = -1;
dreschpe 0:de9d1462a835 610 }
dreschpe 0:de9d1462a835 611
dreschpe 0:de9d1462a835 612 dx = dx_sym*dx;
dreschpe 0:de9d1462a835 613 dy = dy_sym*dy;
dreschpe 0:de9d1462a835 614
dreschpe 0:de9d1462a835 615 dx_x2 = dx*2;
dreschpe 0:de9d1462a835 616 dy_x2 = dy*2;
dreschpe 0:de9d1462a835 617
dreschpe 0:de9d1462a835 618 if (dx >= dy) {
dreschpe 0:de9d1462a835 619 di = dy_x2 - dx;
dreschpe 0:de9d1462a835 620 while (x0 != x1) {
dreschpe 0:de9d1462a835 621
dreschpe 0:de9d1462a835 622 pixel(x0, y0, color);
dreschpe 0:de9d1462a835 623 x0 += dx_sym;
dreschpe 0:de9d1462a835 624 if (di<0) {
dreschpe 0:de9d1462a835 625 di += dy_x2;
dreschpe 0:de9d1462a835 626 } else {
dreschpe 0:de9d1462a835 627 di += dy_x2 - dx_x2;
dreschpe 0:de9d1462a835 628 y0 += dy_sym;
dreschpe 0:de9d1462a835 629 }
dreschpe 0:de9d1462a835 630 }
dreschpe 0:de9d1462a835 631 pixel(x0, y0, color);
dreschpe 0:de9d1462a835 632 } else {
dreschpe 0:de9d1462a835 633 di = dx_x2 - dy;
dreschpe 0:de9d1462a835 634 while (y0 != y1) {
dreschpe 0:de9d1462a835 635 pixel(x0, y0, color);
dreschpe 0:de9d1462a835 636 y0 += dy_sym;
dreschpe 0:de9d1462a835 637 if (di < 0) {
dreschpe 0:de9d1462a835 638 di += dx_x2;
dreschpe 0:de9d1462a835 639 } else {
dreschpe 0:de9d1462a835 640 di += dx_x2 - dy_x2;
dreschpe 0:de9d1462a835 641 x0 += dx_sym;
dreschpe 0:de9d1462a835 642 }
dreschpe 0:de9d1462a835 643 }
dreschpe 0:de9d1462a835 644 pixel(x0, y0, color);
dreschpe 0:de9d1462a835 645 }
dreschpe 0:de9d1462a835 646 return;
dreschpe 0:de9d1462a835 647 }
dreschpe 0:de9d1462a835 648
dreschpe 0:de9d1462a835 649
dreschpe 3:7f1d793b90df 650 void SPI_TFT::rect(int x0, int y0, int x1, int y1, int color)
dreschpe 3:7f1d793b90df 651 {
dreschpe 0:de9d1462a835 652
dreschpe 0:de9d1462a835 653 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 0:de9d1462a835 654 else hline(x1,x0,y0,color);
dreschpe 0:de9d1462a835 655
dreschpe 0:de9d1462a835 656 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 0:de9d1462a835 657 else vline(x0,y1,y0,color);
dreschpe 0:de9d1462a835 658
dreschpe 0:de9d1462a835 659 if (x1 > x0) hline(x0,x1,y1,color);
dreschpe 0:de9d1462a835 660 else hline(x1,x0,y1,color);
dreschpe 0:de9d1462a835 661
dreschpe 0:de9d1462a835 662 if (y1 > y0) vline(x1,y0,y1,color);
dreschpe 0:de9d1462a835 663 else vline(x1,y1,y0,color);
dreschpe 0:de9d1462a835 664
dreschpe 0:de9d1462a835 665 return;
dreschpe 0:de9d1462a835 666 }
dreschpe 0:de9d1462a835 667
dreschpe 0:de9d1462a835 668
dreschpe 0:de9d1462a835 669
dreschpe 3:7f1d793b90df 670 void SPI_TFT::fillrect(int x0, int y0, int x1, int y1, int color)
dreschpe 3:7f1d793b90df 671 {
dreschpe 0:de9d1462a835 672
dreschpe 0:de9d1462a835 673 int h = y1 - y0 + 1;
dreschpe 0:de9d1462a835 674 int w = x1 - x0 + 1;
dreschpe 0:de9d1462a835 675 int pixel = h * w;
dreschpe 0:de9d1462a835 676 int dma_count;
dreschpe 0:de9d1462a835 677 window(x0,y0,w,h);
dreschpe 0:de9d1462a835 678 wr_cmd(0x22);
dreschpe 1:17e12e4e149f 679 _cs = 0;
dreschpe 0:de9d1462a835 680 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 681 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 0:de9d1462a835 682 /* Enable SSP0 for DMA. */
dreschpe 0:de9d1462a835 683 LPC_SSP0->DMACR = 0x2;
dreschpe 0:de9d1462a835 684 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 685 LPC_SSP0->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 686 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 3:7f1d793b90df 687 } else {
dreschpe 0:de9d1462a835 688 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 0:de9d1462a835 689 /* Enable SSP1 for DMA. */
dreschpe 0:de9d1462a835 690 LPC_SSP1->DMACR = 0x2;
dreschpe 0:de9d1462a835 691 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 692 LPC_SSP1->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 693 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 0:de9d1462a835 694 }
dreschpe 0:de9d1462a835 695
dreschpe 0:de9d1462a835 696 do {
dreschpe 0:de9d1462a835 697 if (pixel > 4095) {
dreschpe 0:de9d1462a835 698 dma_count = 4095;
dreschpe 0:de9d1462a835 699 pixel = pixel - 4095;
dreschpe 0:de9d1462a835 700 } else {
dreschpe 0:de9d1462a835 701 dma_count = pixel;
dreschpe 0:de9d1462a835 702 pixel = 0;
dreschpe 0:de9d1462a835 703 }
dreschpe 0:de9d1462a835 704 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 0:de9d1462a835 705 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 0:de9d1462a835 706 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 0:de9d1462a835 707 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 0:de9d1462a835 708 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P ;
dreschpe 0:de9d1462a835 709 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 0:de9d1462a835 710 do {
dreschpe 0:de9d1462a835 711 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 0:de9d1462a835 712
dreschpe 0:de9d1462a835 713 } while (pixel > 0);
dreschpe 0:de9d1462a835 714
dreschpe 0:de9d1462a835 715 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 716 do {
dreschpe 0:de9d1462a835 717 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 718 } else {
dreschpe 0:de9d1462a835 719 do {
dreschpe 0:de9d1462a835 720 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 721 }
dreschpe 1:17e12e4e149f 722 _cs = 1;
dreschpe 0:de9d1462a835 723 WindowMax();
dreschpe 0:de9d1462a835 724 return;
dreschpe 0:de9d1462a835 725 }
dreschpe 0:de9d1462a835 726
dreschpe 0:de9d1462a835 727
dreschpe 3:7f1d793b90df 728 void SPI_TFT::locate(int x, int y)
dreschpe 3:7f1d793b90df 729 {
dreschpe 0:de9d1462a835 730 char_x = x;
dreschpe 0:de9d1462a835 731 char_y = y;
dreschpe 0:de9d1462a835 732 }
dreschpe 0:de9d1462a835 733
dreschpe 0:de9d1462a835 734
dreschpe 0:de9d1462a835 735
dreschpe 3:7f1d793b90df 736 int SPI_TFT::columns()
dreschpe 3:7f1d793b90df 737 {
dreschpe 0:de9d1462a835 738 return width() / font[1];
dreschpe 0:de9d1462a835 739 }
dreschpe 0:de9d1462a835 740
dreschpe 0:de9d1462a835 741
dreschpe 0:de9d1462a835 742
dreschpe 3:7f1d793b90df 743 int SPI_TFT::rows()
dreschpe 3:7f1d793b90df 744 {
dreschpe 0:de9d1462a835 745 return height() / font[2];
dreschpe 0:de9d1462a835 746 }
dreschpe 0:de9d1462a835 747
dreschpe 0:de9d1462a835 748
dreschpe 0:de9d1462a835 749
dreschpe 3:7f1d793b90df 750 int SPI_TFT::_putc(int value)
dreschpe 3:7f1d793b90df 751 {
dreschpe 0:de9d1462a835 752 if (value == '\n') { // new line
dreschpe 0:de9d1462a835 753 char_x = 0;
dreschpe 0:de9d1462a835 754 char_y = char_y + font[2];
dreschpe 0:de9d1462a835 755 if (char_y >= height() - font[2]) {
dreschpe 0:de9d1462a835 756 char_y = 0;
dreschpe 0:de9d1462a835 757 }
dreschpe 0:de9d1462a835 758 } else {
dreschpe 0:de9d1462a835 759 character(char_x, char_y, value);
dreschpe 0:de9d1462a835 760 }
dreschpe 0:de9d1462a835 761 return value;
dreschpe 0:de9d1462a835 762 }
dreschpe 0:de9d1462a835 763
dreschpe 0:de9d1462a835 764
dreschpe 0:de9d1462a835 765
dreschpe 0:de9d1462a835 766
dreschpe 3:7f1d793b90df 767 void SPI_TFT::character(int x, int y, int c)
dreschpe 3:7f1d793b90df 768 {
dreschpe 0:de9d1462a835 769 unsigned int hor,vert,offset,bpl,j,i,b,p;
dreschpe 0:de9d1462a835 770 unsigned char* zeichen;
dreschpe 0:de9d1462a835 771 unsigned char z,w;
dreschpe 0:de9d1462a835 772 unsigned int pixel;
dreschpe 0:de9d1462a835 773 unsigned int dma_count,dma_off;
dreschpe 0:de9d1462a835 774 uint16_t *buffer;
dreschpe 0:de9d1462a835 775
dreschpe 0:de9d1462a835 776 if ((c < 31) || (c > 127)) return; // test char range
dreschpe 0:de9d1462a835 777
dreschpe 0:de9d1462a835 778 // read font parameter from start of array
dreschpe 0:de9d1462a835 779 offset = font[0]; // bytes / char
dreschpe 0:de9d1462a835 780 hor = font[1]; // get hor size of font
dreschpe 0:de9d1462a835 781 vert = font[2]; // get vert size of font
dreschpe 0:de9d1462a835 782 bpl = font[3]; // bytes per line
dreschpe 0:de9d1462a835 783
dreschpe 0:de9d1462a835 784 if (char_x + hor > width()) {
dreschpe 0:de9d1462a835 785 char_x = 0;
dreschpe 0:de9d1462a835 786 char_y = char_y + vert;
dreschpe 0:de9d1462a835 787 if (char_y >= height() - font[2]) {
dreschpe 0:de9d1462a835 788 char_y = 0;
dreschpe 0:de9d1462a835 789 }
dreschpe 0:de9d1462a835 790 }
dreschpe 0:de9d1462a835 791 window(char_x, char_y,hor,vert); // char box
dreschpe 0:de9d1462a835 792 wr_cmd(0x22);
dreschpe 0:de9d1462a835 793
dreschpe 0:de9d1462a835 794 pixel = hor * vert; // calculate buffer size
dreschpe 0:de9d1462a835 795
dreschpe 0:de9d1462a835 796 buffer = (uint16_t *) malloc (2*pixel); // we need a buffer for the 16 bit
dreschpe 0:de9d1462a835 797 if (buffer == NULL) {
dreschpe 0:de9d1462a835 798 //led = 1;
dreschpe 0:de9d1462a835 799 //pc.printf("Malloc error !\n\r");
dreschpe 0:de9d1462a835 800 return; // error no memory
dreschpe 0:de9d1462a835 801 }
dreschpe 0:de9d1462a835 802
dreschpe 0:de9d1462a835 803 zeichen = &font[((c -32) * offset) + 4]; // start of char bitmap
dreschpe 0:de9d1462a835 804 w = zeichen[0]; // width of actual char
dreschpe 0:de9d1462a835 805 p = 0;
dreschpe 0:de9d1462a835 806 // construct the char into the buffer
dreschpe 0:de9d1462a835 807 for (j=0; j<vert; j++) { // vert line
dreschpe 0:de9d1462a835 808 for (i=0; i<hor; i++) { // horz line
dreschpe 0:de9d1462a835 809 z = zeichen[bpl * i + ((j & 0xF8) >> 3)+1];
dreschpe 0:de9d1462a835 810 b = 1 << (j & 0x07);
dreschpe 0:de9d1462a835 811 if (( z & b ) == 0x00) {
dreschpe 0:de9d1462a835 812 buffer[p] = _background;
dreschpe 0:de9d1462a835 813 } else {
dreschpe 0:de9d1462a835 814 buffer[p] = _foreground;
dreschpe 0:de9d1462a835 815 }
dreschpe 0:de9d1462a835 816 p++;
dreschpe 0:de9d1462a835 817 }
dreschpe 0:de9d1462a835 818 }
dreschpe 0:de9d1462a835 819
dreschpe 0:de9d1462a835 820
dreschpe 0:de9d1462a835 821 // copy the buffer with DMA SPI to display
dreschpe 0:de9d1462a835 822 dma_off = 0; // offset for DMA transfer
dreschpe 1:17e12e4e149f 823 _cs = 0;
dreschpe 0:de9d1462a835 824 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 825 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 0:de9d1462a835 826 /* Enable SSP0 for DMA. */
dreschpe 0:de9d1462a835 827 LPC_SSP0->DMACR = 0x2;
dreschpe 0:de9d1462a835 828 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 829 LPC_SSP0->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 830 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 0:de9d1462a835 831 } else {
dreschpe 0:de9d1462a835 832 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 0:de9d1462a835 833 /* Enable SSP1 for DMA. */
dreschpe 0:de9d1462a835 834 LPC_SSP1->DMACR = 0x2;
dreschpe 0:de9d1462a835 835 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 836 LPC_SSP1->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 837 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 0:de9d1462a835 838 }
dreschpe 0:de9d1462a835 839
dreschpe 0:de9d1462a835 840 // start DMA
dreschpe 0:de9d1462a835 841 do {
dreschpe 0:de9d1462a835 842 if (pixel > 4095) { // this is a giant font !
dreschpe 0:de9d1462a835 843 dma_count = 4095;
dreschpe 0:de9d1462a835 844 pixel = pixel - 4095;
dreschpe 0:de9d1462a835 845 } else {
dreschpe 0:de9d1462a835 846 dma_count = pixel;
dreschpe 0:de9d1462a835 847 pixel = 0;
dreschpe 0:de9d1462a835 848 }
dreschpe 0:de9d1462a835 849 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 0:de9d1462a835 850 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 0:de9d1462a835 851 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t) (buffer + dma_off);
dreschpe 0:de9d1462a835 852 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 0:de9d1462a835 853 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P ;
dreschpe 0:de9d1462a835 854 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 0:de9d1462a835 855 do {
dreschpe 0:de9d1462a835 856 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 0:de9d1462a835 857 dma_off = dma_off + dma_count;
dreschpe 0:de9d1462a835 858 } while (pixel > 0);
dreschpe 0:de9d1462a835 859
dreschpe 0:de9d1462a835 860 free ((uint16_t *) buffer);
dreschpe 0:de9d1462a835 861
dreschpe 0:de9d1462a835 862 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 863 do {
dreschpe 0:de9d1462a835 864 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 0:de9d1462a835 865 /* disable SSP0 for DMA. */
dreschpe 0:de9d1462a835 866 LPC_SSP0->DMACR = 0x0;
dreschpe 0:de9d1462a835 867 } else {
dreschpe 0:de9d1462a835 868 do {
dreschpe 0:de9d1462a835 869 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 0:de9d1462a835 870 /* disable SSP1 for DMA. */
dreschpe 0:de9d1462a835 871 LPC_SSP1->DMACR = 0x0;
dreschpe 0:de9d1462a835 872 }
dreschpe 1:17e12e4e149f 873 _cs = 1;
dreschpe 0:de9d1462a835 874 WindowMax();
dreschpe 0:de9d1462a835 875 if ((w + 2) < hor) { // x offset to next char
dreschpe 0:de9d1462a835 876 char_x += w + 2;
dreschpe 0:de9d1462a835 877 } else char_x += hor;
dreschpe 0:de9d1462a835 878
dreschpe 0:de9d1462a835 879 }
dreschpe 0:de9d1462a835 880
dreschpe 0:de9d1462a835 881
dreschpe 3:7f1d793b90df 882 void SPI_TFT::set_font(unsigned char* f)
dreschpe 3:7f1d793b90df 883 {
dreschpe 0:de9d1462a835 884 font = f;
dreschpe 0:de9d1462a835 885 }
dreschpe 0:de9d1462a835 886
dreschpe 0:de9d1462a835 887
dreschpe 0:de9d1462a835 888
dreschpe 3:7f1d793b90df 889 void SPI_TFT::Bitmap(unsigned int x, unsigned int y, unsigned int w, unsigned int h,unsigned char *bitmap)
dreschpe 3:7f1d793b90df 890 {
dreschpe 0:de9d1462a835 891 unsigned int j;
dreschpe 0:de9d1462a835 892 int padd;
dreschpe 0:de9d1462a835 893 unsigned short *bitmap_ptr = (unsigned short *)bitmap;
dreschpe 0:de9d1462a835 894 // the lines are padded to multiple of 4 bytes in a bitmap
dreschpe 0:de9d1462a835 895 padd = -1;
dreschpe 0:de9d1462a835 896 do {
dreschpe 0:de9d1462a835 897 padd ++;
dreschpe 0:de9d1462a835 898 } while (2*(w + padd)%4 != 0);
dreschpe 0:de9d1462a835 899 window(x, y, w, h);
dreschpe 0:de9d1462a835 900 wr_cmd(0x22);
dreschpe 1:17e12e4e149f 901 _cs = 0;
dreschpe 0:de9d1462a835 902 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 903 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 0:de9d1462a835 904 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 0:de9d1462a835 905 LPC_SSP0->DR = 0x72; // start Data
dreschpe 0:de9d1462a835 906 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 3:7f1d793b90df 907 /* Enable SSP0 for DMA. */
dreschpe 3:7f1d793b90df 908 LPC_SSP0->DMACR = 0x2;
dreschpe 3:7f1d793b90df 909
dreschpe 0:de9d1462a835 910 } else {
dreschpe 0:de9d1462a835 911 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 3:7f1d793b90df 912 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 3:7f1d793b90df 913 LPC_SSP1->DR = 0x72; // start Data command
dreschpe 3:7f1d793b90df 914 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 0:de9d1462a835 915 /* Enable SSP1 for DMA. */
dreschpe 0:de9d1462a835 916 LPC_SSP1->DMACR = 0x2;
dreschpe 3:7f1d793b90df 917
dreschpe 0:de9d1462a835 918 }
dreschpe 3:7f1d793b90df 919
dreschpe 0:de9d1462a835 920 bitmap_ptr += ((h - 1)* (w + padd));
dreschpe 0:de9d1462a835 921 for (j = 0; j < h; j++) { //Lines
dreschpe 0:de9d1462a835 922 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 0:de9d1462a835 923 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 0:de9d1462a835 924 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)bitmap_ptr;
dreschpe 0:de9d1462a835 925 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 0:de9d1462a835 926 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P ;
dreschpe 0:de9d1462a835 927 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 0:de9d1462a835 928 do {
dreschpe 0:de9d1462a835 929 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 0:de9d1462a835 930
dreschpe 0:de9d1462a835 931 bitmap_ptr -= w;
dreschpe 0:de9d1462a835 932 bitmap_ptr -= padd;
dreschpe 0:de9d1462a835 933 }
dreschpe 0:de9d1462a835 934
dreschpe 0:de9d1462a835 935 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 936 do {
dreschpe 0:de9d1462a835 937 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 938 } else {
dreschpe 0:de9d1462a835 939 do {
dreschpe 0:de9d1462a835 940 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 941 }
dreschpe 1:17e12e4e149f 942 _cs = 1;
dreschpe 0:de9d1462a835 943 WindowMax();
dreschpe 0:de9d1462a835 944 }
dreschpe 0:de9d1462a835 945
dreschpe 0:de9d1462a835 946
dreschpe 3:7f1d793b90df 947 int SPI_TFT::BMP_16(unsigned int x, unsigned int y, const char *Name_BMP)
dreschpe 3:7f1d793b90df 948 {
dreschpe 0:de9d1462a835 949
dreschpe 0:de9d1462a835 950 #define OffsetPixelWidth 18
dreschpe 0:de9d1462a835 951 #define OffsetPixelHeigh 22
dreschpe 0:de9d1462a835 952 #define OffsetFileSize 34
dreschpe 0:de9d1462a835 953 #define OffsetPixData 10
dreschpe 0:de9d1462a835 954 #define OffsetBPP 28
dreschpe 0:de9d1462a835 955
dreschpe 0:de9d1462a835 956 char filename[50];
dreschpe 0:de9d1462a835 957 unsigned char BMP_Header[54];
dreschpe 0:de9d1462a835 958 unsigned short BPP_t;
dreschpe 0:de9d1462a835 959 unsigned int PixelWidth,PixelHeigh,start_data;
dreschpe 0:de9d1462a835 960 unsigned int i,off;
dreschpe 0:de9d1462a835 961 int padd,j;
dreschpe 0:de9d1462a835 962 unsigned short *line;
dreschpe 0:de9d1462a835 963
dreschpe 0:de9d1462a835 964 // get the filename
dreschpe 0:de9d1462a835 965 LocalFileSystem local("local");
dreschpe 0:de9d1462a835 966 sprintf(&filename[0],"/local/");
dreschpe 0:de9d1462a835 967 i=7;
dreschpe 0:de9d1462a835 968 while (*Name_BMP!='\0') {
dreschpe 0:de9d1462a835 969 filename[i++]=*Name_BMP++;
dreschpe 0:de9d1462a835 970 }
dreschpe 0:de9d1462a835 971
dreschpe 0:de9d1462a835 972 fprintf(stderr, "filename : %s \n\r",filename);
dreschpe 0:de9d1462a835 973
dreschpe 3:7f1d793b90df 974 FILE *Image = fopen((const char *)&filename[0], "rb"); // open the bmp file
dreschpe 0:de9d1462a835 975 if (!Image) {
dreschpe 0:de9d1462a835 976 return(0); // error file not found !
dreschpe 0:de9d1462a835 977 }
dreschpe 0:de9d1462a835 978
dreschpe 0:de9d1462a835 979 fread(&BMP_Header[0],1,54,Image); // get the BMP Header
dreschpe 0:de9d1462a835 980
dreschpe 0:de9d1462a835 981 if (BMP_Header[0] != 0x42 || BMP_Header[1] != 0x4D) { // check magic byte
dreschpe 0:de9d1462a835 982 fclose(Image);
dreschpe 0:de9d1462a835 983 return(-1); // error no BMP file
dreschpe 0:de9d1462a835 984 }
dreschpe 0:de9d1462a835 985
dreschpe 0:de9d1462a835 986 BPP_t = BMP_Header[OffsetBPP] + (BMP_Header[OffsetBPP + 1] << 8);
dreschpe 0:de9d1462a835 987 if (BPP_t != 0x0010) {
dreschpe 0:de9d1462a835 988 fclose(Image);
dreschpe 0:de9d1462a835 989 return(-2); // error no 16 bit BMP
dreschpe 0:de9d1462a835 990 }
dreschpe 0:de9d1462a835 991
dreschpe 0:de9d1462a835 992 PixelHeigh = BMP_Header[OffsetPixelHeigh] + (BMP_Header[OffsetPixelHeigh + 1] << 8) + (BMP_Header[OffsetPixelHeigh + 2] << 16) + (BMP_Header[OffsetPixelHeigh + 3] << 24);
dreschpe 0:de9d1462a835 993 PixelWidth = BMP_Header[OffsetPixelWidth] + (BMP_Header[OffsetPixelWidth + 1] << 8) + (BMP_Header[OffsetPixelWidth + 2] << 16) + (BMP_Header[OffsetPixelWidth + 3] << 24);
dreschpe 0:de9d1462a835 994 if (PixelHeigh > height() + y || PixelWidth > width() + x) {
dreschpe 0:de9d1462a835 995 fclose(Image);
dreschpe 0:de9d1462a835 996 return(-3); // to big
dreschpe 0:de9d1462a835 997 }
dreschpe 0:de9d1462a835 998
dreschpe 0:de9d1462a835 999 start_data = BMP_Header[OffsetPixData] + (BMP_Header[OffsetPixData + 1] << 8) + (BMP_Header[OffsetPixData + 2] << 16) + (BMP_Header[OffsetPixData + 3] << 24);
dreschpe 3:7f1d793b90df 1000
dreschpe 0:de9d1462a835 1001 line = (unsigned short *) malloc (2 * PixelWidth); // we need a buffer for a line
dreschpe 0:de9d1462a835 1002 if (line == NULL) {
dreschpe 0:de9d1462a835 1003 return(-4); // error no memory
dreschpe 0:de9d1462a835 1004 }
dreschpe 0:de9d1462a835 1005
dreschpe 0:de9d1462a835 1006 // the bmp lines are padded to multiple of 4 bytes
dreschpe 0:de9d1462a835 1007 padd = -1;
dreschpe 0:de9d1462a835 1008 do {
dreschpe 0:de9d1462a835 1009 padd ++;
dreschpe 0:de9d1462a835 1010 } while ((PixelWidth * 2 + padd)%4 != 0);
dreschpe 0:de9d1462a835 1011
dreschpe 3:7f1d793b90df 1012
dreschpe 3:7f1d793b90df 1013 pc.printf("width = %d \n\r",PixelWidth);
dreschpe 3:7f1d793b90df 1014 pc.printf("heigh = %d \n\r",PixelHeigh);
dreschpe 3:7f1d793b90df 1015 pc.printf("padd = %d \n\r",padd);
dreschpe 3:7f1d793b90df 1016 pc.printf("start = 0x%x \n\r",start_data);
dreschpe 3:7f1d793b90df 1017
dreschpe 3:7f1d793b90df 1018 //fseek(Image, 70 ,SEEK_SET);
dreschpe 3:7f1d793b90df 1019 window(x, y,PixelWidth ,PixelHeigh);
dreschpe 0:de9d1462a835 1020 wr_cmd(0x22);
dreschpe 1:17e12e4e149f 1021 _cs = 0;
dreschpe 3:7f1d793b90df 1022
dreschpe 3:7f1d793b90df 1023 if (spi_port == 0) { // TFT on SSP0
dreschpe 3:7f1d793b90df 1024 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 3:7f1d793b90df 1025 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 3:7f1d793b90df 1026 LPC_SSP0->DR = 0x72; // start Data
dreschpe 3:7f1d793b90df 1027 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 3:7f1d793b90df 1028 /* Enable SSP0 for DMA. */
dreschpe 3:7f1d793b90df 1029 LPC_SSP0->DMACR = 0x2;
dreschpe 3:7f1d793b90df 1030
dreschpe 3:7f1d793b90df 1031 } else {
dreschpe 3:7f1d793b90df 1032 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 3:7f1d793b90df 1033 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 3:7f1d793b90df 1034 LPC_SSP1->DR = 0x72; // start Data
dreschpe 3:7f1d793b90df 1035 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 3:7f1d793b90df 1036 /* Enable SSP1 for DMA. */
dreschpe 3:7f1d793b90df 1037 LPC_SSP1->DMACR = 0x2;
dreschpe 3:7f1d793b90df 1038 }
dreschpe 0:de9d1462a835 1039 for (j = PixelHeigh - 1; j >= 0; j--) { //Lines bottom up
dreschpe 3:7f1d793b90df 1040 off = j * (PixelWidth * 2 + padd) + start_data; // start of line
dreschpe 0:de9d1462a835 1041 fseek(Image, off ,SEEK_SET);
dreschpe 0:de9d1462a835 1042 fread(line,1,PixelWidth * 2,Image); // read a line - slow !
dreschpe 0:de9d1462a835 1043
dreschpe 0:de9d1462a835 1044 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 0:de9d1462a835 1045 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 0:de9d1462a835 1046 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)line;
dreschpe 0:de9d1462a835 1047 LPC_GPDMACH0->DMACCControl = PixelWidth | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 0:de9d1462a835 1048 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P ;
dreschpe 0:de9d1462a835 1049 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 0:de9d1462a835 1050 do {
dreschpe 0:de9d1462a835 1051 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 0:de9d1462a835 1052
dreschpe 0:de9d1462a835 1053 }
dreschpe 0:de9d1462a835 1054
dreschpe 0:de9d1462a835 1055 if (spi_port == 0) { // TFT on SSP0
dreschpe 0:de9d1462a835 1056 do {
dreschpe 0:de9d1462a835 1057 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 1058 } else {
dreschpe 0:de9d1462a835 1059 do {
dreschpe 0:de9d1462a835 1060 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 0:de9d1462a835 1061 }
dreschpe 1:17e12e4e149f 1062 _cs = 1;
dreschpe 0:de9d1462a835 1063 free (line);
dreschpe 0:de9d1462a835 1064 fclose(Image);
dreschpe 0:de9d1462a835 1065 WindowMax();
dreschpe 0:de9d1462a835 1066 return(1);
dreschpe 0:de9d1462a835 1067 }