Fork to support REVB hardware.
Dependents: C027_BootTest_revb C027_EthernetSniffTest C027_M3_SerialEcho C027_HelloWorld_revb ... more
Fork of C027 by
C027_PinNames.h@8:a356376db984, 2013-11-05 (annotated)
- Committer:
- mazgch
- Date:
- Tue Nov 05 21:41:46 2013 +0000
- Revision:
- 8:a356376db984
- Parent:
- 4:7f910a8e77ee
- Child:
- 9:7e038529bfff
updating the support library
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mazgch | 0:76bb2733db5d | 1 | /* Platform header file, for the u-blox C27-C20/U20/G35 |
mazgch | 0:76bb2733db5d | 2 | * mbed Internet of Things Starter Kit |
mazgch | 2:b7bd3660ff64 | 3 | * http://mbed.org/platforms/u-blox-C027/ |
mazgch | 0:76bb2733db5d | 4 | * |
mazgch | 0:76bb2733db5d | 5 | * Defines for pin connections of the LPC1768 |
mazgch | 0:76bb2733db5d | 6 | */ |
mazgch | 0:76bb2733db5d | 7 | |
mazgch | 0:76bb2733db5d | 8 | #pragma once |
mazgch | 0:76bb2733db5d | 9 | |
mazgch | 0:76bb2733db5d | 10 | // u-blox MAX-7Q GPS/GLONASS receiver |
mazgch | 4:7f910a8e77ee | 11 | // http://www.u-blox.com/gps-modules.html |
mazgch | 0:76bb2733db5d | 12 | // ----------------------------------------------------------- |
mazgch | 0:76bb2733db5d | 13 | // I2C (shared with LISA/SARA) |
mazgch | 0:76bb2733db5d | 14 | #define GPSSDA (P0_27) |
mazgch | 0:76bb2733db5d | 15 | #define GPSSCL (P0_28) |
mazgch | 2:b7bd3660ff64 | 16 | #define GPSADR (66<<1) // GPS I2C Address |
mazgch | 0:76bb2733db5d | 17 | // UART |
mazgch | 0:76bb2733db5d | 18 | #define GPSTXD (P0_10) |
mazgch | 0:76bb2733db5d | 19 | #define GPSRXD (P0_11) |
mazgch | 0:76bb2733db5d | 20 | #define GPSBAUD 9600 // Default GPS Baud Rate |
mazgch | 0:76bb2733db5d | 21 | // Control |
mazgch | 0:76bb2733db5d | 22 | #define GPSRST (P1_18) // Reset (input to GPS, active low) |
mazgch | 0:76bb2733db5d | 23 | #define GPSPPS (P1_19) // 1PPS Timepulse (output from GPS) |
mazgch | 0:76bb2733db5d | 24 | #define GPSINT (P1_22) // Interrupt (input to GPS) |
mazgch | 0:76bb2733db5d | 25 | #define GPSEN (P1_29) // Supply Control (high = enabled) |
mazgch | 0:76bb2733db5d | 26 | |
mazgch | 0:76bb2733db5d | 27 | // u-blox LISA/SARA cellular modem |
mazgch | 4:7f910a8e77ee | 28 | // http://www.u-blox.com/wireless-modules.html |
mazgch | 0:76bb2733db5d | 29 | // ----------------------------------------------------------- |
mazgch | 0:76bb2733db5d | 30 | // UART (LPC1768 = DTE, LISA/SARA = DCE) |
mazgch | 0:76bb2733db5d | 31 | #define MDMTXD (P0_15) // Transmit Data |
mazgch | 0:76bb2733db5d | 32 | #define MDMRXD (P0_16) // Receive Data |
mazgch | 0:76bb2733db5d | 33 | #define MDMCTS (P0_17) // Clear to Send |
mazgch | 0:76bb2733db5d | 34 | #define MDMDCD (P0_18) // Data Carrier Detect |
mazgch | 0:76bb2733db5d | 35 | #define MDMDSR (P0_19) // Data Set Ready |
mazgch | 0:76bb2733db5d | 36 | #define MDMDTR (P0_20) // Data Terminal Ready (set high or use handshake) |
mazgch | 0:76bb2733db5d | 37 | #define MDMRI (P0_21) // Ring Indicator |
mazgch | 0:76bb2733db5d | 38 | #define MDMRTS (P0_22) // Request to Send (set high or use handshake) |
mazgch | 0:76bb2733db5d | 39 | #define MDMBAUD 115200 // Default Modem Baud Rate |
mazgch | 0:76bb2733db5d | 40 | // USB (not available on C27-G35) |
mazgch | 0:76bb2733db5d | 41 | #define MDMUSBDP (P0_29) // USB D+ |
mazgch | 0:76bb2733db5d | 42 | #define MDMUSBDN (P0_30) // USB D- |
mazgch | 0:76bb2733db5d | 43 | #define MDMUSBCON (P2_9) // USB Connect |
mazgch | 8:a356376db984 | 44 | #define MDMUSBDET (P0_7) // USB Detect (n/a on REV.A board) |
mazgch | 0:76bb2733db5d | 45 | // Control |
mazgch | 0:76bb2733db5d | 46 | #define MDMEN (P2_5) // Supply Control (high = enabled) |
mazgch | 0:76bb2733db5d | 47 | #define MDMPWRON (P2_6) // |
mazgch | 0:76bb2733db5d | 48 | #define MDMGPIO1 (P2_7) // GPIO1, Network status |
mazgch | 0:76bb2733db5d | 49 | #define MDMRST (P2_8) // Reset (active low, set as open drain!) |
mazgch | 8:a356376db984 | 50 | #define MDMLVLOE (P0_8) // Serial/GPIO Level Shifter Output Enable (n/a on REV.A board) |
mazgch | 0:76bb2733db5d | 51 | |
mazgch | 0:76bb2733db5d | 52 | // PIN header connector |
mazgch | 0:76bb2733db5d | 53 | // for standard-based form factor with expansion board |
mazgch | 0:76bb2733db5d | 54 | // ----------------------------------------------------------- |
mazgch | 0:76bb2733db5d | 55 | // PMW = Pulswidth Modulator |
mazgch | 0:76bb2733db5d | 56 | // EINT = External Interrupt |
mazgch | 0:76bb2733db5d | 57 | // AOUT = Analog Output |
mazgch | 0:76bb2733db5d | 58 | |
mazgch | 0:76bb2733db5d | 59 | // Analog Ports (A0-A5) |
mazgch | 0:76bb2733db5d | 60 | #define A0 (P0_23) // I2S_CLK |
mazgch | 0:76bb2733db5d | 61 | #define A1 (P0_24) // I2S_WS |
mazgch | 0:76bb2733db5d | 62 | #define A2 (P0_25) // I2S_SDA |
mazgch | 0:76bb2733db5d | 63 | #define A3 (P0_26) // AOUT |
mazgch | 0:76bb2733db5d | 64 | #define A4 (P1_30) // |
mazgch | 0:76bb2733db5d | 65 | #define A5 (P1_31) // |
mazgch | 0:76bb2733db5d | 66 | // Digital Port (D0-D7) |
mazgch | 0:76bb2733db5d | 67 | #define D0 (P4_29) // TXD |
mazgch | 0:76bb2733db5d | 68 | #define D1 (P4_28) // RXD |
mazgch | 0:76bb2733db5d | 69 | #define D2 (P2_13) // EINT |
mazgch | 0:76bb2733db5d | 70 | #define D3 (P2_0) // PWM |
mazgch | 0:76bb2733db5d | 71 | #define D4 (P2_12) // EINT |
mazgch | 0:76bb2733db5d | 72 | #define D5 (P2_1) // PWM |
mazgch | 0:76bb2733db5d | 73 | #define D6 (P2_2) // PWM |
mazgch | 0:76bb2733db5d | 74 | #define D7 (P2_11) // EINT |
mazgch | 0:76bb2733db5d | 75 | // Digital Port (D8-D13) |
mazgch | 0:76bb2733db5d | 76 | #define D8 (P2_4) // PWM |
mazgch | 0:76bb2733db5d | 77 | #define D9 (P2_3) // PWM |
mazgch | 0:76bb2733db5d | 78 | #define D10 (P1_21) // PWM SSEL |
mazgch | 0:76bb2733db5d | 79 | #define D11 (P1_24) // PWM MOSI |
mazgch | 0:76bb2733db5d | 80 | #define D12 (P1_23) // PWM MISO |
mazgch | 0:76bb2733db5d | 81 | #define D13 (P1_20) // PWM SCK |
mazgch | 0:76bb2733db5d | 82 | // GND |
mazgch | 0:76bb2733db5d | 83 | // AREF |
mazgch | 0:76bb2733db5d | 84 | #define SDA (P0_0) |
mazgch | 0:76bb2733db5d | 85 | #define SCL (P0_1) |
mazgch | 0:76bb2733db5d | 86 | |
mazgch | 8:a356376db984 | 87 | // LED |
mazgch | 8:a356376db984 | 88 | // ----------------------------------------------------------- |
mazgch | 8:a356376db984 | 89 | #define LED (P3_25) // RED LED (n/a on REV.A board) |
mazgch | 8:a356376db984 | 90 | |
mazgch | 0:76bb2733db5d | 91 | // CAN (TJA1040) |
mazgch | 0:76bb2733db5d | 92 | // ----------------------------------------------------------- |
mazgch | 0:76bb2733db5d | 93 | #define CANRD (P0_4) |
mazgch | 0:76bb2733db5d | 94 | #define CANTD (P0_5) |
mazgch | 0:76bb2733db5d | 95 | #define CANS (P0_6) // standby (low=normal, high=standby/rxonly) |
mazgch | 0:76bb2733db5d | 96 | |
mazgch | 0:76bb2733db5d | 97 | // Ethernet (DP83848) |
mazgch | 0:76bb2733db5d | 98 | // ----------------------------------------------------------- |
mazgch | 0:76bb2733db5d | 99 | #define ETHTXD0 (P1_0) |
mazgch | 0:76bb2733db5d | 100 | #define ETHTXD1 (P1_1) |
mazgch | 0:76bb2733db5d | 101 | #define ETHTXEN (P1_4) |
mazgch | 0:76bb2733db5d | 102 | #define ETHCRS (P1_8) |
mazgch | 0:76bb2733db5d | 103 | #define ETHRXD0 (P1_9) |
mazgch | 0:76bb2733db5d | 104 | #define ETHRXD1 (P1_10) |
mazgch | 0:76bb2733db5d | 105 | #define ETHRXEN (P1_14) |
mazgch | 0:76bb2733db5d | 106 | #define ETHREFCLK (P1_15) |
mazgch | 0:76bb2733db5d | 107 | #define ETHMDC (P1_16) |
mazgch | 0:76bb2733db5d | 108 | #define ETHMDIO (P1_17) |
mazgch | 0:76bb2733db5d | 109 | #define ETHOSCEN (P1_27) |
mazgch | 0:76bb2733db5d | 110 | #define ETHRST (P1_28) |
mazgch | 0:76bb2733db5d | 111 | #define ETHLINK (P1_25) // LED_LINK |
mazgch | 0:76bb2733db5d | 112 | #define ETHSPEED (P1_26) // LED_SPEED |
mazgch | 0:76bb2733db5d | 113 | |
mazgch | 0:76bb2733db5d | 114 | // mbed / debug IF (LPC11) |
mazgch | 0:76bb2733db5d | 115 | // ----------------------------------------------------------- |
mazgch | 0:76bb2733db5d | 116 | // Serial Port |
mazgch | 1:4a3bc6c3f1d0 | 117 | #define USBTXD (P0_2) // identical USBTX |
mazgch | 1:4a3bc6c3f1d0 | 118 | #define USBRXD (P0_3) // identical USBRX |
mazgch | 0:76bb2733db5d | 119 | // ISP port |
mazgch | 0:76bb2733db5d | 120 | #define ISP (P2_10) |
mazgch | 0:76bb2733db5d | 121 | |
mazgch | 0:76bb2733db5d | 122 | // Reserved / NC pins |
mazgch | 0:76bb2733db5d | 123 | // ----------------------------------------------------------- |
mazgch | 8:a356376db984 | 124 | #define RSVD1 (P0_9) |
mazgch | 8:a356376db984 | 125 | #define RSVD2 (P3_26) |