Library for interfacing with the AMICCOM A7105 2.4GHz FSK/GFSK Transceiver.
A7105.cpp@7:1b1d7e446aa4, 2015-01-01 (annotated)
- Committer:
- d34d
- Date:
- Thu Jan 01 19:29:49 2015 +0000
- Revision:
- 7:1b1d7e446aa4
- Parent:
- 6:44b04880717b
- Child:
- 8:033e328fb7c3
Add inline functions for asserting and deasserting the chip select.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
d34d | 0:212eb977fe10 | 1 | #include "mbed.h" |
d34d | 4:ca02a935e8eb | 2 | #include "A7105.h" |
d34d | 0:212eb977fe10 | 3 | |
d34d | 0:212eb977fe10 | 4 | A7105::A7105(PinName mosi, PinName miso, PinName clk, PinName cs, uint32_t freqHz) : |
d34d | 4:ca02a935e8eb | 5 | _spi(mosi, miso, clk), _cs(cs) { |
d34d | 4:ca02a935e8eb | 6 | _spi.frequency(freqHz); |
d34d | 0:212eb977fe10 | 7 | // Chip select is active low so set it to high until we are ready |
d34d | 4:ca02a935e8eb | 8 | _cs = 1; |
d34d | 0:212eb977fe10 | 9 | } |
d34d | 0:212eb977fe10 | 10 | |
d34d | 0:212eb977fe10 | 11 | A7105::~A7105() {} |
d34d | 0:212eb977fe10 | 12 | |
d34d | 0:212eb977fe10 | 13 | uint8_t A7105::writeRegister(uint8_t regAddr, uint8_t value) { |
d34d | 0:212eb977fe10 | 14 | // assert CS |
d34d | 7:1b1d7e446aa4 | 15 | assertChipSelect(); |
d34d | 2:35a860dbaba5 | 16 | // write register |
d34d | 4:ca02a935e8eb | 17 | _spi.write(regAddr); |
d34d | 0:212eb977fe10 | 18 | // write value into register |
d34d | 4:ca02a935e8eb | 19 | uint8_t ret = _spi.write(value); |
d34d | 0:212eb977fe10 | 20 | // de-assert CS |
d34d | 7:1b1d7e446aa4 | 21 | deassertChipSelect(); |
d34d | 0:212eb977fe10 | 22 | |
d34d | 0:212eb977fe10 | 23 | return ret; |
d34d | 0:212eb977fe10 | 24 | } |
d34d | 0:212eb977fe10 | 25 | |
d34d | 0:212eb977fe10 | 26 | uint8_t A7105::readRegister(uint8_t regAddr) { |
d34d | 0:212eb977fe10 | 27 | // assert CS |
d34d | 7:1b1d7e446aa4 | 28 | assertChipSelect(); |
d34d | 0:212eb977fe10 | 29 | // write register and read value |
d34d | 6:44b04880717b | 30 | _spi.write(_READ(regAddr)); |
d34d | 6:44b04880717b | 31 | uint8_t ret = _spi.write(0); |
d34d | 0:212eb977fe10 | 32 | // de-assert CS |
d34d | 7:1b1d7e446aa4 | 33 | deassertChipSelect(); |
d34d | 3:cd7f899f155f | 34 | |
d34d | 3:cd7f899f155f | 35 | return ret; |
d34d | 3:cd7f899f155f | 36 | } |
d34d | 3:cd7f899f155f | 37 | |
d34d | 3:cd7f899f155f | 38 | uint8_t A7105::strobe(enum A7105_State state) { |
d34d | 3:cd7f899f155f | 39 | // assert CS |
d34d | 7:1b1d7e446aa4 | 40 | assertChipSelect(); |
d34d | 3:cd7f899f155f | 41 | // write strobe command |
d34d | 4:ca02a935e8eb | 42 | uint8_t ret = _spi.write(state); |
d34d | 3:cd7f899f155f | 43 | // de-assert CS |
d34d | 7:1b1d7e446aa4 | 44 | deassertChipSelect(); |
d34d | 0:212eb977fe10 | 45 | |
d34d | 0:212eb977fe10 | 46 | return ret; |
d34d | 0:212eb977fe10 | 47 | } |
d34d | 0:212eb977fe10 | 48 | |
d34d | 3:cd7f899f155f | 49 | void A7105::writeData(uint8_t* data, size_t len) { |
d34d | 3:cd7f899f155f | 50 | // assert CS |
d34d | 7:1b1d7e446aa4 | 51 | assertChipSelect(); |
d34d | 4:ca02a935e8eb | 52 | _spi.write(A7105_RST_WRPTR); |
d34d | 4:ca02a935e8eb | 53 | _spi.write(A7105_05_FIFO_DATA); |
d34d | 3:cd7f899f155f | 54 | for (size_t i = 0; i < len; i++) { |
d34d | 4:ca02a935e8eb | 55 | _spi.write(data[i]); |
d34d | 3:cd7f899f155f | 56 | } |
d34d | 3:cd7f899f155f | 57 | |
d34d | 3:cd7f899f155f | 58 | // de-assert CS |
d34d | 7:1b1d7e446aa4 | 59 | deassertChipSelect(); |
d34d | 3:cd7f899f155f | 60 | } |
d34d | 3:cd7f899f155f | 61 | |
d34d | 3:cd7f899f155f | 62 | void A7105::readData(uint8_t* buffer, size_t len) { |
d34d | 3:cd7f899f155f | 63 | strobe(A7105_RST_RDPTR); |
d34d | 3:cd7f899f155f | 64 | for (size_t i = 0; i < len; i++) { |
d34d | 3:cd7f899f155f | 65 | buffer[i] = readRegister(A7105_05_FIFO_DATA); |
d34d | 3:cd7f899f155f | 66 | } |
d34d | 3:cd7f899f155f | 67 | } |
d34d | 3:cd7f899f155f | 68 | |
d34d | 3:cd7f899f155f | 69 | void A7105::setId(uint32_t id) { |
d34d | 3:cd7f899f155f | 70 | // assert CS |
d34d | 7:1b1d7e446aa4 | 71 | assertChipSelect(); |
d34d | 4:ca02a935e8eb | 72 | _spi.write(A7105_06_ID_DATA); |
d34d | 4:ca02a935e8eb | 73 | _spi.write((uint8_t)(id >> 24) & 0xFF); |
d34d | 4:ca02a935e8eb | 74 | _spi.write((uint8_t)(id >> 16) & 0xFF); |
d34d | 4:ca02a935e8eb | 75 | _spi.write((uint8_t)(id >> 8) & 0xFF); |
d34d | 4:ca02a935e8eb | 76 | _spi.write((uint8_t)id & 0xFF); |
d34d | 3:cd7f899f155f | 77 | // de-assert CS |
d34d | 7:1b1d7e446aa4 | 78 | deassertChipSelect(); |
d34d | 3:cd7f899f155f | 79 | } |
d34d | 3:cd7f899f155f | 80 | |
d34d | 3:cd7f899f155f | 81 | void A7105::setPower(int32_t power) { |
d34d | 3:cd7f899f155f | 82 | /* |
d34d | 3:cd7f899f155f | 83 | Power amp is ~+16dBm so: |
d34d | 3:cd7f899f155f | 84 | TXPOWER_100uW = -23dBm == PAC=0 TBG=0 |
d34d | 3:cd7f899f155f | 85 | TXPOWER_300uW = -20dBm == PAC=0 TBG=1 |
d34d | 3:cd7f899f155f | 86 | TXPOWER_1mW = -16dBm == PAC=0 TBG=2 |
d34d | 3:cd7f899f155f | 87 | TXPOWER_3mW = -11dBm == PAC=0 TBG=4 |
d34d | 3:cd7f899f155f | 88 | TXPOWER_10mW = -6dBm == PAC=1 TBG=5 |
d34d | 3:cd7f899f155f | 89 | TXPOWER_30mW = 0dBm == PAC=2 TBG=7 |
d34d | 3:cd7f899f155f | 90 | TXPOWER_100mW = 1dBm == PAC=3 TBG=7 |
d34d | 3:cd7f899f155f | 91 | TXPOWER_150mW = 1dBm == PAC=3 TBG=7 |
d34d | 3:cd7f899f155f | 92 | */ |
d34d | 3:cd7f899f155f | 93 | uint8_t pac, tbg; |
d34d | 3:cd7f899f155f | 94 | switch(power) { |
d34d | 3:cd7f899f155f | 95 | case 0: pac = 0; tbg = 0; break; |
d34d | 3:cd7f899f155f | 96 | case 1: pac = 0; tbg = 1; break; |
d34d | 3:cd7f899f155f | 97 | case 2: pac = 0; tbg = 2; break; |
d34d | 3:cd7f899f155f | 98 | case 3: pac = 0; tbg = 4; break; |
d34d | 3:cd7f899f155f | 99 | case 4: pac = 1; tbg = 5; break; |
d34d | 3:cd7f899f155f | 100 | case 5: pac = 2; tbg = 7; break; |
d34d | 3:cd7f899f155f | 101 | case 6: pac = 3; tbg = 7; break; |
d34d | 3:cd7f899f155f | 102 | case 7: pac = 3; tbg = 7; break; |
d34d | 3:cd7f899f155f | 103 | default: pac = 0; tbg = 0; break; |
d34d | 3:cd7f899f155f | 104 | }; |
d34d | 3:cd7f899f155f | 105 | writeRegister(A7105_28_TX_TEST, (pac << 3) | tbg); |
d34d | 3:cd7f899f155f | 106 | } |
d34d | 3:cd7f899f155f | 107 | |
d34d | 3:cd7f899f155f | 108 | void A7105::setTxRxMode(enum TXRX_State mode) { |
d34d | 3:cd7f899f155f | 109 | if(mode == TX_EN) { |
d34d | 3:cd7f899f155f | 110 | writeRegister(A7105_0B_GPIO1_PIN_I, 0x33); |
d34d | 3:cd7f899f155f | 111 | writeRegister(A7105_0C_GPIO2_PIN_II, 0x31); |
d34d | 3:cd7f899f155f | 112 | } else if (mode == RX_EN) { |
d34d | 3:cd7f899f155f | 113 | writeRegister(A7105_0B_GPIO1_PIN_I, 0x31); |
d34d | 3:cd7f899f155f | 114 | writeRegister(A7105_0C_GPIO2_PIN_II, 0x33); |
d34d | 3:cd7f899f155f | 115 | } else { |
d34d | 3:cd7f899f155f | 116 | //The A7105 seems to some with a cross-wired power-amp (A7700) |
d34d | 3:cd7f899f155f | 117 | //On the XL7105-D03, TX_EN -> RXSW and RX_EN -> TXSW |
d34d | 3:cd7f899f155f | 118 | //This means that sleep mode is wired as RX_EN = 1 and TX_EN = 1 |
d34d | 3:cd7f899f155f | 119 | //If there are other amps in use, we'll need to fix this |
d34d | 3:cd7f899f155f | 120 | writeRegister(A7105_0B_GPIO1_PIN_I, 0x33); |
d34d | 3:cd7f899f155f | 121 | writeRegister(A7105_0C_GPIO2_PIN_II, 0x33); |
d34d | 3:cd7f899f155f | 122 | } |
d34d | 3:cd7f899f155f | 123 | } |
d34d | 3:cd7f899f155f | 124 | |
d34d | 3:cd7f899f155f | 125 | int8_t A7105::reset() { |
d34d | 3:cd7f899f155f | 126 | writeRegister(A7105_00_MODE, 0x00); |
d34d | 3:cd7f899f155f | 127 | wait_us(1000); |
d34d | 3:cd7f899f155f | 128 | |
d34d | 3:cd7f899f155f | 129 | // Set both GPIO as output and low |
d34d | 3:cd7f899f155f | 130 | setTxRxMode(TXRX_OFF); |
d34d | 3:cd7f899f155f | 131 | int8_t result = readRegister(A7105_10_PLL_II) == 0x9E; |
d34d | 3:cd7f899f155f | 132 | strobe(A7105_STANDBY); |
d34d | 3:cd7f899f155f | 133 | |
d34d | 3:cd7f899f155f | 134 | return result; |
d34d | 0:212eb977fe10 | 135 | } |