Clark Scheff / A7105TxRx

Library for interfacing with the AMICCOM A7105 2.4GHz FSK/GFSK Transceiver.

Dependents:   HubsanTX

a7105txrx.cpp@0:212eb977fe10, 2014-09-01 (annotated)

Committer:
d34d
Date:
Mon Sep 01 19:38:06 2014 +0000
Revision:
0:212eb977fe10
Child:
2:35a860dbaba5
Initial commit since we gotta start somewhere.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
d34d 0:212eb977fe10 1 #include "mbed.h"
d34d 0:212eb977fe10 2 #include "a7105txrx.h"
d34d 0:212eb977fe10 3
d34d 0:212eb977fe10 4 A7105::A7105(PinName mosi, PinName miso, PinName clk, PinName cs, uint32_t freqHz) :
d34d 0:212eb977fe10 5 mSpiMaster(mosi, miso, clk), mChipSelect(cs) {
d34d 0:212eb977fe10 6 mSpiMaster.frequency(freqHz);
d34d 0:212eb977fe10 7 // Chip select is active low so set it to high until we are ready
d34d 0:212eb977fe10 8 mChipSelect = 1;
d34d 0:212eb977fe10 9 }
d34d 0:212eb977fe10 10
d34d 0:212eb977fe10 11 A7105::~A7105() {}
d34d 0:212eb977fe10 12
d34d 0:212eb977fe10 13 uint8_t A7105::writeRegister(uint8_t regAddr, uint8_t value) {
d34d 0:212eb977fe10 14 // assert CS
d34d 0:212eb977fe10 15 mChipSelect = 0;
d34d 0:212eb977fe10 16 // write register, most significant bit should be one to indicate a write
d34d 0:212eb977fe10 17 mSpiMaster.write(regAddr | 0x80);
d34d 0:212eb977fe10 18 // write value into register
d34d 0:212eb977fe10 19 uint8_t ret = mSpiMaster.write(value);
d34d 0:212eb977fe10 20 // de-assert CS
d34d 0:212eb977fe10 21 mChipSelect = 1;
d34d 0:212eb977fe10 22
d34d 0:212eb977fe10 23 return ret;
d34d 0:212eb977fe10 24 }
d34d 0:212eb977fe10 25
d34d 0:212eb977fe10 26 uint8_t A7105::readRegister(uint8_t regAddr) {
d34d 0:212eb977fe10 27 // assert CS
d34d 0:212eb977fe10 28 mChipSelect = 0;
d34d 0:212eb977fe10 29 // write register and read value
d34d 0:212eb977fe10 30 uint8_t ret = mSpiMaster.write(regAddr);
d34d 0:212eb977fe10 31 // de-assert CS
d34d 0:212eb977fe10 32 mChipSelect = 1;
d34d 0:212eb977fe10 33
d34d 0:212eb977fe10 34 return ret;
d34d 0:212eb977fe10 35 }
d34d 0:212eb977fe10 36
d34d 0:212eb977fe10 37 uint8_t A7105::reset() {
d34d 0:212eb977fe10 38 return writeRegister(MODE, 0x00);
d34d 0:212eb977fe10 39 }