Clark Scheff / A7105TxRx

Library for interfacing with the AMICCOM A7105 2.4GHz FSK/GFSK Transceiver.

Dependents:   HubsanTX

A7105.cpp@6:44b04880717b, 2015-01-01 (annotated)

Committer:
d34d
Date:
Thu Jan 01 19:23:08 2015 +0000
Revision:
6:44b04880717b
Parent:
4:ca02a935e8eb
Child:
7:1b1d7e446aa4
Need to read value after sending the register address.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
d34d 0:212eb977fe10 1 #include "mbed.h"
d34d 4:ca02a935e8eb 2 #include "A7105.h"
d34d 0:212eb977fe10 3
d34d 0:212eb977fe10 4 A7105::A7105(PinName mosi, PinName miso, PinName clk, PinName cs, uint32_t freqHz) :
d34d 4:ca02a935e8eb 5 _spi(mosi, miso, clk), _cs(cs) {
d34d 4:ca02a935e8eb 6 _spi.frequency(freqHz);
d34d 0:212eb977fe10 7 // Chip select is active low so set it to high until we are ready
d34d 4:ca02a935e8eb 8 _cs = 1;
d34d 0:212eb977fe10 9 }
d34d 0:212eb977fe10 10
d34d 0:212eb977fe10 11 A7105::~A7105() {}
d34d 0:212eb977fe10 12
d34d 0:212eb977fe10 13 uint8_t A7105::writeRegister(uint8_t regAddr, uint8_t value) {
d34d 0:212eb977fe10 14 // assert CS
d34d 4:ca02a935e8eb 15 _cs = 0;
d34d 2:35a860dbaba5 16 // write register
d34d 4:ca02a935e8eb 17 _spi.write(regAddr);
d34d 0:212eb977fe10 18 // write value into register
d34d 4:ca02a935e8eb 19 uint8_t ret = _spi.write(value);
d34d 0:212eb977fe10 20 // de-assert CS
d34d 3:cd7f899f155f 21 wait_us(1);
d34d 4:ca02a935e8eb 22 _cs = 1;
d34d 0:212eb977fe10 23
d34d 0:212eb977fe10 24 return ret;
d34d 0:212eb977fe10 25 }
d34d 0:212eb977fe10 26
d34d 0:212eb977fe10 27 uint8_t A7105::readRegister(uint8_t regAddr) {
d34d 0:212eb977fe10 28 // assert CS
d34d 4:ca02a935e8eb 29 _cs = 0;
d34d 0:212eb977fe10 30 // write register and read value
d34d 6:44b04880717b 31 _spi.write(_READ(regAddr));
d34d 6:44b04880717b 32 uint8_t ret = _spi.write(0);
d34d 0:212eb977fe10 33 // de-assert CS
d34d 3:cd7f899f155f 34 wait_us(1);
d34d 4:ca02a935e8eb 35 _cs = 1;
d34d 3:cd7f899f155f 36
d34d 3:cd7f899f155f 37 return ret;
d34d 3:cd7f899f155f 38 }
d34d 3:cd7f899f155f 39
d34d 3:cd7f899f155f 40 uint8_t A7105::strobe(enum A7105_State state) {
d34d 3:cd7f899f155f 41 // assert CS
d34d 4:ca02a935e8eb 42 _cs = 0;
d34d 3:cd7f899f155f 43 // write strobe command
d34d 4:ca02a935e8eb 44 uint8_t ret = _spi.write(state);
d34d 3:cd7f899f155f 45 // de-assert CS
d34d 3:cd7f899f155f 46 wait_us(1);
d34d 4:ca02a935e8eb 47 _cs = 1;
d34d 0:212eb977fe10 48
d34d 0:212eb977fe10 49 return ret;
d34d 0:212eb977fe10 50 }
d34d 0:212eb977fe10 51
d34d 3:cd7f899f155f 52 void A7105::writeData(uint8_t* data, size_t len) {
d34d 3:cd7f899f155f 53 // assert CS
d34d 4:ca02a935e8eb 54 _cs = 0;
d34d 4:ca02a935e8eb 55 _spi.write(A7105_RST_WRPTR);
d34d 4:ca02a935e8eb 56 _spi.write(A7105_05_FIFO_DATA);
d34d 3:cd7f899f155f 57 for (size_t i = 0; i < len; i++) {
d34d 4:ca02a935e8eb 58 _spi.write(data[i]);
d34d 3:cd7f899f155f 59 }
d34d 3:cd7f899f155f 60
d34d 3:cd7f899f155f 61 // de-assert CS
d34d 3:cd7f899f155f 62 wait_us(1);
d34d 4:ca02a935e8eb 63 _cs = 1;
d34d 3:cd7f899f155f 64 }
d34d 3:cd7f899f155f 65
d34d 3:cd7f899f155f 66 void A7105::readData(uint8_t* buffer, size_t len) {
d34d 3:cd7f899f155f 67 strobe(A7105_RST_RDPTR);
d34d 3:cd7f899f155f 68 for (size_t i = 0; i < len; i++) {
d34d 3:cd7f899f155f 69 buffer[i] = readRegister(A7105_05_FIFO_DATA);
d34d 3:cd7f899f155f 70 }
d34d 3:cd7f899f155f 71 }
d34d 3:cd7f899f155f 72
d34d 3:cd7f899f155f 73 void A7105::setId(uint32_t id) {
d34d 3:cd7f899f155f 74 // assert CS
d34d 4:ca02a935e8eb 75 _cs = 0;
d34d 4:ca02a935e8eb 76 _spi.write(A7105_06_ID_DATA);
d34d 4:ca02a935e8eb 77 _spi.write((uint8_t)(id >> 24) & 0xFF);
d34d 4:ca02a935e8eb 78 _spi.write((uint8_t)(id >> 16) & 0xFF);
d34d 4:ca02a935e8eb 79 _spi.write((uint8_t)(id >> 8) & 0xFF);
d34d 4:ca02a935e8eb 80 _spi.write((uint8_t)id & 0xFF);
d34d 3:cd7f899f155f 81 // de-assert CS
d34d 3:cd7f899f155f 82 wait_us(1);
d34d 4:ca02a935e8eb 83 _cs = 1;
d34d 3:cd7f899f155f 84 }
d34d 3:cd7f899f155f 85
d34d 3:cd7f899f155f 86 void A7105::setPower(int32_t power) {
d34d 3:cd7f899f155f 87 /*
d34d 3:cd7f899f155f 88 Power amp is ~+16dBm so:
d34d 3:cd7f899f155f 89 TXPOWER_100uW = -23dBm == PAC=0 TBG=0
d34d 3:cd7f899f155f 90 TXPOWER_300uW = -20dBm == PAC=0 TBG=1
d34d 3:cd7f899f155f 91 TXPOWER_1mW = -16dBm == PAC=0 TBG=2
d34d 3:cd7f899f155f 92 TXPOWER_3mW = -11dBm == PAC=0 TBG=4
d34d 3:cd7f899f155f 93 TXPOWER_10mW = -6dBm == PAC=1 TBG=5
d34d 3:cd7f899f155f 94 TXPOWER_30mW = 0dBm == PAC=2 TBG=7
d34d 3:cd7f899f155f 95 TXPOWER_100mW = 1dBm == PAC=3 TBG=7
d34d 3:cd7f899f155f 96 TXPOWER_150mW = 1dBm == PAC=3 TBG=7
d34d 3:cd7f899f155f 97 */
d34d 3:cd7f899f155f 98 uint8_t pac, tbg;
d34d 3:cd7f899f155f 99 switch(power) {
d34d 3:cd7f899f155f 100 case 0: pac = 0; tbg = 0; break;
d34d 3:cd7f899f155f 101 case 1: pac = 0; tbg = 1; break;
d34d 3:cd7f899f155f 102 case 2: pac = 0; tbg = 2; break;
d34d 3:cd7f899f155f 103 case 3: pac = 0; tbg = 4; break;
d34d 3:cd7f899f155f 104 case 4: pac = 1; tbg = 5; break;
d34d 3:cd7f899f155f 105 case 5: pac = 2; tbg = 7; break;
d34d 3:cd7f899f155f 106 case 6: pac = 3; tbg = 7; break;
d34d 3:cd7f899f155f 107 case 7: pac = 3; tbg = 7; break;
d34d 3:cd7f899f155f 108 default: pac = 0; tbg = 0; break;
d34d 3:cd7f899f155f 109 };
d34d 3:cd7f899f155f 110 writeRegister(A7105_28_TX_TEST, (pac << 3) | tbg);
d34d 3:cd7f899f155f 111 }
d34d 3:cd7f899f155f 112
d34d 3:cd7f899f155f 113 void A7105::setTxRxMode(enum TXRX_State mode) {
d34d 3:cd7f899f155f 114 if(mode == TX_EN) {
d34d 3:cd7f899f155f 115 writeRegister(A7105_0B_GPIO1_PIN_I, 0x33);
d34d 3:cd7f899f155f 116 writeRegister(A7105_0C_GPIO2_PIN_II, 0x31);
d34d 3:cd7f899f155f 117 } else if (mode == RX_EN) {
d34d 3:cd7f899f155f 118 writeRegister(A7105_0B_GPIO1_PIN_I, 0x31);
d34d 3:cd7f899f155f 119 writeRegister(A7105_0C_GPIO2_PIN_II, 0x33);
d34d 3:cd7f899f155f 120 } else {
d34d 3:cd7f899f155f 121 //The A7105 seems to some with a cross-wired power-amp (A7700)
d34d 3:cd7f899f155f 122 //On the XL7105-D03, TX_EN -> RXSW and RX_EN -> TXSW
d34d 3:cd7f899f155f 123 //This means that sleep mode is wired as RX_EN = 1 and TX_EN = 1
d34d 3:cd7f899f155f 124 //If there are other amps in use, we'll need to fix this
d34d 3:cd7f899f155f 125 writeRegister(A7105_0B_GPIO1_PIN_I, 0x33);
d34d 3:cd7f899f155f 126 writeRegister(A7105_0C_GPIO2_PIN_II, 0x33);
d34d 3:cd7f899f155f 127 }
d34d 3:cd7f899f155f 128 }
d34d 3:cd7f899f155f 129
d34d 3:cd7f899f155f 130 int8_t A7105::reset() {
d34d 3:cd7f899f155f 131 writeRegister(A7105_00_MODE, 0x00);
d34d 3:cd7f899f155f 132 wait_us(1000);
d34d 3:cd7f899f155f 133
d34d 3:cd7f899f155f 134 // Set both GPIO as output and low
d34d 3:cd7f899f155f 135 setTxRxMode(TXRX_OFF);
d34d 3:cd7f899f155f 136 int8_t result = readRegister(A7105_10_PLL_II) == 0x9E;
d34d 3:cd7f899f155f 137 strobe(A7105_STANDBY);
d34d 3:cd7f899f155f 138
d34d 3:cd7f899f155f 139 return result;
d34d 0:212eb977fe10 140 }