Bayley Wang / Mbed 2 deprecated qonly_controller

derp

Dependencies:   FastPWM3 mbed

main.cpp@17:77e5b417e6ef, 2016-04-19 (annotated)

Committer:
bwang
Date:
Tue Apr 19 06:35:06 2016 +0000
Revision:
17:77e5b417e6ef
Parent:
16:46703e957b30 
new state machine with braking

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bwang 0:bac9c3a3a6ca 1 #include "mbed.h"
bwang 0:bac9c3a3a6ca 2 #include "math.h"
bwang 0:bac9c3a3a6ca 3 #include "PositionSensor.h"
bwang 0:bac9c3a3a6ca 4 #include "FastPWM.h"
bwang 8:314074b56470 5
bwang 8:314074b56470 6 #define PWMA PA_8
bwang 8:314074b56470 7 #define PWMB PA_9
bwang 8:314074b56470 8 #define PWMC PA_10
bwang 8:314074b56470 9 #define EN PB_15
bwang 8:314074b56470 10
bwang 8:314074b56470 11 #define IA PA_4
bwang 8:314074b56470 12 #define IB PB_0
bwang 8:314074b56470 13
bwang 8:314074b56470 14 #define PI 3.141593f
bwang 8:314074b56470 15 #define CPR 4096
bwang 8:314074b56470 16 #define POS_OFFSET 4.5f
bwang 8:314074b56470 17
bwang 8:314074b56470 18 #define I_SCALE_RAW 25.0f //mv/A
bwang 8:314074b56470 19 #define R_UP 12000.0f //ohms
bwang 8:314074b56470 20 #define R_DOWN 3600.0f //ohms
bwang 8:314074b56470 21 #define R_BIAS 3600.0f //ohms
bwang 8:314074b56470 22 #define AVDD 3300.0f //mV
bwang 8:314074b56470 23
bwang 8:314074b56470 24 #define I_OFFSET (AVDD * R_DOWN * R_UP / (R_DOWN * R_UP + R_BIAS * (R_DOWN + R_UP)))
bwang 8:314074b56470 25 #define I_SCALE (R_BIAS * R_DOWN * I_SCALE_RAW / (R_DOWN * R_UP + R_BIAS * (R_DOWN + R_UP)))
bwang 8:314074b56470 26
bwang 8:314074b56470 27 #define K_LOOP 0.02
bwang 10:7624146c5945 28 #define KI_BASE 0.008
bwang 15:8eb1dfbf0d41 29 #define BUS_VOLTAGE 200.0
bwang 8:314074b56470 30
bwang 8:314074b56470 31 #define KP (K_LOOP / BUS_VOLTAGE)
bwang 8:314074b56470 32 #define KI (KI_BASE * K_LOOP / BUS_VOLTAGE)
bwang 8:314074b56470 33
bwang 8:314074b56470 34 #define INTEGRAL_MAX 1.0f
bwang 0:bac9c3a3a6ca 35
bwang 17:77e5b417e6ef 36 #define MAX_AMPS_DRIVE (-100.0)
bwang 17:77e5b417e6ef 37 #define MAX_AMPS_BRAKE (20.0)
bwang 17:77e5b417e6ef 38
bwang 17:77e5b417e6ef 39 #define STATE_ON 1
bwang 17:77e5b417e6ef 40 #define STATE_BRAKE 2
bwang 17:77e5b417e6ef 41 #define STATE_COAST 3
bwang 10:7624146c5945 42
bwang 1:7b61790f6be9 43 FastPWM *a;
bwang 1:7b61790f6be9 44 FastPWM *b;
bwang 1:7b61790f6be9 45 FastPWM *c;
bwang 0:bac9c3a3a6ca 46 DigitalOut en(EN);
bwang 0:bac9c3a3a6ca 47
bwang 15:8eb1dfbf0d41 48 DigitalIn throttle_in(PB_8);
bwang 0:bac9c3a3a6ca 49 PositionSensorEncoder pos(CPR, 0);
bwang 16:46703e957b30 50 Serial pc(USBTX, USBRX);
bwang 0:bac9c3a3a6ca 51
bwang 17:77e5b417e6ef 52 volatile int adval1, adval2;
bwang 17:77e5b417e6ef 53 volatile float ia, ib, ic, alpha, beta, q;
bwang 17:77e5b417e6ef 54 volatile double vq = 0.0, q_integral = 0.0, last_q = 0.0, q_ref = 0.0;
bwang 10:7624146c5945 55
bwang 17:77e5b417e6ef 56 volatile int throttle = 0, last_throttle = 0;
bwang 16:46703e957b30 57
bwang 17:77e5b417e6ef 58 volatile int state = STATE_COAST;
bwang 17:77e5b417e6ef 59
bwang 17:77e5b417e6ef 60 volatile int brake_divider = 0, brake_ticker = 0;
bwang 8:314074b56470 61
bwang 1:7b61790f6be9 62 extern "C" void TIM1_UP_TIM10_IRQHandler(void) {
bwang 8:314074b56470 63 if (TIM1->SR & TIM_SR_UIF) {
bwang 8:314074b56470 64 float p = pos.GetElecPosition() - POS_OFFSET;
bwang 8:314074b56470 65 if (p < 0) p += 2 * PI;
bwang 8:314074b56470 66
bwang 8:314074b56470 67 //float pos_dac = 0.85f * p / (2 * PI) + 0.05f;
bwang 8:314074b56470 68 //DAC->DHR12R2 = (unsigned int) (pos_dac * 4096);
bwang 8:314074b56470 69
bwang 8:314074b56470 70 float sin_p = sinf(p);
bwang 8:314074b56470 71 float cos_p = cosf(p);
bwang 8:314074b56470 72
bwang 4:a6669248ce4d 73 ADC1->CR2 |= 0x40000000;
bwang 4:a6669248ce4d 74 volatile int delay;
bwang 4:a6669248ce4d 75 for (delay = 0; delay < 35; delay++);
bwang 1:7b61790f6be9 76 adval1 = ADC1->DR;
bwang 1:7b61790f6be9 77 adval2 = ADC2->DR;
bwang 8:314074b56470 78
bwang 8:314074b56470 79 ia = ((float) adval1 / 4096.0f * AVDD - I_OFFSET) / I_SCALE;
bwang 8:314074b56470 80 ib = ((float) adval2 / 4096.0f * AVDD - I_OFFSET) / I_SCALE;
bwang 8:314074b56470 81 ic = -ia - ib;
bwang 8:314074b56470 82
bwang 8:314074b56470 83 float u = ib;
bwang 8:314074b56470 84 float v = ic;
bwang 8:314074b56470 85
bwang 8:314074b56470 86 alpha = u;
bwang 8:314074b56470 87 beta = 1 / sqrtf(3.0f) * u + 2 / sqrtf(3.0f) * v;
bwang 8:314074b56470 88
bwang 8:314074b56470 89 q = -alpha * sin_p - beta * cos_p;
bwang 17:77e5b417e6ef 90
bwang 17:77e5b417e6ef 91 last_throttle = throttle;
bwang 17:77e5b417e6ef 92 throttle = throttle_in.read();
bwang 17:77e5b417e6ef 93
bwang 17:77e5b417e6ef 94 if (throttle == 0) {
bwang 17:77e5b417e6ef 95 if (last_throttle == 1) {
bwang 17:77e5b417e6ef 96 state = STATE_BRAKE;
bwang 17:77e5b417e6ef 97 brake_ticker = 0;
bwang 17:77e5b417e6ef 98 } else if (brake_ticker > 10) {
bwang 17:77e5b417e6ef 99 state = STATE_COAST;
bwang 17:77e5b417e6ef 100 }
bwang 15:8eb1dfbf0d41 101 } else {
bwang 17:77e5b417e6ef 102 state = STATE_ON;
bwang 15:8eb1dfbf0d41 103 }
bwang 8:314074b56470 104
bwang 17:77e5b417e6ef 105 if (state == STATE_ON || state == STATE_BRAKE) {
bwang 17:77e5b417e6ef 106 en = 1;
bwang 17:77e5b417e6ef 107 } else if (state == STATE_COAST) {
bwang 17:77e5b417e6ef 108 en = 0;
bwang 17:77e5b417e6ef 109 }
bwang 17:77e5b417e6ef 110
bwang 17:77e5b417e6ef 111 if (state == STATE_ON) {
bwang 17:77e5b417e6ef 112 q_ref = MAX_AMPS_DRIVE;
bwang 17:77e5b417e6ef 113 } else if (state == STATE_OFF) {
bwang 17:77e5b417e6ef 114 q_ref = MAX_AMPS_BRAKE;
bwang 17:77e5b417e6ef 115 } else if (state == STATE_COAST) {
bwang 17:77e5b417e6ef 116 q_ref = 0;
bwang 17:77e5b417e6ef 117 }
bwang 17:77e5b417e6ef 118
bwang 17:77e5b417e6ef 119 double q_err = q_ref - q;
bwang 15:8eb1dfbf0d41 120
bwang 10:7624146c5945 121 //DAC->DHR12R2 = (unsigned int) (q_err * 20 + 2048);
bwang 8:314074b56470 122
bwang 8:314074b56470 123 q_integral += q_err * KI;
bwang 8:314074b56470 124 if (q_integral > INTEGRAL_MAX) q_integral = INTEGRAL_MAX;
bwang 8:314074b56470 125 if (q_integral < -INTEGRAL_MAX) q_integral = -INTEGRAL_MAX;
bwang 8:314074b56470 126
bwang 8:314074b56470 127 vq = KP * q_err + q_integral;
bwang 8:314074b56470 128 if (vq < -1.0f) vq = -1.0f;
bwang 8:314074b56470 129 if (vq > 1.0f) vq = 1.0f;
bwang 15:8eb1dfbf0d41 130
bwang 9:4812c9e932ea 131 //DAC->DHR12R2 = (unsigned int) (vq * 2000 + 2048);
bwang 15:8eb1dfbf0d41 132
bwang 8:314074b56470 133 *a = 0.5f + 0.5f * vq * sinf(p);
bwang 8:314074b56470 134 *b = 0.5f + 0.5f * vq * sinf(p + 2 * PI / 3);
bwang 8:314074b56470 135 *c = 0.5f + 0.5f * vq * sinf(p - 2 * PI / 3);
bwang 17:77e5b417e6ef 136
bwang 17:77e5b417e6ef 137 brake_divider++;
bwang 17:77e5b417e6ef 138 if (brake_divider == 15000) {
bwang 17:77e5b417e6ef 139 brake_divider = 0;
bwang 17:77e5b417e6ef 140 brake_ticker++;
bwang 17:77e5b417e6ef 141 }
bwang 1:7b61790f6be9 142 }
bwang 1:7b61790f6be9 143 TIM1->SR = 0x00;
bwang 1:7b61790f6be9 144 }
bwang 10:7624146c5945 145
bwang 8:314074b56470 146 int main() {
bwang 1:7b61790f6be9 147 //Enable clocks for GPIOs
bwang 1:7b61790f6be9 148 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
bwang 1:7b61790f6be9 149 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;
bwang 1:7b61790f6be9 150 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
bwang 1:7b61790f6be9 151
bwang 1:7b61790f6be9 152 RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; //enable TIM1 clock
bwang 1:7b61790f6be9 153
bwang 1:7b61790f6be9 154 a = new FastPWM(PWMA);
bwang 1:7b61790f6be9 155 b = new FastPWM(PWMB);
bwang 1:7b61790f6be9 156 c = new FastPWM(PWMC);
bwang 1:7b61790f6be9 157
bwang 1:7b61790f6be9 158 NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); //Enable TIM1 IRQ
bwang 1:7b61790f6be9 159
bwang 1:7b61790f6be9 160 TIM1->DIER |= TIM_DIER_UIE; //enable update interrupt
bwang 1:7b61790f6be9 161 TIM1->CR1 |= TIM_CR1_ARPE; //autoreload on,
bwang 1:7b61790f6be9 162 TIM1->RCR |= 0x01; //update event once per up/down count of tim1
bwang 1:7b61790f6be9 163 TIM1->EGR |= TIM_EGR_UG;
bwang 1:7b61790f6be9 164
bwang 1:7b61790f6be9 165 TIM1->PSC = 0x00; //no prescaler, timer counts up in sync with the peripheral clock
bwang 8:314074b56470 166 TIM1->ARR = 0x2EE0;
bwang 1:7b61790f6be9 167 TIM1->CCER |= ~(TIM_CCER_CC1NP); //Interupt when low side is on.
bwang 1:7b61790f6be9 168 TIM1->CR1 |= TIM_CR1_CEN;
bwang 1:7b61790f6be9 169
bwang 10:7624146c5945 170 TIM5->CR1 |= TIM_CR1_ARPE;
bwang 10:7624146c5945 171 TIM5->EGR |= TIM_EGR_UG;
bwang 10:7624146c5945 172 TIM5->PSC = 0x00;
bwang 10:7624146c5945 173 TIM5->ARR = 0xFFFFFFFF;
bwang 10:7624146c5945 174 TIM5->CR1 |= TIM_CR1_CEN;
bwang 10:7624146c5945 175
bwang 1:7b61790f6be9 176 //ADC Setup
bwang 1:7b61790f6be9 177 RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1
bwang 1:7b61790f6be9 178 RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2
bwang 1:7b61790f6be9 179
bwang 1:7b61790f6be9 180 ADC->CCR = 0x00000006; //Regular simultaneous mode, 3 channels
bwang 1:7b61790f6be9 181
bwang 1:7b61790f6be9 182 ADC1->CR2 |= ADC_CR2_ADON; //ADC1 on
bwang 1:7b61790f6be9 183 ADC1->SQR3 = 0x0000004; //PA_4 as ADC1, sequence 0
bwang 0:bac9c3a3a6ca 184
bwang 1:7b61790f6be9 185 ADC2->CR2 |= ADC_CR2_ADON; //ADC2 ON
bwang 1:7b61790f6be9 186 ADC2->SQR3 = 0x00000008; //PB_0 as ADC2, sequence 1
bwang 1:7b61790f6be9 187
bwang 1:7b61790f6be9 188 GPIOA->MODER |= (1 << 8);
bwang 1:7b61790f6be9 189 GPIOA->MODER |= (1 << 9);
bwang 1:7b61790f6be9 190
bwang 1:7b61790f6be9 191 GPIOA->MODER |= (1 << 2);
bwang 1:7b61790f6be9 192 GPIOA->MODER |= (1 << 3);
bwang 1:7b61790f6be9 193
bwang 1:7b61790f6be9 194 GPIOA->MODER |= (1 << 0);
bwang 1:7b61790f6be9 195 GPIOA->MODER |= (1 << 1);
bwang 1:7b61790f6be9 196
bwang 1:7b61790f6be9 197 GPIOB->MODER |= (1 << 0);
bwang 1:7b61790f6be9 198 GPIOB->MODER |= (1 << 1);
bwang 1:7b61790f6be9 199
bwang 1:7b61790f6be9 200 GPIOC->MODER |= (1 << 2);
bwang 1:7b61790f6be9 201 GPIOC->MODER |= (1 << 3);
bwang 1:7b61790f6be9 202
bwang 1:7b61790f6be9 203 //DAC setup
bwang 1:7b61790f6be9 204 RCC->APB1ENR |= 0x20000000;
bwang 1:7b61790f6be9 205 DAC->CR |= DAC_CR_EN2;
bwang 1:7b61790f6be9 206
bwang 1:7b61790f6be9 207 GPIOA->MODER |= (1 << 10);
bwang 1:7b61790f6be9 208 GPIOA->MODER |= (1 << 11);
bwang 1:7b61790f6be9 209
bwang 8:314074b56470 210 *a = 0.0f;
bwang 8:314074b56470 211 *b = 0.0f;
bwang 8:314074b56470 212 *c = 0.0f;
bwang 2:eabe8feaaabb 213
bwang 8:314074b56470 214 en = 1;
bwang 0:bac9c3a3a6ca 215
bwang 15:8eb1dfbf0d41 216 throttle_in.mode(PullUp);
bwang 10:7624146c5945 217
bwang 16:46703e957b30 218 pc.baud(115200);
bwang 16:46703e957b30 219
bwang 16:46703e957b30 220 pc.printf("%s\n\r", "THE DENTIST controller Rev. A");
bwang 16:46703e957b30 221
bwang 0:bac9c3a3a6ca 222 for (;;) {
bwang 17:77e5b417e6ef 223 //pc.printf("%d %f\n\r", state, throttle);
bwang 17:77e5b417e6ef 224 //wait_ms(100);
bwang 0:bac9c3a3a6ca 225 }
bwang 0:bac9c3a3a6ca 226 }