Bayley Wang / Mbed 2 deprecated qonly_controller

derp

Dependencies:   FastPWM3 mbed

main.cpp@2:eabe8feaaabb, 2016-03-18 (annotated)

Committer:
bwang
Date:
Fri Mar 18 10:07:35 2016 +0000
Revision:
2:eabe8feaaabb
Parent:
1:7b61790f6be9
Child:
3:9b20da3f0055
works, code is dirty --swapped some currents from last broken rev

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bwang 0:bac9c3a3a6ca 1 #include "mbed.h"
bwang 0:bac9c3a3a6ca 2 #include "math.h"
bwang 0:bac9c3a3a6ca 3 #include "PositionSensor.h"
bwang 0:bac9c3a3a6ca 4 #include "FastPWM.h"
bwang 0:bac9c3a3a6ca 5 #include "Transforms.h"
bwang 0:bac9c3a3a6ca 6 #include "config.h"
bwang 0:bac9c3a3a6ca 7
bwang 1:7b61790f6be9 8 FastPWM *a;
bwang 1:7b61790f6be9 9 FastPWM *b;
bwang 1:7b61790f6be9 10 FastPWM *c;
bwang 0:bac9c3a3a6ca 11 DigitalOut en(EN);
bwang 1:7b61790f6be9 12 DigitalOut toggle(PC_10);
bwang 0:bac9c3a3a6ca 13
bwang 0:bac9c3a3a6ca 14 PositionSensorEncoder pos(CPR, 0);
bwang 0:bac9c3a3a6ca 15
bwang 0:bac9c3a3a6ca 16 Serial pc(USBTX, USBRX);
bwang 0:bac9c3a3a6ca 17
bwang 1:7b61790f6be9 18 int state = 0;
bwang 1:7b61790f6be9 19 int adval1, adval2;
bwang 2:eabe8feaaabb 20 float ia, ib, ic, alpha, beta, d, q, vd, vq, p;
bwang 2:eabe8feaaabb 21
bwang 1:7b61790f6be9 22 float ia_supp_offset = 0.0f, ib_supp_offset = 0.0f; //current sensor offset due to bias resistor inaccuracies, etc (mV)
bwang 1:7b61790f6be9 23
bwang 2:eabe8feaaabb 24 float d_integral = 0.0f, q_integral = 0.0f;
bwang 2:eabe8feaaabb 25 float last_d = 0.0f, last_q = 0.0f;
bwang 2:eabe8feaaabb 26 float d_ref = 0.0f, q_ref = -50.0f;
bwang 2:eabe8feaaabb 27
bwang 2:eabe8feaaabb 28 float d_filtered = 0.0f;
bwang 2:eabe8feaaabb 29 float q_filtered = 0.0f;
bwang 2:eabe8feaaabb 30
bwang 1:7b61790f6be9 31 extern "C" void TIM1_UP_TIM10_IRQHandler(void) {
bwang 1:7b61790f6be9 32 if (TIM1->SR & TIM_SR_UIF ) {
bwang 1:7b61790f6be9 33 adval1 = ADC1->DR;
bwang 1:7b61790f6be9 34 adval2 = ADC2->DR;
bwang 1:7b61790f6be9 35 ADC1->CR2 |= 0x40000000;
bwang 1:7b61790f6be9 36 }
bwang 1:7b61790f6be9 37 TIM1->SR = 0x00;
bwang 1:7b61790f6be9 38 }
bwang 1:7b61790f6be9 39
bwang 1:7b61790f6be9 40 void zero_current(){
bwang 1:7b61790f6be9 41 for (int i = 0; i < 1000; i++){
bwang 1:7b61790f6be9 42 ia_supp_offset += (float) (ADC1->DR);
bwang 1:7b61790f6be9 43 ib_supp_offset += (float) (ADC2->DR);
bwang 1:7b61790f6be9 44 ADC1->CR2 |= 0x40000000;
bwang 1:7b61790f6be9 45 wait_us(100);
bwang 1:7b61790f6be9 46 }
bwang 1:7b61790f6be9 47 ia_supp_offset /= 1000.0f;
bwang 1:7b61790f6be9 48 ib_supp_offset /= 1000.0f;
bwang 1:7b61790f6be9 49 ia_supp_offset = ia_supp_offset / 4096.0f * AVDD - I_OFFSET;
bwang 1:7b61790f6be9 50 ib_supp_offset = ib_supp_offset / 4096.0f * AVDD - I_OFFSET;
bwang 1:7b61790f6be9 51 }
bwang 0:bac9c3a3a6ca 52
bwang 0:bac9c3a3a6ca 53 void config_globals() {
bwang 0:bac9c3a3a6ca 54 pc.baud(115200);
bwang 0:bac9c3a3a6ca 55
bwang 1:7b61790f6be9 56 //Enable clocks for GPIOs
bwang 1:7b61790f6be9 57 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
bwang 1:7b61790f6be9 58 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN;
bwang 1:7b61790f6be9 59 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
bwang 1:7b61790f6be9 60
bwang 1:7b61790f6be9 61 RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; //enable TIM1 clock
bwang 1:7b61790f6be9 62
bwang 1:7b61790f6be9 63 a = new FastPWM(PWMA);
bwang 1:7b61790f6be9 64 b = new FastPWM(PWMB);
bwang 1:7b61790f6be9 65 c = new FastPWM(PWMC);
bwang 1:7b61790f6be9 66
bwang 1:7b61790f6be9 67 NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); //Enable TIM1 IRQ
bwang 1:7b61790f6be9 68
bwang 1:7b61790f6be9 69 TIM1->DIER |= TIM_DIER_UIE; //enable update interrupt
bwang 1:7b61790f6be9 70 TIM1->CR1 = 0x40; //CMS = 10, interrupt only when counting up
bwang 1:7b61790f6be9 71 TIM1->CR1 |= TIM_CR1_ARPE; //autoreload on,
bwang 1:7b61790f6be9 72 TIM1->RCR |= 0x01; //update event once per up/down count of tim1
bwang 1:7b61790f6be9 73 TIM1->EGR |= TIM_EGR_UG;
bwang 1:7b61790f6be9 74
bwang 1:7b61790f6be9 75 TIM1->PSC = 0x00; //no prescaler, timer counts up in sync with the peripheral clock
bwang 1:7b61790f6be9 76 TIM1->ARR = 0x4650; //5 Khz
bwang 1:7b61790f6be9 77 TIM1->CCER |= ~(TIM_CCER_CC1NP); //Interupt when low side is on.
bwang 1:7b61790f6be9 78 TIM1->CR1 |= TIM_CR1_CEN;
bwang 1:7b61790f6be9 79
bwang 1:7b61790f6be9 80 //ADC Setup
bwang 1:7b61790f6be9 81 RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // clock for ADC1
bwang 1:7b61790f6be9 82 RCC->APB2ENR |= RCC_APB2ENR_ADC2EN; // clock for ADC2
bwang 1:7b61790f6be9 83
bwang 1:7b61790f6be9 84 ADC->CCR = 0x00000006; //Regular simultaneous mode, 3 channels
bwang 1:7b61790f6be9 85
bwang 1:7b61790f6be9 86 ADC1->CR2 |= ADC_CR2_ADON; //ADC1 on
bwang 1:7b61790f6be9 87 ADC1->SQR3 = 0x0000004; //PA_4 as ADC1, sequence 0
bwang 0:bac9c3a3a6ca 88
bwang 1:7b61790f6be9 89 ADC2->CR2 |= ADC_CR2_ADON; //ADC2 ON
bwang 1:7b61790f6be9 90 ADC2->SQR3 = 0x00000008; //PB_0 as ADC2, sequence 1
bwang 1:7b61790f6be9 91
bwang 1:7b61790f6be9 92 GPIOA->MODER |= (1 << 8);
bwang 1:7b61790f6be9 93 GPIOA->MODER |= (1 << 9);
bwang 1:7b61790f6be9 94
bwang 1:7b61790f6be9 95 GPIOA->MODER |= (1 << 2);
bwang 1:7b61790f6be9 96 GPIOA->MODER |= (1 << 3);
bwang 1:7b61790f6be9 97
bwang 1:7b61790f6be9 98 GPIOA->MODER |= (1 << 0);
bwang 1:7b61790f6be9 99 GPIOA->MODER |= (1 << 1);
bwang 1:7b61790f6be9 100
bwang 1:7b61790f6be9 101 GPIOB->MODER |= (1 << 0);
bwang 1:7b61790f6be9 102 GPIOB->MODER |= (1 << 1);
bwang 1:7b61790f6be9 103
bwang 1:7b61790f6be9 104 GPIOC->MODER |= (1 << 2);
bwang 1:7b61790f6be9 105 GPIOC->MODER |= (1 << 3);
bwang 1:7b61790f6be9 106
bwang 1:7b61790f6be9 107 //DAC setup
bwang 1:7b61790f6be9 108 RCC->APB1ENR |= 0x20000000;
bwang 1:7b61790f6be9 109 DAC->CR |= DAC_CR_EN2;
bwang 1:7b61790f6be9 110
bwang 1:7b61790f6be9 111 GPIOA->MODER |= (1 << 10);
bwang 1:7b61790f6be9 112 GPIOA->MODER |= (1 << 11);
bwang 1:7b61790f6be9 113
bwang 1:7b61790f6be9 114 //Zero duty cycles
bwang 1:7b61790f6be9 115 set_dtc(a, 0.0f);
bwang 1:7b61790f6be9 116 set_dtc(b, 0.0f);
bwang 1:7b61790f6be9 117 set_dtc(c, 0.0f);
bwang 1:7b61790f6be9 118
bwang 1:7b61790f6be9 119 wait_ms(250);
bwang 1:7b61790f6be9 120 zero_current();
bwang 0:bac9c3a3a6ca 121 en = 1;
bwang 0:bac9c3a3a6ca 122 }
bwang 0:bac9c3a3a6ca 123
bwang 0:bac9c3a3a6ca 124 void startup_msg() {
bwang 0:bac9c3a3a6ca 125 pc.printf("%s\n\r\n\r", "FOC'ed in the Bot Rev A.");
bwang 0:bac9c3a3a6ca 126 pc.printf("%s\n\r", "====Config Data====");
bwang 0:bac9c3a3a6ca 127 pc.printf("Current Sensor Offset: %f mV\n\r", I_OFFSET);
bwang 0:bac9c3a3a6ca 128 pc.printf("Current Sensor Scale: %f mv/A\n\r", I_SCALE);
bwang 0:bac9c3a3a6ca 129 pc.printf("Bus Voltage: %f V\n\r", BUS_VOLTAGE);
bwang 0:bac9c3a3a6ca 130 pc.printf("Loop KP: %f\n\r", KP);
bwang 0:bac9c3a3a6ca 131 pc.printf("Loop KI: %f\n\r", KI);
bwang 1:7b61790f6be9 132 pc.printf("Ia offset: %f mV\n\r", ia_supp_offset);
bwang 1:7b61790f6be9 133 pc.printf("Ib offset: %f mV\n\r", ib_supp_offset);
bwang 0:bac9c3a3a6ca 134 pc.printf("\n\r");
bwang 0:bac9c3a3a6ca 135 }
bwang 0:bac9c3a3a6ca 136
bwang 0:bac9c3a3a6ca 137 void main_loop() {
bwang 2:eabe8feaaabb 138 //float p = pos.GetElecPosition() - POS_OFFSET + PI / 2;
bwang 2:eabe8feaaabb 139 p = pos.GetElecPosition() - POS_OFFSET;
bwang 0:bac9c3a3a6ca 140 if (p < 0) p += 2 * PI;
bwang 0:bac9c3a3a6ca 141
bwang 2:eabe8feaaabb 142 float sin_p = sinf(p);
bwang 2:eabe8feaaabb 143 float cos_p = cosf(p);
bwang 2:eabe8feaaabb 144
bwang 2:eabe8feaaabb 145 //float pos_dac = 0.85f * p / (2 * PI) + 0.05f;
bwang 2:eabe8feaaabb 146 //DAC->DHR12R2 = (unsigned int) (pos_dac * 4096);
bwang 0:bac9c3a3a6ca 147
bwang 1:7b61790f6be9 148 ia = ((float) adval1 / 4096.0f * AVDD - I_OFFSET - ia_supp_offset) / I_SCALE;
bwang 1:7b61790f6be9 149 ib = ((float) adval2 / 4096.0f * AVDD - I_OFFSET - ib_supp_offset) / I_SCALE;
bwang 2:eabe8feaaabb 150 ic = -ia - ib;
bwang 0:bac9c3a3a6ca 151
bwang 2:eabe8feaaabb 152 float u = ib;//ic;
bwang 2:eabe8feaaabb 153 float v = ic;//ia;
bwang 2:eabe8feaaabb 154
bwang 2:eabe8feaaabb 155 alpha = u;
bwang 2:eabe8feaaabb 156 beta = 1 / sqrtf(3.0f) * u + 2 / sqrtf(3.0f) * v;
bwang 2:eabe8feaaabb 157
bwang 2:eabe8feaaabb 158 d = alpha * cos_p - beta * sin_p;
bwang 2:eabe8feaaabb 159 q = -alpha * sin_p - beta * cos_p;
bwang 2:eabe8feaaabb 160
bwang 2:eabe8feaaabb 161 d_filtered = 0.9f * d_filtered + 0.1f * d;
bwang 2:eabe8feaaabb 162 q_filtered = 0.9f * q_filtered + 0.1f * q;
bwang 2:eabe8feaaabb 163
bwang 2:eabe8feaaabb 164 float d_err = d_ref - d;//_filtered;
bwang 2:eabe8feaaabb 165 float q_err = q_ref - q;//_filtered;
bwang 2:eabe8feaaabb 166
bwang 2:eabe8feaaabb 167 d_integral += d_err * KI;
bwang 2:eabe8feaaabb 168 q_integral += q_err * KI;
bwang 2:eabe8feaaabb 169
bwang 2:eabe8feaaabb 170 if (q_integral > INTEGRAL_MAX) q_integral = INTEGRAL_MAX;
bwang 2:eabe8feaaabb 171 if (d_integral > INTEGRAL_MAX) d_integral = INTEGRAL_MAX;
bwang 2:eabe8feaaabb 172 if (q_integral < -INTEGRAL_MAX) q_integral = -INTEGRAL_MAX;
bwang 2:eabe8feaaabb 173 if (d_integral < -INTEGRAL_MAX) d_integral = -INTEGRAL_MAX;
bwang 2:eabe8feaaabb 174
bwang 2:eabe8feaaabb 175 vd = KP * d_err + d_integral;
bwang 2:eabe8feaaabb 176 vq = KP * q_err + q_integral;
bwang 2:eabe8feaaabb 177
bwang 2:eabe8feaaabb 178 if (vd < -1.0f) vd = -1.0f;
bwang 2:eabe8feaaabb 179 if (vd > 1.0f) vd = 1.0f;
bwang 2:eabe8feaaabb 180 if (vq < -1.0f) vq = -1.0f;
bwang 2:eabe8feaaabb 181 if (vq > 1.0f) vq = 1.0f;
bwang 2:eabe8feaaabb 182
bwang 2:eabe8feaaabb 183 DAC->DHR12R2 = (unsigned int) (-q * 20 + 2048);
bwang 2:eabe8feaaabb 184 //DAC->DHR12R2 = (unsigned int) (-vd * 2000 + 2048);
bwang 2:eabe8feaaabb 185
bwang 2:eabe8feaaabb 186 //vd = 0.0f;
bwang 2:eabe8feaaabb 187 //vq = -1.0f;
bwang 2:eabe8feaaabb 188
bwang 2:eabe8feaaabb 189 //float phase = asinf(vd / sqrtf(vq * vq + vd * vd));
bwang 2:eabe8feaaabb 190 //DAC->DHR12R2 = (unsigned int) (phase / (PI / 2.0f) * 2000 + 2048);
bwang 2:eabe8feaaabb 191
bwang 2:eabe8feaaabb 192 float valpha = vd * cos_p - vq * sin_p;
bwang 2:eabe8feaaabb 193 float vbeta = vd * sin_p + vq * cos_p;
bwang 2:eabe8feaaabb 194
bwang 2:eabe8feaaabb 195 float va = valpha;
bwang 2:eabe8feaaabb 196 float vb = -0.5f * valpha - sqrtf(3) / 2.0f * vbeta;
bwang 2:eabe8feaaabb 197 float vc = -0.5f * valpha + sqrtf(3) / 2.0f * vbeta;
bwang 2:eabe8feaaabb 198
bwang 2:eabe8feaaabb 199 set_dtc(a, 0.5f + 0.5f * va);
bwang 2:eabe8feaaabb 200 set_dtc(b, 0.5f + 0.5f * vb);
bwang 2:eabe8feaaabb 201 set_dtc(c, 0.5f + 0.5f * vc);
bwang 2:eabe8feaaabb 202
bwang 2:eabe8feaaabb 203 //set_dtc(a, 0.5f + 0.5f * cosf(p));
bwang 2:eabe8feaaabb 204 //set_dtc(b, 0.5f + 0.5f * cosf(p + 2 * PI / 3));
bwang 2:eabe8feaaabb 205 //set_dtc(c, 0.5f + 0.5f * cosf(p - 2 * PI / 3));
bwang 0:bac9c3a3a6ca 206 }
bwang 0:bac9c3a3a6ca 207
bwang 0:bac9c3a3a6ca 208 int main() {
bwang 0:bac9c3a3a6ca 209 config_globals();
bwang 0:bac9c3a3a6ca 210 startup_msg();
bwang 0:bac9c3a3a6ca 211
bwang 0:bac9c3a3a6ca 212 Ticker loop;
bwang 0:bac9c3a3a6ca 213 loop.attach_us(main_loop, 200);
bwang 0:bac9c3a3a6ca 214
bwang 2:eabe8feaaabb 215 //vd = 0.0f;
bwang 2:eabe8feaaabb 216 //vq = 1.0f;
bwang 2:eabe8feaaabb 217
bwang 0:bac9c3a3a6ca 218 for (;;) {
bwang 2:eabe8feaaabb 219
bwang 2:eabe8feaaabb 220 printf("%f\n\r", vd);
bwang 2:eabe8feaaabb 221 wait_ms(100);
bwang 2:eabe8feaaabb 222
bwang 2:eabe8feaaabb 223 /*
bwang 2:eabe8feaaabb 224 q_ref = 0.0f;
bwang 2:eabe8feaaabb 225 wait(3);
bwang 2:eabe8feaaabb 226 toggle = state;
bwang 2:eabe8feaaabb 227 state = !state;
bwang 2:eabe8feaaabb 228 q_ref = -50.0f;
bwang 2:eabe8feaaabb 229 wait(3);
bwang 2:eabe8feaaabb 230 */
bwang 2:eabe8feaaabb 231
bwang 2:eabe8feaaabb 232 /*
bwang 2:eabe8feaaabb 233 vq = 0.0f;
bwang 2:eabe8feaaabb 234 wait(3);
bwang 2:eabe8feaaabb 235 toggle = state;
bwang 2:eabe8feaaabb 236 state = !state;
bwang 2:eabe8feaaabb 237 vq = -1.0f;
bwang 2:eabe8feaaabb 238 wait(3);
bwang 2:eabe8feaaabb 239 */
bwang 2:eabe8feaaabb 240
bwang 2:eabe8feaaabb 241 //toggle = state;
bwang 2:eabe8feaaabb 242 //state = !state;
bwang 0:bac9c3a3a6ca 243 }
bwang 0:bac9c3a3a6ca 244 }