Jared Baxter / Mbed 2 deprecated Impedance_Fast_Circuitry_print_V_I

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependencies:   mbed-dsp mbed

Fork of Impedance_Fast_Circuitry by Jared Baxter

pdb.cpp@50:33524a27e08c, 2015-01-31 (annotated)

Committer:
timmey9
Date:
Sat Jan 31 19:46:00 2015 +0000
Revision:
50:33524a27e08c
Parent:
49:4dcf4717a8bb
Child:
51:43143a3fc2d7
Continuous sampling started by the PCB is working.  It is successfully triggering ADC0, ADC1, and the DMA is doing its job for the ADCs and FTM quad decoder.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
timmey9 39:82dc3daecf32 1 #include "pdb.h"
timmey9 39:82dc3daecf32 2
timmey9 45:d591d138cdeb 3 Serial debug2(USBTX,USBRX);
timmey9 45:d591d138cdeb 4
timmey9 45:d591d138cdeb 5 void pdb_init() {
timmey9 39:82dc3daecf32 6
timmey9 39:82dc3daecf32 7 // initialize the Programmable Delay Block
timmey9 45:d591d138cdeb 8
timmey9 45:d591d138cdeb 9 // turn on the clock to the PDB
timmey9 47:54fafe151669 10 SIM->SCGC6 |= SIM_SCGC6_PDB_MASK;
timmey9 45:d591d138cdeb 11
timmey9 45:d591d138cdeb 12 // set ADC trigger to PDB0
timmey9 45:d591d138cdeb 13 SIM_SOPT7 = SIM_SOPT7_ADC0TRGSEL(0);
timmey9 47:54fafe151669 14
timmey9 39:82dc3daecf32 15 // Configure the Peripheral Delay Block (PDB):
timmey9 47:54fafe151669 16 PDB0_IDLY = 0x01; // need to trigger interrupt every counter reset which happens when modulus reached
timmey9 48:29f14bc30ba6 17 PDB0_MOD = 0x0000ffff; // max
timmey9 48:29f14bc30ba6 18 PDB0_CH0DLY0 = 0xff;
timmey9 50:33524a27e08c 19 PDB0_CH0DLY1 = 0xff;
timmey9 48:29f14bc30ba6 20 PDB0_CH1DLY0 = 0xff;
timmey9 50:33524a27e08c 21 PDB0_CH1DLY1 = 0xff;
timmey9 48:29f14bc30ba6 22 PDB0_CH0C1 = PDB_C1_EN(2) | PDB_C1_TOS(2); // channel 0 pretrigger 0 and 1 enabled and delayed
timmey9 50:33524a27e08c 23 PDB0_CH1C1 = PDB_C1_EN(1) | PDB_C1_TOS(1); // channel 1 pretrigger 0 and 1 enabled and delayed
timmey9 39:82dc3daecf32 24
timmey9 45:d591d138cdeb 25 // Setup Staus and Control Register
timmey9 45:d591d138cdeb 26 PDB0_SC = 0; // clear register
timmey9 48:29f14bc30ba6 27 PDB0_SC = PDB_SC_DMAEN_MASK // Enable DMA
timmey9 48:29f14bc30ba6 28 | PDB_SC_PRESCALER(0) // Slow down the period of the PDB for testing
timmey9 48:29f14bc30ba6 29 | PDB_SC_TRGSEL(0xf) // Trigger source is Software Trigger to be invoked in this file
timmey9 48:29f14bc30ba6 30 | PDB_SC_PDBEN_MASK // PDB enabled
timmey9 48:29f14bc30ba6 31 | PDB_SC_PDBIE_MASK // PDB Interrupt Enable
timmey9 48:29f14bc30ba6 32 | PDB_SC_MULT(0) // Multiplication factor 20 for the prescale divider for the counter clock
timmey9 48:29f14bc30ba6 33 | PDB_SC_CONT_MASK // Contintuous, rather than one-shot, mode
timmey9 48:29f14bc30ba6 34 | PDB_SC_LDOK_MASK; // Need to ok the loading or it will not load certain regsiters!
timmey9 47:54fafe151669 35 //PDB0_SC &= ~PDB_SC_CONT_MASK; // enable one-shot mode for debugging.
timmey9 39:82dc3daecf32 36
timmey9 45:d591d138cdeb 37 debug2.printf("PDB0_SC: %08x\r\n",PDB0_SC);
timmey9 45:d591d138cdeb 38 debug2.printf("PDB0_MOD: %08x\r\n",PDB0_MOD);
timmey9 45:d591d138cdeb 39 debug2.printf("PDB0_CNT: %08x\r\n",PDB0_CNT);
timmey9 45:d591d138cdeb 40 debug2.printf("PDB0_IDLY: %08x\r\n",PDB0_IDLY);
timmey9 45:d591d138cdeb 41 debug2.printf("PDB0_CH0C1: %08x\r\n",PDB0_CH0C1);
timmey9 45:d591d138cdeb 42 debug2.printf("PDB0_CH0S: %08x\r\n",PDB0_CH0S);
timmey9 45:d591d138cdeb 43 debug2.printf("PDB0_CH0DLY0: %08x\r\n",PDB0_CH0DLY0);
timmey9 45:d591d138cdeb 44 debug2.printf("PDB0_CH0DLY1: %08x\r\n",PDB0_CH0DLY1);
timmey9 45:d591d138cdeb 45 debug2.printf("PDB0_CH1C1: %08x\r\n",PDB0_CH1C1);
timmey9 45:d591d138cdeb 46 debug2.printf("PDB0_CH1S: %08x\r\n",PDB0_CH1S);
timmey9 45:d591d138cdeb 47 debug2.printf("PDB0_CH1DLY0: %08x\r\n",PDB0_CH1DLY0);
timmey9 50:33524a27e08c 48 debug2.printf("PDB0_CH1DLY1: %08x\r\n",PDB0_CH1DLY1);
timmey9 50:33524a27e08c 49 debug2.printf("PDB0_DACINTC0: %08x\r\n",PDB0_DACINTC0);
timmey9 45:d591d138cdeb 50 debug2.printf("PDB0_DACINT0: %08x\r\n",PDB0_DACINT0);
timmey9 45:d591d138cdeb 51 debug2.printf("PDB0_DACINTC1: %08x\r\n",PDB0_DACINTC1);
timmey9 45:d591d138cdeb 52 debug2.printf("PDB0_DACINT1: %08x\r\n",PDB0_DACINT1);
timmey9 45:d591d138cdeb 53 debug2.printf("PDB0_POEN: %08x\r\n",PDB0_POEN);
timmey9 45:d591d138cdeb 54 debug2.printf("PDB0_PO0DLY: %08x\r\n",PDB0_PO0DLY);
timmey9 45:d591d138cdeb 55 debug2.printf("PDB0_PO1DLY: %08x\r\n",PDB0_PO1DLY);
timmey9 45:d591d138cdeb 56 debug2.printf("PDB0_PO2DLY: %08x\r\n\n",PDB0_PO2DLY);
timmey9 50:33524a27e08c 57
timmey9 47:54fafe151669 58 //NVIC_SetVector(PDB0_IRQn, (uint32_t)&PDB0_IRQHandler);
timmey9 47:54fafe151669 59 //NVIC_EnableIRQ(PDB0_IRQn);
timmey9 39:82dc3daecf32 60 }
timmey9 39:82dc3daecf32 61
timmey9 46:a015ebf4663b 62
timmey9 46:a015ebf4663b 63 void PDB0_IRQHandler() {
timmey9 47:54fafe151669 64 //switcher = !switcher;
timmey9 47:54fafe151669 65
timmey9 46:a015ebf4663b 66 }
timmey9 46:a015ebf4663b 67
timmey9 46:a015ebf4663b 68
timmey9 39:82dc3daecf32 69 void pdb_start() {
timmey9 45:d591d138cdeb 70 PDB0_SC |= PDB_SC_PDBEN_MASK; // PDB enabled
timmey9 45:d591d138cdeb 71 PDB0_SC |= PDB_SC_SWTRIG_MASK; // enable software trigger (start the PDB)
timmey9 39:82dc3daecf32 72 }
timmey9 39:82dc3daecf32 73
timmey9 39:82dc3daecf32 74 void pdb_stop() {
timmey9 48:29f14bc30ba6 75 //PDB0_SC &= ~PDB_SC_CONT_MASK; // change to one-shot mode, so pdb will stop after current count
timmey9 45:d591d138cdeb 76 PDB0_SC &= ~PDB_SC_PDBEN_MASK; // PDB disabled
timmey9 39:82dc3daecf32 77 }