Vybhav Kadaba
/
EV-PRO-MW1001_Development_v11775
Minor changes to support ADMW FWv1.17.75
inc/admw1001/ADMW1001_REGISTERS_typedefs.h@50:d84305e5e1c0, 2020-02-17 (annotated)
- Committer:
- Vkadaba
- Date:
- Mon Feb 17 11:23:39 2020 +0000
- Revision:
- 50:d84305e5e1c0
- Parent:
- 44:94bdfaefddac
- Child:
- 58:aa9cd5072f66
Mbed Firmware Update to support Device FW v1.12.061
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Vkadaba | 5:0728bde67bdb | 1 | /* ================================================================================ |
Vkadaba | 32:52445bef314d | 2 | |
Vkadaba | 32:52445bef314d | 3 | Created by : |
Vkadaba | 50:d84305e5e1c0 | 4 | Created on : 2020 Jan 15, 14:45 GMT Standard Time |
Vkadaba | 5:0728bde67bdb | 5 | |
Vkadaba | 5:0728bde67bdb | 6 | Project : ADMW1001_REGISTERS |
Vkadaba | 5:0728bde67bdb | 7 | File : ADMW1001_REGISTERS_typedefs.h |
Vkadaba | 5:0728bde67bdb | 8 | Description : C Register Structures |
Vkadaba | 5:0728bde67bdb | 9 | |
Vkadaba | 32:52445bef314d | 10 | !! ADI Confidential !! |
Vkadaba | 32:52445bef314d | 11 | INTERNAL USE ONLY |
Vkadaba | 5:0728bde67bdb | 12 | |
Vkadaba | 44:94bdfaefddac | 13 | Copyright (c) 2020 Analog Devices, Inc. All Rights Reserved. |
Vkadaba | 5:0728bde67bdb | 14 | This software is proprietary and confidential to Analog Devices, Inc. and |
Vkadaba | 5:0728bde67bdb | 15 | its licensors. |
Vkadaba | 5:0728bde67bdb | 16 | |
Vkadaba | 5:0728bde67bdb | 17 | This file was auto-generated. Do not make local changes to this file. |
Vkadaba | 32:52445bef314d | 18 | |
Vkadaba | 32:52445bef314d | 19 | Auto generation script information: |
Vkadaba | 32:52445bef314d | 20 | Script: C:\Program Files (x86)\Yoda-19.05.01\generators\inc\genHeaders |
Vkadaba | 32:52445bef314d | 21 | Last modified: 26-SEP-2017 |
Vkadaba | 5:0728bde67bdb | 22 | |
Vkadaba | 5:0728bde67bdb | 23 | ================================================================================ */ |
Vkadaba | 5:0728bde67bdb | 24 | |
Vkadaba | 5:0728bde67bdb | 25 | #ifndef _ADMW1001_REGISTERS_TYPEDEFS_H |
Vkadaba | 5:0728bde67bdb | 26 | #define _ADMW1001_REGISTERS_TYPEDEFS_H |
Vkadaba | 5:0728bde67bdb | 27 | |
Vkadaba | 5:0728bde67bdb | 28 | /* pickup integer types */ |
Vkadaba | 5:0728bde67bdb | 29 | #if defined(_LANGUAGE_C) || (defined(__GNUC__) && !defined(__ASSEMBLER__)) |
Vkadaba | 5:0728bde67bdb | 30 | #include <stdint.h> |
Vkadaba | 5:0728bde67bdb | 31 | #endif /* _LANGUAGE_C */ |
Vkadaba | 5:0728bde67bdb | 32 | |
Vkadaba | 5:0728bde67bdb | 33 | #if defined ( __CC_ARM ) |
Vkadaba | 5:0728bde67bdb | 34 | #pragma push |
Vkadaba | 5:0728bde67bdb | 35 | #pragma anon_unions |
Vkadaba | 5:0728bde67bdb | 36 | #endif |
Vkadaba | 5:0728bde67bdb | 37 | |
Vkadaba | 5:0728bde67bdb | 38 | /** @defgroup Interface_Config_A Interface Configuration A (Interface_Config_A) Register |
Vkadaba | 5:0728bde67bdb | 39 | * Interface Configuration A (Interface_Config_A) Register. |
Vkadaba | 5:0728bde67bdb | 40 | * @{ |
Vkadaba | 5:0728bde67bdb | 41 | */ |
Vkadaba | 5:0728bde67bdb | 42 | |
Vkadaba | 5:0728bde67bdb | 43 | /* ========================================================================= |
Vkadaba | 5:0728bde67bdb | 44 | *! \enum ADMW_SPI_Interface_Config_A_Addr_Ascension |
Vkadaba | 5:0728bde67bdb | 45 | *! \brief Determines Sequential Addressing Behavior (Addr_Ascension) Enumerations |
Vkadaba | 5:0728bde67bdb | 46 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 47 | typedef enum |
Vkadaba | 5:0728bde67bdb | 48 | { |
Vkadaba | 5:0728bde67bdb | 49 | SPI_INTERFACE_CONFIG_A_DESCEND = 0, /**< Address accessed is decremented by one for each data byte when streaming */ |
Vkadaba | 5:0728bde67bdb | 50 | SPI_INTERFACE_CONFIG_A_ASCEND = 1 /**< Address accessed is incremented by one for each data byte when streaming */ |
Vkadaba | 5:0728bde67bdb | 51 | } ADMW_SPI_Interface_Config_A_Addr_Ascension; |
Vkadaba | 5:0728bde67bdb | 52 | |
Vkadaba | 5:0728bde67bdb | 53 | |
Vkadaba | 5:0728bde67bdb | 54 | /* ========================================================================== |
Vkadaba | 5:0728bde67bdb | 55 | *! \struct ADMW_SPI_Interface_Config_A_Struct |
Vkadaba | 5:0728bde67bdb | 56 | *! \brief Interface Configuration A Register bit field structure |
Vkadaba | 5:0728bde67bdb | 57 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 58 | typedef struct _ADMW_SPI_Interface_Config_A_t { |
Vkadaba | 5:0728bde67bdb | 59 | union { |
Vkadaba | 5:0728bde67bdb | 60 | struct { |
Vkadaba | 32:52445bef314d | 61 | uint8_t SW_ResetX : 1; /**< Second of Two of the SW_RESET Bits. */ |
Vkadaba | 5:0728bde67bdb | 62 | uint8_t reserved1 : 3; |
Vkadaba | 32:52445bef314d | 63 | uint8_t SDO_Enable : 1; /**< Serial Data Output Pin Enable */ |
Vkadaba | 5:0728bde67bdb | 64 | uint8_t Addr_Ascension : 1; /**< Determines Sequential Addressing Behavior */ |
Vkadaba | 5:0728bde67bdb | 65 | uint8_t reserved6 : 1; |
Vkadaba | 32:52445bef314d | 66 | uint8_t SW_Reset : 1; /**< First of Two of the SW_RESET Bits. */ |
Vkadaba | 5:0728bde67bdb | 67 | }; |
Vkadaba | 5:0728bde67bdb | 68 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 69 | }; |
Vkadaba | 5:0728bde67bdb | 70 | } ADMW_SPI_Interface_Config_A_t; |
Vkadaba | 5:0728bde67bdb | 71 | |
Vkadaba | 5:0728bde67bdb | 72 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 73 | |
Vkadaba | 5:0728bde67bdb | 74 | /** @defgroup Chip_Type Chip Type (Chip_Type) Register |
Vkadaba | 5:0728bde67bdb | 75 | * Chip Type (Chip_Type) Register. |
Vkadaba | 5:0728bde67bdb | 76 | * @{ |
Vkadaba | 5:0728bde67bdb | 77 | */ |
Vkadaba | 5:0728bde67bdb | 78 | |
Vkadaba | 5:0728bde67bdb | 79 | /* ========================================================================== |
Vkadaba | 5:0728bde67bdb | 80 | *! \struct ADMW_SPI_Chip_Type_Struct |
Vkadaba | 5:0728bde67bdb | 81 | *! \brief Chip Type Register bit field structure |
Vkadaba | 5:0728bde67bdb | 82 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 83 | typedef struct _ADMW_SPI_Chip_Type_t { |
Vkadaba | 5:0728bde67bdb | 84 | union { |
Vkadaba | 5:0728bde67bdb | 85 | struct { |
Vkadaba | 5:0728bde67bdb | 86 | uint8_t Chip_Type : 4; /**< Precision ADC */ |
Vkadaba | 5:0728bde67bdb | 87 | uint8_t reserved4 : 4; |
Vkadaba | 5:0728bde67bdb | 88 | }; |
Vkadaba | 5:0728bde67bdb | 89 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 90 | }; |
Vkadaba | 5:0728bde67bdb | 91 | } ADMW_SPI_Chip_Type_t; |
Vkadaba | 5:0728bde67bdb | 92 | |
Vkadaba | 5:0728bde67bdb | 93 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 94 | |
Vkadaba | 5:0728bde67bdb | 95 | /** @defgroup Product_ID_L Product ID Low (Product_ID_L) Register |
Vkadaba | 5:0728bde67bdb | 96 | * Product ID Low (Product_ID_L) Register. |
Vkadaba | 5:0728bde67bdb | 97 | * @{ |
Vkadaba | 5:0728bde67bdb | 98 | */ |
Vkadaba | 5:0728bde67bdb | 99 | |
Vkadaba | 5:0728bde67bdb | 100 | /* ========================================================================== |
Vkadaba | 5:0728bde67bdb | 101 | *! \struct ADMW_SPI_Product_ID_L_Struct |
Vkadaba | 5:0728bde67bdb | 102 | *! \brief Product ID Low Register bit field structure |
Vkadaba | 5:0728bde67bdb | 103 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 104 | typedef struct _ADMW_SPI_Product_ID_L_t { |
Vkadaba | 5:0728bde67bdb | 105 | union { |
Vkadaba | 5:0728bde67bdb | 106 | struct { |
Vkadaba | 50:d84305e5e1c0 | 107 | uint8_t Product_ID : 8; /**< Product_ID[7:0] The Device Chip Type and Family */ |
Vkadaba | 5:0728bde67bdb | 108 | }; |
Vkadaba | 5:0728bde67bdb | 109 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 110 | }; |
Vkadaba | 5:0728bde67bdb | 111 | } ADMW_SPI_Product_ID_L_t; |
Vkadaba | 5:0728bde67bdb | 112 | |
Vkadaba | 5:0728bde67bdb | 113 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 114 | |
Vkadaba | 5:0728bde67bdb | 115 | /** @defgroup Product_ID_H Product ID High (Product_ID_H) Register |
Vkadaba | 5:0728bde67bdb | 116 | * Product ID High (Product_ID_H) Register. |
Vkadaba | 5:0728bde67bdb | 117 | * @{ |
Vkadaba | 5:0728bde67bdb | 118 | */ |
Vkadaba | 5:0728bde67bdb | 119 | |
Vkadaba | 5:0728bde67bdb | 120 | /* ========================================================================== |
Vkadaba | 5:0728bde67bdb | 121 | *! \struct ADMW_SPI_Product_ID_H_Struct |
Vkadaba | 5:0728bde67bdb | 122 | *! \brief Product ID High Register bit field structure |
Vkadaba | 5:0728bde67bdb | 123 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 124 | typedef struct _ADMW_SPI_Product_ID_H_t { |
Vkadaba | 5:0728bde67bdb | 125 | union { |
Vkadaba | 5:0728bde67bdb | 126 | struct { |
Vkadaba | 50:d84305e5e1c0 | 127 | uint8_t Product_ID : 8; /**< Product_ID[15:8] The Device Chip Type and Family */ |
Vkadaba | 5:0728bde67bdb | 128 | }; |
Vkadaba | 5:0728bde67bdb | 129 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 130 | }; |
Vkadaba | 5:0728bde67bdb | 131 | } ADMW_SPI_Product_ID_H_t; |
Vkadaba | 5:0728bde67bdb | 132 | |
Vkadaba | 5:0728bde67bdb | 133 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 134 | |
Vkadaba | 5:0728bde67bdb | 135 | /** @defgroup Scratch_Pad Scratch Pad (Scratch_Pad) Register |
Vkadaba | 5:0728bde67bdb | 136 | * Scratch Pad (Scratch_Pad) Register. |
Vkadaba | 5:0728bde67bdb | 137 | * @{ |
Vkadaba | 5:0728bde67bdb | 138 | */ |
Vkadaba | 5:0728bde67bdb | 139 | |
Vkadaba | 5:0728bde67bdb | 140 | /* ========================================================================== |
Vkadaba | 5:0728bde67bdb | 141 | *! \struct ADMW_SPI_Scratch_Pad_Struct |
Vkadaba | 5:0728bde67bdb | 142 | *! \brief Scratch Pad Register bit field structure |
Vkadaba | 5:0728bde67bdb | 143 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 144 | typedef struct _ADMW_SPI_Scratch_Pad_t { |
Vkadaba | 5:0728bde67bdb | 145 | union { |
Vkadaba | 5:0728bde67bdb | 146 | struct { |
Vkadaba | 5:0728bde67bdb | 147 | uint8_t Scratch_Value : 8; /**< Software Scratchpad */ |
Vkadaba | 5:0728bde67bdb | 148 | }; |
Vkadaba | 5:0728bde67bdb | 149 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 150 | }; |
Vkadaba | 5:0728bde67bdb | 151 | } ADMW_SPI_Scratch_Pad_t; |
Vkadaba | 5:0728bde67bdb | 152 | |
Vkadaba | 5:0728bde67bdb | 153 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 154 | |
Vkadaba | 5:0728bde67bdb | 155 | /** @defgroup SPI_Revision SPI Revision (SPI_Revision) Register |
Vkadaba | 5:0728bde67bdb | 156 | * SPI Revision (SPI_Revision) Register. |
Vkadaba | 5:0728bde67bdb | 157 | * @{ |
Vkadaba | 5:0728bde67bdb | 158 | */ |
Vkadaba | 5:0728bde67bdb | 159 | |
Vkadaba | 5:0728bde67bdb | 160 | /* ========================================================================= |
Vkadaba | 5:0728bde67bdb | 161 | *! \enum ADMW_SPI_SPI_Revision_Version |
Vkadaba | 5:0728bde67bdb | 162 | *! \brief SPI Version (Version) Enumerations |
Vkadaba | 5:0728bde67bdb | 163 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 164 | typedef enum |
Vkadaba | 5:0728bde67bdb | 165 | { |
Vkadaba | 5:0728bde67bdb | 166 | SPI_SPI_REVISION_REV1_0 = 2 /**< Revision 1.0 */ |
Vkadaba | 5:0728bde67bdb | 167 | } ADMW_SPI_SPI_Revision_Version; |
Vkadaba | 5:0728bde67bdb | 168 | |
Vkadaba | 5:0728bde67bdb | 169 | |
Vkadaba | 5:0728bde67bdb | 170 | /* ========================================================================= |
Vkadaba | 5:0728bde67bdb | 171 | *! \enum ADMW_SPI_SPI_Revision_SPI_Type |
Vkadaba | 5:0728bde67bdb | 172 | *! \brief Always Reads as 0x2 (SPI_Type) Enumerations |
Vkadaba | 5:0728bde67bdb | 173 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 174 | typedef enum |
Vkadaba | 5:0728bde67bdb | 175 | { |
Vkadaba | 32:52445bef314d | 176 | SPI_SPI_REVISION_ADI_SPI = 0, /**< ADI_SPI */ |
Vkadaba | 32:52445bef314d | 177 | SPI_SPI_REVISION_LPT_SPI = 2 /**< LPT_SPI */ |
Vkadaba | 5:0728bde67bdb | 178 | } ADMW_SPI_SPI_Revision_SPI_Type; |
Vkadaba | 5:0728bde67bdb | 179 | |
Vkadaba | 5:0728bde67bdb | 180 | |
Vkadaba | 5:0728bde67bdb | 181 | /* ========================================================================== |
Vkadaba | 5:0728bde67bdb | 182 | *! \struct ADMW_SPI_SPI_Revision_Struct |
Vkadaba | 5:0728bde67bdb | 183 | *! \brief SPI Revision Register bit field structure |
Vkadaba | 5:0728bde67bdb | 184 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 185 | typedef struct _ADMW_SPI_SPI_Revision_t { |
Vkadaba | 5:0728bde67bdb | 186 | union { |
Vkadaba | 5:0728bde67bdb | 187 | struct { |
Vkadaba | 5:0728bde67bdb | 188 | uint8_t Version : 6; /**< SPI Version */ |
Vkadaba | 5:0728bde67bdb | 189 | uint8_t SPI_Type : 2; /**< Always Reads as 0x2 */ |
Vkadaba | 5:0728bde67bdb | 190 | }; |
Vkadaba | 5:0728bde67bdb | 191 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 192 | }; |
Vkadaba | 5:0728bde67bdb | 193 | } ADMW_SPI_SPI_Revision_t; |
Vkadaba | 5:0728bde67bdb | 194 | |
Vkadaba | 5:0728bde67bdb | 195 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 196 | |
Vkadaba | 5:0728bde67bdb | 197 | /** @defgroup Vendor_L Vendor ID Low (Vendor_L) Register |
Vkadaba | 5:0728bde67bdb | 198 | * Vendor ID Low (Vendor_L) Register. |
Vkadaba | 5:0728bde67bdb | 199 | * @{ |
Vkadaba | 5:0728bde67bdb | 200 | */ |
Vkadaba | 5:0728bde67bdb | 201 | |
Vkadaba | 5:0728bde67bdb | 202 | /* ========================================================================== |
Vkadaba | 5:0728bde67bdb | 203 | *! \struct ADMW_SPI_Vendor_L_Struct |
Vkadaba | 5:0728bde67bdb | 204 | *! \brief Vendor ID Low Register bit field structure |
Vkadaba | 5:0728bde67bdb | 205 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 206 | typedef struct _ADMW_SPI_Vendor_L_t { |
Vkadaba | 5:0728bde67bdb | 207 | union { |
Vkadaba | 5:0728bde67bdb | 208 | struct { |
Vkadaba | 5:0728bde67bdb | 209 | uint8_t VID : 8; /**< VID[7:0] Analog Devices Vendor ID */ |
Vkadaba | 5:0728bde67bdb | 210 | }; |
Vkadaba | 5:0728bde67bdb | 211 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 212 | }; |
Vkadaba | 5:0728bde67bdb | 213 | } ADMW_SPI_Vendor_L_t; |
Vkadaba | 5:0728bde67bdb | 214 | |
Vkadaba | 5:0728bde67bdb | 215 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 216 | |
Vkadaba | 5:0728bde67bdb | 217 | /** @defgroup Vendor_H Vendor ID High (Vendor_H) Register |
Vkadaba | 5:0728bde67bdb | 218 | * Vendor ID High (Vendor_H) Register. |
Vkadaba | 5:0728bde67bdb | 219 | * @{ |
Vkadaba | 5:0728bde67bdb | 220 | */ |
Vkadaba | 5:0728bde67bdb | 221 | |
Vkadaba | 5:0728bde67bdb | 222 | /* ========================================================================== |
Vkadaba | 5:0728bde67bdb | 223 | *! \struct ADMW_SPI_Vendor_H_Struct |
Vkadaba | 5:0728bde67bdb | 224 | *! \brief Vendor ID High Register bit field structure |
Vkadaba | 5:0728bde67bdb | 225 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 226 | typedef struct _ADMW_SPI_Vendor_H_t { |
Vkadaba | 5:0728bde67bdb | 227 | union { |
Vkadaba | 5:0728bde67bdb | 228 | struct { |
Vkadaba | 5:0728bde67bdb | 229 | uint8_t VID : 8; /**< VID[15:8] Analog Devices Vendor ID */ |
Vkadaba | 5:0728bde67bdb | 230 | }; |
Vkadaba | 5:0728bde67bdb | 231 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 232 | }; |
Vkadaba | 5:0728bde67bdb | 233 | } ADMW_SPI_Vendor_H_t; |
Vkadaba | 5:0728bde67bdb | 234 | |
Vkadaba | 5:0728bde67bdb | 235 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 236 | |
Vkadaba | 5:0728bde67bdb | 237 | /** @defgroup Stream_Mode Stream Mode (Stream_Mode) Register |
Vkadaba | 5:0728bde67bdb | 238 | * Stream Mode (Stream_Mode) Register. |
Vkadaba | 5:0728bde67bdb | 239 | * @{ |
Vkadaba | 5:0728bde67bdb | 240 | */ |
Vkadaba | 5:0728bde67bdb | 241 | |
Vkadaba | 5:0728bde67bdb | 242 | /* ========================================================================== |
Vkadaba | 5:0728bde67bdb | 243 | *! \struct ADMW_SPI_Stream_Mode_Struct |
Vkadaba | 5:0728bde67bdb | 244 | *! \brief Stream Mode Register bit field structure |
Vkadaba | 5:0728bde67bdb | 245 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 246 | typedef struct _ADMW_SPI_Stream_Mode_t { |
Vkadaba | 5:0728bde67bdb | 247 | union { |
Vkadaba | 5:0728bde67bdb | 248 | struct { |
Vkadaba | 32:52445bef314d | 249 | uint8_t Loop_Count : 8; /**< Set the Data Byte Count Before Looping to Start Address */ |
Vkadaba | 5:0728bde67bdb | 250 | }; |
Vkadaba | 5:0728bde67bdb | 251 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 252 | }; |
Vkadaba | 5:0728bde67bdb | 253 | } ADMW_SPI_Stream_Mode_t; |
Vkadaba | 5:0728bde67bdb | 254 | |
Vkadaba | 5:0728bde67bdb | 255 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 256 | |
Vkadaba | 5:0728bde67bdb | 257 | /** @defgroup Interface_Status_A Interface Status A (Interface_Status_A) Register |
Vkadaba | 5:0728bde67bdb | 258 | * Interface Status A (Interface_Status_A) Register. |
Vkadaba | 5:0728bde67bdb | 259 | * @{ |
Vkadaba | 5:0728bde67bdb | 260 | */ |
Vkadaba | 5:0728bde67bdb | 261 | |
Vkadaba | 5:0728bde67bdb | 262 | /* ========================================================================== |
Vkadaba | 5:0728bde67bdb | 263 | *! \struct ADMW_SPI_Interface_Status_A_Struct |
Vkadaba | 5:0728bde67bdb | 264 | *! \brief Interface Status A Register bit field structure |
Vkadaba | 5:0728bde67bdb | 265 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 266 | typedef struct _ADMW_SPI_Interface_Status_A_t { |
Vkadaba | 5:0728bde67bdb | 267 | union { |
Vkadaba | 5:0728bde67bdb | 268 | struct { |
Vkadaba | 32:52445bef314d | 269 | uint8_t Address_Invalid_Error : 1; /**< Attempt to Read/Write Nonexistent Register Address */ |
Vkadaba | 5:0728bde67bdb | 270 | uint8_t Register_Partial_Access_Error : 1; /**< Set When Fewer Than Expected Number of Bytes Read/Written */ |
Vkadaba | 32:52445bef314d | 271 | uint8_t Wr_To_Rd_Only_Reg_Error : 1; /**< Write to Read Only Register Attempted */ |
Vkadaba | 5:0728bde67bdb | 272 | uint8_t CRC_Error : 1; /**< Invalid/No CRC Received */ |
Vkadaba | 5:0728bde67bdb | 273 | uint8_t Clock_Count_Error : 1; /**< Incorrect Number of Clocks Detected in a Transaction */ |
Vkadaba | 5:0728bde67bdb | 274 | uint8_t reserved5 : 2; |
Vkadaba | 5:0728bde67bdb | 275 | uint8_t Not_Ready_Error : 1; /**< Device Not Ready for Transaction */ |
Vkadaba | 5:0728bde67bdb | 276 | }; |
Vkadaba | 5:0728bde67bdb | 277 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 278 | }; |
Vkadaba | 5:0728bde67bdb | 279 | } ADMW_SPI_Interface_Status_A_t; |
Vkadaba | 5:0728bde67bdb | 280 | |
Vkadaba | 5:0728bde67bdb | 281 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 282 | |
Vkadaba | 32:52445bef314d | 283 | /** @defgroup Command Special Command Register (Command) Register |
Vkadaba | 32:52445bef314d | 284 | * Special Command Register (Command) Register. |
Vkadaba | 5:0728bde67bdb | 285 | * @{ |
Vkadaba | 5:0728bde67bdb | 286 | */ |
Vkadaba | 5:0728bde67bdb | 287 | |
Vkadaba | 5:0728bde67bdb | 288 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 289 | *! \enum ADMW_CORE_Command_Special_Command |
Vkadaba | 5:0728bde67bdb | 290 | *! \brief Special Command (Special_Command) Enumerations |
Vkadaba | 5:0728bde67bdb | 291 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 292 | typedef enum |
Vkadaba | 5:0728bde67bdb | 293 | { |
Vkadaba | 32:52445bef314d | 294 | CORE_COMMAND_NOP = 0, /**< No command */ |
Vkadaba | 32:52445bef314d | 295 | CORE_COMMAND_CONVERT = 1, /**< Start ADC conversions */ |
Vkadaba | 32:52445bef314d | 296 | CORE_COMMAND_CONVERT_WITH_RAW = 2, /**< Start conversions with added raw ADC data */ |
Vkadaba | 32:52445bef314d | 297 | CORE_COMMAND_LATCH_CONFIG = 7, /**< Latch configuration. */ |
Vkadaba | 32:52445bef314d | 298 | CORE_COMMAND_LOAD_LUT = 8, /**< Load LUT from flash */ |
Vkadaba | 32:52445bef314d | 299 | CORE_COMMAND_SAVE_LUT = 9, /**< Save LUT to flash */ |
Vkadaba | 32:52445bef314d | 300 | CORE_COMMAND_LOAD_CONFIG_1 = 24, /**< Load registers with configuration from flash */ |
Vkadaba | 32:52445bef314d | 301 | CORE_COMMAND_SAVE_CONFIG_1 = 25 /**< Store current registers to flash configuration */ |
Vkadaba | 8:2f2775c34640 | 302 | } ADMW_CORE_Command_Special_Command; |
Vkadaba | 5:0728bde67bdb | 303 | |
Vkadaba | 5:0728bde67bdb | 304 | |
Vkadaba | 5:0728bde67bdb | 305 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 306 | *! \struct ADMW_CORE_Command_Struct |
Vkadaba | 5:0728bde67bdb | 307 | *! \brief Special Command Register bit field structure |
Vkadaba | 5:0728bde67bdb | 308 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 309 | typedef struct _ADMW_CORE_Command_t { |
Vkadaba | 5:0728bde67bdb | 310 | union { |
Vkadaba | 5:0728bde67bdb | 311 | struct { |
Vkadaba | 5:0728bde67bdb | 312 | uint8_t Special_Command : 8; /**< Special Command */ |
Vkadaba | 5:0728bde67bdb | 313 | }; |
Vkadaba | 5:0728bde67bdb | 314 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 315 | }; |
Vkadaba | 8:2f2775c34640 | 316 | } ADMW_CORE_Command_t; |
Vkadaba | 5:0728bde67bdb | 317 | |
Vkadaba | 5:0728bde67bdb | 318 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 319 | |
Vkadaba | 5:0728bde67bdb | 320 | /** @defgroup Mode Operating Mode and DRDY Control (Mode) Register |
Vkadaba | 5:0728bde67bdb | 321 | * Operating Mode and DRDY Control (Mode) Register. |
Vkadaba | 5:0728bde67bdb | 322 | * @{ |
Vkadaba | 5:0728bde67bdb | 323 | */ |
Vkadaba | 5:0728bde67bdb | 324 | |
Vkadaba | 5:0728bde67bdb | 325 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 326 | *! \enum ADMW_CORE_Mode_Conversion_Mode |
Vkadaba | 5:0728bde67bdb | 327 | *! \brief Conversion Mode (Conversion_Mode) Enumerations |
Vkadaba | 5:0728bde67bdb | 328 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 329 | typedef enum |
Vkadaba | 5:0728bde67bdb | 330 | { |
Vkadaba | 32:52445bef314d | 331 | CORE_MODE_SINGLECYCLE = 0, /**< Single cycle conversion mode. A cycle is completed every time a convert command is issued */ |
Vkadaba | 32:52445bef314d | 332 | CORE_MODE_RESERVED = 1, /**< Reserved for future use */ |
Vkadaba | 32:52445bef314d | 333 | CORE_MODE_CONTINUOUS = 2 /**< Continuous conversion mode. A cycle is started repeatedly at time specified in cycle time */ |
Vkadaba | 8:2f2775c34640 | 334 | } ADMW_CORE_Mode_Conversion_Mode; |
Vkadaba | 5:0728bde67bdb | 335 | |
Vkadaba | 5:0728bde67bdb | 336 | |
Vkadaba | 5:0728bde67bdb | 337 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 338 | *! \enum ADMW_CORE_Mode_Drdy_Mode |
Vkadaba | 32:52445bef314d | 339 | *! \brief Indicates Behavior of DRDY Pin (Drdy_Mode) Enumerations |
Vkadaba | 5:0728bde67bdb | 340 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 341 | typedef enum |
Vkadaba | 5:0728bde67bdb | 342 | { |
Vkadaba | 32:52445bef314d | 343 | CORE_MODE_DRDY_PER_CONVERSION = 0, /**< Data ready per conversion */ |
Vkadaba | 50:d84305e5e1c0 | 344 | CORE_MODE_DRDY_PER_CYCLE = 1, /**< Data ready per cycle */ |
Vkadaba | 50:d84305e5e1c0 | 345 | CORE_MODE_DRDY_PER_FIFO_FILL = 2 |
Vkadaba | 8:2f2775c34640 | 346 | } ADMW_CORE_Mode_Drdy_Mode; |
Vkadaba | 5:0728bde67bdb | 347 | |
Vkadaba | 5:0728bde67bdb | 348 | |
Vkadaba | 5:0728bde67bdb | 349 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 350 | *! \struct ADMW_CORE_Mode_Struct |
Vkadaba | 5:0728bde67bdb | 351 | *! \brief Operating Mode and DRDY Control Register bit field structure |
Vkadaba | 5:0728bde67bdb | 352 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 353 | typedef struct _ADMW_CORE_Mode_t { |
Vkadaba | 5:0728bde67bdb | 354 | union { |
Vkadaba | 5:0728bde67bdb | 355 | struct { |
Vkadaba | 5:0728bde67bdb | 356 | uint8_t Conversion_Mode : 2; /**< Conversion Mode */ |
Vkadaba | 32:52445bef314d | 357 | uint8_t Drdy_Mode : 2; /**< Indicates Behavior of DRDY Pin */ |
Vkadaba | 6:9d393a9677f4 | 358 | uint8_t reserved4 : 4; |
Vkadaba | 5:0728bde67bdb | 359 | }; |
Vkadaba | 5:0728bde67bdb | 360 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 361 | }; |
Vkadaba | 8:2f2775c34640 | 362 | } ADMW_CORE_Mode_t; |
Vkadaba | 5:0728bde67bdb | 363 | |
Vkadaba | 5:0728bde67bdb | 364 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 365 | |
Vkadaba | 32:52445bef314d | 366 | /** @defgroup Power_Config Power Configuration (Power_Config) Register |
Vkadaba | 32:52445bef314d | 367 | * Power Configuration (Power_Config) Register. |
Vkadaba | 5:0728bde67bdb | 368 | * @{ |
Vkadaba | 5:0728bde67bdb | 369 | */ |
Vkadaba | 5:0728bde67bdb | 370 | |
Vkadaba | 5:0728bde67bdb | 371 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 372 | *! \enum ADMW_CORE_Power_Config_Power_Mode_MCU |
Vkadaba | 6:9d393a9677f4 | 373 | *! \brief MCU Power Mode (Power_Mode_MCU) Enumerations |
Vkadaba | 5:0728bde67bdb | 374 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 375 | typedef enum |
Vkadaba | 5:0728bde67bdb | 376 | { |
Vkadaba | 32:52445bef314d | 377 | CORE_POWER_CONFIG_ACTIVE_MODE = 0, /**< ADMW1001 is fully power up and ready to convert */ |
Vkadaba | 32:52445bef314d | 378 | CORE_POWER_CONFIG_HIBERNATION = 1 /**< Lowest power mode. wakeup pin required to enter active mode. SPI powered down */ |
Vkadaba | 8:2f2775c34640 | 379 | } ADMW_CORE_Power_Config_Power_Mode_MCU; |
Vkadaba | 5:0728bde67bdb | 380 | |
Vkadaba | 5:0728bde67bdb | 381 | |
Vkadaba | 5:0728bde67bdb | 382 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 383 | *! \struct ADMW_CORE_Power_Config_Struct |
Vkadaba | 32:52445bef314d | 384 | *! \brief Power Configuration Register bit field structure |
Vkadaba | 5:0728bde67bdb | 385 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 386 | typedef struct _ADMW_CORE_Power_Config_t { |
Vkadaba | 5:0728bde67bdb | 387 | union { |
Vkadaba | 5:0728bde67bdb | 388 | struct { |
Vkadaba | 6:9d393a9677f4 | 389 | uint8_t Power_Mode_MCU : 1; /**< MCU Power Mode */ |
Vkadaba | 6:9d393a9677f4 | 390 | uint8_t reserved1 : 7; |
Vkadaba | 5:0728bde67bdb | 391 | }; |
Vkadaba | 5:0728bde67bdb | 392 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 393 | }; |
Vkadaba | 8:2f2775c34640 | 394 | } ADMW_CORE_Power_Config_t; |
Vkadaba | 5:0728bde67bdb | 395 | |
Vkadaba | 5:0728bde67bdb | 396 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 397 | |
Vkadaba | 5:0728bde67bdb | 398 | /** @defgroup Cycle_Control Measurement Cycle (Cycle_Control) Register |
Vkadaba | 5:0728bde67bdb | 399 | * Measurement Cycle (Cycle_Control) Register. |
Vkadaba | 5:0728bde67bdb | 400 | * @{ |
Vkadaba | 5:0728bde67bdb | 401 | */ |
Vkadaba | 5:0728bde67bdb | 402 | |
Vkadaba | 5:0728bde67bdb | 403 | /* ========================================================================= |
Vkadaba | 43:e1789b7214cf | 404 | *! \enum ADMW_CORE_Cycle_Control_GND_SW_CTRL |
Vkadaba | 43:e1789b7214cf | 405 | *! \brief Ground Switch Cycle Control (GND_SW_CTRL) Enumerations |
Vkadaba | 43:e1789b7214cf | 406 | * ========================================================================= */ |
Vkadaba | 43:e1789b7214cf | 407 | typedef enum |
Vkadaba | 43:e1789b7214cf | 408 | { |
Vkadaba | 50:d84305e5e1c0 | 409 | CORE_CYCLE_CONTROL_OPEN_SW = 0, /**< Ground Switch Opens outside of measurement cycle to conserve power */ |
Vkadaba | 50:d84305e5e1c0 | 410 | CORE_CYCLE_CONTROL_CLOSE_SW = 1 /**< Ground Switch Closed */ |
Vkadaba | 43:e1789b7214cf | 411 | } ADMW_CORE_Cycle_Control_GND_SW_CTRL; |
Vkadaba | 43:e1789b7214cf | 412 | |
Vkadaba | 44:94bdfaefddac | 413 | |
Vkadaba | 43:e1789b7214cf | 414 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 415 | *! \enum ADMW_CORE_Cycle_Control_Vbias |
Vkadaba | 8:2f2775c34640 | 416 | *! \brief Voltage Bias Global Enable (Vbias) Enumerations |
Vkadaba | 8:2f2775c34640 | 417 | * ========================================================================= */ |
Vkadaba | 8:2f2775c34640 | 418 | typedef enum |
Vkadaba | 8:2f2775c34640 | 419 | { |
Vkadaba | 32:52445bef314d | 420 | CORE_CYCLE_CONTROL_VBIAS_DISABLE = 0, /**< Vbias disabled */ |
Vkadaba | 32:52445bef314d | 421 | CORE_CYCLE_CONTROL_VBIAS_ENABLE = 1 /**< Enable Vbias output for the duration of a cycle */ |
Vkadaba | 8:2f2775c34640 | 422 | } ADMW_CORE_Cycle_Control_Vbias; |
Vkadaba | 8:2f2775c34640 | 423 | |
Vkadaba | 8:2f2775c34640 | 424 | |
Vkadaba | 8:2f2775c34640 | 425 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 426 | *! \enum ADMW_CORE_Cycle_Control_Cycle_Time_Units |
Vkadaba | 5:0728bde67bdb | 427 | *! \brief Units for Cycle Time (Cycle_Time_Units) Enumerations |
Vkadaba | 5:0728bde67bdb | 428 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 429 | typedef enum |
Vkadaba | 5:0728bde67bdb | 430 | { |
Vkadaba | 32:52445bef314d | 431 | CORE_CYCLE_CONTROL_MILLISECONDS = 0, /**< Milli-seconds */ |
Vkadaba | 8:2f2775c34640 | 432 | CORE_CYCLE_CONTROL_SECONDS = 1 /**< Seconds */ |
Vkadaba | 8:2f2775c34640 | 433 | } ADMW_CORE_Cycle_Control_Cycle_Time_Units; |
Vkadaba | 5:0728bde67bdb | 434 | |
Vkadaba | 44:94bdfaefddac | 435 | |
Vkadaba | 43:e1789b7214cf | 436 | /* ========================================================================= |
Vkadaba | 43:e1789b7214cf | 437 | *! \enum ADMW_CORE_Cycle_Control_PST_MEAS_EXC_CTRL |
Vkadaba | 43:e1789b7214cf | 438 | *! \brief Disable Current Sources After Measurement Completes (PST_MEAS_EXC_CTRL) Enumerations |
Vkadaba | 43:e1789b7214cf | 439 | * ========================================================================= */ |
Vkadaba | 43:e1789b7214cf | 440 | typedef enum |
Vkadaba | 43:e1789b7214cf | 441 | { |
Vkadaba | 43:e1789b7214cf | 442 | CORE_CYCLE_CONTROL_POWERCYCLE = 0, /**< */ |
Vkadaba | 43:e1789b7214cf | 443 | CORE_CYCLE_CONTROL_ALWAYSON = 1 /**< */ |
Vkadaba | 43:e1789b7214cf | 444 | } ADMW_CORE_Cycle_Control_PST_MEAS_EXC_CTRL; |
Vkadaba | 5:0728bde67bdb | 445 | |
Vkadaba | 44:94bdfaefddac | 446 | |
Vkadaba | 5:0728bde67bdb | 447 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 448 | *! \struct ADMW_CORE_Cycle_Control_Struct |
Vkadaba | 5:0728bde67bdb | 449 | *! \brief Measurement Cycle Register bit field structure |
Vkadaba | 5:0728bde67bdb | 450 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 451 | typedef struct _ADMW_CORE_Cycle_Control_t { |
Vkadaba | 5:0728bde67bdb | 452 | union { |
Vkadaba | 5:0728bde67bdb | 453 | struct { |
Vkadaba | 32:52445bef314d | 454 | uint16_t Cycle_Time : 12; /**< Time Between Measurement Cycles */ |
Vkadaba | 43:e1789b7214cf | 455 | uint16_t GND_SW_CTRL : 1; /**< Ground Switch Cycle Control */ |
Vkadaba | 44:94bdfaefddac | 456 | uint16_t Vbias : 1; /**< Voltage Bias Global Enable */ |
Vkadaba | 32:52445bef314d | 457 | uint16_t Cycle_Time_Units : 1; /**< Units for Cycle Time */ |
Vkadaba | 43:e1789b7214cf | 458 | uint16_t PST_MEAS_EXC_CTRL : 1; /**< Disable Current Sources After Measurement Completes */ |
Vkadaba | 5:0728bde67bdb | 459 | }; |
Vkadaba | 5:0728bde67bdb | 460 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 461 | }; |
Vkadaba | 8:2f2775c34640 | 462 | } ADMW_CORE_Cycle_Control_t; |
Vkadaba | 5:0728bde67bdb | 463 | |
Vkadaba | 5:0728bde67bdb | 464 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 465 | |
Vkadaba | 32:52445bef314d | 466 | /** @defgroup Fifo_Num_Cycles Number of Measurement Cycles to Store in FIFO (Fifo_Num_Cycles) Register |
Vkadaba | 32:52445bef314d | 467 | * Number of Measurement Cycles to Store in FIFO (Fifo_Num_Cycles) Register. |
Vkadaba | 32:52445bef314d | 468 | * @{ |
Vkadaba | 32:52445bef314d | 469 | */ |
Vkadaba | 32:52445bef314d | 470 | |
Vkadaba | 32:52445bef314d | 471 | /* ========================================================================== |
Vkadaba | 32:52445bef314d | 472 | *! \struct ADMW_CORE_Fifo_Num_Cycles_Struct |
Vkadaba | 32:52445bef314d | 473 | *! \brief Number of Measurement Cycles to Store in FIFO Register bit field structure |
Vkadaba | 32:52445bef314d | 474 | * ========================================================================== */ |
Vkadaba | 32:52445bef314d | 475 | typedef struct _ADMW_CORE_Fifo_Num_Cycles_t { |
Vkadaba | 32:52445bef314d | 476 | union { |
Vkadaba | 32:52445bef314d | 477 | struct { |
Vkadaba | 32:52445bef314d | 478 | uint8_t Fifo_Num_Cycles : 8; /**< Number of Cycles to Fill the FIFO */ |
Vkadaba | 32:52445bef314d | 479 | }; |
Vkadaba | 32:52445bef314d | 480 | uint8_t VALUE8; |
Vkadaba | 32:52445bef314d | 481 | }; |
Vkadaba | 32:52445bef314d | 482 | } ADMW_CORE_Fifo_Num_Cycles_t; |
Vkadaba | 32:52445bef314d | 483 | |
Vkadaba | 32:52445bef314d | 484 | /*@}*/ |
Vkadaba | 32:52445bef314d | 485 | |
Vkadaba | 5:0728bde67bdb | 486 | /** @defgroup Status General Status (Status) Register |
Vkadaba | 5:0728bde67bdb | 487 | * General Status (Status) Register. |
Vkadaba | 5:0728bde67bdb | 488 | * @{ |
Vkadaba | 5:0728bde67bdb | 489 | */ |
Vkadaba | 5:0728bde67bdb | 490 | |
Vkadaba | 5:0728bde67bdb | 491 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 492 | *! \struct ADMW_CORE_Status_Struct |
Vkadaba | 5:0728bde67bdb | 493 | *! \brief General Status Register bit field structure |
Vkadaba | 5:0728bde67bdb | 494 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 495 | typedef struct _ADMW_CORE_Status_t { |
Vkadaba | 5:0728bde67bdb | 496 | union { |
Vkadaba | 5:0728bde67bdb | 497 | struct { |
Vkadaba | 32:52445bef314d | 498 | uint8_t Configuration_Error : 1; /**< Indicates Error with Programmed Configuration */ |
Vkadaba | 32:52445bef314d | 499 | uint8_t Alert_Active : 1; /**< Indicates One or More Sensor Alerts Active */ |
Vkadaba | 32:52445bef314d | 500 | uint8_t Error : 1; /**< Indicates an Error */ |
Vkadaba | 32:52445bef314d | 501 | uint8_t Drdy : 1; /**< Indicates New Sensor Result Available to Read */ |
Vkadaba | 32:52445bef314d | 502 | uint8_t Cmd_Running : 1; /**< Indicates Special Command Active */ |
Vkadaba | 32:52445bef314d | 503 | uint8_t FIFO_Error : 1; /**< Indicates Error with FIFO */ |
Vkadaba | 32:52445bef314d | 504 | uint8_t Diag_Checksum_Error : 1; /**< Indicates Error on Internal Checksum Calculations */ |
Vkadaba | 32:52445bef314d | 505 | uint8_t LUT_Error : 1; /**< Indicates Error with One or More Lookup Tables */ |
Vkadaba | 5:0728bde67bdb | 506 | }; |
Vkadaba | 5:0728bde67bdb | 507 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 508 | }; |
Vkadaba | 8:2f2775c34640 | 509 | } ADMW_CORE_Status_t; |
Vkadaba | 5:0728bde67bdb | 510 | |
Vkadaba | 5:0728bde67bdb | 511 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 512 | |
Vkadaba | 5:0728bde67bdb | 513 | /** @defgroup Channel_Alert_Status Alert Status Summary (Channel_Alert_Status) Register |
Vkadaba | 5:0728bde67bdb | 514 | * Alert Status Summary (Channel_Alert_Status) Register. |
Vkadaba | 5:0728bde67bdb | 515 | * @{ |
Vkadaba | 5:0728bde67bdb | 516 | */ |
Vkadaba | 5:0728bde67bdb | 517 | |
Vkadaba | 5:0728bde67bdb | 518 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 519 | *! \struct ADMW_CORE_Channel_Alert_Status_Struct |
Vkadaba | 5:0728bde67bdb | 520 | *! \brief Alert Status Summary Register bit field structure |
Vkadaba | 5:0728bde67bdb | 521 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 522 | typedef struct _ADMW_CORE_Channel_Alert_Status_t { |
Vkadaba | 5:0728bde67bdb | 523 | union { |
Vkadaba | 5:0728bde67bdb | 524 | struct { |
Vkadaba | 32:52445bef314d | 525 | uint16_t Alert_Ch0 : 1; /**< Indicates Channel 0 Alert Active */ |
Vkadaba | 32:52445bef314d | 526 | uint16_t Alert_Ch1 : 1; /**< Indicates Channel 1 Alert Active */ |
Vkadaba | 32:52445bef314d | 527 | uint16_t Alert_Ch2 : 1; /**< Indicates Channel 2 Alert Active */ |
Vkadaba | 32:52445bef314d | 528 | uint16_t Alert_Ch3 : 1; /**< Indicates Channel 3 Alert Active */ |
Vkadaba | 32:52445bef314d | 529 | uint16_t Alert_Ch4 : 1; /**< Indicates Channel 4 Alert Active */ |
Vkadaba | 32:52445bef314d | 530 | uint16_t Alert_Ch5 : 1; /**< Indicates Channel 5Alert Active */ |
Vkadaba | 32:52445bef314d | 531 | uint16_t Alert_Ch6 : 1; /**< Indicates Channel 6 Alert Active */ |
Vkadaba | 32:52445bef314d | 532 | uint16_t Alert_Ch7 : 1; /**< Indicates Channel 7 Alert Active */ |
Vkadaba | 32:52445bef314d | 533 | uint16_t Alert_Ch8 : 1; /**< Indicates Channel 8 Alert Active */ |
Vkadaba | 32:52445bef314d | 534 | uint16_t Alert_Ch9 : 1; /**< Indicates Channel 9 Alert Active */ |
Vkadaba | 32:52445bef314d | 535 | uint16_t Alert_Ch10 : 1; /**< Indicates Channel 10 Alert Active */ |
Vkadaba | 32:52445bef314d | 536 | uint16_t Alert_Ch11 : 1; /**< Indicates Channel 11 Alert Active */ |
Vkadaba | 32:52445bef314d | 537 | uint16_t Alert_Ch12 : 1; /**< Indicates Channel 12 Alert Active */ |
Vkadaba | 32:52445bef314d | 538 | uint16_t reserved13 : 3; |
Vkadaba | 5:0728bde67bdb | 539 | }; |
Vkadaba | 5:0728bde67bdb | 540 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 541 | }; |
Vkadaba | 8:2f2775c34640 | 542 | } ADMW_CORE_Channel_Alert_Status_t; |
Vkadaba | 5:0728bde67bdb | 543 | |
Vkadaba | 5:0728bde67bdb | 544 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 545 | |
Vkadaba | 32:52445bef314d | 546 | /** @defgroup Alert_Detail_Ch Detailed Channel Error Information (Alert_Detail_Ch) Register |
Vkadaba | 32:52445bef314d | 547 | * Detailed Channel Error Information (Alert_Detail_Ch) Register. |
Vkadaba | 5:0728bde67bdb | 548 | * @{ |
Vkadaba | 5:0728bde67bdb | 549 | */ |
Vkadaba | 5:0728bde67bdb | 550 | |
Vkadaba | 5:0728bde67bdb | 551 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 552 | *! \struct ADMW_CORE_Alert_Detail_Ch_Struct |
Vkadaba | 32:52445bef314d | 553 | *! \brief Detailed Channel Error Information Register bit field structure |
Vkadaba | 5:0728bde67bdb | 554 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 555 | typedef struct _ADMW_CORE_Alert_Detail_Ch_t { |
Vkadaba | 5:0728bde67bdb | 556 | union { |
Vkadaba | 5:0728bde67bdb | 557 | struct { |
Vkadaba | 32:52445bef314d | 558 | uint16_t Result_Valid : 1; /**< Set If a Result is Valid */ |
Vkadaba | 32:52445bef314d | 559 | uint16_t ADC_Near_Overrange : 1; /**< Indicates If the ADC is Near Overrange */ |
Vkadaba | 32:52445bef314d | 560 | uint16_t Sensor_UnderRange : 1; /**< Indicates If the Sensor is Underrange */ |
Vkadaba | 32:52445bef314d | 561 | uint16_t Sensor_OverRange : 1; /**< Indicates If the Sensor is Overrange */ |
Vkadaba | 32:52445bef314d | 562 | uint16_t CJ_Soft_Fault : 1; /**< Cold Junction Soft Fault */ |
Vkadaba | 32:52445bef314d | 563 | uint16_t CJ_Hard_Fault : 1; /**< Cold Junction Hard Fault */ |
Vkadaba | 50:d84305e5e1c0 | 564 | uint16_t ADC_Input_OverRange : 1; /**< Indicates the ADC Input is Overrange */ |
Vkadaba | 50:d84305e5e1c0 | 565 | uint16_t Sensor_HardFault : 1; /**< Indicates Sensor Hard Fault */ |
Vkadaba | 50:d84305e5e1c0 | 566 | uint16_t Threshold_Exceeded : 1; |
Vkadaba | 50:d84305e5e1c0 | 567 | uint16_t reserved7 : 7; |
Vkadaba | 5:0728bde67bdb | 568 | }; |
Vkadaba | 5:0728bde67bdb | 569 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 570 | }; |
Vkadaba | 8:2f2775c34640 | 571 | } ADMW_CORE_Alert_Detail_Ch_t; |
Vkadaba | 5:0728bde67bdb | 572 | |
Vkadaba | 5:0728bde67bdb | 573 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 574 | |
Vkadaba | 5:0728bde67bdb | 575 | /** @defgroup Error_Code Code Indicating Source of Error (Error_Code) Register |
Vkadaba | 5:0728bde67bdb | 576 | * Code Indicating Source of Error (Error_Code) Register. |
Vkadaba | 5:0728bde67bdb | 577 | * @{ |
Vkadaba | 5:0728bde67bdb | 578 | */ |
Vkadaba | 5:0728bde67bdb | 579 | |
Vkadaba | 5:0728bde67bdb | 580 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 581 | *! \struct ADMW_CORE_Error_Code_Struct |
Vkadaba | 5:0728bde67bdb | 582 | *! \brief Code Indicating Source of Error Register bit field structure |
Vkadaba | 5:0728bde67bdb | 583 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 584 | typedef struct _ADMW_CORE_Error_Code_t { |
Vkadaba | 5:0728bde67bdb | 585 | union { |
Vkadaba | 5:0728bde67bdb | 586 | struct { |
Vkadaba | 5:0728bde67bdb | 587 | uint16_t Error_Code : 16; /**< Code Indicating Type of Error */ |
Vkadaba | 5:0728bde67bdb | 588 | }; |
Vkadaba | 5:0728bde67bdb | 589 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 590 | }; |
Vkadaba | 8:2f2775c34640 | 591 | } ADMW_CORE_Error_Code_t; |
Vkadaba | 5:0728bde67bdb | 592 | |
Vkadaba | 5:0728bde67bdb | 593 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 594 | |
Vkadaba | 32:52445bef314d | 595 | /** @defgroup External_Reference_Resistor External Reference Resistor Value (External_Reference_Resistor) Register |
Vkadaba | 32:52445bef314d | 596 | * External Reference Resistor Value (External_Reference_Resistor) Register. |
Vkadaba | 5:0728bde67bdb | 597 | * @{ |
Vkadaba | 5:0728bde67bdb | 598 | */ |
Vkadaba | 5:0728bde67bdb | 599 | |
Vkadaba | 5:0728bde67bdb | 600 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 601 | *! \struct ADMW_CORE_External_Reference_Resistor_Struct |
Vkadaba | 32:52445bef314d | 602 | *! \brief External Reference Resistor Value Register bit field structure |
Vkadaba | 5:0728bde67bdb | 603 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 604 | typedef struct _ADMW_CORE_External_Reference_Resistor_t { |
Vkadaba | 5:0728bde67bdb | 605 | union { |
Vkadaba | 5:0728bde67bdb | 606 | struct { |
Vkadaba | 32:52445bef314d | 607 | float Ext_Refin1_Value; /**< External Reference Resistor Value */ |
Vkadaba | 5:0728bde67bdb | 608 | }; |
Vkadaba | 5:0728bde67bdb | 609 | float VALUE32; |
Vkadaba | 5:0728bde67bdb | 610 | }; |
Vkadaba | 8:2f2775c34640 | 611 | } ADMW_CORE_External_Reference_Resistor_t; |
Vkadaba | 5:0728bde67bdb | 612 | |
Vkadaba | 5:0728bde67bdb | 613 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 614 | |
Vkadaba | 36:54e2418e7620 | 615 | /** @defgroup External_Voltage_Reference External Reference Information (External_Voltage_Reference) Register |
Vkadaba | 36:54e2418e7620 | 616 | * External Reference Information (External_Voltage_Reference) Register. |
Vkadaba | 36:54e2418e7620 | 617 | * @{ |
Vkadaba | 36:54e2418e7620 | 618 | */ |
Vkadaba | 36:54e2418e7620 | 619 | |
Vkadaba | 36:54e2418e7620 | 620 | /* ========================================================================== |
Vkadaba | 36:54e2418e7620 | 621 | *! \struct ADMW_CORE_External_Voltage_Reference_Struct |
Vkadaba | 36:54e2418e7620 | 622 | *! \brief External Reference Information Register bit field structure |
Vkadaba | 36:54e2418e7620 | 623 | * ========================================================================== */ |
Vkadaba | 36:54e2418e7620 | 624 | typedef struct _ADMW_CORE_External_Voltage_Reference_t { |
Vkadaba | 36:54e2418e7620 | 625 | union { |
Vkadaba | 36:54e2418e7620 | 626 | struct { |
Vkadaba | 36:54e2418e7620 | 627 | float Ext_Refin2_Value; /**< Reference Input Value */ |
Vkadaba | 36:54e2418e7620 | 628 | }; |
Vkadaba | 36:54e2418e7620 | 629 | float VALUE32; |
Vkadaba | 36:54e2418e7620 | 630 | }; |
Vkadaba | 36:54e2418e7620 | 631 | } ADMW_CORE_External_Voltage_Reference_t; |
Vkadaba | 36:54e2418e7620 | 632 | |
Vkadaba | 36:54e2418e7620 | 633 | /*@}*/ |
Vkadaba | 43:e1789b7214cf | 634 | |
Vkadaba | 43:e1789b7214cf | 635 | /** @defgroup AVDD_Voltage AVDD Voltage (AVDD_Voltage) Register |
Vkadaba | 43:e1789b7214cf | 636 | * AVDD Voltage (AVDD_Voltage) Register. |
Vkadaba | 43:e1789b7214cf | 637 | * @{ |
Vkadaba | 43:e1789b7214cf | 638 | */ |
Vkadaba | 43:e1789b7214cf | 639 | |
Vkadaba | 43:e1789b7214cf | 640 | /* ========================================================================== |
Vkadaba | 43:e1789b7214cf | 641 | *! \struct ADMW_CORE_AVDD_Voltage_Struct |
Vkadaba | 43:e1789b7214cf | 642 | *! \brief AVDD Voltage Register bit field structure |
Vkadaba | 43:e1789b7214cf | 643 | * ========================================================================== */ |
Vkadaba | 43:e1789b7214cf | 644 | typedef struct _ADMW_CORE_AVDD_Voltage_t { |
Vkadaba | 43:e1789b7214cf | 645 | union { |
Vkadaba | 43:e1789b7214cf | 646 | struct { |
Vkadaba | 43:e1789b7214cf | 647 | float Avdd_Voltage; /**< AVDD Voltage */ |
Vkadaba | 43:e1789b7214cf | 648 | }; |
Vkadaba | 43:e1789b7214cf | 649 | float VALUE32; |
Vkadaba | 43:e1789b7214cf | 650 | }; |
Vkadaba | 43:e1789b7214cf | 651 | } ADMW_CORE_AVDD_Voltage_t; |
Vkadaba | 43:e1789b7214cf | 652 | |
Vkadaba | 43:e1789b7214cf | 653 | /*@}*/ |
Vkadaba | 43:e1789b7214cf | 654 | |
Vkadaba | 5:0728bde67bdb | 655 | /** @defgroup Diagnostics_Control Diagnostic Control (Diagnostics_Control) Register |
Vkadaba | 5:0728bde67bdb | 656 | * Diagnostic Control (Diagnostics_Control) Register. |
Vkadaba | 5:0728bde67bdb | 657 | * @{ |
Vkadaba | 5:0728bde67bdb | 658 | */ |
Vkadaba | 5:0728bde67bdb | 659 | |
Vkadaba | 5:0728bde67bdb | 660 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 661 | *! \struct ADMW_CORE_Diagnostics_Control_Struct |
Vkadaba | 5:0728bde67bdb | 662 | *! \brief Diagnostic Control Register bit field structure |
Vkadaba | 5:0728bde67bdb | 663 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 664 | typedef struct _ADMW_CORE_Diagnostics_Control_t { |
Vkadaba | 5:0728bde67bdb | 665 | union { |
Vkadaba | 5:0728bde67bdb | 666 | struct { |
Vkadaba | 32:52445bef314d | 667 | uint8_t Diag_Meas_En : 1; /**< Diagnostics Measure Enable */ |
Vkadaba | 44:94bdfaefddac | 668 | uint8_t Diag_OSD_Freq : 7; /**< Diagnostics Open Sensor Detect Frequency */ |
Vkadaba | 5:0728bde67bdb | 669 | }; |
Vkadaba | 32:52445bef314d | 670 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 671 | }; |
Vkadaba | 8:2f2775c34640 | 672 | } ADMW_CORE_Diagnostics_Control_t; |
Vkadaba | 5:0728bde67bdb | 673 | |
Vkadaba | 5:0728bde67bdb | 674 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 675 | |
Vkadaba | 5:0728bde67bdb | 676 | /** @defgroup Data_FIFO FIFO Buffer of Sensor Results (Data_FIFO) Register |
Vkadaba | 5:0728bde67bdb | 677 | * FIFO Buffer of Sensor Results (Data_FIFO) Register. |
Vkadaba | 5:0728bde67bdb | 678 | * @{ |
Vkadaba | 5:0728bde67bdb | 679 | */ |
Vkadaba | 5:0728bde67bdb | 680 | |
Vkadaba | 5:0728bde67bdb | 681 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 682 | *! \struct ADMW_CORE_Data_FIFO_Struct |
Vkadaba | 5:0728bde67bdb | 683 | *! \brief FIFO Buffer of Sensor Results Register bit field structure |
Vkadaba | 5:0728bde67bdb | 684 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 685 | typedef struct _ADMW_CORE_Data_FIFO_t { |
Vkadaba | 5:0728bde67bdb | 686 | union { |
Vkadaba | 5:0728bde67bdb | 687 | struct { |
Vkadaba | 32:52445bef314d | 688 | uint8_t Data_Fifo : 8; /**< FIFO Buffer of Sensor Results */ |
Vkadaba | 5:0728bde67bdb | 689 | }; |
Vkadaba | 5:0728bde67bdb | 690 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 691 | }; |
Vkadaba | 8:2f2775c34640 | 692 | } ADMW_CORE_Data_FIFO_t; |
Vkadaba | 5:0728bde67bdb | 693 | |
Vkadaba | 5:0728bde67bdb | 694 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 695 | |
Vkadaba | 5:0728bde67bdb | 696 | /** @defgroup Debug_Code Additional Information on Source of Alert or Errors (Debug_Code) Register |
Vkadaba | 5:0728bde67bdb | 697 | * Additional Information on Source of Alert or Errors (Debug_Code) Register. |
Vkadaba | 5:0728bde67bdb | 698 | * @{ |
Vkadaba | 5:0728bde67bdb | 699 | */ |
Vkadaba | 5:0728bde67bdb | 700 | |
Vkadaba | 5:0728bde67bdb | 701 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 702 | *! \struct ADMW_CORE_Debug_Code_Struct |
Vkadaba | 5:0728bde67bdb | 703 | *! \brief Additional Information on Source of Alert or Errors Register bit field structure |
Vkadaba | 5:0728bde67bdb | 704 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 705 | typedef struct _ADMW_CORE_Debug_Code_t { |
Vkadaba | 5:0728bde67bdb | 706 | union { |
Vkadaba | 5:0728bde67bdb | 707 | struct { |
Vkadaba | 5:0728bde67bdb | 708 | uint32_t Debug_Code : 32; /**< Additional Information on Source of Alert or Errors */ |
Vkadaba | 5:0728bde67bdb | 709 | }; |
Vkadaba | 5:0728bde67bdb | 710 | uint32_t VALUE32; |
Vkadaba | 5:0728bde67bdb | 711 | }; |
Vkadaba | 8:2f2775c34640 | 712 | } ADMW_CORE_Debug_Code_t; |
Vkadaba | 5:0728bde67bdb | 713 | |
Vkadaba | 5:0728bde67bdb | 714 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 715 | |
Vkadaba | 32:52445bef314d | 716 | /** @defgroup Test_Reg_Access Allows Access to Test (Hidden) Registers and Features (Test_Reg_Access) Register |
Vkadaba | 32:52445bef314d | 717 | * Allows Access to Test (Hidden) Registers and Features (Test_Reg_Access) Register. |
Vkadaba | 5:0728bde67bdb | 718 | * @{ |
Vkadaba | 5:0728bde67bdb | 719 | */ |
Vkadaba | 5:0728bde67bdb | 720 | |
Vkadaba | 5:0728bde67bdb | 721 | /* ========================================================================== |
Vkadaba | 32:52445bef314d | 722 | *! \struct ADMW_CORE_Test_Reg_Access_Struct |
Vkadaba | 32:52445bef314d | 723 | *! \brief Allows Access to Test (Hidden) Registers and Features Register bit field structure |
Vkadaba | 5:0728bde67bdb | 724 | * ========================================================================== */ |
Vkadaba | 32:52445bef314d | 725 | typedef struct _ADMW_CORE_Test_Reg_Access_t { |
Vkadaba | 5:0728bde67bdb | 726 | union { |
Vkadaba | 5:0728bde67bdb | 727 | struct { |
Vkadaba | 32:52445bef314d | 728 | uint16_t Test_Access : 16; /**< Test Register Access. Specific Write Sequence Required */ |
Vkadaba | 5:0728bde67bdb | 729 | }; |
Vkadaba | 5:0728bde67bdb | 730 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 731 | }; |
Vkadaba | 32:52445bef314d | 732 | } ADMW_CORE_Test_Reg_Access_t; |
Vkadaba | 5:0728bde67bdb | 733 | |
Vkadaba | 5:0728bde67bdb | 734 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 735 | |
Vkadaba | 32:52445bef314d | 736 | /** @defgroup LUT_Select LUT Read/Write Strobe (LUT_Select) Register |
Vkadaba | 32:52445bef314d | 737 | * LUT Read/Write Strobe (LUT_Select) Register. |
Vkadaba | 5:0728bde67bdb | 738 | * @{ |
Vkadaba | 5:0728bde67bdb | 739 | */ |
Vkadaba | 5:0728bde67bdb | 740 | |
Vkadaba | 5:0728bde67bdb | 741 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 742 | *! \enum ADMW_CORE_LUT_Select_LUT_RW |
Vkadaba | 5:0728bde67bdb | 743 | *! \brief Read or Write LUT Data (LUT_RW) Enumerations |
Vkadaba | 5:0728bde67bdb | 744 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 745 | typedef enum |
Vkadaba | 5:0728bde67bdb | 746 | { |
Vkadaba | 32:52445bef314d | 747 | CORE_LUT_SELECT_LUT_READ = 0, /**< Read addressed LUT data */ |
Vkadaba | 32:52445bef314d | 748 | CORE_LUT_SELECT_LUT_WRITE = 1 /**< Write addressed LUT data */ |
Vkadaba | 8:2f2775c34640 | 749 | } ADMW_CORE_LUT_Select_LUT_RW; |
Vkadaba | 5:0728bde67bdb | 750 | |
Vkadaba | 5:0728bde67bdb | 751 | |
Vkadaba | 5:0728bde67bdb | 752 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 753 | *! \struct ADMW_CORE_LUT_Select_Struct |
Vkadaba | 32:52445bef314d | 754 | *! \brief LUT Read/Write Strobe Register bit field structure |
Vkadaba | 5:0728bde67bdb | 755 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 756 | typedef struct _ADMW_CORE_LUT_Select_t { |
Vkadaba | 5:0728bde67bdb | 757 | union { |
Vkadaba | 5:0728bde67bdb | 758 | struct { |
Vkadaba | 5:0728bde67bdb | 759 | uint8_t reserved0 : 7; |
Vkadaba | 5:0728bde67bdb | 760 | uint8_t LUT_RW : 1; /**< Read or Write LUT Data */ |
Vkadaba | 5:0728bde67bdb | 761 | }; |
Vkadaba | 5:0728bde67bdb | 762 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 763 | }; |
Vkadaba | 8:2f2775c34640 | 764 | } ADMW_CORE_LUT_Select_t; |
Vkadaba | 5:0728bde67bdb | 765 | |
Vkadaba | 5:0728bde67bdb | 766 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 767 | |
Vkadaba | 5:0728bde67bdb | 768 | /** @defgroup LUT_Offset Offset into Selected LUT (LUT_Offset) Register |
Vkadaba | 5:0728bde67bdb | 769 | * Offset into Selected LUT (LUT_Offset) Register. |
Vkadaba | 5:0728bde67bdb | 770 | * @{ |
Vkadaba | 5:0728bde67bdb | 771 | */ |
Vkadaba | 5:0728bde67bdb | 772 | |
Vkadaba | 5:0728bde67bdb | 773 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 774 | *! \struct ADMW_CORE_LUT_Offset_Struct |
Vkadaba | 5:0728bde67bdb | 775 | *! \brief Offset into Selected LUT Register bit field structure |
Vkadaba | 5:0728bde67bdb | 776 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 777 | typedef struct _ADMW_CORE_LUT_Offset_t { |
Vkadaba | 5:0728bde67bdb | 778 | union { |
Vkadaba | 5:0728bde67bdb | 779 | struct { |
Vkadaba | 44:94bdfaefddac | 780 | uint16_t LUT_Offset : 11; /**< Offset into the Lookup Table */ |
Vkadaba | 44:94bdfaefddac | 781 | uint16_t reserved11 : 5; |
Vkadaba | 5:0728bde67bdb | 782 | }; |
Vkadaba | 5:0728bde67bdb | 783 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 784 | }; |
Vkadaba | 8:2f2775c34640 | 785 | } ADMW_CORE_LUT_Offset_t; |
Vkadaba | 5:0728bde67bdb | 786 | |
Vkadaba | 5:0728bde67bdb | 787 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 788 | |
Vkadaba | 5:0728bde67bdb | 789 | /** @defgroup LUT_Data Data to Read/Write from Addressed LUT Entry (LUT_Data) Register |
Vkadaba | 5:0728bde67bdb | 790 | * Data to Read/Write from Addressed LUT Entry (LUT_Data) Register. |
Vkadaba | 5:0728bde67bdb | 791 | * @{ |
Vkadaba | 5:0728bde67bdb | 792 | */ |
Vkadaba | 5:0728bde67bdb | 793 | |
Vkadaba | 5:0728bde67bdb | 794 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 795 | *! \struct ADMW_CORE_LUT_Data_Struct |
Vkadaba | 5:0728bde67bdb | 796 | *! \brief Data to Read/Write from Addressed LUT Entry Register bit field structure |
Vkadaba | 5:0728bde67bdb | 797 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 798 | typedef struct _ADMW_CORE_LUT_Data_t { |
Vkadaba | 5:0728bde67bdb | 799 | union { |
Vkadaba | 5:0728bde67bdb | 800 | struct { |
Vkadaba | 32:52445bef314d | 801 | uint8_t LUT_Data : 8; /**< Data Byte to Write to and Read from the Lookup Table */ |
Vkadaba | 5:0728bde67bdb | 802 | }; |
Vkadaba | 5:0728bde67bdb | 803 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 804 | }; |
Vkadaba | 8:2f2775c34640 | 805 | } ADMW_CORE_LUT_Data_t; |
Vkadaba | 5:0728bde67bdb | 806 | |
Vkadaba | 5:0728bde67bdb | 807 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 808 | |
Vkadaba | 5:0728bde67bdb | 809 | /** @defgroup Revision Hardware, Firmware Revision (Revision) Register |
Vkadaba | 5:0728bde67bdb | 810 | * Hardware, Firmware Revision (Revision) Register. |
Vkadaba | 5:0728bde67bdb | 811 | * @{ |
Vkadaba | 5:0728bde67bdb | 812 | */ |
Vkadaba | 5:0728bde67bdb | 813 | |
Vkadaba | 5:0728bde67bdb | 814 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 815 | *! \struct ADMW_CORE_Revision_Struct |
Vkadaba | 5:0728bde67bdb | 816 | *! \brief Hardware, Firmware Revision Register bit field structure |
Vkadaba | 5:0728bde67bdb | 817 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 818 | typedef struct _ADMW_CORE_Revision_t { |
Vkadaba | 5:0728bde67bdb | 819 | union { |
Vkadaba | 5:0728bde67bdb | 820 | struct { |
Vkadaba | 5:0728bde67bdb | 821 | uint32_t Rev_Patch : 16; /**< Patch Revision Information */ |
Vkadaba | 5:0728bde67bdb | 822 | uint32_t Rev_Minor : 8; /**< Minor Revision Information */ |
Vkadaba | 5:0728bde67bdb | 823 | uint32_t Rev_Major : 8; /**< Major Revision Information */ |
Vkadaba | 5:0728bde67bdb | 824 | }; |
Vkadaba | 5:0728bde67bdb | 825 | uint32_t VALUE32; |
Vkadaba | 5:0728bde67bdb | 826 | }; |
Vkadaba | 8:2f2775c34640 | 827 | } ADMW_CORE_Revision_t; |
Vkadaba | 5:0728bde67bdb | 828 | |
Vkadaba | 5:0728bde67bdb | 829 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 830 | |
Vkadaba | 5:0728bde67bdb | 831 | /** @defgroup Channel_Count Number of Channel Occurrences per Measurement Cycle (Channel_Count) Register |
Vkadaba | 5:0728bde67bdb | 832 | * Number of Channel Occurrences per Measurement Cycle (Channel_Count) Register. |
Vkadaba | 5:0728bde67bdb | 833 | * @{ |
Vkadaba | 5:0728bde67bdb | 834 | */ |
Vkadaba | 5:0728bde67bdb | 835 | |
Vkadaba | 5:0728bde67bdb | 836 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 837 | *! \struct ADMW_CORE_Channel_Count_Struct |
Vkadaba | 5:0728bde67bdb | 838 | *! \brief Number of Channel Occurrences per Measurement Cycle Register bit field structure |
Vkadaba | 5:0728bde67bdb | 839 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 840 | typedef struct _ADMW_CORE_Channel_Count_t { |
Vkadaba | 5:0728bde67bdb | 841 | union { |
Vkadaba | 5:0728bde67bdb | 842 | struct { |
Vkadaba | 32:52445bef314d | 843 | uint8_t Channel_Count : 7; /**< How Many Times Channel Appears in One Cycle */ |
Vkadaba | 5:0728bde67bdb | 844 | uint8_t Channel_Enable : 1; /**< Enable Channel in Measurement Cycle */ |
Vkadaba | 5:0728bde67bdb | 845 | }; |
Vkadaba | 5:0728bde67bdb | 846 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 847 | }; |
Vkadaba | 8:2f2775c34640 | 848 | } ADMW_CORE_Channel_Count_t; |
Vkadaba | 5:0728bde67bdb | 849 | |
Vkadaba | 5:0728bde67bdb | 850 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 851 | |
Vkadaba | 32:52445bef314d | 852 | /** @defgroup Channel_Options Position of Channel Within Sequence (Channel_Options) Register |
Vkadaba | 32:52445bef314d | 853 | * Position of Channel Within Sequence (Channel_Options) Register. |
Vkadaba | 5:0728bde67bdb | 854 | * @{ |
Vkadaba | 5:0728bde67bdb | 855 | */ |
Vkadaba | 5:0728bde67bdb | 856 | |
Vkadaba | 5:0728bde67bdb | 857 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 858 | *! \struct ADMW_CORE_Channel_Options_Struct |
Vkadaba | 32:52445bef314d | 859 | *! \brief Position of Channel Within Sequence Register bit field structure |
Vkadaba | 5:0728bde67bdb | 860 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 861 | typedef struct _ADMW_CORE_Channel_Options_t { |
Vkadaba | 5:0728bde67bdb | 862 | union { |
Vkadaba | 5:0728bde67bdb | 863 | struct { |
Vkadaba | 5:0728bde67bdb | 864 | uint8_t Channel_Priority : 4; /**< Indicates Priority or Position of This Channel in Sequence */ |
Vkadaba | 6:9d393a9677f4 | 865 | uint8_t reserved4 : 4; |
Vkadaba | 5:0728bde67bdb | 866 | }; |
Vkadaba | 5:0728bde67bdb | 867 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 868 | }; |
Vkadaba | 8:2f2775c34640 | 869 | } ADMW_CORE_Channel_Options_t; |
Vkadaba | 5:0728bde67bdb | 870 | |
Vkadaba | 5:0728bde67bdb | 871 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 872 | |
Vkadaba | 5:0728bde67bdb | 873 | /** @defgroup Sensor_Type Sensor Select (Sensor_Type) Register |
Vkadaba | 5:0728bde67bdb | 874 | * Sensor Select (Sensor_Type) Register. |
Vkadaba | 5:0728bde67bdb | 875 | * @{ |
Vkadaba | 5:0728bde67bdb | 876 | */ |
Vkadaba | 5:0728bde67bdb | 877 | |
Vkadaba | 5:0728bde67bdb | 878 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 879 | *! \enum ADMW_CORE_Sensor_Type_Sensor_Type |
Vkadaba | 5:0728bde67bdb | 880 | *! \brief Sensor Type (Sensor_Type) Enumerations |
Vkadaba | 5:0728bde67bdb | 881 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 882 | typedef enum |
Vkadaba | 5:0728bde67bdb | 883 | { |
Vkadaba | 32:52445bef314d | 884 | CORE_SENSOR_TYPE_THERMOCOUPLE_T = 0, /**< Thermocouple T-Type sensor */ |
Vkadaba | 32:52445bef314d | 885 | CORE_SENSOR_TYPE_THERMOCOUPLE_J = 1, /**< Thermocouple J-Type Sensor */ |
Vkadaba | 32:52445bef314d | 886 | CORE_SENSOR_TYPE_THERMOCOUPLE_K = 2, /**< Thermocouple K-Type Sensor */ |
Vkadaba | 32:52445bef314d | 887 | CORE_SENSOR_TYPE_RTD_2W_PT100 = 32, /**< RTD 2 wire PT100 sensor */ |
Vkadaba | 32:52445bef314d | 888 | CORE_SENSOR_TYPE_RTD_2W_PT1000 = 33, /**< RTD 2 wire PT1000 sensor */ |
Vkadaba | 32:52445bef314d | 889 | CORE_SENSOR_TYPE_RTD_3W_PT100 = 64, /**< RTD 3 wire PT100 sensor */ |
Vkadaba | 32:52445bef314d | 890 | CORE_SENSOR_TYPE_RTD_3W_PT1000 = 65, /**< RTD 3 wire PT1000 sensor */ |
Vkadaba | 32:52445bef314d | 891 | CORE_SENSOR_TYPE_RTD_4W_PT100 = 96, /**< RTD 4 wire PT100 sensor */ |
Vkadaba | 32:52445bef314d | 892 | CORE_SENSOR_TYPE_RTD_4W_PT1000 = 97, /**< RTD 4 wire PT1000 sensor */ |
Vkadaba | 32:52445bef314d | 893 | CORE_SENSOR_TYPE_BRIDGE_4W = 169, /**< Bridge 4 wire sensor */ |
Vkadaba | 44:94bdfaefddac | 894 | CORE_SENSOR_TYPE_VOLTAGE = 512, /**< Voltage Input */ |
Vkadaba | 32:52445bef314d | 895 | CORE_SENSOR_TYPE_CUSTOM1 = 1024, /**< Custom1 */ |
Vkadaba | 32:52445bef314d | 896 | CORE_SENSOR_TYPE_I2C_HUMIDITY_B = 2113, /**< I2C humidity sensor B */ |
Vkadaba | 32:52445bef314d | 897 | CORE_SENSOR_TYPE_SENSOR_RESERVED_1 = 4064, /**< RESERVED. NOT TO BE USED */ |
Vkadaba | 32:52445bef314d | 898 | CORE_SENSOR_TYPE_SENSOR_RESERVED_2 = 4095 /**< RESERVED. NOT TO BE USED */ |
Vkadaba | 8:2f2775c34640 | 899 | } ADMW_CORE_Sensor_Type_Sensor_Type; |
Vkadaba | 5:0728bde67bdb | 900 | |
Vkadaba | 5:0728bde67bdb | 901 | |
Vkadaba | 5:0728bde67bdb | 902 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 903 | *! \struct ADMW_CORE_Sensor_Type_Struct |
Vkadaba | 5:0728bde67bdb | 904 | *! \brief Sensor Select Register bit field structure |
Vkadaba | 5:0728bde67bdb | 905 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 906 | typedef struct _ADMW_CORE_Sensor_Type_t { |
Vkadaba | 5:0728bde67bdb | 907 | union { |
Vkadaba | 5:0728bde67bdb | 908 | struct { |
Vkadaba | 5:0728bde67bdb | 909 | uint16_t Sensor_Type : 12; /**< Sensor Type */ |
Vkadaba | 5:0728bde67bdb | 910 | uint16_t reserved12 : 4; |
Vkadaba | 5:0728bde67bdb | 911 | }; |
Vkadaba | 5:0728bde67bdb | 912 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 913 | }; |
Vkadaba | 8:2f2775c34640 | 914 | } ADMW_CORE_Sensor_Type_t; |
Vkadaba | 5:0728bde67bdb | 915 | |
Vkadaba | 5:0728bde67bdb | 916 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 917 | |
Vkadaba | 5:0728bde67bdb | 918 | /** @defgroup Sensor_Details Sensor Details (Sensor_Details) Register |
Vkadaba | 5:0728bde67bdb | 919 | * Sensor Details (Sensor_Details) Register. |
Vkadaba | 5:0728bde67bdb | 920 | * @{ |
Vkadaba | 5:0728bde67bdb | 921 | */ |
Vkadaba | 5:0728bde67bdb | 922 | |
Vkadaba | 5:0728bde67bdb | 923 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 924 | *! \enum ADMW_CORE_Sensor_Details_Measurement_Units |
Vkadaba | 5:0728bde67bdb | 925 | *! \brief Units of Sensor Measurement (Measurement_Units) Enumerations |
Vkadaba | 5:0728bde67bdb | 926 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 927 | typedef enum |
Vkadaba | 5:0728bde67bdb | 928 | { |
Vkadaba | 5:0728bde67bdb | 929 | CORE_SENSOR_DETAILS_UNITS_UNSPECIFIED = 0, /**< Not Specified */ |
Vkadaba | 5:0728bde67bdb | 930 | CORE_SENSOR_DETAILS_UNITS_RESERVED = 1, /**< Reserved */ |
Vkadaba | 5:0728bde67bdb | 931 | CORE_SENSOR_DETAILS_UNITS_DEGC = 2, /**< Degrees C */ |
Vkadaba | 5:0728bde67bdb | 932 | CORE_SENSOR_DETAILS_UNITS_DEGF = 3 /**< Degrees F */ |
Vkadaba | 8:2f2775c34640 | 933 | } ADMW_CORE_Sensor_Details_Measurement_Units; |
Vkadaba | 8:2f2775c34640 | 934 | |
Vkadaba | 5:0728bde67bdb | 935 | |
Vkadaba | 6:9d393a9677f4 | 936 | /* ========================================================================= |
Vkadaba | 6:9d393a9677f4 | 937 | *! \enum ADMW_CORE_Sensor_Details_LUT_Select |
Vkadaba | 6:9d393a9677f4 | 938 | *! \brief Lookup Table Select (LUT_Select) Enumerations |
Vkadaba | 6:9d393a9677f4 | 939 | * ========================================================================= */ |
Vkadaba | 6:9d393a9677f4 | 940 | typedef enum |
Vkadaba | 6:9d393a9677f4 | 941 | { |
Vkadaba | 50:d84305e5e1c0 | 942 | CORE_SENSOR_DETAILS_LUT_DEFAULT = 0, /**< Default lookup table for selected sensor type */ |
Vkadaba | 50:d84305e5e1c0 | 943 | CORE_SENSOR_DETAILS_LUT_CUSTOM = 1, /**< User defined custom lookup table. */ |
Vkadaba | 50:d84305e5e1c0 | 944 | CORE_SENSOR_DETAILS_LUT_RESERVED = 2 /**< Reserved */ |
Vkadaba | 8:2f2775c34640 | 945 | } ADMW_CORE_Sensor_Details_LUT_Select; |
Vkadaba | 6:9d393a9677f4 | 946 | |
Vkadaba | 6:9d393a9677f4 | 947 | |
Vkadaba | 6:9d393a9677f4 | 948 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 949 | *! \enum ADMW_CORE_Sensor_Details_Reference_Select |
Vkadaba | 5:0728bde67bdb | 950 | *! \brief Reference Selection (Reference_Select) Enumerations |
Vkadaba | 5:0728bde67bdb | 951 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 952 | typedef enum |
Vkadaba | 5:0728bde67bdb | 953 | { |
Vkadaba | 32:52445bef314d | 954 | CORE_SENSOR_DETAILS_REF_VINT = 0, /**< Internal voltage reference (1.2V) */ |
Vkadaba | 32:52445bef314d | 955 | CORE_SENSOR_DETAILS_REF_VEXT1 = 1, /**< External voltage reference applied to VERF+ and VREF- */ |
Vkadaba | 32:52445bef314d | 956 | CORE_SENSOR_DETAILS_REF_AVDD = 3 /**< AVDD supply internally used as reference */ |
Vkadaba | 8:2f2775c34640 | 957 | } ADMW_CORE_Sensor_Details_Reference_Select; |
Vkadaba | 5:0728bde67bdb | 958 | |
Vkadaba | 5:0728bde67bdb | 959 | |
Vkadaba | 5:0728bde67bdb | 960 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 961 | *! \enum ADMW_CORE_Sensor_Details_PGA_Gain |
Vkadaba | 5:0728bde67bdb | 962 | *! \brief PGA Gain (PGA_Gain) Enumerations |
Vkadaba | 5:0728bde67bdb | 963 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 964 | typedef enum |
Vkadaba | 5:0728bde67bdb | 965 | { |
Vkadaba | 5:0728bde67bdb | 966 | CORE_SENSOR_DETAILS_PGA_GAIN_1 = 0, /**< Gain of 1 */ |
Vkadaba | 5:0728bde67bdb | 967 | CORE_SENSOR_DETAILS_PGA_GAIN_2 = 1, /**< Gain of 2 */ |
Vkadaba | 5:0728bde67bdb | 968 | CORE_SENSOR_DETAILS_PGA_GAIN_4 = 2, /**< Gain of 4 */ |
Vkadaba | 5:0728bde67bdb | 969 | CORE_SENSOR_DETAILS_PGA_GAIN_8 = 3, /**< Gain of 8 */ |
Vkadaba | 5:0728bde67bdb | 970 | CORE_SENSOR_DETAILS_PGA_GAIN_16 = 4, /**< Gain of 16 */ |
Vkadaba | 5:0728bde67bdb | 971 | CORE_SENSOR_DETAILS_PGA_GAIN_32 = 5, /**< Gain of 32 */ |
Vkadaba | 5:0728bde67bdb | 972 | CORE_SENSOR_DETAILS_PGA_GAIN_64 = 6, /**< Gain of 64 */ |
Vkadaba | 5:0728bde67bdb | 973 | CORE_SENSOR_DETAILS_PGA_GAIN_128 = 7 /**< Gain of 128 */ |
Vkadaba | 8:2f2775c34640 | 974 | } ADMW_CORE_Sensor_Details_PGA_Gain; |
Vkadaba | 5:0728bde67bdb | 975 | |
Vkadaba | 5:0728bde67bdb | 976 | |
Vkadaba | 6:9d393a9677f4 | 977 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 978 | *! \enum ADMW_CORE_Sensor_Details_RTD_Curve |
Vkadaba | 32:52445bef314d | 979 | *! \brief Select RTD Curve for Linearization (RTD_Curve) Enumerations |
Vkadaba | 6:9d393a9677f4 | 980 | * ========================================================================= */ |
Vkadaba | 6:9d393a9677f4 | 981 | typedef enum |
Vkadaba | 6:9d393a9677f4 | 982 | { |
Vkadaba | 32:52445bef314d | 983 | CORE_SENSOR_DETAILS_EUROPEAN_CURVE = 0, /**< European curve */ |
Vkadaba | 32:52445bef314d | 984 | CORE_SENSOR_DETAILS_AMERICAN_CURVE = 1, /**< American curve */ |
Vkadaba | 32:52445bef314d | 985 | CORE_SENSOR_DETAILS_JAPANESE_CURVE = 2, /**< Japanese curve */ |
Vkadaba | 32:52445bef314d | 986 | CORE_SENSOR_DETAILS_ITS90_CURVE = 3 /**< ITS-90 curve */ |
Vkadaba | 8:2f2775c34640 | 987 | } ADMW_CORE_Sensor_Details_RTD_Curve; |
Vkadaba | 6:9d393a9677f4 | 988 | |
Vkadaba | 6:9d393a9677f4 | 989 | |
Vkadaba | 5:0728bde67bdb | 990 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 991 | *! \struct ADMW_CORE_Sensor_Details_Struct |
Vkadaba | 5:0728bde67bdb | 992 | *! \brief Sensor Details Register bit field structure |
Vkadaba | 5:0728bde67bdb | 993 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 994 | typedef struct _ADMW_CORE_Sensor_Details_t { |
Vkadaba | 5:0728bde67bdb | 995 | union { |
Vkadaba | 5:0728bde67bdb | 996 | struct { |
Vkadaba | 5:0728bde67bdb | 997 | uint32_t Measurement_Units : 4; /**< Units of Sensor Measurement */ |
Vkadaba | 32:52445bef314d | 998 | uint32_t Compensation_Channel : 4; /**< Indicates Which Channel Used to Compensate the Sensor Result */ |
Vkadaba | 8:2f2775c34640 | 999 | uint32_t reserved8 : 7; |
Vkadaba | 8:2f2775c34640 | 1000 | uint32_t LUT_Select : 2; /**< Lookup Table Select */ |
Vkadaba | 5:0728bde67bdb | 1001 | uint32_t Do_Not_Publish : 1; /**< Do Not Publish Channel Result */ |
Vkadaba | 8:2f2775c34640 | 1002 | uint32_t reserved18 : 2; |
Vkadaba | 6:9d393a9677f4 | 1003 | uint32_t Reference_Select : 4; /**< Reference Selection */ |
Vkadaba | 6:9d393a9677f4 | 1004 | uint32_t PGA_Gain : 3; /**< PGA Gain */ |
Vkadaba | 32:52445bef314d | 1005 | uint32_t RTD_Curve : 2; /**< Select RTD Curve for Linearization */ |
Vkadaba | 6:9d393a9677f4 | 1006 | uint32_t reserved29 : 2; |
Vkadaba | 32:52445bef314d | 1007 | uint32_t Compensation_Disable : 1; /**< This Bit Indicates Compensation Data Must Not Be Used */ |
Vkadaba | 5:0728bde67bdb | 1008 | }; |
Vkadaba | 5:0728bde67bdb | 1009 | uint32_t VALUE32; |
Vkadaba | 5:0728bde67bdb | 1010 | }; |
Vkadaba | 8:2f2775c34640 | 1011 | } ADMW_CORE_Sensor_Details_t; |
Vkadaba | 5:0728bde67bdb | 1012 | |
Vkadaba | 5:0728bde67bdb | 1013 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1014 | |
Vkadaba | 5:0728bde67bdb | 1015 | /** @defgroup Channel_Excitation Excitation Current (Channel_Excitation) Register |
Vkadaba | 5:0728bde67bdb | 1016 | * Excitation Current (Channel_Excitation) Register. |
Vkadaba | 5:0728bde67bdb | 1017 | * @{ |
Vkadaba | 5:0728bde67bdb | 1018 | */ |
Vkadaba | 5:0728bde67bdb | 1019 | |
Vkadaba | 5:0728bde67bdb | 1020 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 1021 | *! \enum ADMW_CORE_Channel_Excitation_IOUT_Excitation_Current |
Vkadaba | 5:0728bde67bdb | 1022 | *! \brief Current Source Value (IOUT_Excitation_Current) Enumerations |
Vkadaba | 5:0728bde67bdb | 1023 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 1024 | typedef enum |
Vkadaba | 5:0728bde67bdb | 1025 | { |
Vkadaba | 32:52445bef314d | 1026 | CORE_CHANNEL_EXCITATION_NONE = 0, /**< Excitation Current Disabled */ |
Vkadaba | 32:52445bef314d | 1027 | CORE_CHANNEL_EXCITATION_RESERVED = 1, /**< Reserved */ |
Vkadaba | 32:52445bef314d | 1028 | CORE_CHANNEL_EXCITATION_IEXC_10UA = 2, /**< 10 \mu;A */ |
Vkadaba | 32:52445bef314d | 1029 | CORE_CHANNEL_EXCITATION_RESERVED2 = 3, /**< Reserved */ |
Vkadaba | 32:52445bef314d | 1030 | CORE_CHANNEL_EXCITATION_IEXC_50UA = 4, /**< 50 \mu;A */ |
Vkadaba | 32:52445bef314d | 1031 | CORE_CHANNEL_EXCITATION_IEXC_100UA = 5, /**< 100 \mu;A */ |
Vkadaba | 32:52445bef314d | 1032 | CORE_CHANNEL_EXCITATION_IEXC_250UA = 6, /**< 250 \mu;A */ |
Vkadaba | 32:52445bef314d | 1033 | CORE_CHANNEL_EXCITATION_IEXC_500UA = 7, /**< 500 \mu;A */ |
Vkadaba | 32:52445bef314d | 1034 | CORE_CHANNEL_EXCITATION_IEXC_1000UA = 8, /**< 1000 \mu;A */ |
Vkadaba | 32:52445bef314d | 1035 | CORE_CHANNEL_EXCITATION_EXTERNAL = 15 /**< External current sourced */ |
Vkadaba | 8:2f2775c34640 | 1036 | } ADMW_CORE_Channel_Excitation_IOUT_Excitation_Current; |
Vkadaba | 5:0728bde67bdb | 1037 | |
Vkadaba | 5:0728bde67bdb | 1038 | |
Vkadaba | 44:94bdfaefddac | 1039 | /* ========================================================================= |
Vkadaba | 44:94bdfaefddac | 1040 | *! \enum ADMW_CORE_Channel_Excitation_IOUT_Diode_Ratio |
Vkadaba | 44:94bdfaefddac | 1041 | *! \brief Modify Current Ratios Used for Diode Sensor (IOUT_Diode_Ratio) Enumerations |
Vkadaba | 44:94bdfaefddac | 1042 | * ========================================================================= */ |
Vkadaba | 44:94bdfaefddac | 1043 | typedef enum |
Vkadaba | 44:94bdfaefddac | 1044 | { |
Vkadaba | 44:94bdfaefddac | 1045 | CORE_CHANNEL_EXCITATION_DIODE_2PT_10UA_100UA = 0, /**< 2 Current measurement 10uA 100uA */ |
Vkadaba | 44:94bdfaefddac | 1046 | CORE_CHANNEL_EXCITATION_DIODE_2PT_20UA_160UA = 1, /**< 2 Current measurement 20uA 160uA */ |
Vkadaba | 44:94bdfaefddac | 1047 | CORE_CHANNEL_EXCITATION_DIODE_2PT_50UA_300UA = 2, /**< 2 Current measurement 50uA 300uA */ |
Vkadaba | 44:94bdfaefddac | 1048 | CORE_CHANNEL_EXCITATION_DIODE_2PT_100UA_600UA = 3, /**< 2 Current measurement 100uA 600uA */ |
Vkadaba | 44:94bdfaefddac | 1049 | CORE_CHANNEL_EXCITATION_DIODE_3PT_10UA_50UA_100UA = 4, /**< 3 current measuremet 10uA 50uA 100uA */ |
Vkadaba | 44:94bdfaefddac | 1050 | CORE_CHANNEL_EXCITATION_DIODE_3PT_20UA_100UA_160UA = 5, /**< 3 current measuremet 20uA 100uA 160uA */ |
Vkadaba | 44:94bdfaefddac | 1051 | CORE_CHANNEL_EXCITATION_DIODE_3PT_50UA_150UA_300UA = 6, /**< 3 current measuremet 50uA 150uA 300uA */ |
Vkadaba | 44:94bdfaefddac | 1052 | CORE_CHANNEL_EXCITATION_DIODE_3PT_100UA_300UA_600UA = 7 /**< 3 current measuremet 100uA 300uA 600uA */ |
Vkadaba | 44:94bdfaefddac | 1053 | } ADMW_CORE_Channel_Excitation_IOUT_Diode_Ratio; |
Vkadaba | 44:94bdfaefddac | 1054 | |
Vkadaba | 44:94bdfaefddac | 1055 | |
Vkadaba | 5:0728bde67bdb | 1056 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 1057 | *! \struct ADMW_CORE_Channel_Excitation_Struct |
Vkadaba | 5:0728bde67bdb | 1058 | *! \brief Excitation Current Register bit field structure |
Vkadaba | 5:0728bde67bdb | 1059 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 1060 | typedef struct _ADMW_CORE_Channel_Excitation_t { |
Vkadaba | 5:0728bde67bdb | 1061 | union { |
Vkadaba | 5:0728bde67bdb | 1062 | struct { |
Vkadaba | 6:9d393a9677f4 | 1063 | uint16_t IOUT_Excitation_Current : 4; /**< Current Source Value */ |
Vkadaba | 44:94bdfaefddac | 1064 | uint16_t reserved4 : 2; |
Vkadaba | 44:94bdfaefddac | 1065 | uint16_t IOUT_Diode_Ratio : 3; /**< Modify Current Ratios Used for Diode Sensor */ |
Vkadaba | 44:94bdfaefddac | 1066 | uint16_t reserved9 : 7; |
Vkadaba | 5:0728bde67bdb | 1067 | }; |
Vkadaba | 6:9d393a9677f4 | 1068 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 1069 | }; |
Vkadaba | 8:2f2775c34640 | 1070 | } ADMW_CORE_Channel_Excitation_t; |
Vkadaba | 5:0728bde67bdb | 1071 | |
Vkadaba | 5:0728bde67bdb | 1072 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1073 | |
Vkadaba | 5:0728bde67bdb | 1074 | /** @defgroup Settling_Time Settling Time (Settling_Time) Register |
Vkadaba | 5:0728bde67bdb | 1075 | * Settling Time (Settling_Time) Register. |
Vkadaba | 5:0728bde67bdb | 1076 | * @{ |
Vkadaba | 5:0728bde67bdb | 1077 | */ |
Vkadaba | 5:0728bde67bdb | 1078 | |
Vkadaba | 5:0728bde67bdb | 1079 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 1080 | *! \struct ADMW_CORE_Settling_Time_Struct |
Vkadaba | 5:0728bde67bdb | 1081 | *! \brief Settling Time Register bit field structure |
Vkadaba | 5:0728bde67bdb | 1082 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 1083 | typedef struct _ADMW_CORE_Settling_Time_t { |
Vkadaba | 5:0728bde67bdb | 1084 | union { |
Vkadaba | 5:0728bde67bdb | 1085 | struct { |
Vkadaba | 50:d84305e5e1c0 | 1086 | uint16_t Settling_Time : 8; /**< Additional Settling Time in Milliseconds. Max 255ms */ |
Vkadaba | 50:d84305e5e1c0 | 1087 | uint16_t reserved8 : 8; |
Vkadaba | 5:0728bde67bdb | 1088 | }; |
Vkadaba | 5:0728bde67bdb | 1089 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 1090 | }; |
Vkadaba | 8:2f2775c34640 | 1091 | } ADMW_CORE_Settling_Time_t; |
Vkadaba | 5:0728bde67bdb | 1092 | |
Vkadaba | 5:0728bde67bdb | 1093 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1094 | |
Vkadaba | 32:52445bef314d | 1095 | /** @defgroup Measurement_Setup ADC Measurement Setup (Measurement_Setup) Register |
Vkadaba | 32:52445bef314d | 1096 | * ADC Measurement Setup (Measurement_Setup) Register. |
Vkadaba | 5:0728bde67bdb | 1097 | * @{ |
Vkadaba | 5:0728bde67bdb | 1098 | */ |
Vkadaba | 5:0728bde67bdb | 1099 | |
Vkadaba | 5:0728bde67bdb | 1100 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 1101 | *! \enum ADMW_CORE_Measurement_Setup_NOTCH_EN_2 |
Vkadaba | 6:9d393a9677f4 | 1102 | *! \brief Enable Notch 2 Filter Mode (NOTCH_EN_2) Enumerations |
Vkadaba | 6:9d393a9677f4 | 1103 | * ========================================================================= */ |
Vkadaba | 6:9d393a9677f4 | 1104 | typedef enum |
Vkadaba | 6:9d393a9677f4 | 1105 | { |
Vkadaba | 32:52445bef314d | 1106 | CORE_MEASUREMENT_SETUP_NOTCH_DIS = 0, /**< Disable notch filter */ |
Vkadaba | 32:52445bef314d | 1107 | CORE_MEASUREMENT_SETUP_NOTCH_EN = 1 /**< Enable notch 2 filter option. */ |
Vkadaba | 8:2f2775c34640 | 1108 | } ADMW_CORE_Measurement_Setup_NOTCH_EN_2; |
Vkadaba | 6:9d393a9677f4 | 1109 | |
Vkadaba | 44:94bdfaefddac | 1110 | |
Vkadaba | 8:2f2775c34640 | 1111 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 1112 | *! \enum ADMW_CORE_Measurement_Setup_Chop_Mode |
Vkadaba | 6:9d393a9677f4 | 1113 | *! \brief Enabled and Disable Chop Mode (Chop_Mode) Enumerations |
Vkadaba | 6:9d393a9677f4 | 1114 | * ========================================================================= */ |
Vkadaba | 6:9d393a9677f4 | 1115 | typedef enum |
Vkadaba | 6:9d393a9677f4 | 1116 | { |
Vkadaba | 32:52445bef314d | 1117 | CORE_MEASUREMENT_SETUP_DISABLE_CHOP = 0, /**< ADC front end chopping disabled */ |
Vkadaba | 32:52445bef314d | 1118 | CORE_MEASUREMENT_SETUP_HW_CHOP = 1, /**< Hardware chopping enabled */ |
Vkadaba | 32:52445bef314d | 1119 | CORE_MEASUREMENT_SETUP_SW_CHOP = 2, /**< SW chop enabled */ |
Vkadaba | 32:52445bef314d | 1120 | CORE_MEASUREMENT_SETUP_HW_SW_CHOP = 3 /**< Hardware and software chop enabled */ |
Vkadaba | 8:2f2775c34640 | 1121 | } ADMW_CORE_Measurement_Setup_Chop_Mode; |
Vkadaba | 6:9d393a9677f4 | 1122 | |
Vkadaba | 6:9d393a9677f4 | 1123 | |
Vkadaba | 6:9d393a9677f4 | 1124 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 1125 | *! \enum ADMW_CORE_Measurement_Setup_ADC_Filter_Type |
Vkadaba | 5:0728bde67bdb | 1126 | *! \brief ADC Digital Filter Type (ADC_Filter_Type) Enumerations |
Vkadaba | 5:0728bde67bdb | 1127 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 1128 | typedef enum |
Vkadaba | 5:0728bde67bdb | 1129 | { |
Vkadaba | 32:52445bef314d | 1130 | CORE_MEASUREMENT_SETUP_ENABLE_SINC4 = 0, /**< Enabled SINC4 filter */ |
Vkadaba | 32:52445bef314d | 1131 | CORE_MEASUREMENT_SETUP_ENABLE_SINC3 = 1 /**< Enabled SINC3 filter */ |
Vkadaba | 8:2f2775c34640 | 1132 | } ADMW_CORE_Measurement_Setup_ADC_Filter_Type; |
Vkadaba | 6:9d393a9677f4 | 1133 | |
Vkadaba | 6:9d393a9677f4 | 1134 | |
Vkadaba | 6:9d393a9677f4 | 1135 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 1136 | *! \enum ADMW_CORE_Measurement_Setup_Buffer_Bypass |
Vkadaba | 8:2f2775c34640 | 1137 | *! \brief Disable Buffers (Buffer_Bypass) Enumerations |
Vkadaba | 8:2f2775c34640 | 1138 | * ========================================================================= */ |
Vkadaba | 8:2f2775c34640 | 1139 | typedef enum |
Vkadaba | 8:2f2775c34640 | 1140 | { |
Vkadaba | 32:52445bef314d | 1141 | CORE_MEASUREMENT_SETUP_BUFFERS_ENABLED = 0, /**< Input buffers enabled */ |
Vkadaba | 32:52445bef314d | 1142 | CORE_MEASUREMENT_SETUP_BUFFERS_DISABLED = 1 /**< Input buffers disabled */ |
Vkadaba | 8:2f2775c34640 | 1143 | } ADMW_CORE_Measurement_Setup_Buffer_Bypass; |
Vkadaba | 5:0728bde67bdb | 1144 | |
Vkadaba | 5:0728bde67bdb | 1145 | |
Vkadaba | 5:0728bde67bdb | 1146 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 1147 | *! \struct ADMW_CORE_Measurement_Setup_Struct |
Vkadaba | 32:52445bef314d | 1148 | *! \brief ADC Measurement Setup Register bit field structure |
Vkadaba | 5:0728bde67bdb | 1149 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 1150 | typedef struct _ADMW_CORE_Measurement_Setup_t { |
Vkadaba | 5:0728bde67bdb | 1151 | union { |
Vkadaba | 5:0728bde67bdb | 1152 | struct { |
Vkadaba | 32:52445bef314d | 1153 | uint32_t ADC_SF : 7; /**< ADC Digital Filter Speed */ |
Vkadaba | 32:52445bef314d | 1154 | uint32_t reserved7 : 1; |
Vkadaba | 32:52445bef314d | 1155 | uint32_t NOTCH_EN_2 : 1; /**< Enable Notch 2 Filter Mode */ |
Vkadaba | 43:e1789b7214cf | 1156 | uint32_t reserved9 : 1; |
Vkadaba | 43:e1789b7214cf | 1157 | uint32_t Chop_Mode : 2; /**< Enabled and Disable Chop Mode */ |
Vkadaba | 43:e1789b7214cf | 1158 | uint32_t ADC_Filter_Type : 1; /**< ADC Digital Filter Type */ |
Vkadaba | 43:e1789b7214cf | 1159 | uint32_t reserved13 : 2; |
Vkadaba | 43:e1789b7214cf | 1160 | uint32_t Buffer_Bypass : 1; /**< Disable Buffers */ |
Vkadaba | 43:e1789b7214cf | 1161 | uint32_t reserved16 : 16; |
Vkadaba | 5:0728bde67bdb | 1162 | }; |
Vkadaba | 5:0728bde67bdb | 1163 | uint32_t VALUE32; |
Vkadaba | 5:0728bde67bdb | 1164 | }; |
Vkadaba | 8:2f2775c34640 | 1165 | } ADMW_CORE_Measurement_Setup_t; |
Vkadaba | 5:0728bde67bdb | 1166 | |
Vkadaba | 5:0728bde67bdb | 1167 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1168 | |
Vkadaba | 5:0728bde67bdb | 1169 | /** @defgroup High_Threshold_Limit High Threshold (High_Threshold_Limit) Register |
Vkadaba | 5:0728bde67bdb | 1170 | * High Threshold (High_Threshold_Limit) Register. |
Vkadaba | 5:0728bde67bdb | 1171 | * @{ |
Vkadaba | 5:0728bde67bdb | 1172 | */ |
Vkadaba | 5:0728bde67bdb | 1173 | |
Vkadaba | 5:0728bde67bdb | 1174 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 1175 | *! \struct ADMW_CORE_High_Threshold_Limit_Struct |
Vkadaba | 5:0728bde67bdb | 1176 | *! \brief High Threshold Register bit field structure |
Vkadaba | 5:0728bde67bdb | 1177 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 1178 | typedef struct _ADMW_CORE_High_Threshold_Limit_t { |
Vkadaba | 5:0728bde67bdb | 1179 | union { |
Vkadaba | 5:0728bde67bdb | 1180 | struct { |
Vkadaba | 5:0728bde67bdb | 1181 | float High_Threshold; /**< Upper Limit for Sensor Alert Comparison */ |
Vkadaba | 5:0728bde67bdb | 1182 | }; |
Vkadaba | 5:0728bde67bdb | 1183 | float VALUE32; |
Vkadaba | 5:0728bde67bdb | 1184 | }; |
Vkadaba | 8:2f2775c34640 | 1185 | } ADMW_CORE_High_Threshold_Limit_t; |
Vkadaba | 5:0728bde67bdb | 1186 | |
Vkadaba | 5:0728bde67bdb | 1187 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1188 | |
Vkadaba | 5:0728bde67bdb | 1189 | /** @defgroup Low_Threshold_Limit Low Threshold (Low_Threshold_Limit) Register |
Vkadaba | 5:0728bde67bdb | 1190 | * Low Threshold (Low_Threshold_Limit) Register. |
Vkadaba | 5:0728bde67bdb | 1191 | * @{ |
Vkadaba | 5:0728bde67bdb | 1192 | */ |
Vkadaba | 5:0728bde67bdb | 1193 | |
Vkadaba | 5:0728bde67bdb | 1194 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 1195 | *! \struct ADMW_CORE_Low_Threshold_Limit_Struct |
Vkadaba | 5:0728bde67bdb | 1196 | *! \brief Low Threshold Register bit field structure |
Vkadaba | 5:0728bde67bdb | 1197 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 1198 | typedef struct _ADMW_CORE_Low_Threshold_Limit_t { |
Vkadaba | 5:0728bde67bdb | 1199 | union { |
Vkadaba | 5:0728bde67bdb | 1200 | struct { |
Vkadaba | 5:0728bde67bdb | 1201 | float Low_Threshold; /**< Lower Limit for Sensor Alert Comparison */ |
Vkadaba | 5:0728bde67bdb | 1202 | }; |
Vkadaba | 5:0728bde67bdb | 1203 | float VALUE32; |
Vkadaba | 5:0728bde67bdb | 1204 | }; |
Vkadaba | 8:2f2775c34640 | 1205 | } ADMW_CORE_Low_Threshold_Limit_t; |
Vkadaba | 5:0728bde67bdb | 1206 | |
Vkadaba | 5:0728bde67bdb | 1207 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1208 | |
Vkadaba | 44:94bdfaefddac | 1209 | /** @defgroup Ideality_Factor Diode Ideality Factor Register (Ideality_Factor) Register |
Vkadaba | 44:94bdfaefddac | 1210 | * Diode Ideality Factor Register (Ideality_Factor) Register. |
Vkadaba | 44:94bdfaefddac | 1211 | * @{ |
Vkadaba | 44:94bdfaefddac | 1212 | */ |
Vkadaba | 44:94bdfaefddac | 1213 | |
Vkadaba | 44:94bdfaefddac | 1214 | /* ========================================================================== |
Vkadaba | 44:94bdfaefddac | 1215 | *! \struct ADMW_CORE_Ideality_Factor_Struct |
Vkadaba | 44:94bdfaefddac | 1216 | *! \brief Diode Ideality Factor Register bit field structure |
Vkadaba | 44:94bdfaefddac | 1217 | * ========================================================================== */ |
Vkadaba | 44:94bdfaefddac | 1218 | typedef struct _ADMW_CORE_Ideality_Factor_t { |
Vkadaba | 44:94bdfaefddac | 1219 | union { |
Vkadaba | 44:94bdfaefddac | 1220 | struct { |
Vkadaba | 44:94bdfaefddac | 1221 | float32_t Ideality_Factor; /**< Diode Ideality Factor, Default 1.003. */ |
Vkadaba | 44:94bdfaefddac | 1222 | }; |
Vkadaba | 44:94bdfaefddac | 1223 | float32_t VALUE32; |
Vkadaba | 44:94bdfaefddac | 1224 | }; |
Vkadaba | 44:94bdfaefddac | 1225 | } ADMW_CORE_Ideality_Factor_t; |
Vkadaba | 44:94bdfaefddac | 1226 | |
Vkadaba | 44:94bdfaefddac | 1227 | /*@}*/ |
Vkadaba | 44:94bdfaefddac | 1228 | |
Vkadaba | 5:0728bde67bdb | 1229 | /** @defgroup Sensor_Offset Sensor Offset Adjustment (Sensor_Offset) Register |
Vkadaba | 5:0728bde67bdb | 1230 | * Sensor Offset Adjustment (Sensor_Offset) Register. |
Vkadaba | 5:0728bde67bdb | 1231 | * @{ |
Vkadaba | 5:0728bde67bdb | 1232 | */ |
Vkadaba | 5:0728bde67bdb | 1233 | |
Vkadaba | 5:0728bde67bdb | 1234 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 1235 | *! \struct ADMW_CORE_Sensor_Offset_Struct |
Vkadaba | 5:0728bde67bdb | 1236 | *! \brief Sensor Offset Adjustment Register bit field structure |
Vkadaba | 5:0728bde67bdb | 1237 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 1238 | typedef struct _ADMW_CORE_Sensor_Offset_t { |
Vkadaba | 5:0728bde67bdb | 1239 | union { |
Vkadaba | 5:0728bde67bdb | 1240 | struct { |
Vkadaba | 5:0728bde67bdb | 1241 | float Sensor_Offset; /**< Sensor Offset Adjustment */ |
Vkadaba | 5:0728bde67bdb | 1242 | }; |
Vkadaba | 5:0728bde67bdb | 1243 | float VALUE32; |
Vkadaba | 5:0728bde67bdb | 1244 | }; |
Vkadaba | 8:2f2775c34640 | 1245 | } ADMW_CORE_Sensor_Offset_t; |
Vkadaba | 5:0728bde67bdb | 1246 | |
Vkadaba | 5:0728bde67bdb | 1247 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1248 | |
Vkadaba | 5:0728bde67bdb | 1249 | /** @defgroup Sensor_Gain Sensor Gain Adjustment (Sensor_Gain) Register |
Vkadaba | 5:0728bde67bdb | 1250 | * Sensor Gain Adjustment (Sensor_Gain) Register. |
Vkadaba | 5:0728bde67bdb | 1251 | * @{ |
Vkadaba | 5:0728bde67bdb | 1252 | */ |
Vkadaba | 5:0728bde67bdb | 1253 | |
Vkadaba | 5:0728bde67bdb | 1254 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 1255 | *! \struct ADMW_CORE_Sensor_Gain_Struct |
Vkadaba | 5:0728bde67bdb | 1256 | *! \brief Sensor Gain Adjustment Register bit field structure |
Vkadaba | 5:0728bde67bdb | 1257 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 1258 | typedef struct _ADMW_CORE_Sensor_Gain_t { |
Vkadaba | 5:0728bde67bdb | 1259 | union { |
Vkadaba | 5:0728bde67bdb | 1260 | struct { |
Vkadaba | 5:0728bde67bdb | 1261 | float Sensor_Gain; /**< Sensor Gain Adjustment */ |
Vkadaba | 5:0728bde67bdb | 1262 | }; |
Vkadaba | 5:0728bde67bdb | 1263 | float VALUE32; |
Vkadaba | 5:0728bde67bdb | 1264 | }; |
Vkadaba | 8:2f2775c34640 | 1265 | } ADMW_CORE_Sensor_Gain_t; |
Vkadaba | 5:0728bde67bdb | 1266 | |
Vkadaba | 5:0728bde67bdb | 1267 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1268 | |
Vkadaba | 5:0728bde67bdb | 1269 | /** @defgroup Channel_Skip Indicates If Channel Will Skip Some Measurement Cycles (Channel_Skip) Register |
Vkadaba | 5:0728bde67bdb | 1270 | * Indicates If Channel Will Skip Some Measurement Cycles (Channel_Skip) Register. |
Vkadaba | 5:0728bde67bdb | 1271 | * @{ |
Vkadaba | 5:0728bde67bdb | 1272 | */ |
Vkadaba | 5:0728bde67bdb | 1273 | |
Vkadaba | 5:0728bde67bdb | 1274 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 1275 | *! \struct ADMW_CORE_Channel_Skip_Struct |
Vkadaba | 5:0728bde67bdb | 1276 | *! \brief Indicates If Channel Will Skip Some Measurement Cycles Register bit field structure |
Vkadaba | 5:0728bde67bdb | 1277 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 1278 | typedef struct _ADMW_CORE_Channel_Skip_t { |
Vkadaba | 5:0728bde67bdb | 1279 | union { |
Vkadaba | 5:0728bde67bdb | 1280 | struct { |
Vkadaba | 5:0728bde67bdb | 1281 | uint16_t Channel_Skip : 8; /**< Indicates If Channel Will Skip Some Measurement Cycles */ |
Vkadaba | 5:0728bde67bdb | 1282 | uint16_t reserved8 : 8; |
Vkadaba | 5:0728bde67bdb | 1283 | }; |
Vkadaba | 5:0728bde67bdb | 1284 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 1285 | }; |
Vkadaba | 8:2f2775c34640 | 1286 | } ADMW_CORE_Channel_Skip_t; |
Vkadaba | 5:0728bde67bdb | 1287 | |
Vkadaba | 5:0728bde67bdb | 1288 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1289 | |
Vkadaba | 44:94bdfaefddac | 1290 | /** @defgroup Sensor_Parameter Sensor Parameter Adjustment (Sensor_Parameter) Register |
Vkadaba | 44:94bdfaefddac | 1291 | * Sensor Parameter Adjustment (Sensor_Parameter) Register. |
Vkadaba | 44:94bdfaefddac | 1292 | * @{ |
Vkadaba | 44:94bdfaefddac | 1293 | */ |
Vkadaba | 44:94bdfaefddac | 1294 | |
Vkadaba | 44:94bdfaefddac | 1295 | /* ========================================================================== |
Vkadaba | 44:94bdfaefddac | 1296 | *! \struct ADMW_CORE_Sensor_Parameter_Struct |
Vkadaba | 44:94bdfaefddac | 1297 | *! \brief Sensor Parameter Adjustment Register bit field structure |
Vkadaba | 44:94bdfaefddac | 1298 | * ========================================================================== */ |
Vkadaba | 44:94bdfaefddac | 1299 | typedef struct _ADMW_CORE_Sensor_Parameter_t { |
Vkadaba | 44:94bdfaefddac | 1300 | union { |
Vkadaba | 44:94bdfaefddac | 1301 | struct { |
Vkadaba | 44:94bdfaefddac | 1302 | float Sensor_Parameter; /**< Sensor Parameter Adjustment */ |
Vkadaba | 44:94bdfaefddac | 1303 | }; |
Vkadaba | 44:94bdfaefddac | 1304 | float VALUE32; |
Vkadaba | 44:94bdfaefddac | 1305 | }; |
Vkadaba | 44:94bdfaefddac | 1306 | } ADMW_CORE_Sensor_Parameter_t; |
Vkadaba | 44:94bdfaefddac | 1307 | |
Vkadaba | 44:94bdfaefddac | 1308 | /*@}*/ |
Vkadaba | 44:94bdfaefddac | 1309 | |
Vkadaba | 5:0728bde67bdb | 1310 | /** @defgroup Digital_Sensor_Config Digital Sensor Data Coding (Digital_Sensor_Config) Register |
Vkadaba | 5:0728bde67bdb | 1311 | * Digital Sensor Data Coding (Digital_Sensor_Config) Register. |
Vkadaba | 5:0728bde67bdb | 1312 | * @{ |
Vkadaba | 5:0728bde67bdb | 1313 | */ |
Vkadaba | 5:0728bde67bdb | 1314 | |
Vkadaba | 5:0728bde67bdb | 1315 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 1316 | *! \enum ADMW_CORE_Digital_Sensor_Config_Digital_Sensor_Coding |
Vkadaba | 5:0728bde67bdb | 1317 | *! \brief Data Encoding of Sensor Result (Digital_Sensor_Coding) Enumerations |
Vkadaba | 5:0728bde67bdb | 1318 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 1319 | typedef enum |
Vkadaba | 5:0728bde67bdb | 1320 | { |
Vkadaba | 5:0728bde67bdb | 1321 | CORE_DIGITAL_SENSOR_CONFIG_CODING_NONE = 0, /**< None/Invalid */ |
Vkadaba | 5:0728bde67bdb | 1322 | CORE_DIGITAL_SENSOR_CONFIG_CODING_UNIPOLAR = 1, /**< Unipolar */ |
Vkadaba | 32:52445bef314d | 1323 | CORE_DIGITAL_SENSOR_CONFIG_CODING_TWOS_COMPL = 2, /**< Twos complement */ |
Vkadaba | 32:52445bef314d | 1324 | CORE_DIGITAL_SENSOR_CONFIG_CODING_OFFSET_BINARY = 3 /**< Offset binary */ |
Vkadaba | 8:2f2775c34640 | 1325 | } ADMW_CORE_Digital_Sensor_Config_Digital_Sensor_Coding; |
Vkadaba | 5:0728bde67bdb | 1326 | |
Vkadaba | 5:0728bde67bdb | 1327 | |
Vkadaba | 5:0728bde67bdb | 1328 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 1329 | *! \struct ADMW_CORE_Digital_Sensor_Config_Struct |
Vkadaba | 5:0728bde67bdb | 1330 | *! \brief Digital Sensor Data Coding Register bit field structure |
Vkadaba | 5:0728bde67bdb | 1331 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 1332 | typedef struct _ADMW_CORE_Digital_Sensor_Config_t { |
Vkadaba | 5:0728bde67bdb | 1333 | union { |
Vkadaba | 5:0728bde67bdb | 1334 | struct { |
Vkadaba | 5:0728bde67bdb | 1335 | uint16_t Digital_Sensor_Coding : 2; /**< Data Encoding of Sensor Result */ |
Vkadaba | 5:0728bde67bdb | 1336 | uint16_t Digital_Sensor_Little_Endian : 1; /**< Data Endianness of Sensor Result */ |
Vkadaba | 5:0728bde67bdb | 1337 | uint16_t Digital_Sensor_Left_Aligned : 1; /**< Data Alignment Within the Data Frame */ |
Vkadaba | 5:0728bde67bdb | 1338 | uint16_t Digital_Sensor_Bit_Offset : 4; /**< Data Bit Offset, Relative to Alignment */ |
Vkadaba | 5:0728bde67bdb | 1339 | uint16_t Digital_Sensor_Read_Bytes : 3; /**< Number of Bytes to Read from the Sensor */ |
Vkadaba | 5:0728bde67bdb | 1340 | uint16_t Digital_Sensor_Data_Bits : 5; /**< Number of Relevant Data Bits */ |
Vkadaba | 5:0728bde67bdb | 1341 | }; |
Vkadaba | 5:0728bde67bdb | 1342 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 1343 | }; |
Vkadaba | 8:2f2775c34640 | 1344 | } ADMW_CORE_Digital_Sensor_Config_t; |
Vkadaba | 5:0728bde67bdb | 1345 | |
Vkadaba | 5:0728bde67bdb | 1346 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1347 | |
Vkadaba | 5:0728bde67bdb | 1348 | /** @defgroup Digital_Sensor_Address Sensor Address (Digital_Sensor_Address) Register |
Vkadaba | 5:0728bde67bdb | 1349 | * Sensor Address (Digital_Sensor_Address) Register. |
Vkadaba | 5:0728bde67bdb | 1350 | * @{ |
Vkadaba | 5:0728bde67bdb | 1351 | */ |
Vkadaba | 5:0728bde67bdb | 1352 | |
Vkadaba | 5:0728bde67bdb | 1353 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 1354 | *! \struct ADMW_CORE_Digital_Sensor_Address_Struct |
Vkadaba | 5:0728bde67bdb | 1355 | *! \brief Sensor Address Register bit field structure |
Vkadaba | 5:0728bde67bdb | 1356 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 1357 | typedef struct _ADMW_CORE_Digital_Sensor_Address_t { |
Vkadaba | 5:0728bde67bdb | 1358 | union { |
Vkadaba | 5:0728bde67bdb | 1359 | struct { |
Vkadaba | 5:0728bde67bdb | 1360 | uint8_t Digital_Sensor_Address : 8; /**< I2C Address or Write Address Command for SPI Sensor */ |
Vkadaba | 5:0728bde67bdb | 1361 | }; |
Vkadaba | 5:0728bde67bdb | 1362 | uint8_t VALUE8; |
Vkadaba | 5:0728bde67bdb | 1363 | }; |
Vkadaba | 8:2f2775c34640 | 1364 | } ADMW_CORE_Digital_Sensor_Address_t; |
Vkadaba | 5:0728bde67bdb | 1365 | |
Vkadaba | 5:0728bde67bdb | 1366 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1367 | |
Vkadaba | 5:0728bde67bdb | 1368 | /** @defgroup Digital_Sensor_Comms Digital Sensor Communication Clock Configuration (Digital_Sensor_Comms) Register |
Vkadaba | 5:0728bde67bdb | 1369 | * Digital Sensor Communication Clock Configuration (Digital_Sensor_Comms) Register. |
Vkadaba | 5:0728bde67bdb | 1370 | * @{ |
Vkadaba | 5:0728bde67bdb | 1371 | */ |
Vkadaba | 5:0728bde67bdb | 1372 | |
Vkadaba | 5:0728bde67bdb | 1373 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 1374 | *! \enum ADMW_CORE_Digital_Sensor_Comms_SPI_Clock |
Vkadaba | 5:0728bde67bdb | 1375 | *! \brief Controls Clock Frequency for SPI Sensors (SPI_Clock) Enumerations |
Vkadaba | 5:0728bde67bdb | 1376 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 1377 | typedef enum |
Vkadaba | 5:0728bde67bdb | 1378 | { |
Vkadaba | 8:2f2775c34640 | 1379 | CORE_DIGITAL_SENSOR_COMMS_SPI_8MHZ = 0, /**< 8MHz */ |
Vkadaba | 8:2f2775c34640 | 1380 | CORE_DIGITAL_SENSOR_COMMS_SPI_4MHZ = 1, /**< 4MHz */ |
Vkadaba | 8:2f2775c34640 | 1381 | CORE_DIGITAL_SENSOR_COMMS_SPI_2MHZ = 2, /**< 2MHz */ |
Vkadaba | 8:2f2775c34640 | 1382 | CORE_DIGITAL_SENSOR_COMMS_SPI_1MHZ = 3, /**< 1MHz */ |
Vkadaba | 8:2f2775c34640 | 1383 | CORE_DIGITAL_SENSOR_COMMS_SPI_500KHZ = 4, /**< 500kHz */ |
Vkadaba | 8:2f2775c34640 | 1384 | CORE_DIGITAL_SENSOR_COMMS_SPI_250KHZ = 5, /**< 250kHz */ |
Vkadaba | 8:2f2775c34640 | 1385 | CORE_DIGITAL_SENSOR_COMMS_SPI_125KHZ = 6, /**< 125kHz */ |
Vkadaba | 8:2f2775c34640 | 1386 | CORE_DIGITAL_SENSOR_COMMS_SPI_62P5KHZ = 7, /**< 62.5kHz */ |
Vkadaba | 8:2f2775c34640 | 1387 | CORE_DIGITAL_SENSOR_COMMS_SPI_31P3KHZ = 8, /**< 31.25kHz */ |
Vkadaba | 8:2f2775c34640 | 1388 | CORE_DIGITAL_SENSOR_COMMS_SPI_15P6KHZ = 9, /**< 15.625kHz */ |
Vkadaba | 8:2f2775c34640 | 1389 | CORE_DIGITAL_SENSOR_COMMS_SPI_7P8KHZ = 10, /**< 7.8kHz */ |
Vkadaba | 8:2f2775c34640 | 1390 | CORE_DIGITAL_SENSOR_COMMS_SPI_3P9KHZ = 11, /**< 3.9kHz */ |
Vkadaba | 8:2f2775c34640 | 1391 | CORE_DIGITAL_SENSOR_COMMS_SPI_1P9KHZ = 12, /**< 1.95kHz */ |
Vkadaba | 8:2f2775c34640 | 1392 | CORE_DIGITAL_SENSOR_COMMS_SPI_977HZ = 13, /**< 977Hz */ |
Vkadaba | 8:2f2775c34640 | 1393 | CORE_DIGITAL_SENSOR_COMMS_SPI_488HZ = 14, /**< 488Hz */ |
Vkadaba | 8:2f2775c34640 | 1394 | CORE_DIGITAL_SENSOR_COMMS_SPI_244HZ = 15 /**< 244Hz */ |
Vkadaba | 8:2f2775c34640 | 1395 | } ADMW_CORE_Digital_Sensor_Comms_SPI_Clock; |
Vkadaba | 5:0728bde67bdb | 1396 | |
Vkadaba | 5:0728bde67bdb | 1397 | |
Vkadaba | 5:0728bde67bdb | 1398 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 1399 | *! \enum ADMW_CORE_Digital_Sensor_Comms_I2C_Clock |
Vkadaba | 5:0728bde67bdb | 1400 | *! \brief Controls SCLK Frequency for I2C Sensors (I2C_Clock) Enumerations |
Vkadaba | 5:0728bde67bdb | 1401 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 1402 | typedef enum |
Vkadaba | 5:0728bde67bdb | 1403 | { |
Vkadaba | 5:0728bde67bdb | 1404 | CORE_DIGITAL_SENSOR_COMMS_I2C_100K = 0, /**< 100kHz SCL */ |
Vkadaba | 5:0728bde67bdb | 1405 | CORE_DIGITAL_SENSOR_COMMS_I2C_400K = 1, /**< 400kHz SCL */ |
Vkadaba | 5:0728bde67bdb | 1406 | CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED1 = 2, /**< Reserved */ |
Vkadaba | 5:0728bde67bdb | 1407 | CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED2 = 3 /**< Reserved */ |
Vkadaba | 8:2f2775c34640 | 1408 | } ADMW_CORE_Digital_Sensor_Comms_I2C_Clock; |
Vkadaba | 5:0728bde67bdb | 1409 | |
Vkadaba | 5:0728bde67bdb | 1410 | |
Vkadaba | 5:0728bde67bdb | 1411 | /* ========================================================================= |
Vkadaba | 8:2f2775c34640 | 1412 | *! \enum ADMW_CORE_Digital_Sensor_Comms_SPI_Mode |
Vkadaba | 5:0728bde67bdb | 1413 | *! \brief Configuration for Sensor SPI Protocol (SPI_Mode) Enumerations |
Vkadaba | 5:0728bde67bdb | 1414 | * ========================================================================= */ |
Vkadaba | 5:0728bde67bdb | 1415 | typedef enum |
Vkadaba | 5:0728bde67bdb | 1416 | { |
Vkadaba | 32:52445bef314d | 1417 | CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_0 = 0, /**< Clock polarity = 0 Clock phase = 0 */ |
Vkadaba | 32:52445bef314d | 1418 | CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_1 = 1, /**< Clock polarity = 0 Clock phase = 1 */ |
Vkadaba | 32:52445bef314d | 1419 | CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_2 = 2, /**< Clock polarity = 1 Clock phase = 0 */ |
Vkadaba | 32:52445bef314d | 1420 | CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_3 = 3 /**< Clock polarity = 1 Clock phase = 1 */ |
Vkadaba | 8:2f2775c34640 | 1421 | } ADMW_CORE_Digital_Sensor_Comms_SPI_Mode; |
Vkadaba | 5:0728bde67bdb | 1422 | |
Vkadaba | 5:0728bde67bdb | 1423 | |
Vkadaba | 5:0728bde67bdb | 1424 | /* ========================================================================== |
Vkadaba | 8:2f2775c34640 | 1425 | *! \struct ADMW_CORE_Digital_Sensor_Comms_Struct |
Vkadaba | 5:0728bde67bdb | 1426 | *! \brief Digital Sensor Communication Clock Configuration Register bit field structure |
Vkadaba | 5:0728bde67bdb | 1427 | * ========================================================================== */ |
Vkadaba | 8:2f2775c34640 | 1428 | typedef struct _ADMW_CORE_Digital_Sensor_Comms_t { |
Vkadaba | 5:0728bde67bdb | 1429 | union { |
Vkadaba | 5:0728bde67bdb | 1430 | struct { |
Vkadaba | 50:d84305e5e1c0 | 1431 | uint16_t reserved0 : 1; |
Vkadaba | 50:d84305e5e1c0 | 1432 | uint16_t SPI_Clock : 4; /**< Controls Clock Frequency for SPI Sensors */ |
Vkadaba | 50:d84305e5e1c0 | 1433 | uint16_t I2C_Clock : 2; /**< Controls SCLK Frequency for I2C Sensors */ |
Vkadaba | 50:d84305e5e1c0 | 1434 | uint16_t reserved7 : 3; |
Vkadaba | 50:d84305e5e1c0 | 1435 | uint16_t SPI_Mode : 2; /**< Configuration for Sensor SPI Protocol */ |
Vkadaba | 50:d84305e5e1c0 | 1436 | uint16_t reserved12 : 4; |
Vkadaba | 5:0728bde67bdb | 1437 | }; |
Vkadaba | 5:0728bde67bdb | 1438 | uint16_t VALUE16; |
Vkadaba | 5:0728bde67bdb | 1439 | }; |
Vkadaba | 8:2f2775c34640 | 1440 | } ADMW_CORE_Digital_Sensor_Comms_t; |
Vkadaba | 5:0728bde67bdb | 1441 | |
Vkadaba | 5:0728bde67bdb | 1442 | /*@}*/ |
Vkadaba | 5:0728bde67bdb | 1443 | |
Vkadaba | 5:0728bde67bdb | 1444 | |
Vkadaba | 5:0728bde67bdb | 1445 | #if defined (__CC_ARM) |
Vkadaba | 5:0728bde67bdb | 1446 | #pragma pop |
Vkadaba | 50:d84305e5e1c0 | 1447 | #endif |
Vkadaba | 5:0728bde67bdb | 1448 | |
Vkadaba | 5:0728bde67bdb | 1449 | #endif |