Vybhav Kadaba / Mbed OS EV-PRO-MW1001_Development_v11775

Minor changes to support ADMW FWv1.17.75

inc/admw1001/ADMW1001_REGISTERS_typedefs.h@44:94bdfaefddac, 2020-01-16 (annotated)

Committer:
Vkadaba
Date:
Thu Jan 16 06:52:27 2020 +0000
Revision:
44:94bdfaefddac
Parent:
43:e1789b7214cf
Child:
50:d84305e5e1c0
Register map changes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Vkadaba 5:0728bde67bdb 1 /* ================================================================================
Vkadaba 32:52445bef314d 2
Vkadaba 32:52445bef314d 3 Created by :
Vkadaba 44:94bdfaefddac 4 Created on : 2020 Jan 08, 12:45 GMT Standard Time
Vkadaba 44:94bdfaefddac 5
Vkadaba 44:94bdfaefddac 6 Created on : 2020 Jan 08, 12:45 GMT Standard Time
Vkadaba 5:0728bde67bdb 7
Vkadaba 5:0728bde67bdb 8 Project : ADMW1001_REGISTERS
Vkadaba 5:0728bde67bdb 9 File : ADMW1001_REGISTERS_typedefs.h
Vkadaba 5:0728bde67bdb 10 Description : C Register Structures
Vkadaba 5:0728bde67bdb 11
Vkadaba 32:52445bef314d 12 !! ADI Confidential !!
Vkadaba 32:52445bef314d 13 INTERNAL USE ONLY
Vkadaba 5:0728bde67bdb 14
Vkadaba 44:94bdfaefddac 15 Copyright (c) 2020 Analog Devices, Inc. All Rights Reserved.
Vkadaba 5:0728bde67bdb 16 This software is proprietary and confidential to Analog Devices, Inc. and
Vkadaba 5:0728bde67bdb 17 its licensors.
Vkadaba 5:0728bde67bdb 18
Vkadaba 5:0728bde67bdb 19 This file was auto-generated. Do not make local changes to this file.
Vkadaba 32:52445bef314d 20
Vkadaba 44:94bdfaefddac 21
Vkadaba 32:52445bef314d 22 Auto generation script information:
Vkadaba 32:52445bef314d 23 Script: C:\Program Files (x86)\Yoda-19.05.01\generators\inc\genHeaders
Vkadaba 32:52445bef314d 24 Last modified: 26-SEP-2017
Vkadaba 5:0728bde67bdb 25
Vkadaba 5:0728bde67bdb 26 ================================================================================ */
Vkadaba 5:0728bde67bdb 27
Vkadaba 5:0728bde67bdb 28 #ifndef _ADMW1001_REGISTERS_TYPEDEFS_H
Vkadaba 5:0728bde67bdb 29 #define _ADMW1001_REGISTERS_TYPEDEFS_H
Vkadaba 5:0728bde67bdb 30
Vkadaba 5:0728bde67bdb 31 /* pickup integer types */
Vkadaba 5:0728bde67bdb 32 #if defined(_LANGUAGE_C) || (defined(__GNUC__) && !defined(__ASSEMBLER__))
Vkadaba 5:0728bde67bdb 33 #include <stdint.h>
Vkadaba 5:0728bde67bdb 34 #endif /* _LANGUAGE_C */
Vkadaba 5:0728bde67bdb 35
Vkadaba 5:0728bde67bdb 36 #if defined ( __CC_ARM )
Vkadaba 5:0728bde67bdb 37 #pragma push
Vkadaba 5:0728bde67bdb 38 #pragma anon_unions
Vkadaba 5:0728bde67bdb 39 #endif
Vkadaba 5:0728bde67bdb 40
Vkadaba 5:0728bde67bdb 41 /** @defgroup Interface_Config_A Interface Configuration A (Interface_Config_A) Register
Vkadaba 5:0728bde67bdb 42 * Interface Configuration A (Interface_Config_A) Register.
Vkadaba 5:0728bde67bdb 43 * @{
Vkadaba 5:0728bde67bdb 44 */
Vkadaba 5:0728bde67bdb 45
Vkadaba 5:0728bde67bdb 46 /* =========================================================================
Vkadaba 5:0728bde67bdb 47 *! \enum ADMW_SPI_Interface_Config_A_Addr_Ascension
Vkadaba 5:0728bde67bdb 48 *! \brief Determines Sequential Addressing Behavior (Addr_Ascension) Enumerations
Vkadaba 5:0728bde67bdb 49 * ========================================================================= */
Vkadaba 5:0728bde67bdb 50 typedef enum
Vkadaba 5:0728bde67bdb 51 {
Vkadaba 5:0728bde67bdb 52 SPI_INTERFACE_CONFIG_A_DESCEND = 0, /**< Address accessed is decremented by one for each data byte when streaming */
Vkadaba 5:0728bde67bdb 53 SPI_INTERFACE_CONFIG_A_ASCEND = 1 /**< Address accessed is incremented by one for each data byte when streaming */
Vkadaba 5:0728bde67bdb 54 } ADMW_SPI_Interface_Config_A_Addr_Ascension;
Vkadaba 5:0728bde67bdb 55
Vkadaba 5:0728bde67bdb 56
Vkadaba 5:0728bde67bdb 57 /* ==========================================================================
Vkadaba 5:0728bde67bdb 58 *! \struct ADMW_SPI_Interface_Config_A_Struct
Vkadaba 5:0728bde67bdb 59 *! \brief Interface Configuration A Register bit field structure
Vkadaba 5:0728bde67bdb 60 * ========================================================================== */
Vkadaba 8:2f2775c34640 61 typedef struct _ADMW_SPI_Interface_Config_A_t {
Vkadaba 5:0728bde67bdb 62 union {
Vkadaba 5:0728bde67bdb 63 struct {
Vkadaba 32:52445bef314d 64 uint8_t SW_ResetX : 1; /**< Second of Two of the SW_RESET Bits. */
Vkadaba 5:0728bde67bdb 65 uint8_t reserved1 : 3;
Vkadaba 32:52445bef314d 66 uint8_t SDO_Enable : 1; /**< Serial Data Output Pin Enable */
Vkadaba 5:0728bde67bdb 67 uint8_t Addr_Ascension : 1; /**< Determines Sequential Addressing Behavior */
Vkadaba 5:0728bde67bdb 68 uint8_t reserved6 : 1;
Vkadaba 32:52445bef314d 69 uint8_t SW_Reset : 1; /**< First of Two of the SW_RESET Bits. */
Vkadaba 5:0728bde67bdb 70 };
Vkadaba 5:0728bde67bdb 71 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 72 };
Vkadaba 5:0728bde67bdb 73 } ADMW_SPI_Interface_Config_A_t;
Vkadaba 5:0728bde67bdb 74
Vkadaba 5:0728bde67bdb 75 /*@}*/
Vkadaba 5:0728bde67bdb 76
Vkadaba 5:0728bde67bdb 77 /** @defgroup Interface_Config_B Interface Configuration B (Interface_Config_B) Register
Vkadaba 5:0728bde67bdb 78 * Interface Configuration B (Interface_Config_B) Register.
Vkadaba 5:0728bde67bdb 79 * @{
Vkadaba 5:0728bde67bdb 80 */
Vkadaba 5:0728bde67bdb 81
Vkadaba 5:0728bde67bdb 82 /* =========================================================================
Vkadaba 5:0728bde67bdb 83 *! \enum ADMW_SPI_Interface_Config_B_Single_Inst
Vkadaba 5:0728bde67bdb 84 *! \brief Select Streaming or Single Instruction Mode (Single_Inst) Enumerations
Vkadaba 5:0728bde67bdb 85 * ========================================================================= */
Vkadaba 5:0728bde67bdb 86 typedef enum
Vkadaba 5:0728bde67bdb 87 {
Vkadaba 5:0728bde67bdb 88 SPI_INTERFACE_CONFIG_B_STREAMING_MODE = 0, /**< Streaming mode is enabled */
Vkadaba 5:0728bde67bdb 89 SPI_INTERFACE_CONFIG_B_SINGLE_INSTRUCTION_MODE = 1 /**< Single Instruction mode is enabled */
Vkadaba 5:0728bde67bdb 90 } ADMW_SPI_Interface_Config_B_Single_Inst;
Vkadaba 5:0728bde67bdb 91
Vkadaba 5:0728bde67bdb 92
Vkadaba 5:0728bde67bdb 93 /* ==========================================================================
Vkadaba 5:0728bde67bdb 94 *! \struct ADMW_SPI_Interface_Config_B_Struct
Vkadaba 5:0728bde67bdb 95 *! \brief Interface Configuration B Register bit field structure
Vkadaba 5:0728bde67bdb 96 * ========================================================================== */
Vkadaba 8:2f2775c34640 97 typedef struct _ADMW_SPI_Interface_Config_B_t {
Vkadaba 5:0728bde67bdb 98 union {
Vkadaba 5:0728bde67bdb 99 struct {
Vkadaba 5:0728bde67bdb 100 uint8_t reserved0 : 7;
Vkadaba 5:0728bde67bdb 101 uint8_t Single_Inst : 1; /**< Select Streaming or Single Instruction Mode */
Vkadaba 5:0728bde67bdb 102 };
Vkadaba 5:0728bde67bdb 103 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 104 };
Vkadaba 5:0728bde67bdb 105 } ADMW_SPI_Interface_Config_B_t;
Vkadaba 5:0728bde67bdb 106
Vkadaba 5:0728bde67bdb 107 /*@}*/
Vkadaba 5:0728bde67bdb 108
Vkadaba 5:0728bde67bdb 109 /** @defgroup Chip_Type Chip Type (Chip_Type) Register
Vkadaba 5:0728bde67bdb 110 * Chip Type (Chip_Type) Register.
Vkadaba 5:0728bde67bdb 111 * @{
Vkadaba 5:0728bde67bdb 112 */
Vkadaba 5:0728bde67bdb 113
Vkadaba 5:0728bde67bdb 114 /* ==========================================================================
Vkadaba 5:0728bde67bdb 115 *! \struct ADMW_SPI_Chip_Type_Struct
Vkadaba 5:0728bde67bdb 116 *! \brief Chip Type Register bit field structure
Vkadaba 5:0728bde67bdb 117 * ========================================================================== */
Vkadaba 8:2f2775c34640 118 typedef struct _ADMW_SPI_Chip_Type_t {
Vkadaba 5:0728bde67bdb 119 union {
Vkadaba 5:0728bde67bdb 120 struct {
Vkadaba 5:0728bde67bdb 121 uint8_t Chip_Type : 4; /**< Precision ADC */
Vkadaba 5:0728bde67bdb 122 uint8_t reserved4 : 4;
Vkadaba 5:0728bde67bdb 123 };
Vkadaba 5:0728bde67bdb 124 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 125 };
Vkadaba 5:0728bde67bdb 126 } ADMW_SPI_Chip_Type_t;
Vkadaba 5:0728bde67bdb 127
Vkadaba 5:0728bde67bdb 128 /*@}*/
Vkadaba 5:0728bde67bdb 129
Vkadaba 5:0728bde67bdb 130 /** @defgroup Product_ID_L Product ID Low (Product_ID_L) Register
Vkadaba 5:0728bde67bdb 131 * Product ID Low (Product_ID_L) Register.
Vkadaba 5:0728bde67bdb 132 * @{
Vkadaba 5:0728bde67bdb 133 */
Vkadaba 5:0728bde67bdb 134
Vkadaba 5:0728bde67bdb 135 /* ==========================================================================
Vkadaba 5:0728bde67bdb 136 *! \struct ADMW_SPI_Product_ID_L_Struct
Vkadaba 5:0728bde67bdb 137 *! \brief Product ID Low Register bit field structure
Vkadaba 5:0728bde67bdb 138 * ========================================================================== */
Vkadaba 8:2f2775c34640 139 typedef struct _ADMW_SPI_Product_ID_L_t {
Vkadaba 5:0728bde67bdb 140 union {
Vkadaba 5:0728bde67bdb 141 struct {
Vkadaba 32:52445bef314d 142 uint8_t Product_ID_Trim_Bits : 4; /**< These Bits Vary on Die Configured for Multiple Generics */
Vkadaba 32:52445bef314d 143 uint8_t Product_ID_Fixed_Bits : 4; /**< Product_ID_Fixed_Bits[3:0] These Bits are Fixed on Die Configured for Multiple Generics */
Vkadaba 5:0728bde67bdb 144 };
Vkadaba 5:0728bde67bdb 145 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 146 };
Vkadaba 5:0728bde67bdb 147 } ADMW_SPI_Product_ID_L_t;
Vkadaba 5:0728bde67bdb 148
Vkadaba 5:0728bde67bdb 149 /*@}*/
Vkadaba 5:0728bde67bdb 150
Vkadaba 5:0728bde67bdb 151 /** @defgroup Product_ID_H Product ID High (Product_ID_H) Register
Vkadaba 5:0728bde67bdb 152 * Product ID High (Product_ID_H) Register.
Vkadaba 5:0728bde67bdb 153 * @{
Vkadaba 5:0728bde67bdb 154 */
Vkadaba 5:0728bde67bdb 155
Vkadaba 5:0728bde67bdb 156 /* ==========================================================================
Vkadaba 5:0728bde67bdb 157 *! \struct ADMW_SPI_Product_ID_H_Struct
Vkadaba 5:0728bde67bdb 158 *! \brief Product ID High Register bit field structure
Vkadaba 5:0728bde67bdb 159 * ========================================================================== */
Vkadaba 8:2f2775c34640 160 typedef struct _ADMW_SPI_Product_ID_H_t {
Vkadaba 5:0728bde67bdb 161 union {
Vkadaba 5:0728bde67bdb 162 struct {
Vkadaba 32:52445bef314d 163 uint8_t Product_ID_Fixed_Bits : 8; /**< Product_ID_Fixed_Bits[11:4] These Bits are Fixed on Die Configured for Multiple Generics */
Vkadaba 5:0728bde67bdb 164 };
Vkadaba 5:0728bde67bdb 165 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 166 };
Vkadaba 5:0728bde67bdb 167 } ADMW_SPI_Product_ID_H_t;
Vkadaba 5:0728bde67bdb 168
Vkadaba 5:0728bde67bdb 169 /*@}*/
Vkadaba 5:0728bde67bdb 170
Vkadaba 5:0728bde67bdb 171 /** @defgroup Chip_Grade Chip Grade (Chip_Grade) Register
Vkadaba 5:0728bde67bdb 172 * Chip Grade (Chip_Grade) Register.
Vkadaba 5:0728bde67bdb 173 * @{
Vkadaba 5:0728bde67bdb 174 */
Vkadaba 5:0728bde67bdb 175
Vkadaba 5:0728bde67bdb 176 /* ==========================================================================
Vkadaba 5:0728bde67bdb 177 *! \struct ADMW_SPI_Chip_Grade_Struct
Vkadaba 5:0728bde67bdb 178 *! \brief Chip Grade Register bit field structure
Vkadaba 5:0728bde67bdb 179 * ========================================================================== */
Vkadaba 8:2f2775c34640 180 typedef struct _ADMW_SPI_Chip_Grade_t {
Vkadaba 5:0728bde67bdb 181 union {
Vkadaba 5:0728bde67bdb 182 struct {
Vkadaba 32:52445bef314d 183 uint8_t Device_Revision : 4; /**< Device Hardware Revision */
Vkadaba 32:52445bef314d 184 uint8_t Grade : 4; /**< Device Performance Grade */
Vkadaba 5:0728bde67bdb 185 };
Vkadaba 5:0728bde67bdb 186 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 187 };
Vkadaba 5:0728bde67bdb 188 } ADMW_SPI_Chip_Grade_t;
Vkadaba 5:0728bde67bdb 189
Vkadaba 5:0728bde67bdb 190 /*@}*/
Vkadaba 5:0728bde67bdb 191
Vkadaba 5:0728bde67bdb 192 /** @defgroup Scratch_Pad Scratch Pad (Scratch_Pad) Register
Vkadaba 5:0728bde67bdb 193 * Scratch Pad (Scratch_Pad) Register.
Vkadaba 5:0728bde67bdb 194 * @{
Vkadaba 5:0728bde67bdb 195 */
Vkadaba 5:0728bde67bdb 196
Vkadaba 5:0728bde67bdb 197 /* ==========================================================================
Vkadaba 5:0728bde67bdb 198 *! \struct ADMW_SPI_Scratch_Pad_Struct
Vkadaba 5:0728bde67bdb 199 *! \brief Scratch Pad Register bit field structure
Vkadaba 5:0728bde67bdb 200 * ========================================================================== */
Vkadaba 8:2f2775c34640 201 typedef struct _ADMW_SPI_Scratch_Pad_t {
Vkadaba 5:0728bde67bdb 202 union {
Vkadaba 5:0728bde67bdb 203 struct {
Vkadaba 5:0728bde67bdb 204 uint8_t Scratch_Value : 8; /**< Software Scratchpad */
Vkadaba 5:0728bde67bdb 205 };
Vkadaba 5:0728bde67bdb 206 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 207 };
Vkadaba 5:0728bde67bdb 208 } ADMW_SPI_Scratch_Pad_t;
Vkadaba 5:0728bde67bdb 209
Vkadaba 5:0728bde67bdb 210 /*@}*/
Vkadaba 5:0728bde67bdb 211
Vkadaba 5:0728bde67bdb 212 /** @defgroup SPI_Revision SPI Revision (SPI_Revision) Register
Vkadaba 5:0728bde67bdb 213 * SPI Revision (SPI_Revision) Register.
Vkadaba 5:0728bde67bdb 214 * @{
Vkadaba 5:0728bde67bdb 215 */
Vkadaba 5:0728bde67bdb 216
Vkadaba 5:0728bde67bdb 217 /* =========================================================================
Vkadaba 5:0728bde67bdb 218 *! \enum ADMW_SPI_SPI_Revision_Version
Vkadaba 5:0728bde67bdb 219 *! \brief SPI Version (Version) Enumerations
Vkadaba 5:0728bde67bdb 220 * ========================================================================= */
Vkadaba 5:0728bde67bdb 221 typedef enum
Vkadaba 5:0728bde67bdb 222 {
Vkadaba 5:0728bde67bdb 223 SPI_SPI_REVISION_REV1_0 = 2 /**< Revision 1.0 */
Vkadaba 5:0728bde67bdb 224 } ADMW_SPI_SPI_Revision_Version;
Vkadaba 5:0728bde67bdb 225
Vkadaba 5:0728bde67bdb 226
Vkadaba 5:0728bde67bdb 227 /* =========================================================================
Vkadaba 5:0728bde67bdb 228 *! \enum ADMW_SPI_SPI_Revision_SPI_Type
Vkadaba 5:0728bde67bdb 229 *! \brief Always Reads as 0x2 (SPI_Type) Enumerations
Vkadaba 5:0728bde67bdb 230 * ========================================================================= */
Vkadaba 5:0728bde67bdb 231 typedef enum
Vkadaba 5:0728bde67bdb 232 {
Vkadaba 32:52445bef314d 233 SPI_SPI_REVISION_ADI_SPI = 0, /**< ADI_SPI */
Vkadaba 32:52445bef314d 234 SPI_SPI_REVISION_LPT_SPI = 2 /**< LPT_SPI */
Vkadaba 5:0728bde67bdb 235 } ADMW_SPI_SPI_Revision_SPI_Type;
Vkadaba 5:0728bde67bdb 236
Vkadaba 5:0728bde67bdb 237
Vkadaba 5:0728bde67bdb 238 /* ==========================================================================
Vkadaba 5:0728bde67bdb 239 *! \struct ADMW_SPI_SPI_Revision_Struct
Vkadaba 5:0728bde67bdb 240 *! \brief SPI Revision Register bit field structure
Vkadaba 5:0728bde67bdb 241 * ========================================================================== */
Vkadaba 8:2f2775c34640 242 typedef struct _ADMW_SPI_SPI_Revision_t {
Vkadaba 5:0728bde67bdb 243 union {
Vkadaba 5:0728bde67bdb 244 struct {
Vkadaba 5:0728bde67bdb 245 uint8_t Version : 6; /**< SPI Version */
Vkadaba 5:0728bde67bdb 246 uint8_t SPI_Type : 2; /**< Always Reads as 0x2 */
Vkadaba 5:0728bde67bdb 247 };
Vkadaba 5:0728bde67bdb 248 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 249 };
Vkadaba 5:0728bde67bdb 250 } ADMW_SPI_SPI_Revision_t;
Vkadaba 5:0728bde67bdb 251
Vkadaba 5:0728bde67bdb 252 /*@}*/
Vkadaba 5:0728bde67bdb 253
Vkadaba 5:0728bde67bdb 254 /** @defgroup Vendor_L Vendor ID Low (Vendor_L) Register
Vkadaba 5:0728bde67bdb 255 * Vendor ID Low (Vendor_L) Register.
Vkadaba 5:0728bde67bdb 256 * @{
Vkadaba 5:0728bde67bdb 257 */
Vkadaba 5:0728bde67bdb 258
Vkadaba 5:0728bde67bdb 259 /* ==========================================================================
Vkadaba 5:0728bde67bdb 260 *! \struct ADMW_SPI_Vendor_L_Struct
Vkadaba 5:0728bde67bdb 261 *! \brief Vendor ID Low Register bit field structure
Vkadaba 5:0728bde67bdb 262 * ========================================================================== */
Vkadaba 8:2f2775c34640 263 typedef struct _ADMW_SPI_Vendor_L_t {
Vkadaba 5:0728bde67bdb 264 union {
Vkadaba 5:0728bde67bdb 265 struct {
Vkadaba 5:0728bde67bdb 266 uint8_t VID : 8; /**< VID[7:0] Analog Devices Vendor ID */
Vkadaba 5:0728bde67bdb 267 };
Vkadaba 5:0728bde67bdb 268 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 269 };
Vkadaba 5:0728bde67bdb 270 } ADMW_SPI_Vendor_L_t;
Vkadaba 5:0728bde67bdb 271
Vkadaba 5:0728bde67bdb 272 /*@}*/
Vkadaba 5:0728bde67bdb 273
Vkadaba 5:0728bde67bdb 274 /** @defgroup Vendor_H Vendor ID High (Vendor_H) Register
Vkadaba 5:0728bde67bdb 275 * Vendor ID High (Vendor_H) Register.
Vkadaba 5:0728bde67bdb 276 * @{
Vkadaba 5:0728bde67bdb 277 */
Vkadaba 5:0728bde67bdb 278
Vkadaba 5:0728bde67bdb 279 /* ==========================================================================
Vkadaba 5:0728bde67bdb 280 *! \struct ADMW_SPI_Vendor_H_Struct
Vkadaba 5:0728bde67bdb 281 *! \brief Vendor ID High Register bit field structure
Vkadaba 5:0728bde67bdb 282 * ========================================================================== */
Vkadaba 8:2f2775c34640 283 typedef struct _ADMW_SPI_Vendor_H_t {
Vkadaba 5:0728bde67bdb 284 union {
Vkadaba 5:0728bde67bdb 285 struct {
Vkadaba 5:0728bde67bdb 286 uint8_t VID : 8; /**< VID[15:8] Analog Devices Vendor ID */
Vkadaba 5:0728bde67bdb 287 };
Vkadaba 5:0728bde67bdb 288 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 289 };
Vkadaba 5:0728bde67bdb 290 } ADMW_SPI_Vendor_H_t;
Vkadaba 5:0728bde67bdb 291
Vkadaba 5:0728bde67bdb 292 /*@}*/
Vkadaba 5:0728bde67bdb 293
Vkadaba 5:0728bde67bdb 294 /** @defgroup Stream_Mode Stream Mode (Stream_Mode) Register
Vkadaba 5:0728bde67bdb 295 * Stream Mode (Stream_Mode) Register.
Vkadaba 5:0728bde67bdb 296 * @{
Vkadaba 5:0728bde67bdb 297 */
Vkadaba 5:0728bde67bdb 298
Vkadaba 5:0728bde67bdb 299 /* ==========================================================================
Vkadaba 5:0728bde67bdb 300 *! \struct ADMW_SPI_Stream_Mode_Struct
Vkadaba 5:0728bde67bdb 301 *! \brief Stream Mode Register bit field structure
Vkadaba 5:0728bde67bdb 302 * ========================================================================== */
Vkadaba 8:2f2775c34640 303 typedef struct _ADMW_SPI_Stream_Mode_t {
Vkadaba 5:0728bde67bdb 304 union {
Vkadaba 5:0728bde67bdb 305 struct {
Vkadaba 32:52445bef314d 306 uint8_t Loop_Count : 8; /**< Set the Data Byte Count Before Looping to Start Address */
Vkadaba 5:0728bde67bdb 307 };
Vkadaba 5:0728bde67bdb 308 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 309 };
Vkadaba 5:0728bde67bdb 310 } ADMW_SPI_Stream_Mode_t;
Vkadaba 5:0728bde67bdb 311
Vkadaba 5:0728bde67bdb 312 /*@}*/
Vkadaba 5:0728bde67bdb 313
Vkadaba 5:0728bde67bdb 314 /** @defgroup Transfer_Config Transfer Config (Transfer_Config) Register
Vkadaba 5:0728bde67bdb 315 * Transfer Config (Transfer_Config) Register.
Vkadaba 5:0728bde67bdb 316 * @{
Vkadaba 5:0728bde67bdb 317 */
Vkadaba 5:0728bde67bdb 318
Vkadaba 5:0728bde67bdb 319 /* =========================================================================
Vkadaba 5:0728bde67bdb 320 *! \enum ADMW_SPI_Transfer_Config_Stream_Mode
Vkadaba 32:52445bef314d 321 *! \brief When Streaming, Control Master to Slave Transfer (Stream_Mode) Enumerations
Vkadaba 5:0728bde67bdb 322 * ========================================================================= */
Vkadaba 5:0728bde67bdb 323 typedef enum
Vkadaba 5:0728bde67bdb 324 {
Vkadaba 6:9d393a9677f4 325 SPI_TRANSFER_CONFIG_UPDATE_ON_WRITE = 0, /**< Transfers after each byte/mulit-byte register */
Vkadaba 6:9d393a9677f4 326 SPI_TRANSFER_CONFIG_UPDATE_ON_ADDRESS_LOOP = 1 /**< Transfers when address loops */
Vkadaba 5:0728bde67bdb 327 } ADMW_SPI_Transfer_Config_Stream_Mode;
Vkadaba 5:0728bde67bdb 328
Vkadaba 5:0728bde67bdb 329
Vkadaba 5:0728bde67bdb 330 /* ==========================================================================
Vkadaba 5:0728bde67bdb 331 *! \struct ADMW_SPI_Transfer_Config_Struct
Vkadaba 5:0728bde67bdb 332 *! \brief Transfer Config Register bit field structure
Vkadaba 5:0728bde67bdb 333 * ========================================================================== */
Vkadaba 8:2f2775c34640 334 typedef struct _ADMW_SPI_Transfer_Config_t {
Vkadaba 5:0728bde67bdb 335 union {
Vkadaba 5:0728bde67bdb 336 struct {
Vkadaba 5:0728bde67bdb 337 uint8_t reserved0 : 1;
Vkadaba 32:52445bef314d 338 uint8_t Stream_Mode : 1; /**< When Streaming, Control Master to Slave Transfer */
Vkadaba 5:0728bde67bdb 339 uint8_t reserved2 : 6;
Vkadaba 5:0728bde67bdb 340 };
Vkadaba 5:0728bde67bdb 341 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 342 };
Vkadaba 5:0728bde67bdb 343 } ADMW_SPI_Transfer_Config_t;
Vkadaba 5:0728bde67bdb 344
Vkadaba 5:0728bde67bdb 345 /*@}*/
Vkadaba 5:0728bde67bdb 346
Vkadaba 5:0728bde67bdb 347 /** @defgroup Interface_Config_C Interface Configuration C (Interface_Config_C) Register
Vkadaba 5:0728bde67bdb 348 * Interface Configuration C (Interface_Config_C) Register.
Vkadaba 5:0728bde67bdb 349 * @{
Vkadaba 5:0728bde67bdb 350 */
Vkadaba 5:0728bde67bdb 351
Vkadaba 5:0728bde67bdb 352 /* =========================================================================
Vkadaba 5:0728bde67bdb 353 *! \enum ADMW_SPI_Interface_Config_C_Strict_Register_Access
Vkadaba 32:52445bef314d 354 *! \brief Multibyte Registers Must Be Read or Written in Full (Strict_Register_Access) Enumerations
Vkadaba 5:0728bde67bdb 355 * ========================================================================= */
Vkadaba 5:0728bde67bdb 356 typedef enum
Vkadaba 5:0728bde67bdb 357 {
Vkadaba 6:9d393a9677f4 358 SPI_INTERFACE_CONFIG_C_NORMAL_ACCESS = 0, /**< Normal mode, no access restrictions */
Vkadaba 6:9d393a9677f4 359 SPI_INTERFACE_CONFIG_C_STRICT_ACCESS = 1 /**< Strict mode, multi-byte registers require all bytes read/written */
Vkadaba 5:0728bde67bdb 360 } ADMW_SPI_Interface_Config_C_Strict_Register_Access;
Vkadaba 5:0728bde67bdb 361
Vkadaba 5:0728bde67bdb 362
Vkadaba 5:0728bde67bdb 363 /* =========================================================================
Vkadaba 5:0728bde67bdb 364 *! \enum ADMW_SPI_Interface_Config_C_CRC_Enable
Vkadaba 5:0728bde67bdb 365 *! \brief CRC Enable (CRC_Enable) Enumerations
Vkadaba 5:0728bde67bdb 366 * ========================================================================= */
Vkadaba 5:0728bde67bdb 367 typedef enum
Vkadaba 5:0728bde67bdb 368 {
Vkadaba 6:9d393a9677f4 369 SPI_INTERFACE_CONFIG_C_DISABLED = 0, /**< CRC Disabled */
Vkadaba 6:9d393a9677f4 370 SPI_INTERFACE_CONFIG_C_ENABLED = 1 /**< CRC Enabled */
Vkadaba 5:0728bde67bdb 371 } ADMW_SPI_Interface_Config_C_CRC_Enable;
Vkadaba 5:0728bde67bdb 372
Vkadaba 5:0728bde67bdb 373
Vkadaba 5:0728bde67bdb 374 /* ==========================================================================
Vkadaba 5:0728bde67bdb 375 *! \struct ADMW_SPI_Interface_Config_C_Struct
Vkadaba 5:0728bde67bdb 376 *! \brief Interface Configuration C Register bit field structure
Vkadaba 5:0728bde67bdb 377 * ========================================================================== */
Vkadaba 8:2f2775c34640 378 typedef struct _ADMW_SPI_Interface_Config_C_t {
Vkadaba 5:0728bde67bdb 379 union {
Vkadaba 5:0728bde67bdb 380 struct {
Vkadaba 5:0728bde67bdb 381 uint8_t CRC_EnableB : 2; /**< Inverted CRC Enable */
Vkadaba 5:0728bde67bdb 382 uint8_t reserved2 : 2;
Vkadaba 32:52445bef314d 383 uint8_t Send_Status : 1; /**< Sends Status in 4-Wire Mode When Enabled */
Vkadaba 32:52445bef314d 384 uint8_t Strict_Register_Access : 1; /**< Multibyte Registers Must Be Read or Written in Full */
Vkadaba 5:0728bde67bdb 385 uint8_t CRC_Enable : 2; /**< CRC Enable */
Vkadaba 5:0728bde67bdb 386 };
Vkadaba 5:0728bde67bdb 387 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 388 };
Vkadaba 5:0728bde67bdb 389 } ADMW_SPI_Interface_Config_C_t;
Vkadaba 5:0728bde67bdb 390
Vkadaba 5:0728bde67bdb 391 /*@}*/
Vkadaba 5:0728bde67bdb 392
Vkadaba 5:0728bde67bdb 393 /** @defgroup Interface_Status_A Interface Status A (Interface_Status_A) Register
Vkadaba 5:0728bde67bdb 394 * Interface Status A (Interface_Status_A) Register.
Vkadaba 5:0728bde67bdb 395 * @{
Vkadaba 5:0728bde67bdb 396 */
Vkadaba 5:0728bde67bdb 397
Vkadaba 5:0728bde67bdb 398 /* ==========================================================================
Vkadaba 5:0728bde67bdb 399 *! \struct ADMW_SPI_Interface_Status_A_Struct
Vkadaba 5:0728bde67bdb 400 *! \brief Interface Status A Register bit field structure
Vkadaba 5:0728bde67bdb 401 * ========================================================================== */
Vkadaba 8:2f2775c34640 402 typedef struct _ADMW_SPI_Interface_Status_A_t {
Vkadaba 5:0728bde67bdb 403 union {
Vkadaba 5:0728bde67bdb 404 struct {
Vkadaba 32:52445bef314d 405 uint8_t Address_Invalid_Error : 1; /**< Attempt to Read/Write Nonexistent Register Address */
Vkadaba 5:0728bde67bdb 406 uint8_t Register_Partial_Access_Error : 1; /**< Set When Fewer Than Expected Number of Bytes Read/Written */
Vkadaba 32:52445bef314d 407 uint8_t Wr_To_Rd_Only_Reg_Error : 1; /**< Write to Read Only Register Attempted */
Vkadaba 5:0728bde67bdb 408 uint8_t CRC_Error : 1; /**< Invalid/No CRC Received */
Vkadaba 5:0728bde67bdb 409 uint8_t Clock_Count_Error : 1; /**< Incorrect Number of Clocks Detected in a Transaction */
Vkadaba 5:0728bde67bdb 410 uint8_t reserved5 : 2;
Vkadaba 5:0728bde67bdb 411 uint8_t Not_Ready_Error : 1; /**< Device Not Ready for Transaction */
Vkadaba 5:0728bde67bdb 412 };
Vkadaba 5:0728bde67bdb 413 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 414 };
Vkadaba 5:0728bde67bdb 415 } ADMW_SPI_Interface_Status_A_t;
Vkadaba 5:0728bde67bdb 416
Vkadaba 5:0728bde67bdb 417 /*@}*/
Vkadaba 5:0728bde67bdb 418
Vkadaba 32:52445bef314d 419 /** @defgroup Command Special Command Register (Command) Register
Vkadaba 32:52445bef314d 420 * Special Command Register (Command) Register.
Vkadaba 5:0728bde67bdb 421 * @{
Vkadaba 5:0728bde67bdb 422 */
Vkadaba 5:0728bde67bdb 423
Vkadaba 5:0728bde67bdb 424 /* =========================================================================
Vkadaba 8:2f2775c34640 425 *! \enum ADMW_CORE_Command_Special_Command
Vkadaba 5:0728bde67bdb 426 *! \brief Special Command (Special_Command) Enumerations
Vkadaba 5:0728bde67bdb 427 * ========================================================================= */
Vkadaba 5:0728bde67bdb 428 typedef enum
Vkadaba 5:0728bde67bdb 429 {
Vkadaba 32:52445bef314d 430 CORE_COMMAND_NOP = 0, /**< No command */
Vkadaba 32:52445bef314d 431 CORE_COMMAND_CONVERT = 1, /**< Start ADC conversions */
Vkadaba 32:52445bef314d 432 CORE_COMMAND_CONVERT_WITH_RAW = 2, /**< Start conversions with added raw ADC data */
Vkadaba 32:52445bef314d 433 CORE_COMMAND_LATCH_CONFIG = 7, /**< Latch configuration. */
Vkadaba 32:52445bef314d 434 CORE_COMMAND_LOAD_LUT = 8, /**< Load LUT from flash */
Vkadaba 32:52445bef314d 435 CORE_COMMAND_SAVE_LUT = 9, /**< Save LUT to flash */
Vkadaba 32:52445bef314d 436 CORE_COMMAND_POWER_DOWN = 20, /**< Enter Low Power State */
Vkadaba 32:52445bef314d 437 CORE_COMMAND_LOAD_CONFIG_1 = 24, /**< Load registers with configuration from flash */
Vkadaba 32:52445bef314d 438 CORE_COMMAND_SAVE_CONFIG_1 = 25 /**< Store current registers to flash configuration */
Vkadaba 8:2f2775c34640 439 } ADMW_CORE_Command_Special_Command;
Vkadaba 5:0728bde67bdb 440
Vkadaba 5:0728bde67bdb 441
Vkadaba 5:0728bde67bdb 442 /* ==========================================================================
Vkadaba 8:2f2775c34640 443 *! \struct ADMW_CORE_Command_Struct
Vkadaba 5:0728bde67bdb 444 *! \brief Special Command Register bit field structure
Vkadaba 5:0728bde67bdb 445 * ========================================================================== */
Vkadaba 8:2f2775c34640 446 typedef struct _ADMW_CORE_Command_t {
Vkadaba 5:0728bde67bdb 447 union {
Vkadaba 5:0728bde67bdb 448 struct {
Vkadaba 5:0728bde67bdb 449 uint8_t Special_Command : 8; /**< Special Command */
Vkadaba 5:0728bde67bdb 450 };
Vkadaba 5:0728bde67bdb 451 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 452 };
Vkadaba 8:2f2775c34640 453 } ADMW_CORE_Command_t;
Vkadaba 5:0728bde67bdb 454
Vkadaba 5:0728bde67bdb 455 /*@}*/
Vkadaba 5:0728bde67bdb 456
Vkadaba 5:0728bde67bdb 457 /** @defgroup Mode Operating Mode and DRDY Control (Mode) Register
Vkadaba 5:0728bde67bdb 458 * Operating Mode and DRDY Control (Mode) Register.
Vkadaba 5:0728bde67bdb 459 * @{
Vkadaba 5:0728bde67bdb 460 */
Vkadaba 5:0728bde67bdb 461
Vkadaba 5:0728bde67bdb 462 /* =========================================================================
Vkadaba 8:2f2775c34640 463 *! \enum ADMW_CORE_Mode_Conversion_Mode
Vkadaba 5:0728bde67bdb 464 *! \brief Conversion Mode (Conversion_Mode) Enumerations
Vkadaba 5:0728bde67bdb 465 * ========================================================================= */
Vkadaba 5:0728bde67bdb 466 typedef enum
Vkadaba 5:0728bde67bdb 467 {
Vkadaba 32:52445bef314d 468 CORE_MODE_SINGLECYCLE = 0, /**< Single cycle conversion mode. A cycle is completed every time a convert command is issued */
Vkadaba 32:52445bef314d 469 CORE_MODE_RESERVED = 1, /**< Reserved for future use */
Vkadaba 32:52445bef314d 470 CORE_MODE_CONTINUOUS = 2 /**< Continuous conversion mode. A cycle is started repeatedly at time specified in cycle time */
Vkadaba 8:2f2775c34640 471 } ADMW_CORE_Mode_Conversion_Mode;
Vkadaba 5:0728bde67bdb 472
Vkadaba 5:0728bde67bdb 473
Vkadaba 5:0728bde67bdb 474 /* =========================================================================
Vkadaba 8:2f2775c34640 475 *! \enum ADMW_CORE_Mode_Drdy_Mode
Vkadaba 32:52445bef314d 476 *! \brief Indicates Behavior of DRDY Pin (Drdy_Mode) Enumerations
Vkadaba 5:0728bde67bdb 477 * ========================================================================= */
Vkadaba 5:0728bde67bdb 478 typedef enum
Vkadaba 5:0728bde67bdb 479 {
Vkadaba 32:52445bef314d 480 CORE_MODE_DRDY_PER_CONVERSION = 0, /**< Data ready per conversion */
Vkadaba 32:52445bef314d 481 CORE_MODE_DRDY_PER_CYCLE = 1 /**< Data ready per cycle */
Vkadaba 8:2f2775c34640 482 } ADMW_CORE_Mode_Drdy_Mode;
Vkadaba 5:0728bde67bdb 483
Vkadaba 5:0728bde67bdb 484
Vkadaba 5:0728bde67bdb 485 /* ==========================================================================
Vkadaba 8:2f2775c34640 486 *! \struct ADMW_CORE_Mode_Struct
Vkadaba 5:0728bde67bdb 487 *! \brief Operating Mode and DRDY Control Register bit field structure
Vkadaba 5:0728bde67bdb 488 * ========================================================================== */
Vkadaba 8:2f2775c34640 489 typedef struct _ADMW_CORE_Mode_t {
Vkadaba 5:0728bde67bdb 490 union {
Vkadaba 5:0728bde67bdb 491 struct {
Vkadaba 5:0728bde67bdb 492 uint8_t Conversion_Mode : 2; /**< Conversion Mode */
Vkadaba 32:52445bef314d 493 uint8_t Drdy_Mode : 2; /**< Indicates Behavior of DRDY Pin */
Vkadaba 6:9d393a9677f4 494 uint8_t reserved4 : 4;
Vkadaba 5:0728bde67bdb 495 };
Vkadaba 5:0728bde67bdb 496 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 497 };
Vkadaba 8:2f2775c34640 498 } ADMW_CORE_Mode_t;
Vkadaba 5:0728bde67bdb 499
Vkadaba 5:0728bde67bdb 500 /*@}*/
Vkadaba 5:0728bde67bdb 501
Vkadaba 32:52445bef314d 502 /** @defgroup Power_Config Power Configuration (Power_Config) Register
Vkadaba 32:52445bef314d 503 * Power Configuration (Power_Config) Register.
Vkadaba 5:0728bde67bdb 504 * @{
Vkadaba 5:0728bde67bdb 505 */
Vkadaba 5:0728bde67bdb 506
Vkadaba 5:0728bde67bdb 507 /* =========================================================================
Vkadaba 8:2f2775c34640 508 *! \enum ADMW_CORE_Power_Config_Power_Mode_MCU
Vkadaba 6:9d393a9677f4 509 *! \brief MCU Power Mode (Power_Mode_MCU) Enumerations
Vkadaba 5:0728bde67bdb 510 * ========================================================================= */
Vkadaba 5:0728bde67bdb 511 typedef enum
Vkadaba 5:0728bde67bdb 512 {
Vkadaba 32:52445bef314d 513 CORE_POWER_CONFIG_ACTIVE_MODE = 0, /**< ADMW1001 is fully power up and ready to convert */
Vkadaba 32:52445bef314d 514 CORE_POWER_CONFIG_HIBERNATION = 1 /**< Lowest power mode. wakeup pin required to enter active mode. SPI powered down */
Vkadaba 8:2f2775c34640 515 } ADMW_CORE_Power_Config_Power_Mode_MCU;
Vkadaba 5:0728bde67bdb 516
Vkadaba 5:0728bde67bdb 517
Vkadaba 5:0728bde67bdb 518 /* ==========================================================================
Vkadaba 8:2f2775c34640 519 *! \struct ADMW_CORE_Power_Config_Struct
Vkadaba 32:52445bef314d 520 *! \brief Power Configuration Register bit field structure
Vkadaba 5:0728bde67bdb 521 * ========================================================================== */
Vkadaba 8:2f2775c34640 522 typedef struct _ADMW_CORE_Power_Config_t {
Vkadaba 5:0728bde67bdb 523 union {
Vkadaba 5:0728bde67bdb 524 struct {
Vkadaba 6:9d393a9677f4 525 uint8_t Power_Mode_MCU : 1; /**< MCU Power Mode */
Vkadaba 6:9d393a9677f4 526 uint8_t reserved1 : 7;
Vkadaba 5:0728bde67bdb 527 };
Vkadaba 5:0728bde67bdb 528 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 529 };
Vkadaba 8:2f2775c34640 530 } ADMW_CORE_Power_Config_t;
Vkadaba 5:0728bde67bdb 531
Vkadaba 5:0728bde67bdb 532 /*@}*/
Vkadaba 5:0728bde67bdb 533
Vkadaba 5:0728bde67bdb 534 /** @defgroup Cycle_Control Measurement Cycle (Cycle_Control) Register
Vkadaba 5:0728bde67bdb 535 * Measurement Cycle (Cycle_Control) Register.
Vkadaba 5:0728bde67bdb 536 * @{
Vkadaba 5:0728bde67bdb 537 */
Vkadaba 5:0728bde67bdb 538
Vkadaba 5:0728bde67bdb 539 /* =========================================================================
Vkadaba 43:e1789b7214cf 540 *! \enum ADMW_CORE_Cycle_Control_GND_SW_CTRL
Vkadaba 43:e1789b7214cf 541 *! \brief Ground Switch Cycle Control (GND_SW_CTRL) Enumerations
Vkadaba 43:e1789b7214cf 542 * ========================================================================= */
Vkadaba 43:e1789b7214cf 543 typedef enum
Vkadaba 43:e1789b7214cf 544 {
Vkadaba 44:94bdfaefddac 545
Vkadaba 44:94bdfaefddac 546 CORE_CYCLE_CONTROL_CYCLE_SW = 0, /**< Ground Switch Opens outside of measurement cycle to conserve power */
Vkadaba 44:94bdfaefddac 547 CORE_CYCLE_CONTROL_CLOSE_SW = 1, /**< Ground Switch Closed */
Vkadaba 43:e1789b7214cf 548 } ADMW_CORE_Cycle_Control_GND_SW_CTRL;
Vkadaba 43:e1789b7214cf 549
Vkadaba 44:94bdfaefddac 550
Vkadaba 43:e1789b7214cf 551 /* =========================================================================
Vkadaba 8:2f2775c34640 552 *! \enum ADMW_CORE_Cycle_Control_Vbias
Vkadaba 8:2f2775c34640 553 *! \brief Voltage Bias Global Enable (Vbias) Enumerations
Vkadaba 8:2f2775c34640 554 * ========================================================================= */
Vkadaba 8:2f2775c34640 555 typedef enum
Vkadaba 8:2f2775c34640 556 {
Vkadaba 32:52445bef314d 557 CORE_CYCLE_CONTROL_VBIAS_DISABLE = 0, /**< Vbias disabled */
Vkadaba 32:52445bef314d 558 CORE_CYCLE_CONTROL_VBIAS_ENABLE = 1 /**< Enable Vbias output for the duration of a cycle */
Vkadaba 8:2f2775c34640 559 } ADMW_CORE_Cycle_Control_Vbias;
Vkadaba 8:2f2775c34640 560
Vkadaba 8:2f2775c34640 561
Vkadaba 8:2f2775c34640 562 /* =========================================================================
Vkadaba 8:2f2775c34640 563 *! \enum ADMW_CORE_Cycle_Control_Cycle_Time_Units
Vkadaba 5:0728bde67bdb 564 *! \brief Units for Cycle Time (Cycle_Time_Units) Enumerations
Vkadaba 5:0728bde67bdb 565 * ========================================================================= */
Vkadaba 5:0728bde67bdb 566 typedef enum
Vkadaba 5:0728bde67bdb 567 {
Vkadaba 32:52445bef314d 568 CORE_CYCLE_CONTROL_MILLISECONDS = 0, /**< Milli-seconds */
Vkadaba 8:2f2775c34640 569 CORE_CYCLE_CONTROL_SECONDS = 1 /**< Seconds */
Vkadaba 8:2f2775c34640 570 } ADMW_CORE_Cycle_Control_Cycle_Time_Units;
Vkadaba 5:0728bde67bdb 571
Vkadaba 44:94bdfaefddac 572
Vkadaba 43:e1789b7214cf 573 /* =========================================================================
Vkadaba 43:e1789b7214cf 574 *! \enum ADMW_CORE_Cycle_Control_PST_MEAS_EXC_CTRL
Vkadaba 43:e1789b7214cf 575 *! \brief Disable Current Sources After Measurement Completes (PST_MEAS_EXC_CTRL) Enumerations
Vkadaba 43:e1789b7214cf 576 * ========================================================================= */
Vkadaba 43:e1789b7214cf 577 typedef enum
Vkadaba 43:e1789b7214cf 578 {
Vkadaba 43:e1789b7214cf 579 CORE_CYCLE_CONTROL_POWERCYCLE = 0, /**< */
Vkadaba 43:e1789b7214cf 580 CORE_CYCLE_CONTROL_ALWAYSON = 1 /**< */
Vkadaba 43:e1789b7214cf 581 } ADMW_CORE_Cycle_Control_PST_MEAS_EXC_CTRL;
Vkadaba 5:0728bde67bdb 582
Vkadaba 44:94bdfaefddac 583
Vkadaba 5:0728bde67bdb 584 /* ==========================================================================
Vkadaba 8:2f2775c34640 585 *! \struct ADMW_CORE_Cycle_Control_Struct
Vkadaba 5:0728bde67bdb 586 *! \brief Measurement Cycle Register bit field structure
Vkadaba 5:0728bde67bdb 587 * ========================================================================== */
Vkadaba 8:2f2775c34640 588 typedef struct _ADMW_CORE_Cycle_Control_t {
Vkadaba 5:0728bde67bdb 589 union {
Vkadaba 5:0728bde67bdb 590 struct {
Vkadaba 32:52445bef314d 591 uint16_t Cycle_Time : 12; /**< Time Between Measurement Cycles */
Vkadaba 43:e1789b7214cf 592 uint16_t GND_SW_CTRL : 1; /**< Ground Switch Cycle Control */
Vkadaba 44:94bdfaefddac 593 uint16_t Vbias : 1; /**< Voltage Bias Global Enable */
Vkadaba 32:52445bef314d 594 uint16_t Cycle_Time_Units : 1; /**< Units for Cycle Time */
Vkadaba 43:e1789b7214cf 595 uint16_t PST_MEAS_EXC_CTRL : 1; /**< Disable Current Sources After Measurement Completes */
Vkadaba 5:0728bde67bdb 596 };
Vkadaba 5:0728bde67bdb 597 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 598 };
Vkadaba 8:2f2775c34640 599 } ADMW_CORE_Cycle_Control_t;
Vkadaba 5:0728bde67bdb 600
Vkadaba 5:0728bde67bdb 601 /*@}*/
Vkadaba 5:0728bde67bdb 602
Vkadaba 32:52445bef314d 603 /** @defgroup Fifo_Num_Cycles Number of Measurement Cycles to Store in FIFO (Fifo_Num_Cycles) Register
Vkadaba 32:52445bef314d 604 * Number of Measurement Cycles to Store in FIFO (Fifo_Num_Cycles) Register.
Vkadaba 32:52445bef314d 605 * @{
Vkadaba 32:52445bef314d 606 */
Vkadaba 32:52445bef314d 607
Vkadaba 32:52445bef314d 608 /* ==========================================================================
Vkadaba 32:52445bef314d 609 *! \struct ADMW_CORE_Fifo_Num_Cycles_Struct
Vkadaba 32:52445bef314d 610 *! \brief Number of Measurement Cycles to Store in FIFO Register bit field structure
Vkadaba 32:52445bef314d 611 * ========================================================================== */
Vkadaba 32:52445bef314d 612 typedef struct _ADMW_CORE_Fifo_Num_Cycles_t {
Vkadaba 32:52445bef314d 613 union {
Vkadaba 32:52445bef314d 614 struct {
Vkadaba 32:52445bef314d 615 uint8_t Fifo_Num_Cycles : 8; /**< Number of Cycles to Fill the FIFO */
Vkadaba 32:52445bef314d 616 };
Vkadaba 32:52445bef314d 617 uint8_t VALUE8;
Vkadaba 32:52445bef314d 618 };
Vkadaba 32:52445bef314d 619 } ADMW_CORE_Fifo_Num_Cycles_t;
Vkadaba 32:52445bef314d 620
Vkadaba 32:52445bef314d 621 /*@}*/
Vkadaba 32:52445bef314d 622
Vkadaba 5:0728bde67bdb 623 /** @defgroup Status General Status (Status) Register
Vkadaba 5:0728bde67bdb 624 * General Status (Status) Register.
Vkadaba 5:0728bde67bdb 625 * @{
Vkadaba 5:0728bde67bdb 626 */
Vkadaba 5:0728bde67bdb 627
Vkadaba 5:0728bde67bdb 628 /* ==========================================================================
Vkadaba 8:2f2775c34640 629 *! \struct ADMW_CORE_Status_Struct
Vkadaba 5:0728bde67bdb 630 *! \brief General Status Register bit field structure
Vkadaba 5:0728bde67bdb 631 * ========================================================================== */
Vkadaba 8:2f2775c34640 632 typedef struct _ADMW_CORE_Status_t {
Vkadaba 5:0728bde67bdb 633 union {
Vkadaba 5:0728bde67bdb 634 struct {
Vkadaba 32:52445bef314d 635 uint8_t Configuration_Error : 1; /**< Indicates Error with Programmed Configuration */
Vkadaba 32:52445bef314d 636 uint8_t Alert_Active : 1; /**< Indicates One or More Sensor Alerts Active */
Vkadaba 32:52445bef314d 637 uint8_t Error : 1; /**< Indicates an Error */
Vkadaba 32:52445bef314d 638 uint8_t Drdy : 1; /**< Indicates New Sensor Result Available to Read */
Vkadaba 32:52445bef314d 639 uint8_t Cmd_Running : 1; /**< Indicates Special Command Active */
Vkadaba 32:52445bef314d 640 uint8_t FIFO_Error : 1; /**< Indicates Error with FIFO */
Vkadaba 32:52445bef314d 641 uint8_t Diag_Checksum_Error : 1; /**< Indicates Error on Internal Checksum Calculations */
Vkadaba 32:52445bef314d 642 uint8_t LUT_Error : 1; /**< Indicates Error with One or More Lookup Tables */
Vkadaba 5:0728bde67bdb 643 };
Vkadaba 5:0728bde67bdb 644 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 645 };
Vkadaba 8:2f2775c34640 646 } ADMW_CORE_Status_t;
Vkadaba 5:0728bde67bdb 647
Vkadaba 5:0728bde67bdb 648 /*@}*/
Vkadaba 5:0728bde67bdb 649
Vkadaba 5:0728bde67bdb 650 /** @defgroup Channel_Alert_Status Alert Status Summary (Channel_Alert_Status) Register
Vkadaba 5:0728bde67bdb 651 * Alert Status Summary (Channel_Alert_Status) Register.
Vkadaba 5:0728bde67bdb 652 * @{
Vkadaba 5:0728bde67bdb 653 */
Vkadaba 5:0728bde67bdb 654
Vkadaba 5:0728bde67bdb 655 /* ==========================================================================
Vkadaba 8:2f2775c34640 656 *! \struct ADMW_CORE_Channel_Alert_Status_Struct
Vkadaba 5:0728bde67bdb 657 *! \brief Alert Status Summary Register bit field structure
Vkadaba 5:0728bde67bdb 658 * ========================================================================== */
Vkadaba 8:2f2775c34640 659 typedef struct _ADMW_CORE_Channel_Alert_Status_t {
Vkadaba 5:0728bde67bdb 660 union {
Vkadaba 5:0728bde67bdb 661 struct {
Vkadaba 32:52445bef314d 662 uint16_t Alert_Ch0 : 1; /**< Indicates Channel 0 Alert Active */
Vkadaba 32:52445bef314d 663 uint16_t Alert_Ch1 : 1; /**< Indicates Channel 1 Alert Active */
Vkadaba 32:52445bef314d 664 uint16_t Alert_Ch2 : 1; /**< Indicates Channel 2 Alert Active */
Vkadaba 32:52445bef314d 665 uint16_t Alert_Ch3 : 1; /**< Indicates Channel 3 Alert Active */
Vkadaba 32:52445bef314d 666 uint16_t Alert_Ch4 : 1; /**< Indicates Channel 4 Alert Active */
Vkadaba 32:52445bef314d 667 uint16_t Alert_Ch5 : 1; /**< Indicates Channel 5Alert Active */
Vkadaba 32:52445bef314d 668 uint16_t Alert_Ch6 : 1; /**< Indicates Channel 6 Alert Active */
Vkadaba 32:52445bef314d 669 uint16_t Alert_Ch7 : 1; /**< Indicates Channel 7 Alert Active */
Vkadaba 32:52445bef314d 670 uint16_t Alert_Ch8 : 1; /**< Indicates Channel 8 Alert Active */
Vkadaba 32:52445bef314d 671 uint16_t Alert_Ch9 : 1; /**< Indicates Channel 9 Alert Active */
Vkadaba 32:52445bef314d 672 uint16_t Alert_Ch10 : 1; /**< Indicates Channel 10 Alert Active */
Vkadaba 32:52445bef314d 673 uint16_t Alert_Ch11 : 1; /**< Indicates Channel 11 Alert Active */
Vkadaba 32:52445bef314d 674 uint16_t Alert_Ch12 : 1; /**< Indicates Channel 12 Alert Active */
Vkadaba 32:52445bef314d 675 uint16_t reserved13 : 3;
Vkadaba 5:0728bde67bdb 676 };
Vkadaba 5:0728bde67bdb 677 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 678 };
Vkadaba 8:2f2775c34640 679 } ADMW_CORE_Channel_Alert_Status_t;
Vkadaba 5:0728bde67bdb 680
Vkadaba 5:0728bde67bdb 681 /*@}*/
Vkadaba 5:0728bde67bdb 682
Vkadaba 32:52445bef314d 683 /** @defgroup Alert_Detail_Ch Detailed Channel Error Information (Alert_Detail_Ch) Register
Vkadaba 32:52445bef314d 684 * Detailed Channel Error Information (Alert_Detail_Ch) Register.
Vkadaba 5:0728bde67bdb 685 * @{
Vkadaba 5:0728bde67bdb 686 */
Vkadaba 5:0728bde67bdb 687
Vkadaba 5:0728bde67bdb 688 /* ==========================================================================
Vkadaba 8:2f2775c34640 689 *! \struct ADMW_CORE_Alert_Detail_Ch_Struct
Vkadaba 32:52445bef314d 690 *! \brief Detailed Channel Error Information Register bit field structure
Vkadaba 5:0728bde67bdb 691 * ========================================================================== */
Vkadaba 8:2f2775c34640 692 typedef struct _ADMW_CORE_Alert_Detail_Ch_t {
Vkadaba 5:0728bde67bdb 693 union {
Vkadaba 5:0728bde67bdb 694 struct {
Vkadaba 32:52445bef314d 695 uint16_t Result_Valid : 1; /**< Set If a Result is Valid */
Vkadaba 32:52445bef314d 696 uint16_t ADC_Near_Overrange : 1; /**< Indicates If the ADC is Near Overrange */
Vkadaba 32:52445bef314d 697 uint16_t Sensor_UnderRange : 1; /**< Indicates If the Sensor is Underrange */
Vkadaba 32:52445bef314d 698 uint16_t Sensor_OverRange : 1; /**< Indicates If the Sensor is Overrange */
Vkadaba 32:52445bef314d 699 uint16_t CJ_Soft_Fault : 1; /**< Cold Junction Soft Fault */
Vkadaba 32:52445bef314d 700 uint16_t CJ_Hard_Fault : 1; /**< Cold Junction Hard Fault */
Vkadaba 32:52445bef314d 701 uint16_t ADC_Input_OverRange : 1; /**< Indicates the ADC Input is Overrange */
Vkadaba 32:52445bef314d 702 uint16_t Sensor_HardFault : 1; /**< Indicates Sensor Hard Fault */
Vkadaba 32:52445bef314d 703 uint16_t reserved8 : 8;
Vkadaba 5:0728bde67bdb 704 };
Vkadaba 5:0728bde67bdb 705 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 706 };
Vkadaba 8:2f2775c34640 707 } ADMW_CORE_Alert_Detail_Ch_t;
Vkadaba 5:0728bde67bdb 708
Vkadaba 5:0728bde67bdb 709 /*@}*/
Vkadaba 5:0728bde67bdb 710
Vkadaba 5:0728bde67bdb 711 /** @defgroup Error_Code Code Indicating Source of Error (Error_Code) Register
Vkadaba 5:0728bde67bdb 712 * Code Indicating Source of Error (Error_Code) Register.
Vkadaba 5:0728bde67bdb 713 * @{
Vkadaba 5:0728bde67bdb 714 */
Vkadaba 5:0728bde67bdb 715
Vkadaba 5:0728bde67bdb 716 /* ==========================================================================
Vkadaba 8:2f2775c34640 717 *! \struct ADMW_CORE_Error_Code_Struct
Vkadaba 5:0728bde67bdb 718 *! \brief Code Indicating Source of Error Register bit field structure
Vkadaba 5:0728bde67bdb 719 * ========================================================================== */
Vkadaba 8:2f2775c34640 720 typedef struct _ADMW_CORE_Error_Code_t {
Vkadaba 5:0728bde67bdb 721 union {
Vkadaba 5:0728bde67bdb 722 struct {
Vkadaba 5:0728bde67bdb 723 uint16_t Error_Code : 16; /**< Code Indicating Type of Error */
Vkadaba 5:0728bde67bdb 724 };
Vkadaba 5:0728bde67bdb 725 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 726 };
Vkadaba 8:2f2775c34640 727 } ADMW_CORE_Error_Code_t;
Vkadaba 5:0728bde67bdb 728
Vkadaba 5:0728bde67bdb 729 /*@}*/
Vkadaba 5:0728bde67bdb 730
Vkadaba 32:52445bef314d 731 /** @defgroup External_Reference_Resistor External Reference Resistor Value (External_Reference_Resistor) Register
Vkadaba 32:52445bef314d 732 * External Reference Resistor Value (External_Reference_Resistor) Register.
Vkadaba 5:0728bde67bdb 733 * @{
Vkadaba 5:0728bde67bdb 734 */
Vkadaba 5:0728bde67bdb 735
Vkadaba 5:0728bde67bdb 736 /* ==========================================================================
Vkadaba 8:2f2775c34640 737 *! \struct ADMW_CORE_External_Reference_Resistor_Struct
Vkadaba 32:52445bef314d 738 *! \brief External Reference Resistor Value Register bit field structure
Vkadaba 5:0728bde67bdb 739 * ========================================================================== */
Vkadaba 8:2f2775c34640 740 typedef struct _ADMW_CORE_External_Reference_Resistor_t {
Vkadaba 5:0728bde67bdb 741 union {
Vkadaba 5:0728bde67bdb 742 struct {
Vkadaba 32:52445bef314d 743 float Ext_Refin1_Value; /**< External Reference Resistor Value */
Vkadaba 5:0728bde67bdb 744 };
Vkadaba 5:0728bde67bdb 745 float VALUE32;
Vkadaba 5:0728bde67bdb 746 };
Vkadaba 8:2f2775c34640 747 } ADMW_CORE_External_Reference_Resistor_t;
Vkadaba 5:0728bde67bdb 748
Vkadaba 5:0728bde67bdb 749 /*@}*/
Vkadaba 5:0728bde67bdb 750
Vkadaba 36:54e2418e7620 751 /** @defgroup External_Voltage_Reference External Reference Information (External_Voltage_Reference) Register
Vkadaba 36:54e2418e7620 752 * External Reference Information (External_Voltage_Reference) Register.
Vkadaba 36:54e2418e7620 753 * @{
Vkadaba 36:54e2418e7620 754 */
Vkadaba 36:54e2418e7620 755
Vkadaba 36:54e2418e7620 756 /* ==========================================================================
Vkadaba 36:54e2418e7620 757 *! \struct ADMW_CORE_External_Voltage_Reference_Struct
Vkadaba 36:54e2418e7620 758 *! \brief External Reference Information Register bit field structure
Vkadaba 36:54e2418e7620 759 * ========================================================================== */
Vkadaba 36:54e2418e7620 760 typedef struct _ADMW_CORE_External_Voltage_Reference_t {
Vkadaba 36:54e2418e7620 761 union {
Vkadaba 36:54e2418e7620 762 struct {
Vkadaba 36:54e2418e7620 763 float Ext_Refin2_Value; /**< Reference Input Value */
Vkadaba 36:54e2418e7620 764 };
Vkadaba 36:54e2418e7620 765 float VALUE32;
Vkadaba 36:54e2418e7620 766 };
Vkadaba 36:54e2418e7620 767 } ADMW_CORE_External_Voltage_Reference_t;
Vkadaba 36:54e2418e7620 768
Vkadaba 36:54e2418e7620 769 /*@}*/
Vkadaba 43:e1789b7214cf 770
Vkadaba 43:e1789b7214cf 771 /** @defgroup AVDD_Voltage AVDD Voltage (AVDD_Voltage) Register
Vkadaba 43:e1789b7214cf 772 * AVDD Voltage (AVDD_Voltage) Register.
Vkadaba 43:e1789b7214cf 773 * @{
Vkadaba 43:e1789b7214cf 774 */
Vkadaba 43:e1789b7214cf 775
Vkadaba 43:e1789b7214cf 776 /* ==========================================================================
Vkadaba 43:e1789b7214cf 777 *! \struct ADMW_CORE_AVDD_Voltage_Struct
Vkadaba 43:e1789b7214cf 778 *! \brief AVDD Voltage Register bit field structure
Vkadaba 43:e1789b7214cf 779 * ========================================================================== */
Vkadaba 43:e1789b7214cf 780 typedef struct _ADMW_CORE_AVDD_Voltage_t {
Vkadaba 43:e1789b7214cf 781 union {
Vkadaba 43:e1789b7214cf 782 struct {
Vkadaba 43:e1789b7214cf 783 float Avdd_Voltage; /**< AVDD Voltage */
Vkadaba 43:e1789b7214cf 784 };
Vkadaba 43:e1789b7214cf 785 float VALUE32;
Vkadaba 43:e1789b7214cf 786 };
Vkadaba 43:e1789b7214cf 787 } ADMW_CORE_AVDD_Voltage_t;
Vkadaba 43:e1789b7214cf 788
Vkadaba 43:e1789b7214cf 789 /*@}*/
Vkadaba 43:e1789b7214cf 790
Vkadaba 5:0728bde67bdb 791 /** @defgroup Diagnostics_Control Diagnostic Control (Diagnostics_Control) Register
Vkadaba 5:0728bde67bdb 792 * Diagnostic Control (Diagnostics_Control) Register.
Vkadaba 5:0728bde67bdb 793 * @{
Vkadaba 5:0728bde67bdb 794 */
Vkadaba 5:0728bde67bdb 795
Vkadaba 5:0728bde67bdb 796 /* ==========================================================================
Vkadaba 8:2f2775c34640 797 *! \struct ADMW_CORE_Diagnostics_Control_Struct
Vkadaba 5:0728bde67bdb 798 *! \brief Diagnostic Control Register bit field structure
Vkadaba 5:0728bde67bdb 799 * ========================================================================== */
Vkadaba 8:2f2775c34640 800 typedef struct _ADMW_CORE_Diagnostics_Control_t {
Vkadaba 5:0728bde67bdb 801 union {
Vkadaba 5:0728bde67bdb 802 struct {
Vkadaba 32:52445bef314d 803 uint8_t Diag_Meas_En : 1; /**< Diagnostics Measure Enable */
Vkadaba 44:94bdfaefddac 804 uint8_t Diag_OSD_Freq : 7; /**< Diagnostics Open Sensor Detect Frequency */
Vkadaba 5:0728bde67bdb 805 };
Vkadaba 32:52445bef314d 806 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 807 };
Vkadaba 8:2f2775c34640 808 } ADMW_CORE_Diagnostics_Control_t;
Vkadaba 5:0728bde67bdb 809
Vkadaba 5:0728bde67bdb 810 /*@}*/
Vkadaba 5:0728bde67bdb 811
Vkadaba 5:0728bde67bdb 812 /** @defgroup Data_FIFO FIFO Buffer of Sensor Results (Data_FIFO) Register
Vkadaba 5:0728bde67bdb 813 * FIFO Buffer of Sensor Results (Data_FIFO) Register.
Vkadaba 5:0728bde67bdb 814 * @{
Vkadaba 5:0728bde67bdb 815 */
Vkadaba 5:0728bde67bdb 816
Vkadaba 5:0728bde67bdb 817 /* ==========================================================================
Vkadaba 8:2f2775c34640 818 *! \struct ADMW_CORE_Data_FIFO_Struct
Vkadaba 5:0728bde67bdb 819 *! \brief FIFO Buffer of Sensor Results Register bit field structure
Vkadaba 5:0728bde67bdb 820 * ========================================================================== */
Vkadaba 8:2f2775c34640 821 typedef struct _ADMW_CORE_Data_FIFO_t {
Vkadaba 5:0728bde67bdb 822 union {
Vkadaba 5:0728bde67bdb 823 struct {
Vkadaba 32:52445bef314d 824 uint8_t Data_Fifo : 8; /**< FIFO Buffer of Sensor Results */
Vkadaba 5:0728bde67bdb 825 };
Vkadaba 5:0728bde67bdb 826 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 827 };
Vkadaba 8:2f2775c34640 828 } ADMW_CORE_Data_FIFO_t;
Vkadaba 5:0728bde67bdb 829
Vkadaba 5:0728bde67bdb 830 /*@}*/
Vkadaba 5:0728bde67bdb 831
Vkadaba 5:0728bde67bdb 832 /** @defgroup Debug_Code Additional Information on Source of Alert or Errors (Debug_Code) Register
Vkadaba 5:0728bde67bdb 833 * Additional Information on Source of Alert or Errors (Debug_Code) Register.
Vkadaba 5:0728bde67bdb 834 * @{
Vkadaba 5:0728bde67bdb 835 */
Vkadaba 5:0728bde67bdb 836
Vkadaba 5:0728bde67bdb 837 /* ==========================================================================
Vkadaba 8:2f2775c34640 838 *! \struct ADMW_CORE_Debug_Code_Struct
Vkadaba 5:0728bde67bdb 839 *! \brief Additional Information on Source of Alert or Errors Register bit field structure
Vkadaba 5:0728bde67bdb 840 * ========================================================================== */
Vkadaba 8:2f2775c34640 841 typedef struct _ADMW_CORE_Debug_Code_t {
Vkadaba 5:0728bde67bdb 842 union {
Vkadaba 5:0728bde67bdb 843 struct {
Vkadaba 5:0728bde67bdb 844 uint32_t Debug_Code : 32; /**< Additional Information on Source of Alert or Errors */
Vkadaba 5:0728bde67bdb 845 };
Vkadaba 5:0728bde67bdb 846 uint32_t VALUE32;
Vkadaba 5:0728bde67bdb 847 };
Vkadaba 8:2f2775c34640 848 } ADMW_CORE_Debug_Code_t;
Vkadaba 5:0728bde67bdb 849
Vkadaba 5:0728bde67bdb 850 /*@}*/
Vkadaba 5:0728bde67bdb 851
Vkadaba 32:52445bef314d 852 /** @defgroup Test_Reg_Access Allows Access to Test (Hidden) Registers and Features (Test_Reg_Access) Register
Vkadaba 32:52445bef314d 853 * Allows Access to Test (Hidden) Registers and Features (Test_Reg_Access) Register.
Vkadaba 5:0728bde67bdb 854 * @{
Vkadaba 5:0728bde67bdb 855 */
Vkadaba 5:0728bde67bdb 856
Vkadaba 5:0728bde67bdb 857 /* ==========================================================================
Vkadaba 32:52445bef314d 858 *! \struct ADMW_CORE_Test_Reg_Access_Struct
Vkadaba 32:52445bef314d 859 *! \brief Allows Access to Test (Hidden) Registers and Features Register bit field structure
Vkadaba 5:0728bde67bdb 860 * ========================================================================== */
Vkadaba 32:52445bef314d 861 typedef struct _ADMW_CORE_Test_Reg_Access_t {
Vkadaba 5:0728bde67bdb 862 union {
Vkadaba 5:0728bde67bdb 863 struct {
Vkadaba 32:52445bef314d 864 uint16_t Test_Access : 16; /**< Test Register Access. Specific Write Sequence Required */
Vkadaba 5:0728bde67bdb 865 };
Vkadaba 5:0728bde67bdb 866 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 867 };
Vkadaba 32:52445bef314d 868 } ADMW_CORE_Test_Reg_Access_t;
Vkadaba 5:0728bde67bdb 869
Vkadaba 5:0728bde67bdb 870 /*@}*/
Vkadaba 5:0728bde67bdb 871
Vkadaba 32:52445bef314d 872 /** @defgroup LUT_Select LUT Read/Write Strobe (LUT_Select) Register
Vkadaba 32:52445bef314d 873 * LUT Read/Write Strobe (LUT_Select) Register.
Vkadaba 5:0728bde67bdb 874 * @{
Vkadaba 5:0728bde67bdb 875 */
Vkadaba 5:0728bde67bdb 876
Vkadaba 5:0728bde67bdb 877 /* =========================================================================
Vkadaba 8:2f2775c34640 878 *! \enum ADMW_CORE_LUT_Select_LUT_RW
Vkadaba 5:0728bde67bdb 879 *! \brief Read or Write LUT Data (LUT_RW) Enumerations
Vkadaba 5:0728bde67bdb 880 * ========================================================================= */
Vkadaba 5:0728bde67bdb 881 typedef enum
Vkadaba 5:0728bde67bdb 882 {
Vkadaba 32:52445bef314d 883 CORE_LUT_SELECT_LUT_READ = 0, /**< Read addressed LUT data */
Vkadaba 32:52445bef314d 884 CORE_LUT_SELECT_LUT_WRITE = 1 /**< Write addressed LUT data */
Vkadaba 8:2f2775c34640 885 } ADMW_CORE_LUT_Select_LUT_RW;
Vkadaba 5:0728bde67bdb 886
Vkadaba 5:0728bde67bdb 887
Vkadaba 5:0728bde67bdb 888 /* ==========================================================================
Vkadaba 8:2f2775c34640 889 *! \struct ADMW_CORE_LUT_Select_Struct
Vkadaba 32:52445bef314d 890 *! \brief LUT Read/Write Strobe Register bit field structure
Vkadaba 5:0728bde67bdb 891 * ========================================================================== */
Vkadaba 8:2f2775c34640 892 typedef struct _ADMW_CORE_LUT_Select_t {
Vkadaba 5:0728bde67bdb 893 union {
Vkadaba 5:0728bde67bdb 894 struct {
Vkadaba 5:0728bde67bdb 895 uint8_t reserved0 : 7;
Vkadaba 5:0728bde67bdb 896 uint8_t LUT_RW : 1; /**< Read or Write LUT Data */
Vkadaba 5:0728bde67bdb 897 };
Vkadaba 5:0728bde67bdb 898 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 899 };
Vkadaba 8:2f2775c34640 900 } ADMW_CORE_LUT_Select_t;
Vkadaba 5:0728bde67bdb 901
Vkadaba 5:0728bde67bdb 902 /*@}*/
Vkadaba 5:0728bde67bdb 903
Vkadaba 5:0728bde67bdb 904 /** @defgroup LUT_Offset Offset into Selected LUT (LUT_Offset) Register
Vkadaba 5:0728bde67bdb 905 * Offset into Selected LUT (LUT_Offset) Register.
Vkadaba 5:0728bde67bdb 906 * @{
Vkadaba 5:0728bde67bdb 907 */
Vkadaba 5:0728bde67bdb 908
Vkadaba 5:0728bde67bdb 909 /* ==========================================================================
Vkadaba 8:2f2775c34640 910 *! \struct ADMW_CORE_LUT_Offset_Struct
Vkadaba 5:0728bde67bdb 911 *! \brief Offset into Selected LUT Register bit field structure
Vkadaba 5:0728bde67bdb 912 * ========================================================================== */
Vkadaba 8:2f2775c34640 913 typedef struct _ADMW_CORE_LUT_Offset_t {
Vkadaba 5:0728bde67bdb 914 union {
Vkadaba 5:0728bde67bdb 915 struct {
Vkadaba 44:94bdfaefddac 916
Vkadaba 44:94bdfaefddac 917 uint16_t LUT_Offset : 11; /**< Offset into the Lookup Table */
Vkadaba 44:94bdfaefddac 918 uint16_t reserved11 : 5;
Vkadaba 5:0728bde67bdb 919 };
Vkadaba 5:0728bde67bdb 920 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 921 };
Vkadaba 8:2f2775c34640 922 } ADMW_CORE_LUT_Offset_t;
Vkadaba 5:0728bde67bdb 923
Vkadaba 5:0728bde67bdb 924 /*@}*/
Vkadaba 5:0728bde67bdb 925
Vkadaba 5:0728bde67bdb 926 /** @defgroup LUT_Data Data to Read/Write from Addressed LUT Entry (LUT_Data) Register
Vkadaba 5:0728bde67bdb 927 * Data to Read/Write from Addressed LUT Entry (LUT_Data) Register.
Vkadaba 5:0728bde67bdb 928 * @{
Vkadaba 5:0728bde67bdb 929 */
Vkadaba 5:0728bde67bdb 930
Vkadaba 5:0728bde67bdb 931 /* ==========================================================================
Vkadaba 8:2f2775c34640 932 *! \struct ADMW_CORE_LUT_Data_Struct
Vkadaba 5:0728bde67bdb 933 *! \brief Data to Read/Write from Addressed LUT Entry Register bit field structure
Vkadaba 5:0728bde67bdb 934 * ========================================================================== */
Vkadaba 8:2f2775c34640 935 typedef struct _ADMW_CORE_LUT_Data_t {
Vkadaba 5:0728bde67bdb 936 union {
Vkadaba 5:0728bde67bdb 937 struct {
Vkadaba 32:52445bef314d 938 uint8_t LUT_Data : 8; /**< Data Byte to Write to and Read from the Lookup Table */
Vkadaba 5:0728bde67bdb 939 };
Vkadaba 5:0728bde67bdb 940 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 941 };
Vkadaba 8:2f2775c34640 942 } ADMW_CORE_LUT_Data_t;
Vkadaba 5:0728bde67bdb 943
Vkadaba 5:0728bde67bdb 944 /*@}*/
Vkadaba 5:0728bde67bdb 945
Vkadaba 5:0728bde67bdb 946 /** @defgroup Revision Hardware, Firmware Revision (Revision) Register
Vkadaba 5:0728bde67bdb 947 * Hardware, Firmware Revision (Revision) Register.
Vkadaba 5:0728bde67bdb 948 * @{
Vkadaba 5:0728bde67bdb 949 */
Vkadaba 5:0728bde67bdb 950
Vkadaba 5:0728bde67bdb 951 /* ==========================================================================
Vkadaba 8:2f2775c34640 952 *! \struct ADMW_CORE_Revision_Struct
Vkadaba 5:0728bde67bdb 953 *! \brief Hardware, Firmware Revision Register bit field structure
Vkadaba 5:0728bde67bdb 954 * ========================================================================== */
Vkadaba 8:2f2775c34640 955 typedef struct _ADMW_CORE_Revision_t {
Vkadaba 5:0728bde67bdb 956 union {
Vkadaba 5:0728bde67bdb 957 struct {
Vkadaba 5:0728bde67bdb 958 uint32_t Rev_Patch : 16; /**< Patch Revision Information */
Vkadaba 5:0728bde67bdb 959 uint32_t Rev_Minor : 8; /**< Minor Revision Information */
Vkadaba 5:0728bde67bdb 960 uint32_t Rev_Major : 8; /**< Major Revision Information */
Vkadaba 5:0728bde67bdb 961 };
Vkadaba 5:0728bde67bdb 962 uint32_t VALUE32;
Vkadaba 5:0728bde67bdb 963 };
Vkadaba 8:2f2775c34640 964 } ADMW_CORE_Revision_t;
Vkadaba 5:0728bde67bdb 965
Vkadaba 5:0728bde67bdb 966 /*@}*/
Vkadaba 5:0728bde67bdb 967
Vkadaba 5:0728bde67bdb 968 /** @defgroup Channel_Count Number of Channel Occurrences per Measurement Cycle (Channel_Count) Register
Vkadaba 5:0728bde67bdb 969 * Number of Channel Occurrences per Measurement Cycle (Channel_Count) Register.
Vkadaba 5:0728bde67bdb 970 * @{
Vkadaba 5:0728bde67bdb 971 */
Vkadaba 5:0728bde67bdb 972
Vkadaba 5:0728bde67bdb 973 /* ==========================================================================
Vkadaba 8:2f2775c34640 974 *! \struct ADMW_CORE_Channel_Count_Struct
Vkadaba 5:0728bde67bdb 975 *! \brief Number of Channel Occurrences per Measurement Cycle Register bit field structure
Vkadaba 5:0728bde67bdb 976 * ========================================================================== */
Vkadaba 8:2f2775c34640 977 typedef struct _ADMW_CORE_Channel_Count_t {
Vkadaba 5:0728bde67bdb 978 union {
Vkadaba 5:0728bde67bdb 979 struct {
Vkadaba 32:52445bef314d 980 uint8_t Channel_Count : 7; /**< How Many Times Channel Appears in One Cycle */
Vkadaba 5:0728bde67bdb 981 uint8_t Channel_Enable : 1; /**< Enable Channel in Measurement Cycle */
Vkadaba 5:0728bde67bdb 982 };
Vkadaba 5:0728bde67bdb 983 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 984 };
Vkadaba 8:2f2775c34640 985 } ADMW_CORE_Channel_Count_t;
Vkadaba 5:0728bde67bdb 986
Vkadaba 5:0728bde67bdb 987 /*@}*/
Vkadaba 5:0728bde67bdb 988
Vkadaba 32:52445bef314d 989 /** @defgroup Channel_Options Position of Channel Within Sequence (Channel_Options) Register
Vkadaba 32:52445bef314d 990 * Position of Channel Within Sequence (Channel_Options) Register.
Vkadaba 5:0728bde67bdb 991 * @{
Vkadaba 5:0728bde67bdb 992 */
Vkadaba 5:0728bde67bdb 993
Vkadaba 5:0728bde67bdb 994 /* ==========================================================================
Vkadaba 8:2f2775c34640 995 *! \struct ADMW_CORE_Channel_Options_Struct
Vkadaba 32:52445bef314d 996 *! \brief Position of Channel Within Sequence Register bit field structure
Vkadaba 5:0728bde67bdb 997 * ========================================================================== */
Vkadaba 8:2f2775c34640 998 typedef struct _ADMW_CORE_Channel_Options_t {
Vkadaba 5:0728bde67bdb 999 union {
Vkadaba 5:0728bde67bdb 1000 struct {
Vkadaba 5:0728bde67bdb 1001 uint8_t Channel_Priority : 4; /**< Indicates Priority or Position of This Channel in Sequence */
Vkadaba 6:9d393a9677f4 1002 uint8_t reserved4 : 4;
Vkadaba 5:0728bde67bdb 1003 };
Vkadaba 5:0728bde67bdb 1004 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1005 };
Vkadaba 8:2f2775c34640 1006 } ADMW_CORE_Channel_Options_t;
Vkadaba 5:0728bde67bdb 1007
Vkadaba 5:0728bde67bdb 1008 /*@}*/
Vkadaba 5:0728bde67bdb 1009
Vkadaba 5:0728bde67bdb 1010 /** @defgroup Sensor_Type Sensor Select (Sensor_Type) Register
Vkadaba 5:0728bde67bdb 1011 * Sensor Select (Sensor_Type) Register.
Vkadaba 5:0728bde67bdb 1012 * @{
Vkadaba 5:0728bde67bdb 1013 */
Vkadaba 5:0728bde67bdb 1014
Vkadaba 5:0728bde67bdb 1015 /* =========================================================================
Vkadaba 8:2f2775c34640 1016 *! \enum ADMW_CORE_Sensor_Type_Sensor_Type
Vkadaba 5:0728bde67bdb 1017 *! \brief Sensor Type (Sensor_Type) Enumerations
Vkadaba 5:0728bde67bdb 1018 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1019 typedef enum
Vkadaba 5:0728bde67bdb 1020 {
Vkadaba 32:52445bef314d 1021 CORE_SENSOR_TYPE_THERMOCOUPLE_T = 0, /**< Thermocouple T-Type sensor */
Vkadaba 32:52445bef314d 1022 CORE_SENSOR_TYPE_THERMOCOUPLE_J = 1, /**< Thermocouple J-Type Sensor */
Vkadaba 32:52445bef314d 1023 CORE_SENSOR_TYPE_THERMOCOUPLE_K = 2, /**< Thermocouple K-Type Sensor */
Vkadaba 32:52445bef314d 1024 CORE_SENSOR_TYPE_RTD_2W_PT100 = 32, /**< RTD 2 wire PT100 sensor */
Vkadaba 32:52445bef314d 1025 CORE_SENSOR_TYPE_RTD_2W_PT1000 = 33, /**< RTD 2 wire PT1000 sensor */
Vkadaba 32:52445bef314d 1026 CORE_SENSOR_TYPE_RTD_3W_PT100 = 64, /**< RTD 3 wire PT100 sensor */
Vkadaba 32:52445bef314d 1027 CORE_SENSOR_TYPE_RTD_3W_PT1000 = 65, /**< RTD 3 wire PT1000 sensor */
Vkadaba 32:52445bef314d 1028 CORE_SENSOR_TYPE_RTD_4W_PT100 = 96, /**< RTD 4 wire PT100 sensor */
Vkadaba 32:52445bef314d 1029 CORE_SENSOR_TYPE_RTD_4W_PT1000 = 97, /**< RTD 4 wire PT1000 sensor */
Vkadaba 32:52445bef314d 1030 CORE_SENSOR_TYPE_BRIDGE_4W = 169, /**< Bridge 4 wire sensor */
Vkadaba 44:94bdfaefddac 1031 CORE_SENSOR_TYPE_VOLTAGE = 512, /**< Voltage Input */
Vkadaba 32:52445bef314d 1032 CORE_SENSOR_TYPE_CUSTOM1 = 1024, /**< Custom1 */
Vkadaba 32:52445bef314d 1033 CORE_SENSOR_TYPE_I2C_HUMIDITY_B = 2113, /**< I2C humidity sensor B */
Vkadaba 32:52445bef314d 1034 CORE_SENSOR_TYPE_SENSOR_RESERVED_1 = 4064, /**< RESERVED. NOT TO BE USED */
Vkadaba 32:52445bef314d 1035 CORE_SENSOR_TYPE_SENSOR_RESERVED_2 = 4095 /**< RESERVED. NOT TO BE USED */
Vkadaba 8:2f2775c34640 1036 } ADMW_CORE_Sensor_Type_Sensor_Type;
Vkadaba 5:0728bde67bdb 1037
Vkadaba 5:0728bde67bdb 1038
Vkadaba 5:0728bde67bdb 1039 /* ==========================================================================
Vkadaba 8:2f2775c34640 1040 *! \struct ADMW_CORE_Sensor_Type_Struct
Vkadaba 5:0728bde67bdb 1041 *! \brief Sensor Select Register bit field structure
Vkadaba 5:0728bde67bdb 1042 * ========================================================================== */
Vkadaba 8:2f2775c34640 1043 typedef struct _ADMW_CORE_Sensor_Type_t {
Vkadaba 5:0728bde67bdb 1044 union {
Vkadaba 5:0728bde67bdb 1045 struct {
Vkadaba 5:0728bde67bdb 1046 uint16_t Sensor_Type : 12; /**< Sensor Type */
Vkadaba 5:0728bde67bdb 1047 uint16_t reserved12 : 4;
Vkadaba 5:0728bde67bdb 1048 };
Vkadaba 5:0728bde67bdb 1049 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1050 };
Vkadaba 8:2f2775c34640 1051 } ADMW_CORE_Sensor_Type_t;
Vkadaba 5:0728bde67bdb 1052
Vkadaba 5:0728bde67bdb 1053 /*@}*/
Vkadaba 5:0728bde67bdb 1054
Vkadaba 5:0728bde67bdb 1055 /** @defgroup Sensor_Details Sensor Details (Sensor_Details) Register
Vkadaba 5:0728bde67bdb 1056 * Sensor Details (Sensor_Details) Register.
Vkadaba 5:0728bde67bdb 1057 * @{
Vkadaba 5:0728bde67bdb 1058 */
Vkadaba 5:0728bde67bdb 1059
Vkadaba 5:0728bde67bdb 1060 /* =========================================================================
Vkadaba 8:2f2775c34640 1061 *! \enum ADMW_CORE_Sensor_Details_Measurement_Units
Vkadaba 5:0728bde67bdb 1062 *! \brief Units of Sensor Measurement (Measurement_Units) Enumerations
Vkadaba 5:0728bde67bdb 1063 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1064 typedef enum
Vkadaba 5:0728bde67bdb 1065 {
Vkadaba 5:0728bde67bdb 1066 CORE_SENSOR_DETAILS_UNITS_UNSPECIFIED = 0, /**< Not Specified */
Vkadaba 5:0728bde67bdb 1067 CORE_SENSOR_DETAILS_UNITS_RESERVED = 1, /**< Reserved */
Vkadaba 5:0728bde67bdb 1068 CORE_SENSOR_DETAILS_UNITS_DEGC = 2, /**< Degrees C */
Vkadaba 5:0728bde67bdb 1069 CORE_SENSOR_DETAILS_UNITS_DEGF = 3 /**< Degrees F */
Vkadaba 8:2f2775c34640 1070 } ADMW_CORE_Sensor_Details_Measurement_Units;
Vkadaba 8:2f2775c34640 1071
Vkadaba 5:0728bde67bdb 1072
Vkadaba 6:9d393a9677f4 1073 /* =========================================================================
Vkadaba 6:9d393a9677f4 1074 *! \enum ADMW_CORE_Sensor_Details_LUT_Select
Vkadaba 6:9d393a9677f4 1075 *! \brief Lookup Table Select (LUT_Select) Enumerations
Vkadaba 6:9d393a9677f4 1076 * ========================================================================= */
Vkadaba 6:9d393a9677f4 1077 typedef enum
Vkadaba 6:9d393a9677f4 1078 {
Vkadaba 32:52445bef314d 1079 CORE_SENSOR_DETAILS_LUT_DEFAULT = 0, /**< Default lookup table for selected sensor type */
Vkadaba 44:94bdfaefddac 1080 CORE_SENSOR_DETAILS_LUT_CUSTOM = 1, /**< User defined custom lookup table. */
Vkadaba 44:94bdfaefddac 1081 CORE_SENSOR_DETAILS_LUT_RESERVED = 2 /**< Reserved */
Vkadaba 8:2f2775c34640 1082 } ADMW_CORE_Sensor_Details_LUT_Select;
Vkadaba 6:9d393a9677f4 1083
Vkadaba 6:9d393a9677f4 1084
Vkadaba 6:9d393a9677f4 1085 /* =========================================================================
Vkadaba 8:2f2775c34640 1086 *! \enum ADMW_CORE_Sensor_Details_Reference_Select
Vkadaba 5:0728bde67bdb 1087 *! \brief Reference Selection (Reference_Select) Enumerations
Vkadaba 5:0728bde67bdb 1088 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1089 typedef enum
Vkadaba 5:0728bde67bdb 1090 {
Vkadaba 32:52445bef314d 1091 CORE_SENSOR_DETAILS_REF_VINT = 0, /**< Internal voltage reference (1.2V) */
Vkadaba 32:52445bef314d 1092 CORE_SENSOR_DETAILS_REF_VEXT1 = 1, /**< External voltage reference applied to VERF+ and VREF- */
Vkadaba 32:52445bef314d 1093 CORE_SENSOR_DETAILS_REF_AVDD = 3 /**< AVDD supply internally used as reference */
Vkadaba 8:2f2775c34640 1094 } ADMW_CORE_Sensor_Details_Reference_Select;
Vkadaba 5:0728bde67bdb 1095
Vkadaba 5:0728bde67bdb 1096
Vkadaba 5:0728bde67bdb 1097 /* =========================================================================
Vkadaba 8:2f2775c34640 1098 *! \enum ADMW_CORE_Sensor_Details_PGA_Gain
Vkadaba 5:0728bde67bdb 1099 *! \brief PGA Gain (PGA_Gain) Enumerations
Vkadaba 5:0728bde67bdb 1100 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1101 typedef enum
Vkadaba 5:0728bde67bdb 1102 {
Vkadaba 5:0728bde67bdb 1103 CORE_SENSOR_DETAILS_PGA_GAIN_1 = 0, /**< Gain of 1 */
Vkadaba 5:0728bde67bdb 1104 CORE_SENSOR_DETAILS_PGA_GAIN_2 = 1, /**< Gain of 2 */
Vkadaba 5:0728bde67bdb 1105 CORE_SENSOR_DETAILS_PGA_GAIN_4 = 2, /**< Gain of 4 */
Vkadaba 5:0728bde67bdb 1106 CORE_SENSOR_DETAILS_PGA_GAIN_8 = 3, /**< Gain of 8 */
Vkadaba 5:0728bde67bdb 1107 CORE_SENSOR_DETAILS_PGA_GAIN_16 = 4, /**< Gain of 16 */
Vkadaba 5:0728bde67bdb 1108 CORE_SENSOR_DETAILS_PGA_GAIN_32 = 5, /**< Gain of 32 */
Vkadaba 5:0728bde67bdb 1109 CORE_SENSOR_DETAILS_PGA_GAIN_64 = 6, /**< Gain of 64 */
Vkadaba 5:0728bde67bdb 1110 CORE_SENSOR_DETAILS_PGA_GAIN_128 = 7 /**< Gain of 128 */
Vkadaba 8:2f2775c34640 1111 } ADMW_CORE_Sensor_Details_PGA_Gain;
Vkadaba 5:0728bde67bdb 1112
Vkadaba 5:0728bde67bdb 1113
Vkadaba 6:9d393a9677f4 1114 /* =========================================================================
Vkadaba 8:2f2775c34640 1115 *! \enum ADMW_CORE_Sensor_Details_RTD_Curve
Vkadaba 32:52445bef314d 1116 *! \brief Select RTD Curve for Linearization (RTD_Curve) Enumerations
Vkadaba 6:9d393a9677f4 1117 * ========================================================================= */
Vkadaba 6:9d393a9677f4 1118 typedef enum
Vkadaba 6:9d393a9677f4 1119 {
Vkadaba 32:52445bef314d 1120 CORE_SENSOR_DETAILS_EUROPEAN_CURVE = 0, /**< European curve */
Vkadaba 32:52445bef314d 1121 CORE_SENSOR_DETAILS_AMERICAN_CURVE = 1, /**< American curve */
Vkadaba 32:52445bef314d 1122 CORE_SENSOR_DETAILS_JAPANESE_CURVE = 2, /**< Japanese curve */
Vkadaba 32:52445bef314d 1123 CORE_SENSOR_DETAILS_ITS90_CURVE = 3 /**< ITS-90 curve */
Vkadaba 8:2f2775c34640 1124 } ADMW_CORE_Sensor_Details_RTD_Curve;
Vkadaba 6:9d393a9677f4 1125
Vkadaba 6:9d393a9677f4 1126
Vkadaba 5:0728bde67bdb 1127 /* ==========================================================================
Vkadaba 8:2f2775c34640 1128 *! \struct ADMW_CORE_Sensor_Details_Struct
Vkadaba 5:0728bde67bdb 1129 *! \brief Sensor Details Register bit field structure
Vkadaba 5:0728bde67bdb 1130 * ========================================================================== */
Vkadaba 8:2f2775c34640 1131 typedef struct _ADMW_CORE_Sensor_Details_t {
Vkadaba 5:0728bde67bdb 1132 union {
Vkadaba 5:0728bde67bdb 1133 struct {
Vkadaba 5:0728bde67bdb 1134 uint32_t Measurement_Units : 4; /**< Units of Sensor Measurement */
Vkadaba 32:52445bef314d 1135 uint32_t Compensation_Channel : 4; /**< Indicates Which Channel Used to Compensate the Sensor Result */
Vkadaba 8:2f2775c34640 1136 uint32_t reserved8 : 7;
Vkadaba 8:2f2775c34640 1137 uint32_t LUT_Select : 2; /**< Lookup Table Select */
Vkadaba 5:0728bde67bdb 1138 uint32_t Do_Not_Publish : 1; /**< Do Not Publish Channel Result */
Vkadaba 8:2f2775c34640 1139 uint32_t reserved18 : 2;
Vkadaba 6:9d393a9677f4 1140 uint32_t Reference_Select : 4; /**< Reference Selection */
Vkadaba 6:9d393a9677f4 1141 uint32_t PGA_Gain : 3; /**< PGA Gain */
Vkadaba 32:52445bef314d 1142 uint32_t RTD_Curve : 2; /**< Select RTD Curve for Linearization */
Vkadaba 6:9d393a9677f4 1143 uint32_t reserved29 : 2;
Vkadaba 32:52445bef314d 1144 uint32_t Compensation_Disable : 1; /**< This Bit Indicates Compensation Data Must Not Be Used */
Vkadaba 5:0728bde67bdb 1145 };
Vkadaba 5:0728bde67bdb 1146 uint32_t VALUE32;
Vkadaba 5:0728bde67bdb 1147 };
Vkadaba 8:2f2775c34640 1148 } ADMW_CORE_Sensor_Details_t;
Vkadaba 5:0728bde67bdb 1149
Vkadaba 5:0728bde67bdb 1150 /*@}*/
Vkadaba 5:0728bde67bdb 1151
Vkadaba 5:0728bde67bdb 1152 /** @defgroup Channel_Excitation Excitation Current (Channel_Excitation) Register
Vkadaba 5:0728bde67bdb 1153 * Excitation Current (Channel_Excitation) Register.
Vkadaba 5:0728bde67bdb 1154 * @{
Vkadaba 5:0728bde67bdb 1155 */
Vkadaba 5:0728bde67bdb 1156
Vkadaba 5:0728bde67bdb 1157 /* =========================================================================
Vkadaba 8:2f2775c34640 1158 *! \enum ADMW_CORE_Channel_Excitation_IOUT_Excitation_Current
Vkadaba 5:0728bde67bdb 1159 *! \brief Current Source Value (IOUT_Excitation_Current) Enumerations
Vkadaba 5:0728bde67bdb 1160 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1161 typedef enum
Vkadaba 5:0728bde67bdb 1162 {
Vkadaba 32:52445bef314d 1163 CORE_CHANNEL_EXCITATION_NONE = 0, /**< Excitation Current Disabled */
Vkadaba 32:52445bef314d 1164 CORE_CHANNEL_EXCITATION_RESERVED = 1, /**< Reserved */
Vkadaba 32:52445bef314d 1165 CORE_CHANNEL_EXCITATION_IEXC_10UA = 2, /**< 10 \mu;A */
Vkadaba 32:52445bef314d 1166 CORE_CHANNEL_EXCITATION_RESERVED2 = 3, /**< Reserved */
Vkadaba 32:52445bef314d 1167 CORE_CHANNEL_EXCITATION_IEXC_50UA = 4, /**< 50 \mu;A */
Vkadaba 32:52445bef314d 1168 CORE_CHANNEL_EXCITATION_IEXC_100UA = 5, /**< 100 \mu;A */
Vkadaba 32:52445bef314d 1169 CORE_CHANNEL_EXCITATION_IEXC_250UA = 6, /**< 250 \mu;A */
Vkadaba 32:52445bef314d 1170 CORE_CHANNEL_EXCITATION_IEXC_500UA = 7, /**< 500 \mu;A */
Vkadaba 32:52445bef314d 1171 CORE_CHANNEL_EXCITATION_IEXC_1000UA = 8, /**< 1000 \mu;A */
Vkadaba 32:52445bef314d 1172 CORE_CHANNEL_EXCITATION_EXTERNAL = 15 /**< External current sourced */
Vkadaba 8:2f2775c34640 1173 } ADMW_CORE_Channel_Excitation_IOUT_Excitation_Current;
Vkadaba 5:0728bde67bdb 1174
Vkadaba 5:0728bde67bdb 1175
Vkadaba 44:94bdfaefddac 1176 /* =========================================================================
Vkadaba 44:94bdfaefddac 1177 *! \enum ADMW_CORE_Channel_Excitation_IOUT_Diode_Ratio
Vkadaba 44:94bdfaefddac 1178 *! \brief Modify Current Ratios Used for Diode Sensor (IOUT_Diode_Ratio) Enumerations
Vkadaba 44:94bdfaefddac 1179 * ========================================================================= */
Vkadaba 44:94bdfaefddac 1180 typedef enum
Vkadaba 44:94bdfaefddac 1181 {
Vkadaba 44:94bdfaefddac 1182 CORE_CHANNEL_EXCITATION_DIODE_2PT_10UA_100UA = 0, /**< 2 Current measurement 10uA 100uA */
Vkadaba 44:94bdfaefddac 1183 CORE_CHANNEL_EXCITATION_DIODE_2PT_20UA_160UA = 1, /**< 2 Current measurement 20uA 160uA */
Vkadaba 44:94bdfaefddac 1184 CORE_CHANNEL_EXCITATION_DIODE_2PT_50UA_300UA = 2, /**< 2 Current measurement 50uA 300uA */
Vkadaba 44:94bdfaefddac 1185 CORE_CHANNEL_EXCITATION_DIODE_2PT_100UA_600UA = 3, /**< 2 Current measurement 100uA 600uA */
Vkadaba 44:94bdfaefddac 1186 CORE_CHANNEL_EXCITATION_DIODE_3PT_10UA_50UA_100UA = 4, /**< 3 current measuremet 10uA 50uA 100uA */
Vkadaba 44:94bdfaefddac 1187 CORE_CHANNEL_EXCITATION_DIODE_3PT_20UA_100UA_160UA = 5, /**< 3 current measuremet 20uA 100uA 160uA */
Vkadaba 44:94bdfaefddac 1188 CORE_CHANNEL_EXCITATION_DIODE_3PT_50UA_150UA_300UA = 6, /**< 3 current measuremet 50uA 150uA 300uA */
Vkadaba 44:94bdfaefddac 1189 CORE_CHANNEL_EXCITATION_DIODE_3PT_100UA_300UA_600UA = 7 /**< 3 current measuremet 100uA 300uA 600uA */
Vkadaba 44:94bdfaefddac 1190 } ADMW_CORE_Channel_Excitation_IOUT_Diode_Ratio;
Vkadaba 44:94bdfaefddac 1191
Vkadaba 44:94bdfaefddac 1192
Vkadaba 5:0728bde67bdb 1193 /* ==========================================================================
Vkadaba 8:2f2775c34640 1194 *! \struct ADMW_CORE_Channel_Excitation_Struct
Vkadaba 5:0728bde67bdb 1195 *! \brief Excitation Current Register bit field structure
Vkadaba 5:0728bde67bdb 1196 * ========================================================================== */
Vkadaba 8:2f2775c34640 1197 typedef struct _ADMW_CORE_Channel_Excitation_t {
Vkadaba 5:0728bde67bdb 1198 union {
Vkadaba 5:0728bde67bdb 1199 struct {
Vkadaba 6:9d393a9677f4 1200 uint16_t IOUT_Excitation_Current : 4; /**< Current Source Value */
Vkadaba 44:94bdfaefddac 1201 uint16_t reserved4 : 2;
Vkadaba 44:94bdfaefddac 1202 uint16_t IOUT_Diode_Ratio : 3; /**< Modify Current Ratios Used for Diode Sensor */
Vkadaba 44:94bdfaefddac 1203 uint16_t reserved9 : 7;
Vkadaba 5:0728bde67bdb 1204 };
Vkadaba 6:9d393a9677f4 1205 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1206 };
Vkadaba 8:2f2775c34640 1207 } ADMW_CORE_Channel_Excitation_t;
Vkadaba 5:0728bde67bdb 1208
Vkadaba 5:0728bde67bdb 1209 /*@}*/
Vkadaba 5:0728bde67bdb 1210
Vkadaba 5:0728bde67bdb 1211 /** @defgroup Settling_Time Settling Time (Settling_Time) Register
Vkadaba 5:0728bde67bdb 1212 * Settling Time (Settling_Time) Register.
Vkadaba 5:0728bde67bdb 1213 * @{
Vkadaba 5:0728bde67bdb 1214 */
Vkadaba 5:0728bde67bdb 1215
Vkadaba 5:0728bde67bdb 1216 /* =========================================================================
Vkadaba 8:2f2775c34640 1217 *! \enum ADMW_CORE_Settling_Time_Settling_Time_Units
Vkadaba 5:0728bde67bdb 1218 *! \brief Units for Settling Time (Settling_Time_Units) Enumerations
Vkadaba 5:0728bde67bdb 1219 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1220 typedef enum
Vkadaba 5:0728bde67bdb 1221 {
Vkadaba 44:94bdfaefddac 1222
Vkadaba 44:94bdfaefddac 1223 CORE_SETTLING_TIME_MILLISECONDS = 0, /**< Micro-seconds */
Vkadaba 44:94bdfaefddac 1224 CORE_SETTLING_TIME_SECONDS = 1, /**< Milli-seconds */
Vkadaba 44:94bdfaefddac 1225 CORE_SETTLING_TIME_RESERVED = 2, /**< Seconds */
Vkadaba 32:52445bef314d 1226 CORE_SETTLING_TIME_UNDEFINED = 3 /**< Undefined */
Vkadaba 8:2f2775c34640 1227 } ADMW_CORE_Settling_Time_Settling_Time_Units;
Vkadaba 5:0728bde67bdb 1228
Vkadaba 5:0728bde67bdb 1229
Vkadaba 5:0728bde67bdb 1230 /* ==========================================================================
Vkadaba 8:2f2775c34640 1231 *! \struct ADMW_CORE_Settling_Time_Struct
Vkadaba 5:0728bde67bdb 1232 *! \brief Settling Time Register bit field structure
Vkadaba 5:0728bde67bdb 1233 * ========================================================================== */
Vkadaba 8:2f2775c34640 1234 typedef struct _ADMW_CORE_Settling_Time_t {
Vkadaba 5:0728bde67bdb 1235 union {
Vkadaba 5:0728bde67bdb 1236 struct {
Vkadaba 5:0728bde67bdb 1237 uint16_t Settling_Time : 14; /**< Settling Time to Allow When Switching to Channel */
Vkadaba 5:0728bde67bdb 1238 uint16_t Settling_Time_Units : 2; /**< Units for Settling Time */
Vkadaba 5:0728bde67bdb 1239 };
Vkadaba 5:0728bde67bdb 1240 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1241 };
Vkadaba 8:2f2775c34640 1242 } ADMW_CORE_Settling_Time_t;
Vkadaba 5:0728bde67bdb 1243
Vkadaba 5:0728bde67bdb 1244 /*@}*/
Vkadaba 5:0728bde67bdb 1245
Vkadaba 32:52445bef314d 1246 /** @defgroup Measurement_Setup ADC Measurement Setup (Measurement_Setup) Register
Vkadaba 32:52445bef314d 1247 * ADC Measurement Setup (Measurement_Setup) Register.
Vkadaba 5:0728bde67bdb 1248 * @{
Vkadaba 5:0728bde67bdb 1249 */
Vkadaba 5:0728bde67bdb 1250
Vkadaba 5:0728bde67bdb 1251 /* =========================================================================
Vkadaba 8:2f2775c34640 1252 *! \enum ADMW_CORE_Measurement_Setup_NOTCH_EN_2
Vkadaba 6:9d393a9677f4 1253 *! \brief Enable Notch 2 Filter Mode (NOTCH_EN_2) Enumerations
Vkadaba 6:9d393a9677f4 1254 * ========================================================================= */
Vkadaba 6:9d393a9677f4 1255 typedef enum
Vkadaba 6:9d393a9677f4 1256 {
Vkadaba 32:52445bef314d 1257 CORE_MEASUREMENT_SETUP_NOTCH_DIS = 0, /**< Disable notch filter */
Vkadaba 32:52445bef314d 1258 CORE_MEASUREMENT_SETUP_NOTCH_EN = 1 /**< Enable notch 2 filter option. */
Vkadaba 8:2f2775c34640 1259 } ADMW_CORE_Measurement_Setup_NOTCH_EN_2;
Vkadaba 6:9d393a9677f4 1260
Vkadaba 44:94bdfaefddac 1261
Vkadaba 8:2f2775c34640 1262 /* =========================================================================
Vkadaba 8:2f2775c34640 1263 *! \enum ADMW_CORE_Measurement_Setup_Chop_Mode
Vkadaba 6:9d393a9677f4 1264 *! \brief Enabled and Disable Chop Mode (Chop_Mode) Enumerations
Vkadaba 6:9d393a9677f4 1265 * ========================================================================= */
Vkadaba 6:9d393a9677f4 1266 typedef enum
Vkadaba 6:9d393a9677f4 1267 {
Vkadaba 32:52445bef314d 1268 CORE_MEASUREMENT_SETUP_DISABLE_CHOP = 0, /**< ADC front end chopping disabled */
Vkadaba 32:52445bef314d 1269 CORE_MEASUREMENT_SETUP_HW_CHOP = 1, /**< Hardware chopping enabled */
Vkadaba 32:52445bef314d 1270 CORE_MEASUREMENT_SETUP_SW_CHOP = 2, /**< SW chop enabled */
Vkadaba 32:52445bef314d 1271 CORE_MEASUREMENT_SETUP_HW_SW_CHOP = 3 /**< Hardware and software chop enabled */
Vkadaba 8:2f2775c34640 1272 } ADMW_CORE_Measurement_Setup_Chop_Mode;
Vkadaba 6:9d393a9677f4 1273
Vkadaba 6:9d393a9677f4 1274
Vkadaba 6:9d393a9677f4 1275 /* =========================================================================
Vkadaba 8:2f2775c34640 1276 *! \enum ADMW_CORE_Measurement_Setup_ADC_Filter_Type
Vkadaba 5:0728bde67bdb 1277 *! \brief ADC Digital Filter Type (ADC_Filter_Type) Enumerations
Vkadaba 5:0728bde67bdb 1278 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1279 typedef enum
Vkadaba 5:0728bde67bdb 1280 {
Vkadaba 32:52445bef314d 1281 CORE_MEASUREMENT_SETUP_ENABLE_SINC4 = 0, /**< Enabled SINC4 filter */
Vkadaba 32:52445bef314d 1282 CORE_MEASUREMENT_SETUP_ENABLE_SINC3 = 1 /**< Enabled SINC3 filter */
Vkadaba 8:2f2775c34640 1283 } ADMW_CORE_Measurement_Setup_ADC_Filter_Type;
Vkadaba 6:9d393a9677f4 1284
Vkadaba 6:9d393a9677f4 1285
Vkadaba 6:9d393a9677f4 1286 /* =========================================================================
Vkadaba 8:2f2775c34640 1287 *! \enum ADMW_CORE_Measurement_Setup_Buffer_Bypass
Vkadaba 8:2f2775c34640 1288 *! \brief Disable Buffers (Buffer_Bypass) Enumerations
Vkadaba 8:2f2775c34640 1289 * ========================================================================= */
Vkadaba 8:2f2775c34640 1290 typedef enum
Vkadaba 8:2f2775c34640 1291 {
Vkadaba 32:52445bef314d 1292 CORE_MEASUREMENT_SETUP_BUFFERS_ENABLED = 0, /**< Input buffers enabled */
Vkadaba 32:52445bef314d 1293 CORE_MEASUREMENT_SETUP_BUFFERS_DISABLED = 1 /**< Input buffers disabled */
Vkadaba 8:2f2775c34640 1294 } ADMW_CORE_Measurement_Setup_Buffer_Bypass;
Vkadaba 5:0728bde67bdb 1295
Vkadaba 5:0728bde67bdb 1296
Vkadaba 5:0728bde67bdb 1297 /* ==========================================================================
Vkadaba 8:2f2775c34640 1298 *! \struct ADMW_CORE_Measurement_Setup_Struct
Vkadaba 32:52445bef314d 1299 *! \brief ADC Measurement Setup Register bit field structure
Vkadaba 5:0728bde67bdb 1300 * ========================================================================== */
Vkadaba 8:2f2775c34640 1301 typedef struct _ADMW_CORE_Measurement_Setup_t {
Vkadaba 5:0728bde67bdb 1302 union {
Vkadaba 5:0728bde67bdb 1303 struct {
Vkadaba 32:52445bef314d 1304 uint32_t ADC_SF : 7; /**< ADC Digital Filter Speed */
Vkadaba 32:52445bef314d 1305 uint32_t reserved7 : 1;
Vkadaba 32:52445bef314d 1306 uint32_t NOTCH_EN_2 : 1; /**< Enable Notch 2 Filter Mode */
Vkadaba 43:e1789b7214cf 1307 uint32_t reserved9 : 1;
Vkadaba 43:e1789b7214cf 1308 uint32_t Chop_Mode : 2; /**< Enabled and Disable Chop Mode */
Vkadaba 43:e1789b7214cf 1309 uint32_t ADC_Filter_Type : 1; /**< ADC Digital Filter Type */
Vkadaba 43:e1789b7214cf 1310 uint32_t reserved13 : 2;
Vkadaba 43:e1789b7214cf 1311 uint32_t Buffer_Bypass : 1; /**< Disable Buffers */
Vkadaba 43:e1789b7214cf 1312 uint32_t reserved16 : 16;
Vkadaba 5:0728bde67bdb 1313 };
Vkadaba 5:0728bde67bdb 1314 uint32_t VALUE32;
Vkadaba 5:0728bde67bdb 1315 };
Vkadaba 8:2f2775c34640 1316 } ADMW_CORE_Measurement_Setup_t;
Vkadaba 5:0728bde67bdb 1317
Vkadaba 5:0728bde67bdb 1318 /*@}*/
Vkadaba 5:0728bde67bdb 1319
Vkadaba 5:0728bde67bdb 1320 /** @defgroup High_Threshold_Limit High Threshold (High_Threshold_Limit) Register
Vkadaba 5:0728bde67bdb 1321 * High Threshold (High_Threshold_Limit) Register.
Vkadaba 5:0728bde67bdb 1322 * @{
Vkadaba 5:0728bde67bdb 1323 */
Vkadaba 5:0728bde67bdb 1324
Vkadaba 5:0728bde67bdb 1325 /* ==========================================================================
Vkadaba 8:2f2775c34640 1326 *! \struct ADMW_CORE_High_Threshold_Limit_Struct
Vkadaba 5:0728bde67bdb 1327 *! \brief High Threshold Register bit field structure
Vkadaba 5:0728bde67bdb 1328 * ========================================================================== */
Vkadaba 8:2f2775c34640 1329 typedef struct _ADMW_CORE_High_Threshold_Limit_t {
Vkadaba 5:0728bde67bdb 1330 union {
Vkadaba 5:0728bde67bdb 1331 struct {
Vkadaba 5:0728bde67bdb 1332 float High_Threshold; /**< Upper Limit for Sensor Alert Comparison */
Vkadaba 5:0728bde67bdb 1333 };
Vkadaba 5:0728bde67bdb 1334 float VALUE32;
Vkadaba 5:0728bde67bdb 1335 };
Vkadaba 8:2f2775c34640 1336 } ADMW_CORE_High_Threshold_Limit_t;
Vkadaba 5:0728bde67bdb 1337
Vkadaba 5:0728bde67bdb 1338 /*@}*/
Vkadaba 5:0728bde67bdb 1339
Vkadaba 5:0728bde67bdb 1340 /** @defgroup Low_Threshold_Limit Low Threshold (Low_Threshold_Limit) Register
Vkadaba 5:0728bde67bdb 1341 * Low Threshold (Low_Threshold_Limit) Register.
Vkadaba 5:0728bde67bdb 1342 * @{
Vkadaba 5:0728bde67bdb 1343 */
Vkadaba 5:0728bde67bdb 1344
Vkadaba 5:0728bde67bdb 1345 /* ==========================================================================
Vkadaba 8:2f2775c34640 1346 *! \struct ADMW_CORE_Low_Threshold_Limit_Struct
Vkadaba 5:0728bde67bdb 1347 *! \brief Low Threshold Register bit field structure
Vkadaba 5:0728bde67bdb 1348 * ========================================================================== */
Vkadaba 8:2f2775c34640 1349 typedef struct _ADMW_CORE_Low_Threshold_Limit_t {
Vkadaba 5:0728bde67bdb 1350 union {
Vkadaba 5:0728bde67bdb 1351 struct {
Vkadaba 5:0728bde67bdb 1352 float Low_Threshold; /**< Lower Limit for Sensor Alert Comparison */
Vkadaba 5:0728bde67bdb 1353 };
Vkadaba 5:0728bde67bdb 1354 float VALUE32;
Vkadaba 5:0728bde67bdb 1355 };
Vkadaba 8:2f2775c34640 1356 } ADMW_CORE_Low_Threshold_Limit_t;
Vkadaba 5:0728bde67bdb 1357
Vkadaba 5:0728bde67bdb 1358 /*@}*/
Vkadaba 5:0728bde67bdb 1359
Vkadaba 44:94bdfaefddac 1360 /** @defgroup Ideality_Factor Diode Ideality Factor Register (Ideality_Factor) Register
Vkadaba 44:94bdfaefddac 1361 * Diode Ideality Factor Register (Ideality_Factor) Register.
Vkadaba 44:94bdfaefddac 1362 * @{
Vkadaba 44:94bdfaefddac 1363 */
Vkadaba 44:94bdfaefddac 1364
Vkadaba 44:94bdfaefddac 1365 /* ==========================================================================
Vkadaba 44:94bdfaefddac 1366 *! \struct ADMW_CORE_Ideality_Factor_Struct
Vkadaba 44:94bdfaefddac 1367 *! \brief Diode Ideality Factor Register bit field structure
Vkadaba 44:94bdfaefddac 1368 * ========================================================================== */
Vkadaba 44:94bdfaefddac 1369 typedef struct _ADMW_CORE_Ideality_Factor_t {
Vkadaba 44:94bdfaefddac 1370 union {
Vkadaba 44:94bdfaefddac 1371 struct {
Vkadaba 44:94bdfaefddac 1372 float32_t Ideality_Factor; /**< Diode Ideality Factor, Default 1.003. */
Vkadaba 44:94bdfaefddac 1373 };
Vkadaba 44:94bdfaefddac 1374 float32_t VALUE32;
Vkadaba 44:94bdfaefddac 1375 };
Vkadaba 44:94bdfaefddac 1376 } ADMW_CORE_Ideality_Factor_t;
Vkadaba 44:94bdfaefddac 1377
Vkadaba 44:94bdfaefddac 1378 /*@}*/
Vkadaba 44:94bdfaefddac 1379
Vkadaba 5:0728bde67bdb 1380 /** @defgroup Sensor_Offset Sensor Offset Adjustment (Sensor_Offset) Register
Vkadaba 5:0728bde67bdb 1381 * Sensor Offset Adjustment (Sensor_Offset) Register.
Vkadaba 5:0728bde67bdb 1382 * @{
Vkadaba 5:0728bde67bdb 1383 */
Vkadaba 5:0728bde67bdb 1384
Vkadaba 5:0728bde67bdb 1385 /* ==========================================================================
Vkadaba 8:2f2775c34640 1386 *! \struct ADMW_CORE_Sensor_Offset_Struct
Vkadaba 5:0728bde67bdb 1387 *! \brief Sensor Offset Adjustment Register bit field structure
Vkadaba 5:0728bde67bdb 1388 * ========================================================================== */
Vkadaba 8:2f2775c34640 1389 typedef struct _ADMW_CORE_Sensor_Offset_t {
Vkadaba 5:0728bde67bdb 1390 union {
Vkadaba 5:0728bde67bdb 1391 struct {
Vkadaba 5:0728bde67bdb 1392 float Sensor_Offset; /**< Sensor Offset Adjustment */
Vkadaba 5:0728bde67bdb 1393 };
Vkadaba 5:0728bde67bdb 1394 float VALUE32;
Vkadaba 5:0728bde67bdb 1395 };
Vkadaba 8:2f2775c34640 1396 } ADMW_CORE_Sensor_Offset_t;
Vkadaba 5:0728bde67bdb 1397
Vkadaba 5:0728bde67bdb 1398 /*@}*/
Vkadaba 5:0728bde67bdb 1399
Vkadaba 5:0728bde67bdb 1400 /** @defgroup Sensor_Gain Sensor Gain Adjustment (Sensor_Gain) Register
Vkadaba 5:0728bde67bdb 1401 * Sensor Gain Adjustment (Sensor_Gain) Register.
Vkadaba 5:0728bde67bdb 1402 * @{
Vkadaba 5:0728bde67bdb 1403 */
Vkadaba 5:0728bde67bdb 1404
Vkadaba 5:0728bde67bdb 1405 /* ==========================================================================
Vkadaba 8:2f2775c34640 1406 *! \struct ADMW_CORE_Sensor_Gain_Struct
Vkadaba 5:0728bde67bdb 1407 *! \brief Sensor Gain Adjustment Register bit field structure
Vkadaba 5:0728bde67bdb 1408 * ========================================================================== */
Vkadaba 8:2f2775c34640 1409 typedef struct _ADMW_CORE_Sensor_Gain_t {
Vkadaba 5:0728bde67bdb 1410 union {
Vkadaba 5:0728bde67bdb 1411 struct {
Vkadaba 5:0728bde67bdb 1412 float Sensor_Gain; /**< Sensor Gain Adjustment */
Vkadaba 5:0728bde67bdb 1413 };
Vkadaba 5:0728bde67bdb 1414 float VALUE32;
Vkadaba 5:0728bde67bdb 1415 };
Vkadaba 8:2f2775c34640 1416 } ADMW_CORE_Sensor_Gain_t;
Vkadaba 5:0728bde67bdb 1417
Vkadaba 5:0728bde67bdb 1418 /*@}*/
Vkadaba 5:0728bde67bdb 1419
Vkadaba 5:0728bde67bdb 1420 /** @defgroup Channel_Skip Indicates If Channel Will Skip Some Measurement Cycles (Channel_Skip) Register
Vkadaba 5:0728bde67bdb 1421 * Indicates If Channel Will Skip Some Measurement Cycles (Channel_Skip) Register.
Vkadaba 5:0728bde67bdb 1422 * @{
Vkadaba 5:0728bde67bdb 1423 */
Vkadaba 5:0728bde67bdb 1424
Vkadaba 5:0728bde67bdb 1425 /* ==========================================================================
Vkadaba 8:2f2775c34640 1426 *! \struct ADMW_CORE_Channel_Skip_Struct
Vkadaba 5:0728bde67bdb 1427 *! \brief Indicates If Channel Will Skip Some Measurement Cycles Register bit field structure
Vkadaba 5:0728bde67bdb 1428 * ========================================================================== */
Vkadaba 8:2f2775c34640 1429 typedef struct _ADMW_CORE_Channel_Skip_t {
Vkadaba 5:0728bde67bdb 1430 union {
Vkadaba 5:0728bde67bdb 1431 struct {
Vkadaba 5:0728bde67bdb 1432 uint16_t Channel_Skip : 8; /**< Indicates If Channel Will Skip Some Measurement Cycles */
Vkadaba 5:0728bde67bdb 1433 uint16_t reserved8 : 8;
Vkadaba 5:0728bde67bdb 1434 };
Vkadaba 5:0728bde67bdb 1435 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1436 };
Vkadaba 8:2f2775c34640 1437 } ADMW_CORE_Channel_Skip_t;
Vkadaba 5:0728bde67bdb 1438
Vkadaba 5:0728bde67bdb 1439 /*@}*/
Vkadaba 5:0728bde67bdb 1440
Vkadaba 44:94bdfaefddac 1441 /** @defgroup Sensor_Parameter Sensor Parameter Adjustment (Sensor_Parameter) Register
Vkadaba 44:94bdfaefddac 1442 * Sensor Parameter Adjustment (Sensor_Parameter) Register.
Vkadaba 44:94bdfaefddac 1443 * @{
Vkadaba 44:94bdfaefddac 1444 */
Vkadaba 44:94bdfaefddac 1445
Vkadaba 44:94bdfaefddac 1446 /* ==========================================================================
Vkadaba 44:94bdfaefddac 1447 *! \struct ADMW_CORE_Sensor_Parameter_Struct
Vkadaba 44:94bdfaefddac 1448 *! \brief Sensor Parameter Adjustment Register bit field structure
Vkadaba 44:94bdfaefddac 1449 * ========================================================================== */
Vkadaba 44:94bdfaefddac 1450 typedef struct _ADMW_CORE_Sensor_Parameter_t {
Vkadaba 44:94bdfaefddac 1451 union {
Vkadaba 44:94bdfaefddac 1452 struct {
Vkadaba 44:94bdfaefddac 1453 float Sensor_Parameter; /**< Sensor Parameter Adjustment */
Vkadaba 44:94bdfaefddac 1454 };
Vkadaba 44:94bdfaefddac 1455 float VALUE32;
Vkadaba 44:94bdfaefddac 1456 };
Vkadaba 44:94bdfaefddac 1457 } ADMW_CORE_Sensor_Parameter_t;
Vkadaba 44:94bdfaefddac 1458
Vkadaba 44:94bdfaefddac 1459 /*@}*/
Vkadaba 44:94bdfaefddac 1460
Vkadaba 5:0728bde67bdb 1461 /** @defgroup Digital_Sensor_Config Digital Sensor Data Coding (Digital_Sensor_Config) Register
Vkadaba 5:0728bde67bdb 1462 * Digital Sensor Data Coding (Digital_Sensor_Config) Register.
Vkadaba 5:0728bde67bdb 1463 * @{
Vkadaba 5:0728bde67bdb 1464 */
Vkadaba 5:0728bde67bdb 1465
Vkadaba 5:0728bde67bdb 1466 /* =========================================================================
Vkadaba 8:2f2775c34640 1467 *! \enum ADMW_CORE_Digital_Sensor_Config_Digital_Sensor_Coding
Vkadaba 5:0728bde67bdb 1468 *! \brief Data Encoding of Sensor Result (Digital_Sensor_Coding) Enumerations
Vkadaba 5:0728bde67bdb 1469 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1470 typedef enum
Vkadaba 5:0728bde67bdb 1471 {
Vkadaba 5:0728bde67bdb 1472 CORE_DIGITAL_SENSOR_CONFIG_CODING_NONE = 0, /**< None/Invalid */
Vkadaba 5:0728bde67bdb 1473 CORE_DIGITAL_SENSOR_CONFIG_CODING_UNIPOLAR = 1, /**< Unipolar */
Vkadaba 32:52445bef314d 1474 CORE_DIGITAL_SENSOR_CONFIG_CODING_TWOS_COMPL = 2, /**< Twos complement */
Vkadaba 32:52445bef314d 1475 CORE_DIGITAL_SENSOR_CONFIG_CODING_OFFSET_BINARY = 3 /**< Offset binary */
Vkadaba 8:2f2775c34640 1476 } ADMW_CORE_Digital_Sensor_Config_Digital_Sensor_Coding;
Vkadaba 5:0728bde67bdb 1477
Vkadaba 5:0728bde67bdb 1478
Vkadaba 5:0728bde67bdb 1479 /* ==========================================================================
Vkadaba 8:2f2775c34640 1480 *! \struct ADMW_CORE_Digital_Sensor_Config_Struct
Vkadaba 5:0728bde67bdb 1481 *! \brief Digital Sensor Data Coding Register bit field structure
Vkadaba 5:0728bde67bdb 1482 * ========================================================================== */
Vkadaba 8:2f2775c34640 1483 typedef struct _ADMW_CORE_Digital_Sensor_Config_t {
Vkadaba 5:0728bde67bdb 1484 union {
Vkadaba 5:0728bde67bdb 1485 struct {
Vkadaba 5:0728bde67bdb 1486 uint16_t Digital_Sensor_Coding : 2; /**< Data Encoding of Sensor Result */
Vkadaba 5:0728bde67bdb 1487 uint16_t Digital_Sensor_Little_Endian : 1; /**< Data Endianness of Sensor Result */
Vkadaba 5:0728bde67bdb 1488 uint16_t Digital_Sensor_Left_Aligned : 1; /**< Data Alignment Within the Data Frame */
Vkadaba 5:0728bde67bdb 1489 uint16_t Digital_Sensor_Bit_Offset : 4; /**< Data Bit Offset, Relative to Alignment */
Vkadaba 5:0728bde67bdb 1490 uint16_t Digital_Sensor_Read_Bytes : 3; /**< Number of Bytes to Read from the Sensor */
Vkadaba 5:0728bde67bdb 1491 uint16_t Digital_Sensor_Data_Bits : 5; /**< Number of Relevant Data Bits */
Vkadaba 5:0728bde67bdb 1492 };
Vkadaba 5:0728bde67bdb 1493 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1494 };
Vkadaba 8:2f2775c34640 1495 } ADMW_CORE_Digital_Sensor_Config_t;
Vkadaba 5:0728bde67bdb 1496
Vkadaba 5:0728bde67bdb 1497 /*@}*/
Vkadaba 5:0728bde67bdb 1498
Vkadaba 5:0728bde67bdb 1499 /** @defgroup Digital_Sensor_Address Sensor Address (Digital_Sensor_Address) Register
Vkadaba 5:0728bde67bdb 1500 * Sensor Address (Digital_Sensor_Address) Register.
Vkadaba 5:0728bde67bdb 1501 * @{
Vkadaba 5:0728bde67bdb 1502 */
Vkadaba 5:0728bde67bdb 1503
Vkadaba 5:0728bde67bdb 1504 /* ==========================================================================
Vkadaba 8:2f2775c34640 1505 *! \struct ADMW_CORE_Digital_Sensor_Address_Struct
Vkadaba 5:0728bde67bdb 1506 *! \brief Sensor Address Register bit field structure
Vkadaba 5:0728bde67bdb 1507 * ========================================================================== */
Vkadaba 8:2f2775c34640 1508 typedef struct _ADMW_CORE_Digital_Sensor_Address_t {
Vkadaba 5:0728bde67bdb 1509 union {
Vkadaba 5:0728bde67bdb 1510 struct {
Vkadaba 5:0728bde67bdb 1511 uint8_t Digital_Sensor_Address : 8; /**< I2C Address or Write Address Command for SPI Sensor */
Vkadaba 5:0728bde67bdb 1512 };
Vkadaba 5:0728bde67bdb 1513 uint8_t VALUE8;
Vkadaba 5:0728bde67bdb 1514 };
Vkadaba 8:2f2775c34640 1515 } ADMW_CORE_Digital_Sensor_Address_t;
Vkadaba 5:0728bde67bdb 1516
Vkadaba 5:0728bde67bdb 1517 /*@}*/
Vkadaba 5:0728bde67bdb 1518
Vkadaba 5:0728bde67bdb 1519 /** @defgroup Digital_Sensor_Comms Digital Sensor Communication Clock Configuration (Digital_Sensor_Comms) Register
Vkadaba 5:0728bde67bdb 1520 * Digital Sensor Communication Clock Configuration (Digital_Sensor_Comms) Register.
Vkadaba 5:0728bde67bdb 1521 * @{
Vkadaba 5:0728bde67bdb 1522 */
Vkadaba 5:0728bde67bdb 1523
Vkadaba 5:0728bde67bdb 1524 /* =========================================================================
Vkadaba 8:2f2775c34640 1525 *! \enum ADMW_CORE_Digital_Sensor_Comms_Digital_Sensor_Comms_En
Vkadaba 32:52445bef314d 1526 *! \brief Enable Digital Sensor Communications Register Parameters (Digital_Sensor_Comms_En) Enumerations
Vkadaba 5:0728bde67bdb 1527 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1528 typedef enum
Vkadaba 5:0728bde67bdb 1529 {
Vkadaba 32:52445bef314d 1530 CORE_DIGITAL_SENSOR_COMMS_DIGITAL_COMMS_DEFAULT = 0, /**< Default parameters used for digital sensor communications */
Vkadaba 32:52445bef314d 1531 CORE_DIGITAL_SENSOR_COMMS_DIGITAL_COMMS_USER = 1 /**< User supplied parameters used for digital sensor communications */
Vkadaba 8:2f2775c34640 1532 } ADMW_CORE_Digital_Sensor_Comms_Digital_Sensor_Comms_En;
Vkadaba 5:0728bde67bdb 1533
Vkadaba 5:0728bde67bdb 1534
Vkadaba 5:0728bde67bdb 1535 /* =========================================================================
Vkadaba 8:2f2775c34640 1536 *! \enum ADMW_CORE_Digital_Sensor_Comms_SPI_Clock
Vkadaba 5:0728bde67bdb 1537 *! \brief Controls Clock Frequency for SPI Sensors (SPI_Clock) Enumerations
Vkadaba 5:0728bde67bdb 1538 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1539 typedef enum
Vkadaba 5:0728bde67bdb 1540 {
Vkadaba 8:2f2775c34640 1541 CORE_DIGITAL_SENSOR_COMMS_SPI_8MHZ = 0, /**< 8MHz */
Vkadaba 8:2f2775c34640 1542 CORE_DIGITAL_SENSOR_COMMS_SPI_4MHZ = 1, /**< 4MHz */
Vkadaba 8:2f2775c34640 1543 CORE_DIGITAL_SENSOR_COMMS_SPI_2MHZ = 2, /**< 2MHz */
Vkadaba 8:2f2775c34640 1544 CORE_DIGITAL_SENSOR_COMMS_SPI_1MHZ = 3, /**< 1MHz */
Vkadaba 8:2f2775c34640 1545 CORE_DIGITAL_SENSOR_COMMS_SPI_500KHZ = 4, /**< 500kHz */
Vkadaba 8:2f2775c34640 1546 CORE_DIGITAL_SENSOR_COMMS_SPI_250KHZ = 5, /**< 250kHz */
Vkadaba 8:2f2775c34640 1547 CORE_DIGITAL_SENSOR_COMMS_SPI_125KHZ = 6, /**< 125kHz */
Vkadaba 8:2f2775c34640 1548 CORE_DIGITAL_SENSOR_COMMS_SPI_62P5KHZ = 7, /**< 62.5kHz */
Vkadaba 8:2f2775c34640 1549 CORE_DIGITAL_SENSOR_COMMS_SPI_31P3KHZ = 8, /**< 31.25kHz */
Vkadaba 8:2f2775c34640 1550 CORE_DIGITAL_SENSOR_COMMS_SPI_15P6KHZ = 9, /**< 15.625kHz */
Vkadaba 8:2f2775c34640 1551 CORE_DIGITAL_SENSOR_COMMS_SPI_7P8KHZ = 10, /**< 7.8kHz */
Vkadaba 8:2f2775c34640 1552 CORE_DIGITAL_SENSOR_COMMS_SPI_3P9KHZ = 11, /**< 3.9kHz */
Vkadaba 8:2f2775c34640 1553 CORE_DIGITAL_SENSOR_COMMS_SPI_1P9KHZ = 12, /**< 1.95kHz */
Vkadaba 8:2f2775c34640 1554 CORE_DIGITAL_SENSOR_COMMS_SPI_977HZ = 13, /**< 977Hz */
Vkadaba 8:2f2775c34640 1555 CORE_DIGITAL_SENSOR_COMMS_SPI_488HZ = 14, /**< 488Hz */
Vkadaba 8:2f2775c34640 1556 CORE_DIGITAL_SENSOR_COMMS_SPI_244HZ = 15 /**< 244Hz */
Vkadaba 8:2f2775c34640 1557 } ADMW_CORE_Digital_Sensor_Comms_SPI_Clock;
Vkadaba 5:0728bde67bdb 1558
Vkadaba 5:0728bde67bdb 1559
Vkadaba 5:0728bde67bdb 1560 /* =========================================================================
Vkadaba 8:2f2775c34640 1561 *! \enum ADMW_CORE_Digital_Sensor_Comms_I2C_Clock
Vkadaba 5:0728bde67bdb 1562 *! \brief Controls SCLK Frequency for I2C Sensors (I2C_Clock) Enumerations
Vkadaba 5:0728bde67bdb 1563 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1564 typedef enum
Vkadaba 5:0728bde67bdb 1565 {
Vkadaba 5:0728bde67bdb 1566 CORE_DIGITAL_SENSOR_COMMS_I2C_100K = 0, /**< 100kHz SCL */
Vkadaba 5:0728bde67bdb 1567 CORE_DIGITAL_SENSOR_COMMS_I2C_400K = 1, /**< 400kHz SCL */
Vkadaba 5:0728bde67bdb 1568 CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED1 = 2, /**< Reserved */
Vkadaba 5:0728bde67bdb 1569 CORE_DIGITAL_SENSOR_COMMS_I2C_RESERVED2 = 3 /**< Reserved */
Vkadaba 8:2f2775c34640 1570 } ADMW_CORE_Digital_Sensor_Comms_I2C_Clock;
Vkadaba 5:0728bde67bdb 1571
Vkadaba 5:0728bde67bdb 1572
Vkadaba 5:0728bde67bdb 1573 /* =========================================================================
Vkadaba 8:2f2775c34640 1574 *! \enum ADMW_CORE_Digital_Sensor_Comms_SPI_Mode
Vkadaba 5:0728bde67bdb 1575 *! \brief Configuration for Sensor SPI Protocol (SPI_Mode) Enumerations
Vkadaba 5:0728bde67bdb 1576 * ========================================================================= */
Vkadaba 5:0728bde67bdb 1577 typedef enum
Vkadaba 5:0728bde67bdb 1578 {
Vkadaba 32:52445bef314d 1579 CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_0 = 0, /**< Clock polarity = 0 Clock phase = 0 */
Vkadaba 32:52445bef314d 1580 CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_1 = 1, /**< Clock polarity = 0 Clock phase = 1 */
Vkadaba 32:52445bef314d 1581 CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_2 = 2, /**< Clock polarity = 1 Clock phase = 0 */
Vkadaba 32:52445bef314d 1582 CORE_DIGITAL_SENSOR_COMMS_SPI_MODE_3 = 3 /**< Clock polarity = 1 Clock phase = 1 */
Vkadaba 8:2f2775c34640 1583 } ADMW_CORE_Digital_Sensor_Comms_SPI_Mode;
Vkadaba 5:0728bde67bdb 1584
Vkadaba 5:0728bde67bdb 1585
Vkadaba 5:0728bde67bdb 1586 /* ==========================================================================
Vkadaba 8:2f2775c34640 1587 *! \struct ADMW_CORE_Digital_Sensor_Comms_Struct
Vkadaba 5:0728bde67bdb 1588 *! \brief Digital Sensor Communication Clock Configuration Register bit field structure
Vkadaba 5:0728bde67bdb 1589 * ========================================================================== */
Vkadaba 8:2f2775c34640 1590 typedef struct _ADMW_CORE_Digital_Sensor_Comms_t {
Vkadaba 5:0728bde67bdb 1591 union {
Vkadaba 5:0728bde67bdb 1592 struct {
Vkadaba 32:52445bef314d 1593 uint16_t Digital_Sensor_Comms_En : 1; /**< Enable Digital Sensor Communications Register Parameters */
Vkadaba 5:0728bde67bdb 1594 uint16_t SPI_Clock : 4; /**< Controls Clock Frequency for SPI Sensors */
Vkadaba 5:0728bde67bdb 1595 uint16_t I2C_Clock : 2; /**< Controls SCLK Frequency for I2C Sensors */
Vkadaba 6:9d393a9677f4 1596 uint16_t reserved7 : 3;
Vkadaba 5:0728bde67bdb 1597 uint16_t SPI_Mode : 2; /**< Configuration for Sensor SPI Protocol */
Vkadaba 6:9d393a9677f4 1598 uint16_t reserved12 : 4;
Vkadaba 5:0728bde67bdb 1599 };
Vkadaba 5:0728bde67bdb 1600 uint16_t VALUE16;
Vkadaba 5:0728bde67bdb 1601 };
Vkadaba 8:2f2775c34640 1602 } ADMW_CORE_Digital_Sensor_Comms_t;
Vkadaba 5:0728bde67bdb 1603
Vkadaba 5:0728bde67bdb 1604 /*@}*/
Vkadaba 5:0728bde67bdb 1605
Vkadaba 5:0728bde67bdb 1606
Vkadaba 5:0728bde67bdb 1607 #if defined (__CC_ARM)
Vkadaba 5:0728bde67bdb 1608 #pragma pop
Vkadaba 5:0728bde67bdb 1609
Vkadaba 5:0728bde67bdb 1610 #endif
Vkadaba 44:94bdfaefddac 1611
Vkadaba 44:94bdfaefddac 1612 #endif