Added support for WNC M14A2A Cellular LTE Data Module.

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Show/hide line numbers radio_spi.cpp Source File

radio_spi.cpp

00001 /**
00002 ******************************************************************************
00003 * @file    radio_spi.c
00004 * @author  System Lab - NOIDA
00005 * @version V1.0.0
00006 * @date    15-May-2014
00007 * @brief   This file provides code for the configuration of the SPI instances.
00008 ******************************************************************************
00009 * @attention
00010 *
00011 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
00012 *
00013 * Redistribution and use in source and binary forms, with or without modification,
00014 * are permitted provided that the following conditions are met:
00015 *   1. Redistributions of source code must retain the above copyright notice,
00016 *      this list of conditions and the following disclaimer.
00017 *   2. Redistributions in binary form must reproduce the above copyright notice,
00018 *      this list of conditions and the following disclaimer in the documentation
00019 *      and/or other materials provided with the distribution.
00020 *   3. Neither the name of STMicroelectronics nor the names of its contributors
00021 *      may be used to endorse or promote products derived from this software
00022 *     without specific prior written permission.
00023 *
00024 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00025 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00026 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00027 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00028 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00029 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00030 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00031 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00032 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00033 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034 *
00035 ******************************************************************************
00036 */
00037 
00038 
00039 /* Includes ------------------------------------------------------------------*/
00040 #include "radio_spi.h"
00041 
00042 #include "SimpleSpirit1.h"
00043 
00044 
00045 /**
00046  * @addtogroup BSP
00047  * @{
00048  */
00049 
00050 
00051 /**
00052  * @addtogroup X-NUCLEO-IDS02Ax
00053  * @{
00054  */
00055 
00056 
00057 /**
00058  * @defgroup RADIO_SPI_Private_TypesDefinitions       RADIO_SPI Private Types Definitions
00059  * @{
00060  */
00061 
00062 /**
00063  * @}
00064  */
00065 
00066 
00067 /**
00068  * @defgroup RADIO_SPI_Private_Defines                RADIO_SPI Private Defines
00069  * @{
00070  */
00071 
00072 /**
00073  * @}
00074  */
00075 
00076 
00077 /**
00078  * @defgroup RADIO_SPI_Private_Macros                 RADIO_SPI Private Macros
00079  * @{
00080  */
00081 
00082 /**
00083  * @}
00084  */
00085 
00086 
00087 /**
00088  * @defgroup RADIO_SPI_Private_Variables              RADIO_SPI Private Variables
00089  * @{
00090  */
00091 
00092 /**
00093  * @}
00094  */
00095 
00096 
00097 /**
00098  * @defgroup RADIO_SPI_Private_FunctionPrototypes     RADIO_SPI Private Function Prototypes
00099  * @{
00100  */
00101 
00102 /**
00103  * @}
00104  */
00105 
00106 /**
00107  * @defgroup RADIO_SPI_Private_Functions              RADIO_SPI Private Functions
00108  * @{
00109  */
00110 
00111 /**
00112 * @}
00113 */
00114 
00115 /**
00116 * @brief  Write single or multiple RF Transceivers register
00117 * @param  cRegAddress: base register's address to be write
00118 * @param  cNbBytes: number of registers and bytes to be write
00119 * @param  pcBuffer: pointer to the buffer of values have to be written into registers
00120 * @retval StatusBytes
00121 */
00122 StatusBytes SdkEvalSpiWriteRegisters(uint8_t cRegAddress, uint8_t cNbBytes, uint8_t* pcBuffer)
00123 {
00124     return SimpleSpirit1::Instance().SdkEvalSpiWriteRegisters(cRegAddress, cNbBytes, pcBuffer);
00125 }
00126 
00127 StatusBytes SimpleSpirit1::SdkEvalSpiWriteRegisters(uint8_t cRegAddress, uint8_t cNbBytes, uint8_t* pcBuffer)
00128 {
00129   uint8_t aHeader[2] = {0};
00130   uint16_t tmpstatus = 0x0000;
00131   StatusBytes *pStatus=(StatusBytes *)&tmpstatus;
00132 
00133   /* Built the aHeader bytes */
00134   aHeader[0] = WRITE_HEADER;
00135   aHeader[1] = cRegAddress;
00136 
00137   /* Puts the SPI chip select low to start the transaction */
00138   chip_sync_select();
00139 
00140   /* Write the aHeader bytes and read the SPIRIT1 status bytes */
00141   tmpstatus = _spi.write(aHeader[0]);
00142   tmpstatus = tmpstatus << 8;
00143 
00144   /* Write the aHeader bytes and read the SPIRIT1 status bytes */
00145   tmpstatus |= _spi.write(aHeader[1]);
00146 
00147   /* Writes the registers according to the number of bytes */
00148   for (int index = 0; index < cNbBytes; index++)
00149   {
00150       _spi.write(pcBuffer[index]);
00151   }
00152 
00153   /* Puts the SPI chip select high to end the transaction */
00154   chip_sync_unselect();
00155 
00156   return *pStatus;
00157 }
00158 
00159 
00160 /**
00161 * @brief  Read single or multiple SPIRIT1 register
00162 * @param  cRegAddress: base register's address to be read
00163 * @param  cNbBytes: number of registers and bytes to be read
00164 * @param  pcBuffer: pointer to the buffer of registers' values read
00165 * @retval StatusBytes
00166 */
00167 StatusBytes SdkEvalSpiReadRegisters(uint8_t cRegAddress, uint8_t cNbBytes, uint8_t* pcBuffer)
00168 {
00169     return SimpleSpirit1::Instance().SdkEvalSpiReadRegisters(cRegAddress, cNbBytes, pcBuffer);
00170 }
00171 
00172 StatusBytes SimpleSpirit1::SdkEvalSpiReadRegisters(uint8_t cRegAddress, uint8_t cNbBytes, uint8_t* pcBuffer)
00173 {
00174   uint16_t tmpstatus = 0x00;
00175   StatusBytes *pStatus = (StatusBytes *)&tmpstatus;
00176 
00177   uint8_t aHeader[2] = {0};
00178 
00179   /* Built the aHeader bytes */
00180   aHeader[0] = READ_HEADER;
00181   aHeader[1] = cRegAddress;
00182 
00183   /* Put the SPI chip select low to start the transaction */
00184   chip_sync_select();
00185 
00186   /* Write the aHeader bytes and read the SPIRIT1 status bytes */
00187   tmpstatus = _spi.write(aHeader[0]);
00188   tmpstatus = tmpstatus << 8;
00189 
00190   /* Write the aHeader bytes and read the SPIRIT1 status bytes */
00191   tmpstatus |= _spi.write(aHeader[1]);
00192 
00193   for (int index = 0; index < cNbBytes; index++)
00194   {
00195       pcBuffer[index] = _spi.write(0xFF);
00196   }
00197 
00198   /* Put the SPI chip select high to end the transaction */
00199   chip_sync_unselect();
00200 
00201   return *pStatus;
00202 }
00203 
00204 
00205 /**
00206 * @brief  Send a command
00207 * @param  cCommandCode: command code to be sent
00208 * @retval StatusBytes
00209 */
00210 StatusBytes SdkEvalSpiCommandStrobes(uint8_t cCommandCode)
00211 {
00212     return SimpleSpirit1::Instance().SdkEvalSpiCommandStrobes(cCommandCode);
00213 }
00214 
00215 StatusBytes SimpleSpirit1::SdkEvalSpiCommandStrobes(uint8_t cCommandCode)
00216 {
00217   uint8_t aHeader[2] = {0};
00218   uint16_t tmpstatus = 0x0000;
00219 
00220   StatusBytes *pStatus = (StatusBytes *)&tmpstatus;
00221 
00222   /* Built the aHeader bytes */
00223   aHeader[0] = COMMAND_HEADER;
00224   aHeader[1] = cCommandCode;
00225 
00226   /* Puts the SPI chip select low to start the transaction */
00227   chip_sync_select();
00228 
00229   /* Write the aHeader bytes and read the SPIRIT1 status bytes */
00230   tmpstatus = _spi.write(aHeader[0]);
00231   tmpstatus = tmpstatus<<8;
00232 
00233   /* Write the aHeader bytes and read the SPIRIT1 status bytes */
00234   tmpstatus |= _spi.write(aHeader[1]);
00235 
00236   /* Puts the SPI chip select high to end the transaction */
00237   chip_sync_unselect();
00238 
00239   return *pStatus;
00240 }
00241 
00242 
00243 /**
00244 * @brief  Write data into TX FIFO
00245 * @param  cNbBytes: number of bytes to be written into TX FIFO
00246 * @param  pcBuffer: pointer to data to write
00247 * @retval StatusBytes
00248 */
00249 StatusBytes SdkEvalSpiWriteFifo(uint8_t cNbBytes, uint8_t* pcBuffer)
00250 {
00251     return SimpleSpirit1::Instance().SdkEvalSpiWriteFifo(cNbBytes, pcBuffer);
00252 }
00253 
00254 StatusBytes SimpleSpirit1::SdkEvalSpiWriteFifo(uint8_t cNbBytes, uint8_t* pcBuffer)
00255 {
00256   uint16_t tmpstatus = 0x0000;
00257   StatusBytes *pStatus = (StatusBytes *)&tmpstatus;
00258 
00259   uint8_t aHeader[2] = {0};
00260 
00261   /* Built the aHeader bytes */
00262   aHeader[0] = WRITE_HEADER;
00263   aHeader[1] = LINEAR_FIFO_ADDRESS;
00264 
00265   /* Put the SPI chip select low to start the transaction */
00266   chip_sync_select();
00267 
00268   /* Write the aHeader bytes and read the SPIRIT1 status bytes */
00269   tmpstatus = _spi.write(aHeader[0]);
00270   tmpstatus = tmpstatus<<8;
00271 
00272   /* Write the aHeader bytes and read the SPIRIT1 status bytes */
00273   tmpstatus |= _spi.write(aHeader[1]);
00274 
00275   /* Writes the registers according to the number of bytes */
00276   for (int index = 0; index < cNbBytes; index++)
00277   {
00278       _spi.write(pcBuffer[index]);
00279   }
00280 
00281   /* Put the SPI chip select high to end the transaction */
00282   chip_sync_unselect();
00283 
00284   return *pStatus;
00285 }
00286 
00287 /**
00288 * @brief  Read data from RX FIFO
00289 * @param  cNbBytes: number of bytes to read from RX FIFO
00290 * @param  pcBuffer: pointer to data read from RX FIFO
00291 * @retval StatusBytes
00292 */
00293 StatusBytes SdkEvalSpiReadFifo(uint8_t cNbBytes, uint8_t* pcBuffer)
00294 {
00295     return SimpleSpirit1::Instance().SdkEvalSpiReadFifo(cNbBytes, pcBuffer);
00296 }
00297 
00298 StatusBytes SimpleSpirit1::SdkEvalSpiReadFifo(uint8_t cNbBytes, uint8_t* pcBuffer)
00299 {
00300   uint16_t tmpstatus = 0x0000;
00301   StatusBytes *pStatus = (StatusBytes *)&tmpstatus;
00302 
00303   uint8_t aHeader[2];
00304 
00305   /* Built the aHeader bytes */
00306   aHeader[0]=READ_HEADER;
00307   aHeader[1]=LINEAR_FIFO_ADDRESS;
00308 
00309   /* Put the SPI chip select low to start the transaction */
00310   chip_sync_select();
00311 
00312   /* Write the aHeader bytes and read the SPIRIT1 status bytes */
00313   tmpstatus = _spi.write(aHeader[0]);
00314   tmpstatus = tmpstatus<<8;
00315 
00316   /* Write the aHeader bytes and read the SPIRIT1 status bytes */
00317   tmpstatus |= _spi.write(aHeader[1]);
00318 
00319   for (int index = 0; index < cNbBytes; index++)
00320   {
00321       pcBuffer[index] = _spi.write(0xFF);
00322   }
00323 
00324   /* Put the SPI chip select high to end the transaction */
00325   chip_sync_unselect();
00326 
00327   return *pStatus;
00328 }
00329 
00330 
00331 /**
00332 * @}
00333 */
00334 
00335 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/