easy-connect - Added support for WNC M14A2A Cellular LTE Data Mo…

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Added support for WNC M14A2A Cellular LTE Data Module.

Dependents: http-example-wnc http-example-wnc-modified

atmel-rf-driver/source/NanostackRfPhyAtmel.cpp@5:391eac6a0a94, 2017-04-23 (annotated)

Committer:: root@developer-sjc-cyan-compiler.local.mbed.org
Date:: Sun Apr 23 18:40:51 2017 +0000
Revision:: 5:391eac6a0a94
Parent:: 0:2563b0415d1f

Added tag att_cellular_K64_wnc_14A2A_20170423 for changeset daf182af022b

Who changed what in which revision?

User	Revision	Line number	New contents of line
JMF	0:2563b0415d1f	1	/*
JMF	0:2563b0415d1f	2	* Copyright (c) 2014-2015 ARM Limited. All rights reserved.
JMF	0:2563b0415d1f	3	* SPDX-License-Identifier: Apache-2.0
JMF	0:2563b0415d1f	4	* Licensed under the Apache License, Version 2.0 (the License); you may
JMF	0:2563b0415d1f	5	* not use this file except in compliance with the License.
JMF	0:2563b0415d1f	6	* You may obtain a copy of the License at
JMF	0:2563b0415d1f	7	*
JMF	0:2563b0415d1f	8	* http://www.apache.org/licenses/LICENSE-2.0
JMF	0:2563b0415d1f	9	*
JMF	0:2563b0415d1f	10	* Unless required by applicable law or agreed to in writing, software
JMF	0:2563b0415d1f	11	* distributed under the License is distributed on an AS IS BASIS, WITHOUT
JMF	0:2563b0415d1f	12	* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
JMF	0:2563b0415d1f	13	* See the License for the specific language governing permissions and
JMF	0:2563b0415d1f	14	* limitations under the License.
JMF	0:2563b0415d1f	15	*/
JMF	0:2563b0415d1f	16	#include <string.h>
JMF	0:2563b0415d1f	17	#include "platform/arm_hal_interrupt.h"
JMF	0:2563b0415d1f	18	#include "nanostack/platform/arm_hal_phy.h"
JMF	0:2563b0415d1f	19	#include "ns_types.h"
JMF	0:2563b0415d1f	20	#include "NanostackRfPhyAtmel.h"
JMF	0:2563b0415d1f	21	#include "randLIB.h"
JMF	0:2563b0415d1f	22	#include "AT86RFReg.h"
JMF	0:2563b0415d1f	23	#include "nanostack/platform/arm_hal_phy.h"
JMF	0:2563b0415d1f	24	#include "toolchain.h"
JMF	0:2563b0415d1f	25
JMF	0:2563b0415d1f	26	/Worst case sensitivity/
JMF	0:2563b0415d1f	27	#define RF_DEFAULT_SENSITIVITY -88
JMF	0:2563b0415d1f	28	/Run calibration every 5 minutes/
JMF	0:2563b0415d1f	29	#define RF_CALIBRATION_INTERVAL 6000000
JMF	0:2563b0415d1f	30	/Wait ACK for 2.5ms/
JMF	0:2563b0415d1f	31	#define RF_ACK_WAIT_DEFAULT_TIMEOUT 50
JMF	0:2563b0415d1f	32	/Base CCA backoff (50us units) - substitutes for Inter-Frame Spacing/
JMF	0:2563b0415d1f	33	#define RF_CCA_BASE_BACKOFF 13 /* 650us */
JMF	0:2563b0415d1f	34	/CCA random backoff (50us units)/
JMF	0:2563b0415d1f	35	#define RF_CCA_RANDOM_BACKOFF 51 /* 2550us */
JMF	0:2563b0415d1f	36
JMF	0:2563b0415d1f	37	#define RF_MTU 127
JMF	0:2563b0415d1f	38
JMF	0:2563b0415d1f	39	#define RF_PHY_MODE OQPSK_SIN_250
JMF	0:2563b0415d1f	40
JMF	0:2563b0415d1f	41	/Radio RX and TX state definitions/
JMF	0:2563b0415d1f	42	#define RFF_ON 0x01
JMF	0:2563b0415d1f	43	#define RFF_RX 0x02
JMF	0:2563b0415d1f	44	#define RFF_TX 0x04
JMF	0:2563b0415d1f	45	#define RFF_CCA 0x08
JMF	0:2563b0415d1f	46	#define RFF_PROT 0x10
JMF	0:2563b0415d1f	47
JMF	0:2563b0415d1f	48	typedef enum
JMF	0:2563b0415d1f	49	{
JMF	0:2563b0415d1f	50	RF_MODE_NORMAL = 0,
JMF	0:2563b0415d1f	51	RF_MODE_SNIFFER = 1,
JMF	0:2563b0415d1f	52	RF_MODE_ED = 2
JMF	0:2563b0415d1f	53	}rf_mode_t;
JMF	0:2563b0415d1f	54
JMF	0:2563b0415d1f	55	/Atmel RF Part Type/
JMF	0:2563b0415d1f	56	typedef enum
JMF	0:2563b0415d1f	57	{
JMF	0:2563b0415d1f	58	ATMEL_UNKNOW_DEV = 0,
JMF	0:2563b0415d1f	59	ATMEL_AT86RF212,
JMF	0:2563b0415d1f	60	ATMEL_AT86RF231, // No longer supported (doesn't give ED+status on frame read)
JMF	0:2563b0415d1f	61	ATMEL_AT86RF233
JMF	0:2563b0415d1f	62	}rf_trx_part_e;
JMF	0:2563b0415d1f	63
JMF	0:2563b0415d1f	64	/Atmel RF states/
JMF	0:2563b0415d1f	65	typedef enum
JMF	0:2563b0415d1f	66	{
JMF	0:2563b0415d1f	67	NOP = 0x00,
JMF	0:2563b0415d1f	68	BUSY_RX = 0x01,
JMF	0:2563b0415d1f	69	RF_TX_START = 0x02,
JMF	0:2563b0415d1f	70	FORCE_TRX_OFF = 0x03,
JMF	0:2563b0415d1f	71	FORCE_PLL_ON = 0x04,
JMF	0:2563b0415d1f	72	RX_ON = 0x06,
JMF	0:2563b0415d1f	73	TRX_OFF = 0x08,
JMF	0:2563b0415d1f	74	PLL_ON = 0x09,
JMF	0:2563b0415d1f	75	BUSY_RX_AACK = 0x11,
JMF	0:2563b0415d1f	76	SLEEP = 0x0F,
JMF	0:2563b0415d1f	77	RX_AACK_ON = 0x16,
JMF	0:2563b0415d1f	78	TX_ARET_ON = 0x19
JMF	0:2563b0415d1f	79	}rf_trx_states_t;
JMF	0:2563b0415d1f	80
JMF	0:2563b0415d1f	81	static const uint8_t *rf_tx_data; // Points to Nanostack's buffer
JMF	0:2563b0415d1f	82	static uint8_t rf_tx_length;
JMF	0:2563b0415d1f	83	/ACK wait duration changes depending on data rate/
JMF	0:2563b0415d1f	84	static uint16_t rf_ack_wait_duration = RF_ACK_WAIT_DEFAULT_TIMEOUT;
JMF	0:2563b0415d1f	85
JMF	0:2563b0415d1f	86	static int8_t rf_sensitivity = RF_DEFAULT_SENSITIVITY;
JMF	0:2563b0415d1f	87	static rf_mode_t rf_mode = RF_MODE_NORMAL;
JMF	0:2563b0415d1f	88	static uint8_t radio_tx_power = 0x00; // Default to +4dBm
JMF	0:2563b0415d1f	89	static uint8_t rf_phy_channel = 12;
JMF	0:2563b0415d1f	90	static uint8_t rf_tuned = 1;
JMF	0:2563b0415d1f	91	static uint8_t rf_use_antenna_diversity = 0;
JMF	0:2563b0415d1f	92	static int16_t expected_ack_sequence = -1;
JMF	0:2563b0415d1f	93	static uint8_t rf_rx_mode = 0;
JMF	0:2563b0415d1f	94	static uint8_t rf_flags = 0;
JMF	0:2563b0415d1f	95	static int8_t rf_radio_driver_id = -1;
JMF	0:2563b0415d1f	96	static phy_device_driver_s device_driver;
JMF	0:2563b0415d1f	97	static uint8_t mac_tx_handle = 0;
JMF	0:2563b0415d1f	98
JMF	0:2563b0415d1f	99	/* Channel configurations for 2.4 and sub-GHz */
JMF	0:2563b0415d1f	100	static const phy_rf_channel_configuration_s phy_24ghz = {2405000000U, 5000000U, 250000U, 16U, M_OQPSK};
JMF	0:2563b0415d1f	101	static const phy_rf_channel_configuration_s phy_subghz = {868300000U, 2000000U, 250000U, 11U, M_OQPSK};
JMF	0:2563b0415d1f	102
JMF	0:2563b0415d1f	103	static const phy_device_channel_page_s phy_channel_pages[] = {
JMF	0:2563b0415d1f	104	{ CHANNEL_PAGE_0, &phy_24ghz},
JMF	0:2563b0415d1f	105	{ CHANNEL_PAGE_2, &phy_subghz},
JMF	0:2563b0415d1f	106	{ CHANNEL_PAGE_0, NULL}
JMF	0:2563b0415d1f	107	};
JMF	0:2563b0415d1f	108
JMF	0:2563b0415d1f	109	/**
JMF	0:2563b0415d1f	110	* RF output power write
JMF	0:2563b0415d1f	111	*
JMF	0:2563b0415d1f	112	* \brief TX power has to be set before network start.
JMF	0:2563b0415d1f	113	*
JMF	0:2563b0415d1f	114	* \param power
JMF	0:2563b0415d1f	115	* AT86RF233
JMF	0:2563b0415d1f	116	* 0 = 4 dBm
JMF	0:2563b0415d1f	117	* 1 = 3.7 dBm
JMF	0:2563b0415d1f	118	* 2 = 3.4 dBm
JMF	0:2563b0415d1f	119	* 3 = 3 dBm
JMF	0:2563b0415d1f	120	* 4 = 2.5 dBm
JMF	0:2563b0415d1f	121	* 5 = 2 dBm
JMF	0:2563b0415d1f	122	* 6 = 1 dBm
JMF	0:2563b0415d1f	123	* 7 = 0 dBm
JMF	0:2563b0415d1f	124	* 8 = -1 dBm
JMF	0:2563b0415d1f	125	* 9 = -2 dBm
JMF	0:2563b0415d1f	126	* 10 = -3 dBm
JMF	0:2563b0415d1f	127	* 11 = -4 dBm
JMF	0:2563b0415d1f	128	* 12 = -6 dBm
JMF	0:2563b0415d1f	129	* 13 = -8 dBm
JMF	0:2563b0415d1f	130	* 14 = -12 dBm
JMF	0:2563b0415d1f	131	* 15 = -17 dBm
JMF	0:2563b0415d1f	132	*
JMF	0:2563b0415d1f	133	* AT86RF212B
JMF	0:2563b0415d1f	134	* See datasheet for TX power settings
JMF	0:2563b0415d1f	135	*
JMF	0:2563b0415d1f	136	* \return 0, Supported Value
JMF	0:2563b0415d1f	137	* \return -1, Not Supported Value
JMF	0:2563b0415d1f	138	*/
JMF	0:2563b0415d1f	139	static int8_t rf_tx_power_set(uint8_t power);
JMF	0:2563b0415d1f	140	static rf_trx_part_e rf_radio_type_read(void);
JMF	0:2563b0415d1f	141	static void rf_ack_wait_timer_start(uint16_t slots);
JMF	0:2563b0415d1f	142	static void rf_ack_wait_timer_stop(void);
JMF	0:2563b0415d1f	143	static void rf_handle_cca_ed_done(void);
JMF	0:2563b0415d1f	144	static void rf_handle_tx_end(void);
JMF	0:2563b0415d1f	145	static void rf_handle_rx_end(void);
JMF	0:2563b0415d1f	146	static void rf_on(void);
JMF	0:2563b0415d1f	147	static void rf_receive(void);
JMF	0:2563b0415d1f	148	static void rf_poll_trx_state_change(rf_trx_states_t trx_state);
JMF	0:2563b0415d1f	149	static void rf_init(void);
JMF	0:2563b0415d1f	150	static int8_t rf_device_register(const uint8_t *mac_addr);
JMF	0:2563b0415d1f	151	static void rf_device_unregister(void);
JMF	0:2563b0415d1f	152	static void rf_enable_static_frame_buffer_protection(void);
JMF	0:2563b0415d1f	153	static void rf_disable_static_frame_buffer_protection(void);
JMF	0:2563b0415d1f	154	static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol );
JMF	0:2563b0415d1f	155	static void rf_cca_abort(void);
JMF	0:2563b0415d1f	156	static void rf_calibration_cb(void);
JMF	0:2563b0415d1f	157	static void rf_init_phy_mode(void);
JMF	0:2563b0415d1f	158	static void rf_ack_wait_timer_interrupt(void);
JMF	0:2563b0415d1f	159	static void rf_calibration_timer_interrupt(void);
JMF	0:2563b0415d1f	160	static void rf_calibration_timer_start(uint32_t slots);
JMF	0:2563b0415d1f	161	static void rf_cca_timer_interrupt(void);
JMF	0:2563b0415d1f	162	static void rf_cca_timer_start(uint32_t slots);
JMF	0:2563b0415d1f	163	static uint8_t rf_scale_lqi(int8_t rssi);
JMF	0:2563b0415d1f	164
JMF	0:2563b0415d1f	165	static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
JMF	0:2563b0415d1f	166	static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
JMF	0:2563b0415d1f	167	static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
JMF	0:2563b0415d1f	168
JMF	0:2563b0415d1f	169	static void rf_if_cca_timer_start(uint32_t slots);
JMF	0:2563b0415d1f	170	static void rf_if_enable_promiscuous_mode(void);
JMF	0:2563b0415d1f	171	static void rf_if_lock(void);
JMF	0:2563b0415d1f	172	static void rf_if_unlock(void);
JMF	0:2563b0415d1f	173	static uint8_t rf_if_read_rnd(void);
JMF	0:2563b0415d1f	174	static void rf_if_calibration_timer_start(uint32_t slots);
JMF	0:2563b0415d1f	175	static void rf_if_interrupt_handler(void);
JMF	0:2563b0415d1f	176	static void rf_if_ack_wait_timer_start(uint16_t slots);
JMF	0:2563b0415d1f	177	static void rf_if_ack_wait_timer_stop(void);
JMF	0:2563b0415d1f	178	static void rf_if_ack_pending_ctrl(uint8_t state);
JMF	0:2563b0415d1f	179	static void rf_if_calibration(void);
JMF	0:2563b0415d1f	180	static uint8_t rf_if_read_register(uint8_t addr);
JMF	0:2563b0415d1f	181	static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask);
JMF	0:2563b0415d1f	182	static void rf_if_clear_bit(uint8_t addr, uint8_t bit);
JMF	0:2563b0415d1f	183	static void rf_if_write_register(uint8_t addr, uint8_t data);
JMF	0:2563b0415d1f	184	static void rf_if_reset_radio(void);
JMF	0:2563b0415d1f	185	static void rf_if_enable_ant_div(void);
JMF	0:2563b0415d1f	186	static void rf_if_disable_ant_div(void);
JMF	0:2563b0415d1f	187	static void rf_if_enable_slptr(void);
JMF	0:2563b0415d1f	188	static void rf_if_disable_slptr(void);
JMF	0:2563b0415d1f	189	static void rf_if_write_antenna_diversity_settings(void);
JMF	0:2563b0415d1f	190	static void rf_if_write_set_tx_power_register(uint8_t value);
JMF	0:2563b0415d1f	191	static void rf_if_write_rf_settings(void);
JMF	0:2563b0415d1f	192	static uint8_t rf_if_check_cca(void);
JMF	0:2563b0415d1f	193	static uint8_t rf_if_read_trx_state(void);
JMF	0:2563b0415d1f	194	static uint16_t rf_if_read_packet(uint8_t data[RF_MTU], uint8_t lqi_out, uint8_t ed_out, bool *crc_good);
JMF	0:2563b0415d1f	195	static void rf_if_write_short_addr_registers(uint8_t *short_address);
JMF	0:2563b0415d1f	196	static uint8_t rf_if_last_acked_pending(void);
JMF	0:2563b0415d1f	197	static void rf_if_write_pan_id_registers(uint8_t *pan_id);
JMF	0:2563b0415d1f	198	static void rf_if_write_ieee_addr_registers(uint8_t *address);
JMF	0:2563b0415d1f	199	static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length);
JMF	0:2563b0415d1f	200	static void rf_if_change_trx_state(rf_trx_states_t trx_state);
JMF	0:2563b0415d1f	201	static void rf_if_enable_tx_end_interrupt(void);
JMF	0:2563b0415d1f	202	static void rf_if_enable_rx_end_interrupt(void);
JMF	0:2563b0415d1f	203	static void rf_if_enable_cca_ed_done_interrupt(void);
JMF	0:2563b0415d1f	204	static void rf_if_start_cca_process(void);
JMF	0:2563b0415d1f	205	static int8_t rf_if_scale_rssi(uint8_t ed_level);
JMF	0:2563b0415d1f	206	static void rf_if_set_channel_register(uint8_t channel);
JMF	0:2563b0415d1f	207	static void rf_if_enable_promiscuous_mode(void);
JMF	0:2563b0415d1f	208	static void rf_if_disable_promiscuous_mode(void);
JMF	0:2563b0415d1f	209	static uint8_t rf_if_read_part_num(void);
JMF	0:2563b0415d1f	210	static void rf_if_enable_irq(void);
JMF	0:2563b0415d1f	211	static void rf_if_disable_irq(void);
JMF	0:2563b0415d1f	212
JMF	0:2563b0415d1f	213	#ifdef MBED_CONF_RTOS_PRESENT
JMF	0:2563b0415d1f	214	#include "mbed.h"
JMF	0:2563b0415d1f	215	#include "rtos.h"
JMF	0:2563b0415d1f	216
JMF	0:2563b0415d1f	217	static void rf_if_irq_task_process_irq();
JMF	0:2563b0415d1f	218
JMF	0:2563b0415d1f	219	#define SIG_RADIO 1
JMF	0:2563b0415d1f	220	#define SIG_TIMER_ACK 2
JMF	0:2563b0415d1f	221	#define SIG_TIMER_CAL 4
JMF	0:2563b0415d1f	222	#define SIG_TIMER_CCA 8
JMF	0:2563b0415d1f	223
JMF	0:2563b0415d1f	224	#define SIG_TIMERS (SIG_TIMER_ACK\|SIG_TIMER_CAL\|SIG_TIMER_CCA)
JMF	0:2563b0415d1f	225	#define SIG_ALL (SIG_RADIO\|SIG_TIMERS)
JMF	0:2563b0415d1f	226	#endif
JMF	0:2563b0415d1f	227
JMF	0:2563b0415d1f	228	// HW pins to RF chip
JMF	0:2563b0415d1f	229	#define SPI_SPEED 7500000
JMF	0:2563b0415d1f	230
JMF	0:2563b0415d1f	231	class UnlockedSPI : public SPI {
JMF	0:2563b0415d1f	232	public:
JMF	0:2563b0415d1f	233	UnlockedSPI(PinName mosi, PinName miso, PinName sclk) :
JMF	0:2563b0415d1f	234	SPI(mosi, miso, sclk) { }
JMF	0:2563b0415d1f	235	virtual void lock() { }
JMF	0:2563b0415d1f	236	virtual void unlock() { }
JMF	0:2563b0415d1f	237	};
JMF	0:2563b0415d1f	238
JMF	0:2563b0415d1f	239	class RFBits {
JMF	0:2563b0415d1f	240	public:
JMF	0:2563b0415d1f	241	RFBits(PinName spi_mosi, PinName spi_miso,
JMF	0:2563b0415d1f	242	PinName spi_sclk, PinName spi_cs,
JMF	0:2563b0415d1f	243	PinName spi_rst, PinName spi_slp, PinName spi_irq);
JMF	0:2563b0415d1f	244	UnlockedSPI spi;
JMF	0:2563b0415d1f	245	DigitalOut CS;
JMF	0:2563b0415d1f	246	DigitalOut RST;
JMF	0:2563b0415d1f	247	DigitalOut SLP_TR;
JMF	0:2563b0415d1f	248	InterruptIn IRQ;
JMF	0:2563b0415d1f	249	Timeout ack_timer;
JMF	0:2563b0415d1f	250	Timeout cal_timer;
JMF	0:2563b0415d1f	251	Timeout cca_timer;
JMF	0:2563b0415d1f	252	#ifdef MBED_CONF_RTOS_PRESENT
JMF	0:2563b0415d1f	253	Thread irq_thread;
JMF	0:2563b0415d1f	254	Mutex mutex;
JMF	0:2563b0415d1f	255	void rf_if_irq_task();
JMF	0:2563b0415d1f	256	#endif
JMF	0:2563b0415d1f	257	};
JMF	0:2563b0415d1f	258
JMF	0:2563b0415d1f	259	RFBits::RFBits(PinName spi_mosi, PinName spi_miso,
JMF	0:2563b0415d1f	260	PinName spi_sclk, PinName spi_cs,
JMF	0:2563b0415d1f	261	PinName spi_rst, PinName spi_slp, PinName spi_irq)
JMF	0:2563b0415d1f	262	: spi(spi_mosi, spi_miso, spi_sclk),
JMF	0:2563b0415d1f	263	CS(spi_cs),
JMF	0:2563b0415d1f	264	RST(spi_rst),
JMF	0:2563b0415d1f	265	SLP_TR(spi_slp),
JMF	0:2563b0415d1f	266	IRQ(spi_irq)
JMF	0:2563b0415d1f	267	#ifdef MBED_CONF_RTOS_PRESENT
JMF	0:2563b0415d1f	268	,irq_thread(osPriorityRealtime, 1024)
JMF	0:2563b0415d1f	269	#endif
JMF	0:2563b0415d1f	270	{
JMF	0:2563b0415d1f	271	#ifdef MBED_CONF_RTOS_PRESENT
JMF	0:2563b0415d1f	272	irq_thread.start(mbed::callback(this, &RFBits::rf_if_irq_task));
JMF	0:2563b0415d1f	273	#endif
JMF	0:2563b0415d1f	274	}
JMF	0:2563b0415d1f	275
JMF	0:2563b0415d1f	276	static RFBits *rf;
JMF	0:2563b0415d1f	277	static uint8_t rf_part_num = 0;
JMF	0:2563b0415d1f	278	/TODO: RSSI Base value setting/
JMF	0:2563b0415d1f	279	static int8_t rf_rssi_base_val = -91;
JMF	0:2563b0415d1f	280
JMF	0:2563b0415d1f	281	static uint8_t rf_if_spi_exchange(uint8_t out);
JMF	0:2563b0415d1f	282
JMF	0:2563b0415d1f	283	static void rf_if_lock(void)
JMF	0:2563b0415d1f	284	{
JMF	0:2563b0415d1f	285	platform_enter_critical();
JMF	0:2563b0415d1f	286	}
JMF	0:2563b0415d1f	287
JMF	0:2563b0415d1f	288	static void rf_if_unlock(void)
JMF	0:2563b0415d1f	289	{
JMF	0:2563b0415d1f	290	platform_exit_critical();
JMF	0:2563b0415d1f	291	}
JMF	0:2563b0415d1f	292
JMF	0:2563b0415d1f	293	#ifdef MBED_CONF_RTOS_PRESENT
JMF	0:2563b0415d1f	294	static void rf_if_cca_timer_signal(void)
JMF	0:2563b0415d1f	295	{
JMF	0:2563b0415d1f	296	rf->irq_thread.signal_set(SIG_TIMER_CCA);
JMF	0:2563b0415d1f	297	}
JMF	0:2563b0415d1f	298
JMF	0:2563b0415d1f	299	static void rf_if_cal_timer_signal(void)
JMF	0:2563b0415d1f	300	{
JMF	0:2563b0415d1f	301	rf->irq_thread.signal_set(SIG_TIMER_CAL);
JMF	0:2563b0415d1f	302	}
JMF	0:2563b0415d1f	303
JMF	0:2563b0415d1f	304	static void rf_if_ack_timer_signal(void)
JMF	0:2563b0415d1f	305	{
JMF	0:2563b0415d1f	306	rf->irq_thread.signal_set(SIG_TIMER_ACK);
JMF	0:2563b0415d1f	307	}
JMF	0:2563b0415d1f	308	#endif
JMF	0:2563b0415d1f	309
JMF	0:2563b0415d1f	310
JMF	0:2563b0415d1f	311	/* Delay functions for RF Chip SPI access */
JMF	0:2563b0415d1f	312	#ifdef __CC_ARM
JMF	0:2563b0415d1f	313	__asm static void delay_loop(uint32_t count)
JMF	0:2563b0415d1f	314	{
JMF	0:2563b0415d1f	315	1
JMF	0:2563b0415d1f	316	SUBS a1, a1, #1
JMF	0:2563b0415d1f	317	BCS %BT1
JMF	0:2563b0415d1f	318	BX lr
JMF	0:2563b0415d1f	319	}
JMF	0:2563b0415d1f	320	#elif defined (__ICCARM__)
JMF	0:2563b0415d1f	321	static void delay_loop(uint32_t count)
JMF	0:2563b0415d1f	322	{
JMF	0:2563b0415d1f	323	__asm volatile(
JMF	0:2563b0415d1f	324	"loop: \n"
JMF	0:2563b0415d1f	325	" SUBS %0, %0, #1 \n"
JMF	0:2563b0415d1f	326	" BCS.n loop\n"
JMF	0:2563b0415d1f	327	: "+r" (count)
JMF	0:2563b0415d1f	328	:
JMF	0:2563b0415d1f	329	: "cc"
JMF	0:2563b0415d1f	330	);
JMF	0:2563b0415d1f	331	}
JMF	0:2563b0415d1f	332	#else // GCC
JMF	0:2563b0415d1f	333	static void delay_loop(uint32_t count)
JMF	0:2563b0415d1f	334	{
JMF	0:2563b0415d1f	335	__asm__ volatile (
JMF	0:2563b0415d1f	336	"%=:\n\t"
JMF	0:2563b0415d1f	337	#if defined(__thumb__) && !defined(__thumb2__)
JMF	0:2563b0415d1f	338	"SUB %0, #1\n\t"
JMF	0:2563b0415d1f	339	#else
JMF	0:2563b0415d1f	340	"SUBS %0, %0, #1\n\t"
JMF	0:2563b0415d1f	341	#endif
JMF	0:2563b0415d1f	342	"BCS %=b\n\t"
JMF	0:2563b0415d1f	343	: "+l" (count)
JMF	0:2563b0415d1f	344	:
JMF	0:2563b0415d1f	345	: "cc"
JMF	0:2563b0415d1f	346	);
JMF	0:2563b0415d1f	347	}
JMF	0:2563b0415d1f	348	#endif
JMF	0:2563b0415d1f	349
JMF	0:2563b0415d1f	350	static void delay_ns(uint32_t ns)
JMF	0:2563b0415d1f	351	{
JMF	0:2563b0415d1f	352	uint32_t cycles_per_us = SystemCoreClock / 1000000;
JMF	0:2563b0415d1f	353	// Cortex-M0 takes 4 cycles per loop (SUB=1, BCS=3)
JMF	0:2563b0415d1f	354	// Cortex-M3 and M4 takes 3 cycles per loop (SUB=1, BCS=2)
JMF	0:2563b0415d1f	355	// Cortex-M7 - who knows?
JMF	0:2563b0415d1f	356	// Cortex M3-M7 have "CYCCNT" - would be better than a software loop, but M0 doesn't
JMF	0:2563b0415d1f	357	// Assume 3 cycles per loop for now - will be 33% slow on M0. No biggie,
JMF	0:2563b0415d1f	358	// as original version of code was 300% slow on M4.
JMF	0:2563b0415d1f	359	// [Note that this very calculation, plus call overhead, will take multiple
JMF	0:2563b0415d1f	360	// cycles. Could well be 100ns on its own... So round down here, startup is
JMF	0:2563b0415d1f	361	// worth at least one loop iteration.]
JMF	0:2563b0415d1f	362	uint32_t count = (cycles_per_us * ns) / 3000;
JMF	0:2563b0415d1f	363
JMF	0:2563b0415d1f	364	delay_loop(count);
JMF	0:2563b0415d1f	365	}
JMF	0:2563b0415d1f	366
JMF	0:2563b0415d1f	367	// t1 = 180ns, SEL falling edge to MISO active [SPI setup assumed slow enough to not need manual delay]
JMF	0:2563b0415d1f	368	#define CS_SELECT() {rf->CS = 0; /* delay_ns(180); */}
JMF	0:2563b0415d1f	369	// t9 = 250ns, last clock to SEL rising edge, t8 = 250ns, SPI idle time between consecutive access
JMF	0:2563b0415d1f	370	#define CS_RELEASE() {delay_ns(250); rf->CS = 1; delay_ns(250);}
JMF	0:2563b0415d1f	371
JMF	0:2563b0415d1f	372	/*
JMF	0:2563b0415d1f	373	* \brief Function sets the TX power variable.
JMF	0:2563b0415d1f	374	*
JMF	0:2563b0415d1f	375	* \param power TX power setting
JMF	0:2563b0415d1f	376	*
JMF	0:2563b0415d1f	377	* \return 0 Success
JMF	0:2563b0415d1f	378	* \return -1 Fail
JMF	0:2563b0415d1f	379	*/
JMF	0:2563b0415d1f	380	MBED_UNUSED static int8_t rf_tx_power_set(uint8_t power)
JMF	0:2563b0415d1f	381	{
JMF	0:2563b0415d1f	382	int8_t ret_val = -1;
JMF	0:2563b0415d1f	383
JMF	0:2563b0415d1f	384	radio_tx_power = power;
JMF	0:2563b0415d1f	385	rf_if_lock();
JMF	0:2563b0415d1f	386	rf_if_write_set_tx_power_register(radio_tx_power);
JMF	0:2563b0415d1f	387	rf_if_unlock();
JMF	0:2563b0415d1f	388	ret_val = 0;
JMF	0:2563b0415d1f	389
JMF	0:2563b0415d1f	390	return ret_val;
JMF	0:2563b0415d1f	391	}
JMF	0:2563b0415d1f	392
JMF	0:2563b0415d1f	393	/*
JMF	0:2563b0415d1f	394	* \brief Read connected radio part.
JMF	0:2563b0415d1f	395	*
JMF	0:2563b0415d1f	396	* This function only return valid information when rf_init() is called
JMF	0:2563b0415d1f	397	*
JMF	0:2563b0415d1f	398	* \return
JMF	0:2563b0415d1f	399	*/
JMF	0:2563b0415d1f	400	static rf_trx_part_e rf_radio_type_read(void)
JMF	0:2563b0415d1f	401	{
JMF	0:2563b0415d1f	402	rf_trx_part_e ret_val = ATMEL_UNKNOW_DEV;
JMF	0:2563b0415d1f	403
JMF	0:2563b0415d1f	404	switch (rf_part_num)
JMF	0:2563b0415d1f	405	{
JMF	0:2563b0415d1f	406	case PART_AT86RF212:
JMF	0:2563b0415d1f	407	ret_val = ATMEL_AT86RF212;
JMF	0:2563b0415d1f	408	break;
JMF	0:2563b0415d1f	409	case PART_AT86RF233:
JMF	0:2563b0415d1f	410	ret_val = ATMEL_AT86RF233;
JMF	0:2563b0415d1f	411	break;
JMF	0:2563b0415d1f	412	default:
JMF	0:2563b0415d1f	413	break;
JMF	0:2563b0415d1f	414	}
JMF	0:2563b0415d1f	415
JMF	0:2563b0415d1f	416	return ret_val;
JMF	0:2563b0415d1f	417	}
JMF	0:2563b0415d1f	418
JMF	0:2563b0415d1f	419
JMF	0:2563b0415d1f	420	/*
JMF	0:2563b0415d1f	421	* \brief Function starts the ACK wait timeout.
JMF	0:2563b0415d1f	422	*
JMF	0:2563b0415d1f	423	* \param slots Given slots, resolution 50us
JMF	0:2563b0415d1f	424	*
JMF	0:2563b0415d1f	425	* \return none
JMF	0:2563b0415d1f	426	*/
JMF	0:2563b0415d1f	427	static void rf_if_ack_wait_timer_start(uint16_t slots)
JMF	0:2563b0415d1f	428	{
JMF	0:2563b0415d1f	429	#ifdef MBED_CONF_RTOS_PRESENT
JMF	0:2563b0415d1f	430	rf->ack_timer.attach_us(rf_if_ack_timer_signal, slots*50);
JMF	0:2563b0415d1f	431	#else
JMF	0:2563b0415d1f	432	rf->ack_timer.attach_us(rf_ack_wait_timer_interrupt, slots*50);
JMF	0:2563b0415d1f	433	#endif
JMF	0:2563b0415d1f	434	}
JMF	0:2563b0415d1f	435
JMF	0:2563b0415d1f	436	/*
JMF	0:2563b0415d1f	437	* \brief Function starts the calibration interval.
JMF	0:2563b0415d1f	438	*
JMF	0:2563b0415d1f	439	* \param slots Given slots, resolution 50us
JMF	0:2563b0415d1f	440	*
JMF	0:2563b0415d1f	441	* \return none
JMF	0:2563b0415d1f	442	*/
JMF	0:2563b0415d1f	443	static void rf_if_calibration_timer_start(uint32_t slots)
JMF	0:2563b0415d1f	444	{
JMF	0:2563b0415d1f	445	#ifdef MBED_CONF_RTOS_PRESENT
JMF	0:2563b0415d1f	446	rf->cal_timer.attach_us(rf_if_cal_timer_signal, slots*50);
JMF	0:2563b0415d1f	447	#else
JMF	0:2563b0415d1f	448	rf->cal_timer.attach_us(rf_calibration_timer_interrupt, slots*50);
JMF	0:2563b0415d1f	449	#endif
JMF	0:2563b0415d1f	450	}
JMF	0:2563b0415d1f	451
JMF	0:2563b0415d1f	452	/*
JMF	0:2563b0415d1f	453	* \brief Function starts the CCA interval.
JMF	0:2563b0415d1f	454	*
JMF	0:2563b0415d1f	455	* \param slots Given slots, resolution 50us
JMF	0:2563b0415d1f	456	*
JMF	0:2563b0415d1f	457	* \return none
JMF	0:2563b0415d1f	458	*/
JMF	0:2563b0415d1f	459	static void rf_if_cca_timer_start(uint32_t slots)
JMF	0:2563b0415d1f	460	{
JMF	0:2563b0415d1f	461	#ifdef MBED_CONF_RTOS_PRESENT
JMF	0:2563b0415d1f	462	rf->cca_timer.attach_us(rf_if_cca_timer_signal, slots*50);
JMF	0:2563b0415d1f	463	#else
JMF	0:2563b0415d1f	464	rf->cca_timer.attach_us(rf_cca_timer_interrupt, slots*50);
JMF	0:2563b0415d1f	465	#endif
JMF	0:2563b0415d1f	466	}
JMF	0:2563b0415d1f	467
JMF	0:2563b0415d1f	468	/*
JMF	0:2563b0415d1f	469	* \brief Function stops the CCA interval.
JMF	0:2563b0415d1f	470	*
JMF	0:2563b0415d1f	471	* \return none
JMF	0:2563b0415d1f	472	*/
JMF	0:2563b0415d1f	473	static void rf_if_cca_timer_stop(void)
JMF	0:2563b0415d1f	474	{
JMF	0:2563b0415d1f	475	rf->cca_timer.detach();
JMF	0:2563b0415d1f	476	}
JMF	0:2563b0415d1f	477
JMF	0:2563b0415d1f	478	/*
JMF	0:2563b0415d1f	479	* \brief Function stops the ACK wait timeout.
JMF	0:2563b0415d1f	480	*
JMF	0:2563b0415d1f	481	* \param none
JMF	0:2563b0415d1f	482	*
JMF	0:2563b0415d1f	483	* \return none
JMF	0:2563b0415d1f	484	*/
JMF	0:2563b0415d1f	485	static void rf_if_ack_wait_timer_stop(void)
JMF	0:2563b0415d1f	486	{
JMF	0:2563b0415d1f	487	rf->ack_timer.detach();
JMF	0:2563b0415d1f	488	}
JMF	0:2563b0415d1f	489
JMF	0:2563b0415d1f	490	/*
JMF	0:2563b0415d1f	491	* \brief Function sets bit(s) in given RF register.
JMF	0:2563b0415d1f	492	*
JMF	0:2563b0415d1f	493	* \param addr Address of the register to set
JMF	0:2563b0415d1f	494	* \param bit Bit(s) to set
JMF	0:2563b0415d1f	495	* \param bit_mask Masks the field inside the register
JMF	0:2563b0415d1f	496	*
JMF	0:2563b0415d1f	497	* \return none
JMF	0:2563b0415d1f	498	*/
JMF	0:2563b0415d1f	499	static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask)
JMF	0:2563b0415d1f	500	{
JMF	0:2563b0415d1f	501	uint8_t reg = rf_if_read_register(addr);
JMF	0:2563b0415d1f	502	reg &= ~bit_mask;
JMF	0:2563b0415d1f	503	reg \|= bit;
JMF	0:2563b0415d1f	504	rf_if_write_register(addr, reg);
JMF	0:2563b0415d1f	505	}
JMF	0:2563b0415d1f	506
JMF	0:2563b0415d1f	507	/*
JMF	0:2563b0415d1f	508	* \brief Function clears bit(s) in given RF register.
JMF	0:2563b0415d1f	509	*
JMF	0:2563b0415d1f	510	* \param addr Address of the register to clear
JMF	0:2563b0415d1f	511	* \param bit Bit(s) to clear
JMF	0:2563b0415d1f	512	*
JMF	0:2563b0415d1f	513	* \return none
JMF	0:2563b0415d1f	514	*/
JMF	0:2563b0415d1f	515	static void rf_if_clear_bit(uint8_t addr, uint8_t bit)
JMF	0:2563b0415d1f	516	{
JMF	0:2563b0415d1f	517	rf_if_set_bit(addr, 0, bit);
JMF	0:2563b0415d1f	518	}
JMF	0:2563b0415d1f	519
JMF	0:2563b0415d1f	520	/*
JMF	0:2563b0415d1f	521	* \brief Function writes register in RF.
JMF	0:2563b0415d1f	522	*
JMF	0:2563b0415d1f	523	* \param addr Address on the RF
JMF	0:2563b0415d1f	524	* \param data Written data
JMF	0:2563b0415d1f	525	*
JMF	0:2563b0415d1f	526	* \return none
JMF	0:2563b0415d1f	527	*/
JMF	0:2563b0415d1f	528	static void rf_if_write_register(uint8_t addr, uint8_t data)
JMF	0:2563b0415d1f	529	{
JMF	0:2563b0415d1f	530	uint8_t cmd = 0xC0;
JMF	0:2563b0415d1f	531	CS_SELECT();
JMF	0:2563b0415d1f	532	rf_if_spi_exchange(cmd \| addr);
JMF	0:2563b0415d1f	533	rf_if_spi_exchange(data);
JMF	0:2563b0415d1f	534	CS_RELEASE();
JMF	0:2563b0415d1f	535	}
JMF	0:2563b0415d1f	536
JMF	0:2563b0415d1f	537	/*
JMF	0:2563b0415d1f	538	* \brief Function reads RF register.
JMF	0:2563b0415d1f	539	*
JMF	0:2563b0415d1f	540	* \param addr Address on the RF
JMF	0:2563b0415d1f	541	*
JMF	0:2563b0415d1f	542	* \return Read data
JMF	0:2563b0415d1f	543	*/
JMF	0:2563b0415d1f	544	static uint8_t rf_if_read_register(uint8_t addr)
JMF	0:2563b0415d1f	545	{
JMF	0:2563b0415d1f	546	uint8_t cmd = 0x80;
JMF	0:2563b0415d1f	547	uint8_t data;
JMF	0:2563b0415d1f	548	CS_SELECT();
JMF	0:2563b0415d1f	549	rf_if_spi_exchange(cmd \| addr);
JMF	0:2563b0415d1f	550	data = rf_if_spi_exchange(0);
JMF	0:2563b0415d1f	551	CS_RELEASE();
JMF	0:2563b0415d1f	552	return data;
JMF	0:2563b0415d1f	553	}
JMF	0:2563b0415d1f	554
JMF	0:2563b0415d1f	555	/*
JMF	0:2563b0415d1f	556	* \brief Function resets the RF.
JMF	0:2563b0415d1f	557	*
JMF	0:2563b0415d1f	558	* \param none
JMF	0:2563b0415d1f	559	*
JMF	0:2563b0415d1f	560	* \return none
JMF	0:2563b0415d1f	561	*/
JMF	0:2563b0415d1f	562	static void rf_if_reset_radio(void)
JMF	0:2563b0415d1f	563	{
JMF	0:2563b0415d1f	564	rf->spi.frequency(SPI_SPEED);
JMF	0:2563b0415d1f	565	rf->IRQ.rise(0);
JMF	0:2563b0415d1f	566	rf->RST = 1;
JMF	0:2563b0415d1f	567	wait_ms(1);
JMF	0:2563b0415d1f	568	rf->RST = 0;
JMF	0:2563b0415d1f	569	wait_ms(10);
JMF	0:2563b0415d1f	570	CS_RELEASE();
JMF	0:2563b0415d1f	571	rf->SLP_TR = 0;
JMF	0:2563b0415d1f	572	wait_ms(10);
JMF	0:2563b0415d1f	573	rf->RST = 1;
JMF	0:2563b0415d1f	574	wait_ms(10);
JMF	0:2563b0415d1f	575
JMF	0:2563b0415d1f	576	rf->IRQ.rise(&rf_if_interrupt_handler);
JMF	0:2563b0415d1f	577	}
JMF	0:2563b0415d1f	578
JMF	0:2563b0415d1f	579	/*
JMF	0:2563b0415d1f	580	* \brief Function enables the promiscuous mode.
JMF	0:2563b0415d1f	581	*
JMF	0:2563b0415d1f	582	* \param none
JMF	0:2563b0415d1f	583	*
JMF	0:2563b0415d1f	584	* \return none
JMF	0:2563b0415d1f	585	*/
JMF	0:2563b0415d1f	586	static void rf_if_enable_promiscuous_mode(void)
JMF	0:2563b0415d1f	587	{
JMF	0:2563b0415d1f	588	/Set AACK_PROM_MODE to enable the promiscuous mode/
JMF	0:2563b0415d1f	589	rf_if_set_bit(XAH_CTRL_1, AACK_PROM_MODE, AACK_PROM_MODE);
JMF	0:2563b0415d1f	590	}
JMF	0:2563b0415d1f	591
JMF	0:2563b0415d1f	592	/*
JMF	0:2563b0415d1f	593	* \brief Function enables the promiscuous mode.
JMF	0:2563b0415d1f	594	*
JMF	0:2563b0415d1f	595	* \param none
JMF	0:2563b0415d1f	596	*
JMF	0:2563b0415d1f	597	* \return none
JMF	0:2563b0415d1f	598	*/
JMF	0:2563b0415d1f	599	static void rf_if_disable_promiscuous_mode(void)
JMF	0:2563b0415d1f	600	{
JMF	0:2563b0415d1f	601	/Set AACK_PROM_MODE to enable the promiscuous mode/
JMF	0:2563b0415d1f	602	rf_if_clear_bit(XAH_CTRL_1, AACK_PROM_MODE);
JMF	0:2563b0415d1f	603	}
JMF	0:2563b0415d1f	604
JMF	0:2563b0415d1f	605	/*
JMF	0:2563b0415d1f	606	* \brief Function enables the Antenna diversity usage.
JMF	0:2563b0415d1f	607	*
JMF	0:2563b0415d1f	608	* \param none
JMF	0:2563b0415d1f	609	*
JMF	0:2563b0415d1f	610	* \return none
JMF	0:2563b0415d1f	611	*/
JMF	0:2563b0415d1f	612	static void rf_if_enable_ant_div(void)
JMF	0:2563b0415d1f	613	{
JMF	0:2563b0415d1f	614	/Set ANT_EXT_SW_EN to enable controlling of antenna diversity/
JMF	0:2563b0415d1f	615	rf_if_set_bit(ANT_DIV, ANT_EXT_SW_EN, ANT_EXT_SW_EN);
JMF	0:2563b0415d1f	616	}
JMF	0:2563b0415d1f	617
JMF	0:2563b0415d1f	618	/*
JMF	0:2563b0415d1f	619	* \brief Function disables the Antenna diversity usage.
JMF	0:2563b0415d1f	620	*
JMF	0:2563b0415d1f	621	* \param none
JMF	0:2563b0415d1f	622	*
JMF	0:2563b0415d1f	623	* \return none
JMF	0:2563b0415d1f	624	*/
JMF	0:2563b0415d1f	625	static void rf_if_disable_ant_div(void)
JMF	0:2563b0415d1f	626	{
JMF	0:2563b0415d1f	627	rf_if_clear_bit(ANT_DIV, ANT_EXT_SW_EN);
JMF	0:2563b0415d1f	628	}
JMF	0:2563b0415d1f	629
JMF	0:2563b0415d1f	630	/*
JMF	0:2563b0415d1f	631	* \brief Function sets the SLP TR pin.
JMF	0:2563b0415d1f	632	*
JMF	0:2563b0415d1f	633	* \param none
JMF	0:2563b0415d1f	634	*
JMF	0:2563b0415d1f	635	* \return none
JMF	0:2563b0415d1f	636	*/
JMF	0:2563b0415d1f	637	static void rf_if_enable_slptr(void)
JMF	0:2563b0415d1f	638	{
JMF	0:2563b0415d1f	639	rf->SLP_TR = 1;
JMF	0:2563b0415d1f	640	}
JMF	0:2563b0415d1f	641
JMF	0:2563b0415d1f	642	/*
JMF	0:2563b0415d1f	643	* \brief Function clears the SLP TR pin.
JMF	0:2563b0415d1f	644	*
JMF	0:2563b0415d1f	645	* \param none
JMF	0:2563b0415d1f	646	*
JMF	0:2563b0415d1f	647	* \return none
JMF	0:2563b0415d1f	648	*/
JMF	0:2563b0415d1f	649	static void rf_if_disable_slptr(void)
JMF	0:2563b0415d1f	650	{
JMF	0:2563b0415d1f	651	rf->SLP_TR = 0;
JMF	0:2563b0415d1f	652	}
JMF	0:2563b0415d1f	653
JMF	0:2563b0415d1f	654	/*
JMF	0:2563b0415d1f	655	* \brief Function writes the antenna diversity settings.
JMF	0:2563b0415d1f	656	*
JMF	0:2563b0415d1f	657	* \param none
JMF	0:2563b0415d1f	658	*
JMF	0:2563b0415d1f	659	* \return none
JMF	0:2563b0415d1f	660	*/
JMF	0:2563b0415d1f	661	static void rf_if_write_antenna_diversity_settings(void)
JMF	0:2563b0415d1f	662	{
JMF	0:2563b0415d1f	663	/Recommended setting of PDT_THRES is 3 when antenna diversity is used/
JMF	0:2563b0415d1f	664	rf_if_set_bit(RX_CTRL, 0x03, 0x0f);
JMF	0:2563b0415d1f	665	rf_if_write_register(ANT_DIV, ANT_DIV_EN \| ANT_EXT_SW_EN \| ANT_CTRL_DEFAULT);
JMF	0:2563b0415d1f	666	}
JMF	0:2563b0415d1f	667
JMF	0:2563b0415d1f	668	/*
JMF	0:2563b0415d1f	669	* \brief Function writes the TX output power register.
JMF	0:2563b0415d1f	670	*
JMF	0:2563b0415d1f	671	* \param value Given register value
JMF	0:2563b0415d1f	672	*
JMF	0:2563b0415d1f	673	* \return none
JMF	0:2563b0415d1f	674	*/
JMF	0:2563b0415d1f	675	static void rf_if_write_set_tx_power_register(uint8_t value)
JMF	0:2563b0415d1f	676	{
JMF	0:2563b0415d1f	677	rf_if_write_register(PHY_TX_PWR, value);
JMF	0:2563b0415d1f	678	}
JMF	0:2563b0415d1f	679
JMF	0:2563b0415d1f	680	/*
JMF	0:2563b0415d1f	681	* \brief Function returns the RF part number.
JMF	0:2563b0415d1f	682	*
JMF	0:2563b0415d1f	683	* \param none
JMF	0:2563b0415d1f	684	*
JMF	0:2563b0415d1f	685	* \return part number
JMF	0:2563b0415d1f	686	*/
JMF	0:2563b0415d1f	687	static uint8_t rf_if_read_part_num(void)
JMF	0:2563b0415d1f	688	{
JMF	0:2563b0415d1f	689	return rf_if_read_register(PART_NUM);
JMF	0:2563b0415d1f	690	}
JMF	0:2563b0415d1f	691
JMF	0:2563b0415d1f	692	/*
JMF	0:2563b0415d1f	693	* \brief Function writes the RF settings and initialises SPI interface.
JMF	0:2563b0415d1f	694	*
JMF	0:2563b0415d1f	695	* \param none
JMF	0:2563b0415d1f	696	*
JMF	0:2563b0415d1f	697	* \return none
JMF	0:2563b0415d1f	698	*/
JMF	0:2563b0415d1f	699	static void rf_if_write_rf_settings(void)
JMF	0:2563b0415d1f	700	{
JMF	0:2563b0415d1f	701	/Reset RF module/
JMF	0:2563b0415d1f	702	rf_if_reset_radio();
JMF	0:2563b0415d1f	703
JMF	0:2563b0415d1f	704	rf_part_num = rf_if_read_part_num();
JMF	0:2563b0415d1f	705
JMF	0:2563b0415d1f	706	rf_if_write_register(XAH_CTRL_0,0);
JMF	0:2563b0415d1f	707	rf_if_write_register(TRX_CTRL_1, 0x20);
JMF	0:2563b0415d1f	708
JMF	0:2563b0415d1f	709	/CCA Mode - Carrier sense OR energy above threshold. Channel list is set separately/
JMF	0:2563b0415d1f	710	rf_if_write_register(PHY_CC_CCA, 0x05);
JMF	0:2563b0415d1f	711
JMF	0:2563b0415d1f	712	/Read transceiver PART_NUM/
JMF	0:2563b0415d1f	713	rf_part_num = rf_if_read_register(PART_NUM);
JMF	0:2563b0415d1f	714
JMF	0:2563b0415d1f	715	/Sub-GHz RF settings/
JMF	0:2563b0415d1f	716	if(rf_part_num == PART_AT86RF212)
JMF	0:2563b0415d1f	717	{
JMF	0:2563b0415d1f	718	/GC_TX_OFFS mode-dependent setting - OQPSK/
JMF	0:2563b0415d1f	719	rf_if_write_register(RF_CTRL_0, 0x32);
JMF	0:2563b0415d1f	720
JMF	0:2563b0415d1f	721	if(rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B)
JMF	0:2563b0415d1f	722	{
JMF	0:2563b0415d1f	723	/TX Output Power setting - 0 dBm North American Band/
JMF	0:2563b0415d1f	724	rf_if_write_register(PHY_TX_PWR, 0x03);
JMF	0:2563b0415d1f	725	}
JMF	0:2563b0415d1f	726	else
JMF	0:2563b0415d1f	727	{
JMF	0:2563b0415d1f	728	/TX Output Power setting - 0 dBm North American Band/
JMF	0:2563b0415d1f	729	rf_if_write_register(PHY_TX_PWR, 0x24);
JMF	0:2563b0415d1f	730	}
JMF	0:2563b0415d1f	731
JMF	0:2563b0415d1f	732	/PHY Mode: IEEE 802.15.4-2006/2011 - OQPSK-SIN-250/
JMF	0:2563b0415d1f	733	rf_if_write_register(TRX_CTRL_2, RF_PHY_MODE);
JMF	0:2563b0415d1f	734	/Based on receiver Characteristics. See AT86RF212B Datasheet where RSSI BASE VALUE in range -97 - -100 dBm/
JMF	0:2563b0415d1f	735	rf_rssi_base_val = -98;
JMF	0:2563b0415d1f	736	}
JMF	0:2563b0415d1f	737	/2.4GHz RF settings/
JMF	0:2563b0415d1f	738	else
JMF	0:2563b0415d1f	739	{
JMF	0:2563b0415d1f	740	#if 0
JMF	0:2563b0415d1f	741	/* Disable power saving functions for now - can only impact reliability,
JMF	0:2563b0415d1f	742	* and don't have any users demanding it. */
JMF	0:2563b0415d1f	743	/Set RPC register/
JMF	0:2563b0415d1f	744	rf_if_write_register(TRX_RPC, RX_RPC_CTRL\|RX_RPC_EN\|PLL_RPC_EN\|XAH_TX_RPC_EN\|IPAN_RPC_EN\|TRX_RPC_RSVD_1);
JMF	0:2563b0415d1f	745	#endif
JMF	0:2563b0415d1f	746	/PHY Mode: IEEE 802.15.4 - Data Rate 250 kb/s/
JMF	0:2563b0415d1f	747	rf_if_write_register(TRX_CTRL_2, 0);
JMF	0:2563b0415d1f	748	rf_rssi_base_val = -91;
JMF	0:2563b0415d1f	749	}
JMF	0:2563b0415d1f	750	}
JMF	0:2563b0415d1f	751
JMF	0:2563b0415d1f	752	/*
JMF	0:2563b0415d1f	753	* \brief Function checks the channel availability
JMF	0:2563b0415d1f	754	*
JMF	0:2563b0415d1f	755	* \param none
JMF	0:2563b0415d1f	756	*
JMF	0:2563b0415d1f	757	* \return 1 Channel clear
JMF	0:2563b0415d1f	758	* \return 0 Channel not clear
JMF	0:2563b0415d1f	759	*/
JMF	0:2563b0415d1f	760	static uint8_t rf_if_check_cca(void)
JMF	0:2563b0415d1f	761	{
JMF	0:2563b0415d1f	762	uint8_t retval = 0;
JMF	0:2563b0415d1f	763	if(rf_if_read_register(TRX_STATUS) & CCA_STATUS)
JMF	0:2563b0415d1f	764	{
JMF	0:2563b0415d1f	765	retval = 1;
JMF	0:2563b0415d1f	766	}
JMF	0:2563b0415d1f	767	return retval;
JMF	0:2563b0415d1f	768	}
JMF	0:2563b0415d1f	769
JMF	0:2563b0415d1f	770	/*
JMF	0:2563b0415d1f	771	* \brief Function returns the RF state
JMF	0:2563b0415d1f	772	*
JMF	0:2563b0415d1f	773	* \param none
JMF	0:2563b0415d1f	774	*
JMF	0:2563b0415d1f	775	* \return RF state
JMF	0:2563b0415d1f	776	*/
JMF	0:2563b0415d1f	777	static uint8_t rf_if_read_trx_state(void)
JMF	0:2563b0415d1f	778	{
JMF	0:2563b0415d1f	779	return rf_if_read_register(TRX_STATUS) & 0x1F;
JMF	0:2563b0415d1f	780	}
JMF	0:2563b0415d1f	781
JMF	0:2563b0415d1f	782	/*
JMF	0:2563b0415d1f	783	* \brief Function reads packet buffer.
JMF	0:2563b0415d1f	784	*
JMF	0:2563b0415d1f	785	* \param data_out Output buffer
JMF	0:2563b0415d1f	786	* \param lqi_out LQI output
JMF	0:2563b0415d1f	787	* \param ed_out ED output
JMF	0:2563b0415d1f	788	* \param crc_good CRC good indication
JMF	0:2563b0415d1f	789	*
JMF	0:2563b0415d1f	790	* \return PSDU length [0..RF_MTU]
JMF	0:2563b0415d1f	791	*/
JMF	0:2563b0415d1f	792	static uint16_t rf_if_read_packet(uint8_t data_out[RF_MTU], uint8_t lqi_out, uint8_t ed_out, bool *crc_good)
JMF	0:2563b0415d1f	793	{
JMF	0:2563b0415d1f	794	CS_SELECT();
JMF	0:2563b0415d1f	795	rf_if_spi_exchange(0x20);
JMF	0:2563b0415d1f	796	uint8_t len = rf_if_spi_exchange(0) & 0x7F;
JMF	0:2563b0415d1f	797	uint8_t *ptr = data_out;
JMF	0:2563b0415d1f	798	for (uint_fast8_t i = 0; i < len; i++) {
JMF	0:2563b0415d1f	799	*ptr++ = rf_if_spi_exchange(0);
JMF	0:2563b0415d1f	800	}
JMF	0:2563b0415d1f	801
JMF	0:2563b0415d1f	802	*lqi_out = rf_if_spi_exchange(0);
JMF	0:2563b0415d1f	803	*ed_out = rf_if_spi_exchange(0);
JMF	0:2563b0415d1f	804	*crc_good = rf_if_spi_exchange(0) & 0x80;
JMF	0:2563b0415d1f	805	CS_RELEASE();
JMF	0:2563b0415d1f	806
JMF	0:2563b0415d1f	807	return len;
JMF	0:2563b0415d1f	808	}
JMF	0:2563b0415d1f	809
JMF	0:2563b0415d1f	810	/*
JMF	0:2563b0415d1f	811	* \brief Function writes RF short address registers
JMF	0:2563b0415d1f	812	*
JMF	0:2563b0415d1f	813	* \param short_address Given short address
JMF	0:2563b0415d1f	814	*
JMF	0:2563b0415d1f	815	* \return none
JMF	0:2563b0415d1f	816	*/
JMF	0:2563b0415d1f	817	static void rf_if_write_short_addr_registers(uint8_t *short_address)
JMF	0:2563b0415d1f	818	{
JMF	0:2563b0415d1f	819	rf_if_write_register(SHORT_ADDR_1, *short_address++);
JMF	0:2563b0415d1f	820	rf_if_write_register(SHORT_ADDR_0, *short_address);
JMF	0:2563b0415d1f	821	}
JMF	0:2563b0415d1f	822
JMF	0:2563b0415d1f	823	/*
JMF	0:2563b0415d1f	824	* \brief Function sets the frame pending in ACK message
JMF	0:2563b0415d1f	825	*
JMF	0:2563b0415d1f	826	* \param state Given frame pending state
JMF	0:2563b0415d1f	827	*
JMF	0:2563b0415d1f	828	* \return none
JMF	0:2563b0415d1f	829	*/
JMF	0:2563b0415d1f	830	static void rf_if_ack_pending_ctrl(uint8_t state)
JMF	0:2563b0415d1f	831	{
JMF	0:2563b0415d1f	832	rf_if_lock();
JMF	0:2563b0415d1f	833	if(state)
JMF	0:2563b0415d1f	834	{
JMF	0:2563b0415d1f	835	rf_if_set_bit(CSMA_SEED_1, (1 << AACK_SET_PD), (1 << AACK_SET_PD));
JMF	0:2563b0415d1f	836	}
JMF	0:2563b0415d1f	837	else
JMF	0:2563b0415d1f	838	{
JMF	0:2563b0415d1f	839	rf_if_clear_bit(CSMA_SEED_1, (1 << AACK_SET_PD));
JMF	0:2563b0415d1f	840	}
JMF	0:2563b0415d1f	841	rf_if_unlock();
JMF	0:2563b0415d1f	842	}
JMF	0:2563b0415d1f	843
JMF	0:2563b0415d1f	844	/*
JMF	0:2563b0415d1f	845	* \brief Function returns the state of frame pending control
JMF	0:2563b0415d1f	846	*
JMF	0:2563b0415d1f	847	* \param none
JMF	0:2563b0415d1f	848	*
JMF	0:2563b0415d1f	849	* \return Frame pending state
JMF	0:2563b0415d1f	850	*/
JMF	0:2563b0415d1f	851	static uint8_t rf_if_last_acked_pending(void)
JMF	0:2563b0415d1f	852	{
JMF	0:2563b0415d1f	853	uint8_t last_acked_data_pending;
JMF	0:2563b0415d1f	854
JMF	0:2563b0415d1f	855	rf_if_lock();
JMF	0:2563b0415d1f	856	if(rf_if_read_register(CSMA_SEED_1) & 0x20)
JMF	0:2563b0415d1f	857	last_acked_data_pending = 1;
JMF	0:2563b0415d1f	858	else
JMF	0:2563b0415d1f	859	last_acked_data_pending = 0;
JMF	0:2563b0415d1f	860	rf_if_unlock();
JMF	0:2563b0415d1f	861
JMF	0:2563b0415d1f	862	return last_acked_data_pending;
JMF	0:2563b0415d1f	863	}
JMF	0:2563b0415d1f	864
JMF	0:2563b0415d1f	865	/*
JMF	0:2563b0415d1f	866	* \brief Function calibrates the RF part.
JMF	0:2563b0415d1f	867	*
JMF	0:2563b0415d1f	868	* \param none
JMF	0:2563b0415d1f	869	*
JMF	0:2563b0415d1f	870	* \return none
JMF	0:2563b0415d1f	871	*/
JMF	0:2563b0415d1f	872	static void rf_if_calibration(void)
JMF	0:2563b0415d1f	873	{
JMF	0:2563b0415d1f	874	rf_if_set_bit(FTN_CTRL, FTN_START, FTN_START);
JMF	0:2563b0415d1f	875	/Wait while calibration is running/
JMF	0:2563b0415d1f	876	while(rf_if_read_register(FTN_CTRL) & FTN_START);
JMF	0:2563b0415d1f	877	}
JMF	0:2563b0415d1f	878
JMF	0:2563b0415d1f	879	/*
JMF	0:2563b0415d1f	880	* \brief Function writes RF PAN Id registers
JMF	0:2563b0415d1f	881	*
JMF	0:2563b0415d1f	882	* \param pan_id Given PAN Id
JMF	0:2563b0415d1f	883	*
JMF	0:2563b0415d1f	884	* \return none
JMF	0:2563b0415d1f	885	*/
JMF	0:2563b0415d1f	886	static void rf_if_write_pan_id_registers(uint8_t *pan_id)
JMF	0:2563b0415d1f	887	{
JMF	0:2563b0415d1f	888	rf_if_write_register(PAN_ID_1, *pan_id++);
JMF	0:2563b0415d1f	889	rf_if_write_register(PAN_ID_0, *pan_id);
JMF	0:2563b0415d1f	890	}
JMF	0:2563b0415d1f	891
JMF	0:2563b0415d1f	892	/*
JMF	0:2563b0415d1f	893	* \brief Function writes RF IEEE Address registers
JMF	0:2563b0415d1f	894	*
JMF	0:2563b0415d1f	895	* \param address Given IEEE Address
JMF	0:2563b0415d1f	896	*
JMF	0:2563b0415d1f	897	* \return none
JMF	0:2563b0415d1f	898	*/
JMF	0:2563b0415d1f	899	static void rf_if_write_ieee_addr_registers(uint8_t *address)
JMF	0:2563b0415d1f	900	{
JMF	0:2563b0415d1f	901	uint8_t i;
JMF	0:2563b0415d1f	902	uint8_t temp = IEEE_ADDR_0;
JMF	0:2563b0415d1f	903
JMF	0:2563b0415d1f	904	for(i=0; i<8; i++)
JMF	0:2563b0415d1f	905	rf_if_write_register(temp++, address[7-i]);
JMF	0:2563b0415d1f	906	}
JMF	0:2563b0415d1f	907
JMF	0:2563b0415d1f	908	/*
JMF	0:2563b0415d1f	909	* \brief Function writes data in RF frame buffer.
JMF	0:2563b0415d1f	910	*
JMF	0:2563b0415d1f	911	* \param ptr Pointer to data (PSDU, except FCS)
JMF	0:2563b0415d1f	912	* \param length Pointer to length (PSDU length, minus 2 for FCS)
JMF	0:2563b0415d1f	913	*
JMF	0:2563b0415d1f	914	* \return none
JMF	0:2563b0415d1f	915	*/
JMF	0:2563b0415d1f	916	static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length)
JMF	0:2563b0415d1f	917	{
JMF	0:2563b0415d1f	918	uint8_t i;
JMF	0:2563b0415d1f	919	uint8_t cmd = 0x60;
JMF	0:2563b0415d1f	920
JMF	0:2563b0415d1f	921	CS_SELECT();
JMF	0:2563b0415d1f	922	rf_if_spi_exchange(cmd);
JMF	0:2563b0415d1f	923	rf_if_spi_exchange(length + 2);
JMF	0:2563b0415d1f	924	for(i=0; i<length; i++)
JMF	0:2563b0415d1f	925	rf_if_spi_exchange(*ptr++);
JMF	0:2563b0415d1f	926
JMF	0:2563b0415d1f	927	CS_RELEASE();
JMF	0:2563b0415d1f	928	}
JMF	0:2563b0415d1f	929
JMF	0:2563b0415d1f	930	/*
JMF	0:2563b0415d1f	931	* \brief Function returns 8-bit random value.
JMF	0:2563b0415d1f	932	*
JMF	0:2563b0415d1f	933	* \param none
JMF	0:2563b0415d1f	934	*
JMF	0:2563b0415d1f	935	* \return random value
JMF	0:2563b0415d1f	936	*/
JMF	0:2563b0415d1f	937	static uint8_t rf_if_read_rnd(void)
JMF	0:2563b0415d1f	938	{
JMF	0:2563b0415d1f	939	uint8_t temp;
JMF	0:2563b0415d1f	940	uint8_t tmp_rpc_val = 0;
JMF	0:2563b0415d1f	941	/RPC must be disabled while reading the random number/
JMF	0:2563b0415d1f	942	if(rf_part_num == PART_AT86RF233)
JMF	0:2563b0415d1f	943	{
JMF	0:2563b0415d1f	944	tmp_rpc_val = rf_if_read_register(TRX_RPC);
JMF	0:2563b0415d1f	945	rf_if_write_register(TRX_RPC, RX_RPC_CTRL\|TRX_RPC_RSVD_1);
JMF	0:2563b0415d1f	946	}
JMF	0:2563b0415d1f	947
JMF	0:2563b0415d1f	948	wait_ms(1);
JMF	0:2563b0415d1f	949	temp = ((rf_if_read_register(PHY_RSSI)>>5) << 6);
JMF	0:2563b0415d1f	950	wait_ms(1);
JMF	0:2563b0415d1f	951	temp \|= ((rf_if_read_register(PHY_RSSI)>>5) << 4);
JMF	0:2563b0415d1f	952	wait_ms(1);
JMF	0:2563b0415d1f	953	temp \|= ((rf_if_read_register(PHY_RSSI)>>5) << 2);
JMF	0:2563b0415d1f	954	wait_ms(1);
JMF	0:2563b0415d1f	955	temp \|= ((rf_if_read_register(PHY_RSSI)>>5));
JMF	0:2563b0415d1f	956	wait_ms(1);
JMF	0:2563b0415d1f	957	if(rf_part_num == PART_AT86RF233)
JMF	0:2563b0415d1f	958	rf_if_write_register(TRX_RPC, tmp_rpc_val);
JMF	0:2563b0415d1f	959	return temp;
JMF	0:2563b0415d1f	960	}
JMF	0:2563b0415d1f	961
JMF	0:2563b0415d1f	962	/*
JMF	0:2563b0415d1f	963	* \brief Function changes the state of the RF.
JMF	0:2563b0415d1f	964	*
JMF	0:2563b0415d1f	965	* \param trx_state Given RF state
JMF	0:2563b0415d1f	966	*
JMF	0:2563b0415d1f	967	* \return none
JMF	0:2563b0415d1f	968	*/
JMF	0:2563b0415d1f	969	static void rf_if_change_trx_state(rf_trx_states_t trx_state)
JMF	0:2563b0415d1f	970	{
JMF	0:2563b0415d1f	971	// XXX Lock claim apparently not required
JMF	0:2563b0415d1f	972	rf_if_lock();
JMF	0:2563b0415d1f	973	rf_if_write_register(TRX_STATE, trx_state);
JMF	0:2563b0415d1f	974	/Wait while not in desired state/
JMF	0:2563b0415d1f	975	rf_poll_trx_state_change(trx_state);
JMF	0:2563b0415d1f	976	rf_if_unlock();
JMF	0:2563b0415d1f	977	}
JMF	0:2563b0415d1f	978
JMF	0:2563b0415d1f	979	/*
JMF	0:2563b0415d1f	980	* \brief Function enables the TX END interrupt
JMF	0:2563b0415d1f	981	*
JMF	0:2563b0415d1f	982	* \param none
JMF	0:2563b0415d1f	983	*
JMF	0:2563b0415d1f	984	* \return none
JMF	0:2563b0415d1f	985	*/
JMF	0:2563b0415d1f	986	static void rf_if_enable_tx_end_interrupt(void)
JMF	0:2563b0415d1f	987	{
JMF	0:2563b0415d1f	988	rf_if_set_bit(IRQ_MASK, TRX_END, TRX_END);
JMF	0:2563b0415d1f	989	}
JMF	0:2563b0415d1f	990
JMF	0:2563b0415d1f	991	/*
JMF	0:2563b0415d1f	992	* \brief Function enables the RX END interrupt
JMF	0:2563b0415d1f	993	*
JMF	0:2563b0415d1f	994	* \param none
JMF	0:2563b0415d1f	995	*
JMF	0:2563b0415d1f	996	* \return none
JMF	0:2563b0415d1f	997	*/
JMF	0:2563b0415d1f	998	static void rf_if_enable_rx_end_interrupt(void)
JMF	0:2563b0415d1f	999	{
JMF	0:2563b0415d1f	1000	rf_if_set_bit(IRQ_MASK, TRX_END, TRX_END);
JMF	0:2563b0415d1f	1001	}
JMF	0:2563b0415d1f	1002
JMF	0:2563b0415d1f	1003	/*
JMF	0:2563b0415d1f	1004	* \brief Function enables the CCA ED interrupt
JMF	0:2563b0415d1f	1005	*
JMF	0:2563b0415d1f	1006	* \param none
JMF	0:2563b0415d1f	1007	*
JMF	0:2563b0415d1f	1008	* \return none
JMF	0:2563b0415d1f	1009	*/
JMF	0:2563b0415d1f	1010	static void rf_if_enable_cca_ed_done_interrupt(void)
JMF	0:2563b0415d1f	1011	{
JMF	0:2563b0415d1f	1012	rf_if_set_bit(IRQ_MASK, CCA_ED_DONE, CCA_ED_DONE);
JMF	0:2563b0415d1f	1013	}
JMF	0:2563b0415d1f	1014
JMF	0:2563b0415d1f	1015	/*
JMF	0:2563b0415d1f	1016	* \brief Function starts the CCA process
JMF	0:2563b0415d1f	1017	*
JMF	0:2563b0415d1f	1018	* \param none
JMF	0:2563b0415d1f	1019	*
JMF	0:2563b0415d1f	1020	* \return none
JMF	0:2563b0415d1f	1021	*/
JMF	0:2563b0415d1f	1022	static void rf_if_start_cca_process(void)
JMF	0:2563b0415d1f	1023	{
JMF	0:2563b0415d1f	1024	rf_if_set_bit(PHY_CC_CCA, CCA_REQUEST, CCA_REQUEST);
JMF	0:2563b0415d1f	1025	}
JMF	0:2563b0415d1f	1026
JMF	0:2563b0415d1f	1027	/*
JMF	0:2563b0415d1f	1028	* \brief Function scales RSSI
JMF	0:2563b0415d1f	1029	*
JMF	0:2563b0415d1f	1030	* \param ed_level ED level read from chip
JMF	0:2563b0415d1f	1031	*
JMF	0:2563b0415d1f	1032	* \return appropriately scaled RSSI dBm
JMF	0:2563b0415d1f	1033	*/
JMF	0:2563b0415d1f	1034	static int8_t rf_if_scale_rssi(uint8_t ed_level)
JMF	0:2563b0415d1f	1035	{
JMF	0:2563b0415d1f	1036	if (rf_part_num == PART_AT86RF212) {
JMF	0:2563b0415d1f	1037	/* Data sheet says to multiply by 1.03 - this is 1.03125, rounding down */
JMF	0:2563b0415d1f	1038	ed_level += ed_level >> 5;
JMF	0:2563b0415d1f	1039	}
JMF	0:2563b0415d1f	1040	return rf_rssi_base_val + ed_level;
JMF	0:2563b0415d1f	1041	}
JMF	0:2563b0415d1f	1042
JMF	0:2563b0415d1f	1043	/*
JMF	0:2563b0415d1f	1044	* \brief Function sets the RF channel field
JMF	0:2563b0415d1f	1045	*
JMF	0:2563b0415d1f	1046	* \param Given channel
JMF	0:2563b0415d1f	1047	*
JMF	0:2563b0415d1f	1048	* \return none
JMF	0:2563b0415d1f	1049	*/
JMF	0:2563b0415d1f	1050	static void rf_if_set_channel_register(uint8_t channel)
JMF	0:2563b0415d1f	1051	{
JMF	0:2563b0415d1f	1052	rf_if_set_bit(PHY_CC_CCA, channel, 0x1f);
JMF	0:2563b0415d1f	1053	}
JMF	0:2563b0415d1f	1054
JMF	0:2563b0415d1f	1055	/*
JMF	0:2563b0415d1f	1056	* \brief Function enables RF irq pin interrupts in RF interface.
JMF	0:2563b0415d1f	1057	*
JMF	0:2563b0415d1f	1058	* \param none
JMF	0:2563b0415d1f	1059	*
JMF	0:2563b0415d1f	1060	* \return none
JMF	0:2563b0415d1f	1061	*/
JMF	0:2563b0415d1f	1062	static void rf_if_enable_irq(void)
JMF	0:2563b0415d1f	1063	{
JMF	0:2563b0415d1f	1064	rf->IRQ.enable_irq();
JMF	0:2563b0415d1f	1065	}
JMF	0:2563b0415d1f	1066
JMF	0:2563b0415d1f	1067	/*
JMF	0:2563b0415d1f	1068	* \brief Function disables RF irq pin interrupts in RF interface.
JMF	0:2563b0415d1f	1069	*
JMF	0:2563b0415d1f	1070	* \param none
JMF	0:2563b0415d1f	1071	*
JMF	0:2563b0415d1f	1072	* \return none
JMF	0:2563b0415d1f	1073	*/
JMF	0:2563b0415d1f	1074	static void rf_if_disable_irq(void)
JMF	0:2563b0415d1f	1075	{
JMF	0:2563b0415d1f	1076	rf->IRQ.disable_irq();
JMF	0:2563b0415d1f	1077	}
JMF	0:2563b0415d1f	1078
JMF	0:2563b0415d1f	1079	#ifdef MBED_CONF_RTOS_PRESENT
JMF	0:2563b0415d1f	1080	static void rf_if_interrupt_handler(void)
JMF	0:2563b0415d1f	1081	{
JMF	0:2563b0415d1f	1082	rf->irq_thread.signal_set(SIG_RADIO);
JMF	0:2563b0415d1f	1083	}
JMF	0:2563b0415d1f	1084
JMF	0:2563b0415d1f	1085	// Started during construction of rf, so variable
JMF	0:2563b0415d1f	1086	// rf isn't set at the start. Uses 'this' instead.
JMF	0:2563b0415d1f	1087	void RFBits::rf_if_irq_task(void)
JMF	0:2563b0415d1f	1088	{
JMF	0:2563b0415d1f	1089	for (;;) {
JMF	0:2563b0415d1f	1090	osEvent event = irq_thread.signal_wait(0);
JMF	0:2563b0415d1f	1091	if (event.status != osEventSignal) {
JMF	0:2563b0415d1f	1092	continue;
JMF	0:2563b0415d1f	1093	}
JMF	0:2563b0415d1f	1094	rf_if_lock();
JMF	0:2563b0415d1f	1095	if (event.value.signals & SIG_RADIO) {
JMF	0:2563b0415d1f	1096	rf_if_irq_task_process_irq();
JMF	0:2563b0415d1f	1097	}
JMF	0:2563b0415d1f	1098	if (event.value.signals & SIG_TIMER_ACK) {
JMF	0:2563b0415d1f	1099	rf_ack_wait_timer_interrupt();
JMF	0:2563b0415d1f	1100	}
JMF	0:2563b0415d1f	1101	if (event.value.signals & SIG_TIMER_CCA) {
JMF	0:2563b0415d1f	1102	rf_cca_timer_interrupt();
JMF	0:2563b0415d1f	1103	}
JMF	0:2563b0415d1f	1104	if (event.value.signals & SIG_TIMER_CAL) {
JMF	0:2563b0415d1f	1105	rf_calibration_timer_interrupt();
JMF	0:2563b0415d1f	1106	}
JMF	0:2563b0415d1f	1107	rf_if_unlock();
JMF	0:2563b0415d1f	1108	}
JMF	0:2563b0415d1f	1109	}
JMF	0:2563b0415d1f	1110
JMF	0:2563b0415d1f	1111	static void rf_if_irq_task_process_irq(void)
JMF	0:2563b0415d1f	1112	#else
JMF	0:2563b0415d1f	1113	/*
JMF	0:2563b0415d1f	1114	* \brief Function is a RF interrupt vector. End of frame in RX and TX are handled here as well as CCA process interrupt.
JMF	0:2563b0415d1f	1115	*
JMF	0:2563b0415d1f	1116	* \param none
JMF	0:2563b0415d1f	1117	*
JMF	0:2563b0415d1f	1118	* \return none
JMF	0:2563b0415d1f	1119	*/
JMF	0:2563b0415d1f	1120	static void rf_if_interrupt_handler(void)
JMF	0:2563b0415d1f	1121	#endif
JMF	0:2563b0415d1f	1122	{
JMF	0:2563b0415d1f	1123	uint8_t irq_status;
JMF	0:2563b0415d1f	1124
JMF	0:2563b0415d1f	1125	/Read interrupt flag/
JMF	0:2563b0415d1f	1126	irq_status = rf_if_read_register(IRQ_STATUS);
JMF	0:2563b0415d1f	1127
JMF	0:2563b0415d1f	1128	/Disable interrupt on RF/
JMF	0:2563b0415d1f	1129	rf_if_clear_bit(IRQ_MASK, irq_status);
JMF	0:2563b0415d1f	1130	/RX start interrupt/
JMF	0:2563b0415d1f	1131	if(irq_status & RX_START)
JMF	0:2563b0415d1f	1132	{
JMF	0:2563b0415d1f	1133	}
JMF	0:2563b0415d1f	1134	/Address matching interrupt/
JMF	0:2563b0415d1f	1135	if(irq_status & AMI)
JMF	0:2563b0415d1f	1136	{
JMF	0:2563b0415d1f	1137	}
JMF	0:2563b0415d1f	1138	if(irq_status & TRX_UR)
JMF	0:2563b0415d1f	1139	{
JMF	0:2563b0415d1f	1140	}
JMF	0:2563b0415d1f	1141	/Frame end interrupt (RX and TX)/
JMF	0:2563b0415d1f	1142	if(irq_status & TRX_END)
JMF	0:2563b0415d1f	1143	{
JMF	0:2563b0415d1f	1144	/TX done interrupt/
JMF	0:2563b0415d1f	1145	if(rf_if_read_trx_state() == PLL_ON \|\| rf_if_read_trx_state() == TX_ARET_ON)
JMF	0:2563b0415d1f	1146	{
JMF	0:2563b0415d1f	1147	rf_handle_tx_end();
JMF	0:2563b0415d1f	1148	}
JMF	0:2563b0415d1f	1149	/Frame received interrupt/
JMF	0:2563b0415d1f	1150	else
JMF	0:2563b0415d1f	1151	{
JMF	0:2563b0415d1f	1152	rf_handle_rx_end();
JMF	0:2563b0415d1f	1153	}
JMF	0:2563b0415d1f	1154	}
JMF	0:2563b0415d1f	1155	if(irq_status & CCA_ED_DONE)
JMF	0:2563b0415d1f	1156	{
JMF	0:2563b0415d1f	1157	rf_handle_cca_ed_done();
JMF	0:2563b0415d1f	1158	}
JMF	0:2563b0415d1f	1159	}
JMF	0:2563b0415d1f	1160
JMF	0:2563b0415d1f	1161	/*
JMF	0:2563b0415d1f	1162	* \brief Function writes/read data in SPI interface
JMF	0:2563b0415d1f	1163	*
JMF	0:2563b0415d1f	1164	* \param out Output data
JMF	0:2563b0415d1f	1165	*
JMF	0:2563b0415d1f	1166	* \return Input data
JMF	0:2563b0415d1f	1167	*/
JMF	0:2563b0415d1f	1168	static uint8_t rf_if_spi_exchange(uint8_t out)
JMF	0:2563b0415d1f	1169	{
JMF	0:2563b0415d1f	1170	uint8_t v;
JMF	0:2563b0415d1f	1171	v = rf->spi.write(out);
JMF	0:2563b0415d1f	1172	// t9 = t5 = 250ns, delay between LSB of last byte to next MSB or delay between LSB & SEL rising
JMF	0:2563b0415d1f	1173	// [SPI setup assumed slow enough to not need manual delay]
JMF	0:2563b0415d1f	1174	// delay_ns(250);
JMF	0:2563b0415d1f	1175	return v;
JMF	0:2563b0415d1f	1176	}
JMF	0:2563b0415d1f	1177
JMF	0:2563b0415d1f	1178	/*
JMF	0:2563b0415d1f	1179	* \brief Function sets given RF flag on.
JMF	0:2563b0415d1f	1180	*
JMF	0:2563b0415d1f	1181	* \param x Given RF flag
JMF	0:2563b0415d1f	1182	*
JMF	0:2563b0415d1f	1183	* \return none
JMF	0:2563b0415d1f	1184	*/
JMF	0:2563b0415d1f	1185	static void rf_flags_set(uint8_t x)
JMF	0:2563b0415d1f	1186	{
JMF	0:2563b0415d1f	1187	rf_flags \|= x;
JMF	0:2563b0415d1f	1188	}
JMF	0:2563b0415d1f	1189
JMF	0:2563b0415d1f	1190	/*
JMF	0:2563b0415d1f	1191	* \brief Function clears given RF flag on.
JMF	0:2563b0415d1f	1192	*
JMF	0:2563b0415d1f	1193	* \param x Given RF flag
JMF	0:2563b0415d1f	1194	*
JMF	0:2563b0415d1f	1195	* \return none
JMF	0:2563b0415d1f	1196	*/
JMF	0:2563b0415d1f	1197	static void rf_flags_clear(uint8_t x)
JMF	0:2563b0415d1f	1198	{
JMF	0:2563b0415d1f	1199	rf_flags &= ~x;
JMF	0:2563b0415d1f	1200	}
JMF	0:2563b0415d1f	1201
JMF	0:2563b0415d1f	1202	/*
JMF	0:2563b0415d1f	1203	* \brief Function checks if given RF flag is on.
JMF	0:2563b0415d1f	1204	*
JMF	0:2563b0415d1f	1205	* \param x Given RF flag
JMF	0:2563b0415d1f	1206	*
JMF	0:2563b0415d1f	1207	* \return states of the given flags
JMF	0:2563b0415d1f	1208	*/
JMF	0:2563b0415d1f	1209	static uint8_t rf_flags_check(uint8_t x)
JMF	0:2563b0415d1f	1210	{
JMF	0:2563b0415d1f	1211	return (rf_flags & x);
JMF	0:2563b0415d1f	1212	}
JMF	0:2563b0415d1f	1213
JMF	0:2563b0415d1f	1214	/*
JMF	0:2563b0415d1f	1215	* \brief Function clears all RF flags.
JMF	0:2563b0415d1f	1216	*
JMF	0:2563b0415d1f	1217	* \param none
JMF	0:2563b0415d1f	1218	*
JMF	0:2563b0415d1f	1219	* \return none
JMF	0:2563b0415d1f	1220	*/
JMF	0:2563b0415d1f	1221	static void rf_flags_reset(void)
JMF	0:2563b0415d1f	1222	{
JMF	0:2563b0415d1f	1223	rf_flags = 0;
JMF	0:2563b0415d1f	1224	}
JMF	0:2563b0415d1f	1225
JMF	0:2563b0415d1f	1226	/*
JMF	0:2563b0415d1f	1227	* \brief Function initialises and registers the RF driver.
JMF	0:2563b0415d1f	1228	*
JMF	0:2563b0415d1f	1229	* \param none
JMF	0:2563b0415d1f	1230	*
JMF	0:2563b0415d1f	1231	* \return rf_radio_driver_id Driver ID given by NET library
JMF	0:2563b0415d1f	1232	*/
JMF	0:2563b0415d1f	1233	static int8_t rf_device_register(const uint8_t *mac_addr)
JMF	0:2563b0415d1f	1234	{
JMF	0:2563b0415d1f	1235	rf_trx_part_e radio_type;
JMF	0:2563b0415d1f	1236
JMF	0:2563b0415d1f	1237	rf_init();
JMF	0:2563b0415d1f	1238
JMF	0:2563b0415d1f	1239	radio_type = rf_radio_type_read();
JMF	0:2563b0415d1f	1240	if(radio_type != ATMEL_UNKNOW_DEV)
JMF	0:2563b0415d1f	1241	{
JMF	0:2563b0415d1f	1242	/Set pointer to MAC address/
JMF	0:2563b0415d1f	1243	device_driver.PHY_MAC = (uint8_t *)mac_addr;
JMF	0:2563b0415d1f	1244	device_driver.driver_description = (char*)"ATMEL_MAC";
JMF	0:2563b0415d1f	1245	//Create setup Used Radio chips
JMF	0:2563b0415d1f	1246	if(radio_type == ATMEL_AT86RF212)
JMF	0:2563b0415d1f	1247	{
JMF	0:2563b0415d1f	1248	device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
JMF	0:2563b0415d1f	1249	}
JMF	0:2563b0415d1f	1250	else
JMF	0:2563b0415d1f	1251	{
JMF	0:2563b0415d1f	1252	device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
JMF	0:2563b0415d1f	1253	}
JMF	0:2563b0415d1f	1254	device_driver.phy_channel_pages = phy_channel_pages;
JMF	0:2563b0415d1f	1255	/Maximum size of payload is 127/
JMF	0:2563b0415d1f	1256	device_driver.phy_MTU = 127;
JMF	0:2563b0415d1f	1257	/No header in PHY/
JMF	0:2563b0415d1f	1258	device_driver.phy_header_length = 0;
JMF	0:2563b0415d1f	1259	/No tail in PHY/
JMF	0:2563b0415d1f	1260	device_driver.phy_tail_length = 0;
JMF	0:2563b0415d1f	1261	/Set address write function/
JMF	0:2563b0415d1f	1262	device_driver.address_write = &rf_address_write;
JMF	0:2563b0415d1f	1263	/Set RF extension function/
JMF	0:2563b0415d1f	1264	device_driver.extension = &rf_extension;
JMF	0:2563b0415d1f	1265	/Set RF state control function/
JMF	0:2563b0415d1f	1266	device_driver.state_control = &rf_interface_state_control;
JMF	0:2563b0415d1f	1267	/Set transmit function/
JMF	0:2563b0415d1f	1268	device_driver.tx = &rf_start_cca;
JMF	0:2563b0415d1f	1269	/NULLIFY rx and tx_done callbacks/
JMF	0:2563b0415d1f	1270	device_driver.phy_rx_cb = NULL;
JMF	0:2563b0415d1f	1271	device_driver.phy_tx_done_cb = NULL;
JMF	0:2563b0415d1f	1272	/Register device driver/
JMF	0:2563b0415d1f	1273	rf_radio_driver_id = arm_net_phy_register(&device_driver);
JMF	0:2563b0415d1f	1274	}
JMF	0:2563b0415d1f	1275	return rf_radio_driver_id;
JMF	0:2563b0415d1f	1276	}
JMF	0:2563b0415d1f	1277
JMF	0:2563b0415d1f	1278	/*
JMF	0:2563b0415d1f	1279	* \brief Function unregisters the RF driver.
JMF	0:2563b0415d1f	1280	*
JMF	0:2563b0415d1f	1281	* \param none
JMF	0:2563b0415d1f	1282	*
JMF	0:2563b0415d1f	1283	* \return none
JMF	0:2563b0415d1f	1284	*/
JMF	0:2563b0415d1f	1285	static void rf_device_unregister()
JMF	0:2563b0415d1f	1286	{
JMF	0:2563b0415d1f	1287	if (rf_radio_driver_id >= 0) {
JMF	0:2563b0415d1f	1288	arm_net_phy_unregister(rf_radio_driver_id);
JMF	0:2563b0415d1f	1289	rf_radio_driver_id = -1;
JMF	0:2563b0415d1f	1290	}
JMF	0:2563b0415d1f	1291	}
JMF	0:2563b0415d1f	1292
JMF	0:2563b0415d1f	1293	/*
JMF	0:2563b0415d1f	1294	* \brief Enable frame buffer protection
JMF	0:2563b0415d1f	1295	*
JMF	0:2563b0415d1f	1296	* If protection is enabled, reception cannot start - the radio will
JMF	0:2563b0415d1f	1297	* not go into RX_BUSY or write into the frame buffer if in receive mode.
JMF	0:2563b0415d1f	1298	* Setting this won't abort an already-started reception.
JMF	0:2563b0415d1f	1299	* We can still write the frame buffer ourselves.
JMF	0:2563b0415d1f	1300	*/
JMF	0:2563b0415d1f	1301	static void rf_enable_static_frame_buffer_protection(void)
JMF	0:2563b0415d1f	1302	{
JMF	0:2563b0415d1f	1303	if (!rf_flags_check(RFF_PROT)) {
JMF	0:2563b0415d1f	1304	/* This also writes RX_PDT_LEVEL to 0 - maximum RX sensitivity */
JMF	0:2563b0415d1f	1305	/* Would need to modify this function if messing with that */
JMF	0:2563b0415d1f	1306	rf_if_write_register(RX_SYN, RX_PDT_DIS);
JMF	0:2563b0415d1f	1307	rf_flags_set(RFF_PROT);
JMF	0:2563b0415d1f	1308	}
JMF	0:2563b0415d1f	1309	}
JMF	0:2563b0415d1f	1310
JMF	0:2563b0415d1f	1311	/*
JMF	0:2563b0415d1f	1312	* \brief Disable frame buffer protection
JMF	0:2563b0415d1f	1313	*/
JMF	0:2563b0415d1f	1314	static void rf_disable_static_frame_buffer_protection(void)
JMF	0:2563b0415d1f	1315	{
JMF	0:2563b0415d1f	1316	if (rf_flags_check(RFF_PROT)) {
JMF	0:2563b0415d1f	1317	/* This also writes RX_PDT_LEVEL to 0 - maximum RX sensitivity */
JMF	0:2563b0415d1f	1318	/* Would need to modify this function if messing with that */
JMF	0:2563b0415d1f	1319	rf_if_write_register(RX_SYN, 0);
JMF	0:2563b0415d1f	1320	rf_flags_clear(RFF_PROT);
JMF	0:2563b0415d1f	1321	}
JMF	0:2563b0415d1f	1322	}
JMF	0:2563b0415d1f	1323
JMF	0:2563b0415d1f	1324
JMF	0:2563b0415d1f	1325	/*
JMF	0:2563b0415d1f	1326	* \brief Function is a call back for ACK wait timeout.
JMF	0:2563b0415d1f	1327	*
JMF	0:2563b0415d1f	1328	* \param none
JMF	0:2563b0415d1f	1329	*
JMF	0:2563b0415d1f	1330	* \return none
JMF	0:2563b0415d1f	1331	*/
JMF	0:2563b0415d1f	1332	static void rf_ack_wait_timer_interrupt(void)
JMF	0:2563b0415d1f	1333	{
JMF	0:2563b0415d1f	1334	rf_if_lock();
JMF	0:2563b0415d1f	1335	expected_ack_sequence = -1;
JMF	0:2563b0415d1f	1336	/Force PLL state/
JMF	0:2563b0415d1f	1337	rf_if_change_trx_state(FORCE_PLL_ON);
JMF	0:2563b0415d1f	1338	rf_poll_trx_state_change(PLL_ON);
JMF	0:2563b0415d1f	1339	/Start receiver in RX_AACK_ON state/
JMF	0:2563b0415d1f	1340	rf_rx_mode = 0;
JMF	0:2563b0415d1f	1341	rf_flags_clear(RFF_RX);
JMF	0:2563b0415d1f	1342	rf_receive();
JMF	0:2563b0415d1f	1343	rf_if_unlock();
JMF	0:2563b0415d1f	1344	}
JMF	0:2563b0415d1f	1345
JMF	0:2563b0415d1f	1346	/*
JMF	0:2563b0415d1f	1347	* \brief Function is a call back for calibration interval timer.
JMF	0:2563b0415d1f	1348	*
JMF	0:2563b0415d1f	1349	* \param none
JMF	0:2563b0415d1f	1350	*
JMF	0:2563b0415d1f	1351	* \return none
JMF	0:2563b0415d1f	1352	*/
JMF	0:2563b0415d1f	1353	static void rf_calibration_timer_interrupt(void)
JMF	0:2563b0415d1f	1354	{
JMF	0:2563b0415d1f	1355	/Calibrate RF/
JMF	0:2563b0415d1f	1356	rf_calibration_cb();
JMF	0:2563b0415d1f	1357	/Start new calibration timeout/
JMF	0:2563b0415d1f	1358	rf_calibration_timer_start(RF_CALIBRATION_INTERVAL);
JMF	0:2563b0415d1f	1359	}
JMF	0:2563b0415d1f	1360
JMF	0:2563b0415d1f	1361	/*
JMF	0:2563b0415d1f	1362	* \brief Function is a call back for cca interval timer.
JMF	0:2563b0415d1f	1363	*
JMF	0:2563b0415d1f	1364	* \param none
JMF	0:2563b0415d1f	1365	*
JMF	0:2563b0415d1f	1366	* \return none
JMF	0:2563b0415d1f	1367	*/
JMF	0:2563b0415d1f	1368	static void rf_cca_timer_interrupt(void)
JMF	0:2563b0415d1f	1369	{
JMF	0:2563b0415d1f	1370	/Disable reception - locks against entering BUSY_RX and overwriting frame buffer/
JMF	0:2563b0415d1f	1371	rf_enable_static_frame_buffer_protection();
JMF	0:2563b0415d1f	1372
JMF	0:2563b0415d1f	1373	if(rf_if_read_trx_state() == BUSY_RX_AACK)
JMF	0:2563b0415d1f	1374	{
JMF	0:2563b0415d1f	1375	/Reception already started - re-enable reception and say CCA fail/
JMF	0:2563b0415d1f	1376	rf_disable_static_frame_buffer_protection();
JMF	0:2563b0415d1f	1377	if(device_driver.phy_tx_done_cb){
JMF	0:2563b0415d1f	1378	device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
JMF	0:2563b0415d1f	1379	}
JMF	0:2563b0415d1f	1380	}
JMF	0:2563b0415d1f	1381	else
JMF	0:2563b0415d1f	1382	{
JMF	0:2563b0415d1f	1383	/Load the frame buffer with frame to transmit /
JMF	0:2563b0415d1f	1384	rf_if_write_frame_buffer(rf_tx_data, rf_tx_length);
JMF	0:2563b0415d1f	1385	/Make sure we're in RX state to read channel (any way we could not be?)/
JMF	0:2563b0415d1f	1386	rf_receive();
JMF	0:2563b0415d1f	1387	rf_flags_set(RFF_CCA);
JMF	0:2563b0415d1f	1388	/Start CCA process/
JMF	0:2563b0415d1f	1389	rf_if_enable_cca_ed_done_interrupt();
JMF	0:2563b0415d1f	1390	rf_if_start_cca_process();
JMF	0:2563b0415d1f	1391	}
JMF	0:2563b0415d1f	1392	}
JMF	0:2563b0415d1f	1393
JMF	0:2563b0415d1f	1394	/*
JMF	0:2563b0415d1f	1395	* \brief Function starts the ACK wait timeout.
JMF	0:2563b0415d1f	1396	*
JMF	0:2563b0415d1f	1397	* \param slots Given slots, resolution 50us
JMF	0:2563b0415d1f	1398	*
JMF	0:2563b0415d1f	1399	* \return none
JMF	0:2563b0415d1f	1400	*/
JMF	0:2563b0415d1f	1401	static void rf_ack_wait_timer_start(uint16_t slots)
JMF	0:2563b0415d1f	1402	{
JMF	0:2563b0415d1f	1403	rf_if_ack_wait_timer_start(slots);
JMF	0:2563b0415d1f	1404	}
JMF	0:2563b0415d1f	1405
JMF	0:2563b0415d1f	1406	/*
JMF	0:2563b0415d1f	1407	* \brief Function starts the calibration interval.
JMF	0:2563b0415d1f	1408	*
JMF	0:2563b0415d1f	1409	* \param slots Given slots, resolution 50us
JMF	0:2563b0415d1f	1410	*
JMF	0:2563b0415d1f	1411	* \return none
JMF	0:2563b0415d1f	1412	*/
JMF	0:2563b0415d1f	1413	static void rf_calibration_timer_start(uint32_t slots)
JMF	0:2563b0415d1f	1414	{
JMF	0:2563b0415d1f	1415	rf_if_calibration_timer_start(slots);
JMF	0:2563b0415d1f	1416	}
JMF	0:2563b0415d1f	1417
JMF	0:2563b0415d1f	1418	/*
JMF	0:2563b0415d1f	1419	* \brief Function starts the CCA backoff.
JMF	0:2563b0415d1f	1420	*
JMF	0:2563b0415d1f	1421	* \param slots Given slots, resolution 50us
JMF	0:2563b0415d1f	1422	*
JMF	0:2563b0415d1f	1423	* \return none
JMF	0:2563b0415d1f	1424	*/
JMF	0:2563b0415d1f	1425	static void rf_cca_timer_start(uint32_t slots)
JMF	0:2563b0415d1f	1426	{
JMF	0:2563b0415d1f	1427	rf_if_cca_timer_start(slots);
JMF	0:2563b0415d1f	1428	}
JMF	0:2563b0415d1f	1429
JMF	0:2563b0415d1f	1430	/*
JMF	0:2563b0415d1f	1431	* \brief Function stops the CCA backoff.
JMF	0:2563b0415d1f	1432	*
JMF	0:2563b0415d1f	1433	* \return none
JMF	0:2563b0415d1f	1434	*/
JMF	0:2563b0415d1f	1435	static void rf_cca_timer_stop(void)
JMF	0:2563b0415d1f	1436	{
JMF	0:2563b0415d1f	1437	rf_if_cca_timer_stop();
JMF	0:2563b0415d1f	1438	}
JMF	0:2563b0415d1f	1439
JMF	0:2563b0415d1f	1440	/*
JMF	0:2563b0415d1f	1441	* \brief Function stops the ACK wait timeout.
JMF	0:2563b0415d1f	1442	*
JMF	0:2563b0415d1f	1443	* \param none
JMF	0:2563b0415d1f	1444	*
JMF	0:2563b0415d1f	1445	* \return none
JMF	0:2563b0415d1f	1446	*/
JMF	0:2563b0415d1f	1447	static void rf_ack_wait_timer_stop(void)
JMF	0:2563b0415d1f	1448	{
JMF	0:2563b0415d1f	1449	rf_if_ack_wait_timer_stop();
JMF	0:2563b0415d1f	1450	}
JMF	0:2563b0415d1f	1451
JMF	0:2563b0415d1f	1452	/*
JMF	0:2563b0415d1f	1453	* \brief Function writes various RF settings in startup.
JMF	0:2563b0415d1f	1454	*
JMF	0:2563b0415d1f	1455	* \param none
JMF	0:2563b0415d1f	1456	*
JMF	0:2563b0415d1f	1457	* \return none
JMF	0:2563b0415d1f	1458	*/
JMF	0:2563b0415d1f	1459	static void rf_write_settings(void)
JMF	0:2563b0415d1f	1460	{
JMF	0:2563b0415d1f	1461	rf_if_lock();
JMF	0:2563b0415d1f	1462	rf_if_write_rf_settings();
JMF	0:2563b0415d1f	1463	/Set output power/
JMF	0:2563b0415d1f	1464	rf_if_write_set_tx_power_register(radio_tx_power);
JMF	0:2563b0415d1f	1465	/Initialise Antenna Diversity/
JMF	0:2563b0415d1f	1466	if(rf_use_antenna_diversity)
JMF	0:2563b0415d1f	1467	rf_if_write_antenna_diversity_settings();
JMF	0:2563b0415d1f	1468	rf_if_unlock();
JMF	0:2563b0415d1f	1469	}
JMF	0:2563b0415d1f	1470
JMF	0:2563b0415d1f	1471	/*
JMF	0:2563b0415d1f	1472	* \brief Function writes 16-bit address in RF address filter.
JMF	0:2563b0415d1f	1473	*
JMF	0:2563b0415d1f	1474	* \param short_address Given short address
JMF	0:2563b0415d1f	1475	*
JMF	0:2563b0415d1f	1476	* \return none
JMF	0:2563b0415d1f	1477	*/
JMF	0:2563b0415d1f	1478	static void rf_set_short_adr(uint8_t * short_address)
JMF	0:2563b0415d1f	1479	{
JMF	0:2563b0415d1f	1480	rf_if_lock();
JMF	0:2563b0415d1f	1481	/Wake up RF if sleeping/
JMF	0:2563b0415d1f	1482	if(rf_flags_check(RFF_ON) == 0)
JMF	0:2563b0415d1f	1483	{
JMF	0:2563b0415d1f	1484	rf_if_disable_slptr();
JMF	0:2563b0415d1f	1485	rf_poll_trx_state_change(TRX_OFF);
JMF	0:2563b0415d1f	1486	}
JMF	0:2563b0415d1f	1487	/Write address filter registers/
JMF	0:2563b0415d1f	1488	rf_if_write_short_addr_registers(short_address);
JMF	0:2563b0415d1f	1489	/RF back to sleep/
JMF	0:2563b0415d1f	1490	if(rf_flags_check(RFF_ON) == 0)
JMF	0:2563b0415d1f	1491	{
JMF	0:2563b0415d1f	1492	rf_if_enable_slptr();
JMF	0:2563b0415d1f	1493	}
JMF	0:2563b0415d1f	1494	rf_if_unlock();
JMF	0:2563b0415d1f	1495	}
JMF	0:2563b0415d1f	1496
JMF	0:2563b0415d1f	1497	/*
JMF	0:2563b0415d1f	1498	* \brief Function writes PAN Id in RF PAN Id filter.
JMF	0:2563b0415d1f	1499	*
JMF	0:2563b0415d1f	1500	* \param pan_id Given PAN Id
JMF	0:2563b0415d1f	1501	*
JMF	0:2563b0415d1f	1502	* \return none
JMF	0:2563b0415d1f	1503	*/
JMF	0:2563b0415d1f	1504	static void rf_set_pan_id(uint8_t *pan_id)
JMF	0:2563b0415d1f	1505	{
JMF	0:2563b0415d1f	1506	rf_if_lock();
JMF	0:2563b0415d1f	1507	/Wake up RF if sleeping/
JMF	0:2563b0415d1f	1508	if(rf_flags_check(RFF_ON) == 0)
JMF	0:2563b0415d1f	1509	{
JMF	0:2563b0415d1f	1510	rf_if_disable_slptr();
JMF	0:2563b0415d1f	1511	rf_poll_trx_state_change(TRX_OFF);
JMF	0:2563b0415d1f	1512	}
JMF	0:2563b0415d1f	1513	/Write address filter registers/
JMF	0:2563b0415d1f	1514	rf_if_write_pan_id_registers(pan_id);
JMF	0:2563b0415d1f	1515	/RF back to sleep/
JMF	0:2563b0415d1f	1516	if(rf_flags_check(RFF_ON) == 0)
JMF	0:2563b0415d1f	1517	{
JMF	0:2563b0415d1f	1518	rf_if_enable_slptr();
JMF	0:2563b0415d1f	1519	}
JMF	0:2563b0415d1f	1520	rf_if_unlock();
JMF	0:2563b0415d1f	1521	}
JMF	0:2563b0415d1f	1522
JMF	0:2563b0415d1f	1523	/*
JMF	0:2563b0415d1f	1524	* \brief Function writes 64-bit address in RF address filter.
JMF	0:2563b0415d1f	1525	*
JMF	0:2563b0415d1f	1526	* \param address Given 64-bit address
JMF	0:2563b0415d1f	1527	*
JMF	0:2563b0415d1f	1528	* \return none
JMF	0:2563b0415d1f	1529	*/
JMF	0:2563b0415d1f	1530	static void rf_set_address(uint8_t *address)
JMF	0:2563b0415d1f	1531	{
JMF	0:2563b0415d1f	1532	rf_if_lock();
JMF	0:2563b0415d1f	1533	/Wake up RF if sleeping/
JMF	0:2563b0415d1f	1534	if(rf_flags_check(RFF_ON) == 0)
JMF	0:2563b0415d1f	1535	{
JMF	0:2563b0415d1f	1536	rf_if_disable_slptr();
JMF	0:2563b0415d1f	1537	rf_poll_trx_state_change(TRX_OFF);
JMF	0:2563b0415d1f	1538	}
JMF	0:2563b0415d1f	1539	/Write address filter registers/
JMF	0:2563b0415d1f	1540	rf_if_write_ieee_addr_registers(address);
JMF	0:2563b0415d1f	1541	/RF back to sleep/
JMF	0:2563b0415d1f	1542	if(rf_flags_check(RFF_ON) == 0)
JMF	0:2563b0415d1f	1543	{
JMF	0:2563b0415d1f	1544	rf_if_enable_slptr();
JMF	0:2563b0415d1f	1545	}
JMF	0:2563b0415d1f	1546	rf_if_unlock();
JMF	0:2563b0415d1f	1547	}
JMF	0:2563b0415d1f	1548
JMF	0:2563b0415d1f	1549	/*
JMF	0:2563b0415d1f	1550	* \brief Function sets the RF channel.
JMF	0:2563b0415d1f	1551	*
JMF	0:2563b0415d1f	1552	* \param ch New channel
JMF	0:2563b0415d1f	1553	*
JMF	0:2563b0415d1f	1554	* \return none
JMF	0:2563b0415d1f	1555	*/
JMF	0:2563b0415d1f	1556	static void rf_channel_set(uint8_t ch)
JMF	0:2563b0415d1f	1557	{
JMF	0:2563b0415d1f	1558	rf_if_lock();
JMF	0:2563b0415d1f	1559	rf_phy_channel = ch;
JMF	0:2563b0415d1f	1560	if(ch < 0x1f)
JMF	0:2563b0415d1f	1561	rf_if_set_channel_register(ch);
JMF	0:2563b0415d1f	1562	rf_if_unlock();
JMF	0:2563b0415d1f	1563	}
JMF	0:2563b0415d1f	1564
JMF	0:2563b0415d1f	1565
JMF	0:2563b0415d1f	1566	/*
JMF	0:2563b0415d1f	1567	* \brief Function initialises the radio driver and resets the radio.
JMF	0:2563b0415d1f	1568	*
JMF	0:2563b0415d1f	1569	* \param none
JMF	0:2563b0415d1f	1570	*
JMF	0:2563b0415d1f	1571	* \return none
JMF	0:2563b0415d1f	1572	*/
JMF	0:2563b0415d1f	1573	static void rf_init(void)
JMF	0:2563b0415d1f	1574	{
JMF	0:2563b0415d1f	1575	/Reset RF module/
JMF	0:2563b0415d1f	1576	rf_if_reset_radio();
JMF	0:2563b0415d1f	1577
JMF	0:2563b0415d1f	1578	rf_if_lock();
JMF	0:2563b0415d1f	1579
JMF	0:2563b0415d1f	1580	/Write RF settings/
JMF	0:2563b0415d1f	1581	rf_write_settings();
JMF	0:2563b0415d1f	1582	/Initialise PHY mode/
JMF	0:2563b0415d1f	1583	rf_init_phy_mode();
JMF	0:2563b0415d1f	1584	/Clear RF flags/
JMF	0:2563b0415d1f	1585	rf_flags_reset();
JMF	0:2563b0415d1f	1586	/Set RF in TRX OFF state/
JMF	0:2563b0415d1f	1587	rf_if_change_trx_state(TRX_OFF);
JMF	0:2563b0415d1f	1588	/Set RF in PLL_ON state/
JMF	0:2563b0415d1f	1589	rf_if_change_trx_state(PLL_ON);
JMF	0:2563b0415d1f	1590	/Start receiver/
JMF	0:2563b0415d1f	1591	rf_receive();
JMF	0:2563b0415d1f	1592	/Read randomness, and add to seed/
JMF	0:2563b0415d1f	1593	randLIB_add_seed(rf_if_read_rnd());
JMF	0:2563b0415d1f	1594	/Start RF calibration timer/
JMF	0:2563b0415d1f	1595	rf_calibration_timer_start(RF_CALIBRATION_INTERVAL);
JMF	0:2563b0415d1f	1596
JMF	0:2563b0415d1f	1597	rf_if_unlock();
JMF	0:2563b0415d1f	1598	}
JMF	0:2563b0415d1f	1599
JMF	0:2563b0415d1f	1600	/**
JMF	0:2563b0415d1f	1601	* \brief Function gets called when MAC is setting radio off.
JMF	0:2563b0415d1f	1602	*
JMF	0:2563b0415d1f	1603	* \param none
JMF	0:2563b0415d1f	1604	*
JMF	0:2563b0415d1f	1605	* \return none
JMF	0:2563b0415d1f	1606	*/
JMF	0:2563b0415d1f	1607	static void rf_off(void)
JMF	0:2563b0415d1f	1608	{
JMF	0:2563b0415d1f	1609	if(rf_flags_check(RFF_ON))
JMF	0:2563b0415d1f	1610	{
JMF	0:2563b0415d1f	1611	rf_if_lock();
JMF	0:2563b0415d1f	1612	rf_cca_abort();
JMF	0:2563b0415d1f	1613	uint16_t while_counter = 0;
JMF	0:2563b0415d1f	1614	/Wait while receiving/
JMF	0:2563b0415d1f	1615	while(rf_if_read_trx_state() == BUSY_RX_AACK)
JMF	0:2563b0415d1f	1616	{
JMF	0:2563b0415d1f	1617	while_counter++;
JMF	0:2563b0415d1f	1618	if(while_counter == 0xffff)
JMF	0:2563b0415d1f	1619	break;
JMF	0:2563b0415d1f	1620	}
JMF	0:2563b0415d1f	1621	/RF state change: RX_AACK_ON->PLL_ON->TRX_OFF->SLEEP/
JMF	0:2563b0415d1f	1622	if(rf_if_read_trx_state() == RX_AACK_ON)
JMF	0:2563b0415d1f	1623	{
JMF	0:2563b0415d1f	1624	rf_if_change_trx_state(PLL_ON);
JMF	0:2563b0415d1f	1625	}
JMF	0:2563b0415d1f	1626	rf_if_change_trx_state(TRX_OFF);
JMF	0:2563b0415d1f	1627	rf_if_enable_slptr();
JMF	0:2563b0415d1f	1628
JMF	0:2563b0415d1f	1629	/Disable Antenna Diversity/
JMF	0:2563b0415d1f	1630	if(rf_use_antenna_diversity)
JMF	0:2563b0415d1f	1631	rf_if_disable_ant_div();
JMF	0:2563b0415d1f	1632	rf_if_unlock();
JMF	0:2563b0415d1f	1633	}
JMF	0:2563b0415d1f	1634
JMF	0:2563b0415d1f	1635	/Clears all flags/
JMF	0:2563b0415d1f	1636	rf_flags_reset();
JMF	0:2563b0415d1f	1637	}
JMF	0:2563b0415d1f	1638
JMF	0:2563b0415d1f	1639	/*
JMF	0:2563b0415d1f	1640	* \brief Function polls the RF state until it has changed to desired state.
JMF	0:2563b0415d1f	1641	*
JMF	0:2563b0415d1f	1642	* \param trx_state RF state
JMF	0:2563b0415d1f	1643	*
JMF	0:2563b0415d1f	1644	* \return none
JMF	0:2563b0415d1f	1645	*/
JMF	0:2563b0415d1f	1646	static void rf_poll_trx_state_change(rf_trx_states_t trx_state)
JMF	0:2563b0415d1f	1647	{
JMF	0:2563b0415d1f	1648	uint16_t while_counter = 0;
JMF	0:2563b0415d1f	1649	// XXX lock apparently not needed
JMF	0:2563b0415d1f	1650	rf_if_lock();
JMF	0:2563b0415d1f	1651
JMF	0:2563b0415d1f	1652	if(trx_state != RF_TX_START)
JMF	0:2563b0415d1f	1653	{
JMF	0:2563b0415d1f	1654	if(trx_state == FORCE_PLL_ON)
JMF	0:2563b0415d1f	1655	trx_state = PLL_ON;
JMF	0:2563b0415d1f	1656	else if(trx_state == FORCE_TRX_OFF)
JMF	0:2563b0415d1f	1657	trx_state = TRX_OFF;
JMF	0:2563b0415d1f	1658
JMF	0:2563b0415d1f	1659	while(rf_if_read_trx_state() != trx_state)
JMF	0:2563b0415d1f	1660	{
JMF	0:2563b0415d1f	1661	while_counter++;
JMF	0:2563b0415d1f	1662	if(while_counter == 0x1ff)
JMF	0:2563b0415d1f	1663	break;
JMF	0:2563b0415d1f	1664	}
JMF	0:2563b0415d1f	1665	}
JMF	0:2563b0415d1f	1666	rf_if_unlock();
JMF	0:2563b0415d1f	1667	}
JMF	0:2563b0415d1f	1668
JMF	0:2563b0415d1f	1669	/*
JMF	0:2563b0415d1f	1670	* \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO.
JMF	0:2563b0415d1f	1671	*
JMF	0:2563b0415d1f	1672	* \param data_ptr Pointer to TX data (excluding FCS)
JMF	0:2563b0415d1f	1673	* \param data_length Length of the TX data (excluding FCS)
JMF	0:2563b0415d1f	1674	* \param tx_handle Handle to transmission
JMF	0:2563b0415d1f	1675	* \return 0 Success
JMF	0:2563b0415d1f	1676	* \return -1 Busy
JMF	0:2563b0415d1f	1677	*/
JMF	0:2563b0415d1f	1678	static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol )
JMF	0:2563b0415d1f	1679	{
JMF	0:2563b0415d1f	1680	(void)data_protocol;
JMF	0:2563b0415d1f	1681	rf_if_lock();
JMF	0:2563b0415d1f	1682	/Check if transmitter is busy/
JMF	0:2563b0415d1f	1683	if(rf_if_read_trx_state() == BUSY_RX_AACK \|\| data_length > RF_MTU - 2)
JMF	0:2563b0415d1f	1684	{
JMF	0:2563b0415d1f	1685	rf_if_unlock();
JMF	0:2563b0415d1f	1686	/Return busy/
JMF	0:2563b0415d1f	1687	return -1;
JMF	0:2563b0415d1f	1688	}
JMF	0:2563b0415d1f	1689	else
JMF	0:2563b0415d1f	1690	{
JMF	0:2563b0415d1f	1691	expected_ack_sequence = -1;
JMF	0:2563b0415d1f	1692
JMF	0:2563b0415d1f	1693	/Nanostack has a static TX buffer, which will remain valid until we/
JMF	0:2563b0415d1f	1694	/generate a callback, so we just note the pointer for reading later./
JMF	0:2563b0415d1f	1695	rf_tx_data = data_ptr;
JMF	0:2563b0415d1f	1696	rf_tx_length = data_length;
JMF	0:2563b0415d1f	1697	/Start CCA timeout/
JMF	0:2563b0415d1f	1698	rf_cca_timer_start(RF_CCA_BASE_BACKOFF + randLIB_get_random_in_range(0, RF_CCA_RANDOM_BACKOFF));
JMF	0:2563b0415d1f	1699	/Store TX handle/
JMF	0:2563b0415d1f	1700	mac_tx_handle = tx_handle;
JMF	0:2563b0415d1f	1701	rf_if_unlock();
JMF	0:2563b0415d1f	1702	}
JMF	0:2563b0415d1f	1703
JMF	0:2563b0415d1f	1704	/Return success/
JMF	0:2563b0415d1f	1705	return 0;
JMF	0:2563b0415d1f	1706	}
JMF	0:2563b0415d1f	1707
JMF	0:2563b0415d1f	1708	/*
JMF	0:2563b0415d1f	1709	* \brief Function aborts CCA process.
JMF	0:2563b0415d1f	1710	*
JMF	0:2563b0415d1f	1711	* \param none
JMF	0:2563b0415d1f	1712	*
JMF	0:2563b0415d1f	1713	* \return none
JMF	0:2563b0415d1f	1714	*/
JMF	0:2563b0415d1f	1715	static void rf_cca_abort(void)
JMF	0:2563b0415d1f	1716	{
JMF	0:2563b0415d1f	1717	rf_cca_timer_stop();
JMF	0:2563b0415d1f	1718	rf_flags_clear(RFF_CCA);
JMF	0:2563b0415d1f	1719	rf_disable_static_frame_buffer_protection();
JMF	0:2563b0415d1f	1720	}
JMF	0:2563b0415d1f	1721
JMF	0:2563b0415d1f	1722	/*
JMF	0:2563b0415d1f	1723	* \brief Function starts the transmission of the frame.
JMF	0:2563b0415d1f	1724	*
JMF	0:2563b0415d1f	1725	* \param none
JMF	0:2563b0415d1f	1726	*
JMF	0:2563b0415d1f	1727	* \return none
JMF	0:2563b0415d1f	1728	*/
JMF	0:2563b0415d1f	1729	static void rf_start_tx(void)
JMF	0:2563b0415d1f	1730	{
JMF	0:2563b0415d1f	1731	/Only start transmitting from RX state/
JMF	0:2563b0415d1f	1732	uint8_t trx_state = rf_if_read_trx_state();
JMF	0:2563b0415d1f	1733	if(trx_state != RX_AACK_ON)
JMF	0:2563b0415d1f	1734	{
JMF	0:2563b0415d1f	1735	rf_disable_static_frame_buffer_protection();
JMF	0:2563b0415d1f	1736	if(device_driver.phy_tx_done_cb){
JMF	0:2563b0415d1f	1737	device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
JMF	0:2563b0415d1f	1738	}
JMF	0:2563b0415d1f	1739	}
JMF	0:2563b0415d1f	1740	else
JMF	0:2563b0415d1f	1741	{
JMF	0:2563b0415d1f	1742	/RF state change: ->PLL_ON->RF_TX_START/
JMF	0:2563b0415d1f	1743	rf_if_change_trx_state(FORCE_PLL_ON);
JMF	0:2563b0415d1f	1744	rf_flags_clear(RFF_RX);
JMF	0:2563b0415d1f	1745	/Now we're out of receive mode, can release protection/
JMF	0:2563b0415d1f	1746	rf_disable_static_frame_buffer_protection();
JMF	0:2563b0415d1f	1747	rf_if_enable_tx_end_interrupt();
JMF	0:2563b0415d1f	1748	rf_flags_set(RFF_TX);
JMF	0:2563b0415d1f	1749	rf_if_change_trx_state(RF_TX_START);
JMF	0:2563b0415d1f	1750	}
JMF	0:2563b0415d1f	1751	}
JMF	0:2563b0415d1f	1752
JMF	0:2563b0415d1f	1753	/*
JMF	0:2563b0415d1f	1754	* \brief Function sets the RF in RX state.
JMF	0:2563b0415d1f	1755	*
JMF	0:2563b0415d1f	1756	* \param none
JMF	0:2563b0415d1f	1757	*
JMF	0:2563b0415d1f	1758	* \return none
JMF	0:2563b0415d1f	1759	*/
JMF	0:2563b0415d1f	1760	static void rf_receive(void)
JMF	0:2563b0415d1f	1761	{
JMF	0:2563b0415d1f	1762	uint16_t while_counter = 0;
JMF	0:2563b0415d1f	1763	if(rf_flags_check(RFF_ON) == 0)
JMF	0:2563b0415d1f	1764	{
JMF	0:2563b0415d1f	1765	rf_on();
JMF	0:2563b0415d1f	1766	}
JMF	0:2563b0415d1f	1767	/If not yet in RX state set it/
JMF	0:2563b0415d1f	1768	if(rf_flags_check(RFF_RX) == 0)
JMF	0:2563b0415d1f	1769	{
JMF	0:2563b0415d1f	1770	rf_if_lock();
JMF	0:2563b0415d1f	1771	/Wait while receiving data/
JMF	0:2563b0415d1f	1772	while(rf_if_read_trx_state() == BUSY_RX_AACK)
JMF	0:2563b0415d1f	1773	{
JMF	0:2563b0415d1f	1774	while_counter++;
JMF	0:2563b0415d1f	1775	if(while_counter == 0xffff)
JMF	0:2563b0415d1f	1776	{
JMF	0:2563b0415d1f	1777	break;
JMF	0:2563b0415d1f	1778	}
JMF	0:2563b0415d1f	1779	}
JMF	0:2563b0415d1f	1780
JMF	0:2563b0415d1f	1781	rf_if_change_trx_state(PLL_ON);
JMF	0:2563b0415d1f	1782
JMF	0:2563b0415d1f	1783	if((rf_mode == RF_MODE_SNIFFER) \|\| (rf_mode == RF_MODE_ED))
JMF	0:2563b0415d1f	1784	{
JMF	0:2563b0415d1f	1785	rf_if_change_trx_state(RX_ON);
JMF	0:2563b0415d1f	1786	}
JMF	0:2563b0415d1f	1787	else
JMF	0:2563b0415d1f	1788	{
JMF	0:2563b0415d1f	1789	/ACK is always received in promiscuous mode to bypass address filters/
JMF	0:2563b0415d1f	1790	if(rf_rx_mode)
JMF	0:2563b0415d1f	1791	{
JMF	0:2563b0415d1f	1792	rf_rx_mode = 0;
JMF	0:2563b0415d1f	1793	rf_if_enable_promiscuous_mode();
JMF	0:2563b0415d1f	1794	}
JMF	0:2563b0415d1f	1795	else
JMF	0:2563b0415d1f	1796	{
JMF	0:2563b0415d1f	1797	rf_if_disable_promiscuous_mode();
JMF	0:2563b0415d1f	1798	}
JMF	0:2563b0415d1f	1799	rf_if_change_trx_state(RX_AACK_ON);
JMF	0:2563b0415d1f	1800	}
JMF	0:2563b0415d1f	1801	/If calibration timer was unable to calibrate the RF, run calibration now/
JMF	0:2563b0415d1f	1802	if(!rf_tuned)
JMF	0:2563b0415d1f	1803	{
JMF	0:2563b0415d1f	1804	/Start calibration. This can be done in states TRX_OFF, PLL_ON or in any receive state/
JMF	0:2563b0415d1f	1805	rf_if_calibration();
JMF	0:2563b0415d1f	1806	/RF is tuned now/
JMF	0:2563b0415d1f	1807	rf_tuned = 1;
JMF	0:2563b0415d1f	1808	}
JMF	0:2563b0415d1f	1809
JMF	0:2563b0415d1f	1810	rf_channel_set(rf_phy_channel);
JMF	0:2563b0415d1f	1811	rf_flags_set(RFF_RX);
JMF	0:2563b0415d1f	1812	// Don't receive packets when ED mode enabled
JMF	0:2563b0415d1f	1813	if (rf_mode != RF_MODE_ED)
JMF	0:2563b0415d1f	1814	{
JMF	0:2563b0415d1f	1815	rf_if_enable_rx_end_interrupt();
JMF	0:2563b0415d1f	1816	}
JMF	0:2563b0415d1f	1817	rf_if_unlock();
JMF	0:2563b0415d1f	1818	}
JMF	0:2563b0415d1f	1819	}
JMF	0:2563b0415d1f	1820
JMF	0:2563b0415d1f	1821	/*
JMF	0:2563b0415d1f	1822	* \brief Function calibrates the radio.
JMF	0:2563b0415d1f	1823	*
JMF	0:2563b0415d1f	1824	* \param none
JMF	0:2563b0415d1f	1825	*
JMF	0:2563b0415d1f	1826	* \return none
JMF	0:2563b0415d1f	1827	*/
JMF	0:2563b0415d1f	1828	static void rf_calibration_cb(void)
JMF	0:2563b0415d1f	1829	{
JMF	0:2563b0415d1f	1830	/clear tuned flag to start tuning in rf_receive/
JMF	0:2563b0415d1f	1831	rf_tuned = 0;
JMF	0:2563b0415d1f	1832	/If RF is in default receive state, start calibration/
JMF	0:2563b0415d1f	1833	if(rf_if_read_trx_state() == RX_AACK_ON)
JMF	0:2563b0415d1f	1834	{
JMF	0:2563b0415d1f	1835	rf_if_lock();
JMF	0:2563b0415d1f	1836	/Set RF in PLL_ON state/
JMF	0:2563b0415d1f	1837	rf_if_change_trx_state(PLL_ON);
JMF	0:2563b0415d1f	1838	/Set RF in TRX_OFF state to start PLL tuning/
JMF	0:2563b0415d1f	1839	rf_if_change_trx_state(TRX_OFF);
JMF	0:2563b0415d1f	1840	/Set RF in RX_ON state to calibrate/
JMF	0:2563b0415d1f	1841	rf_if_change_trx_state(RX_ON);
JMF	0:2563b0415d1f	1842	/Calibrate FTN/
JMF	0:2563b0415d1f	1843	rf_if_calibration();
JMF	0:2563b0415d1f	1844	/RF is tuned now/
JMF	0:2563b0415d1f	1845	rf_tuned = 1;
JMF	0:2563b0415d1f	1846	/Back to default receive state/
JMF	0:2563b0415d1f	1847	rf_flags_clear(RFF_RX);
JMF	0:2563b0415d1f	1848	rf_receive();
JMF	0:2563b0415d1f	1849	rf_if_unlock();
JMF	0:2563b0415d1f	1850	}
JMF	0:2563b0415d1f	1851	}
JMF	0:2563b0415d1f	1852
JMF	0:2563b0415d1f	1853	/*
JMF	0:2563b0415d1f	1854	* \brief Function sets RF_ON flag when radio is powered.
JMF	0:2563b0415d1f	1855	*
JMF	0:2563b0415d1f	1856	* \param none
JMF	0:2563b0415d1f	1857	*
JMF	0:2563b0415d1f	1858	* \return none
JMF	0:2563b0415d1f	1859	*/
JMF	0:2563b0415d1f	1860	static void rf_on(void)
JMF	0:2563b0415d1f	1861	{
JMF	0:2563b0415d1f	1862	/Set RFF_ON flag/
JMF	0:2563b0415d1f	1863	if(rf_flags_check(RFF_ON) == 0)
JMF	0:2563b0415d1f	1864	{
JMF	0:2563b0415d1f	1865	rf_if_lock();
JMF	0:2563b0415d1f	1866	rf_flags_set(RFF_ON);
JMF	0:2563b0415d1f	1867	/Enable Antenna diversity/
JMF	0:2563b0415d1f	1868	if(rf_use_antenna_diversity)
JMF	0:2563b0415d1f	1869	/Set ANT_EXT_SW_EN to enable controlling of antenna diversity/
JMF	0:2563b0415d1f	1870	rf_if_enable_ant_div();
JMF	0:2563b0415d1f	1871
JMF	0:2563b0415d1f	1872	/Wake up from sleep state/
JMF	0:2563b0415d1f	1873	rf_if_disable_slptr();
JMF	0:2563b0415d1f	1874	rf_poll_trx_state_change(TRX_OFF);
JMF	0:2563b0415d1f	1875	rf_if_unlock();
JMF	0:2563b0415d1f	1876	}
JMF	0:2563b0415d1f	1877	}
JMF	0:2563b0415d1f	1878
JMF	0:2563b0415d1f	1879	/*
JMF	0:2563b0415d1f	1880	* \brief Function handles the received ACK frame.
JMF	0:2563b0415d1f	1881	*
JMF	0:2563b0415d1f	1882	* \param seq_number Sequence number of received ACK
JMF	0:2563b0415d1f	1883	* \param data_pending Pending bit state in received ACK
JMF	0:2563b0415d1f	1884	*
JMF	0:2563b0415d1f	1885	* \return none
JMF	0:2563b0415d1f	1886	*/
JMF	0:2563b0415d1f	1887	static void rf_handle_ack(uint8_t seq_number, uint8_t data_pending)
JMF	0:2563b0415d1f	1888	{
JMF	0:2563b0415d1f	1889	phy_link_tx_status_e phy_status;
JMF	0:2563b0415d1f	1890	rf_if_lock();
JMF	0:2563b0415d1f	1891	/Received ACK sequence must be equal with transmitted packet sequence/
JMF	0:2563b0415d1f	1892	if(expected_ack_sequence == seq_number)
JMF	0:2563b0415d1f	1893	{
JMF	0:2563b0415d1f	1894	rf_ack_wait_timer_stop();
JMF	0:2563b0415d1f	1895	expected_ack_sequence = -1;
JMF	0:2563b0415d1f	1896	/When data pending bit in ACK frame is set, inform NET library/
JMF	0:2563b0415d1f	1897	if(data_pending)
JMF	0:2563b0415d1f	1898	phy_status = PHY_LINK_TX_DONE_PENDING;
JMF	0:2563b0415d1f	1899	else
JMF	0:2563b0415d1f	1900	phy_status = PHY_LINK_TX_DONE;
JMF	0:2563b0415d1f	1901	/Call PHY TX Done API/
JMF	0:2563b0415d1f	1902	if(device_driver.phy_tx_done_cb){
JMF	0:2563b0415d1f	1903	device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle,phy_status, 0, 0);
JMF	0:2563b0415d1f	1904	}
JMF	0:2563b0415d1f	1905	}
JMF	0:2563b0415d1f	1906	rf_if_unlock();
JMF	0:2563b0415d1f	1907	}
JMF	0:2563b0415d1f	1908
JMF	0:2563b0415d1f	1909	/*
JMF	0:2563b0415d1f	1910	* \brief Function is a call back for RX end interrupt.
JMF	0:2563b0415d1f	1911	*
JMF	0:2563b0415d1f	1912	* \param none
JMF	0:2563b0415d1f	1913	*
JMF	0:2563b0415d1f	1914	* \return none
JMF	0:2563b0415d1f	1915	*/
JMF	0:2563b0415d1f	1916	static void rf_handle_rx_end(void)
JMF	0:2563b0415d1f	1917	{
JMF	0:2563b0415d1f	1918	/Start receiver/
JMF	0:2563b0415d1f	1919	rf_flags_clear(RFF_RX);
JMF	0:2563b0415d1f	1920	rf_receive();
JMF	0:2563b0415d1f	1921
JMF	0:2563b0415d1f	1922	/Frame received interrupt/
JMF	0:2563b0415d1f	1923	if(!rf_flags_check(RFF_RX)) {
JMF	0:2563b0415d1f	1924	return;
JMF	0:2563b0415d1f	1925	}
JMF	0:2563b0415d1f	1926
JMF	0:2563b0415d1f	1927	static uint8_t rf_buffer[RF_MTU];
JMF	0:2563b0415d1f	1928	uint8_t rf_lqi, rf_ed;
JMF	0:2563b0415d1f	1929	int8_t rf_rssi;
JMF	0:2563b0415d1f	1930	bool crc_good;
JMF	0:2563b0415d1f	1931
JMF	0:2563b0415d1f	1932	/Read received packet/
JMF	0:2563b0415d1f	1933	uint8_t len = rf_if_read_packet(rf_buffer, &rf_lqi, &rf_ed, &crc_good);
JMF	0:2563b0415d1f	1934	if (len < 5 \|\| !crc_good) {
JMF	0:2563b0415d1f	1935	return;
JMF	0:2563b0415d1f	1936	}
JMF	0:2563b0415d1f	1937
JMF	0:2563b0415d1f	1938	/* Convert raw ED to dBm value (chip-dependent) */
JMF	0:2563b0415d1f	1939	rf_rssi = rf_if_scale_rssi(rf_ed);
JMF	0:2563b0415d1f	1940
JMF	0:2563b0415d1f	1941	/* Create a virtual LQI using received RSSI, forgetting actual HW LQI */
JMF	0:2563b0415d1f	1942	/* (should be done through PHY_EXTENSION_CONVERT_SIGNAL_INFO) */
JMF	0:2563b0415d1f	1943	rf_lqi = rf_scale_lqi(rf_rssi);
JMF	0:2563b0415d1f	1944
JMF	0:2563b0415d1f	1945	/Handle received ACK/
JMF	0:2563b0415d1f	1946	if((rf_buffer[0] & 0x07) == 0x02 && rf_mode != RF_MODE_SNIFFER)
JMF	0:2563b0415d1f	1947	{
JMF	0:2563b0415d1f	1948	/Check if data is pending/
JMF	0:2563b0415d1f	1949	bool pending = (rf_buffer[0] & 0x10);
JMF	0:2563b0415d1f	1950
JMF	0:2563b0415d1f	1951	/Send sequence number in ACK handler/
JMF	0:2563b0415d1f	1952	rf_handle_ack(rf_buffer[2], pending);
JMF	0:2563b0415d1f	1953	} else {
JMF	0:2563b0415d1f	1954	if( device_driver.phy_rx_cb ){
JMF	0:2563b0415d1f	1955	device_driver.phy_rx_cb(rf_buffer, len - 2, rf_lqi, rf_rssi, rf_radio_driver_id);
JMF	0:2563b0415d1f	1956	}
JMF	0:2563b0415d1f	1957	}
JMF	0:2563b0415d1f	1958	}
JMF	0:2563b0415d1f	1959
JMF	0:2563b0415d1f	1960	/*
JMF	0:2563b0415d1f	1961	* \brief Function is called when MAC is shutting down the radio.
JMF	0:2563b0415d1f	1962	*
JMF	0:2563b0415d1f	1963	* \param none
JMF	0:2563b0415d1f	1964	*
JMF	0:2563b0415d1f	1965	* \return none
JMF	0:2563b0415d1f	1966	*/
JMF	0:2563b0415d1f	1967	static void rf_shutdown(void)
JMF	0:2563b0415d1f	1968	{
JMF	0:2563b0415d1f	1969	/Call RF OFF/
JMF	0:2563b0415d1f	1970	rf_off();
JMF	0:2563b0415d1f	1971	}
JMF	0:2563b0415d1f	1972
JMF	0:2563b0415d1f	1973	/*
JMF	0:2563b0415d1f	1974	* \brief Function is a call back for TX end interrupt.
JMF	0:2563b0415d1f	1975	*
JMF	0:2563b0415d1f	1976	* \param none
JMF	0:2563b0415d1f	1977	*
JMF	0:2563b0415d1f	1978	* \return none
JMF	0:2563b0415d1f	1979	*/
JMF	0:2563b0415d1f	1980	static void rf_handle_tx_end(void)
JMF	0:2563b0415d1f	1981	{
JMF	0:2563b0415d1f	1982	rf_rx_mode = 0;
JMF	0:2563b0415d1f	1983	/If ACK is needed for this transmission/
JMF	0:2563b0415d1f	1984	if((rf_tx_data[0] & 0x20) && rf_flags_check(RFF_TX))
JMF	0:2563b0415d1f	1985	{
JMF	0:2563b0415d1f	1986	expected_ack_sequence = rf_tx_data[2];
JMF	0:2563b0415d1f	1987	rf_ack_wait_timer_start(rf_ack_wait_duration);
JMF	0:2563b0415d1f	1988	rf_rx_mode = 1;
JMF	0:2563b0415d1f	1989	}
JMF	0:2563b0415d1f	1990	rf_flags_clear(RFF_RX);
JMF	0:2563b0415d1f	1991	/Start receiver/
JMF	0:2563b0415d1f	1992	rf_receive();
JMF	0:2563b0415d1f	1993
JMF	0:2563b0415d1f	1994	/Call PHY TX Done API/
JMF	0:2563b0415d1f	1995	if(device_driver.phy_tx_done_cb){
JMF	0:2563b0415d1f	1996	device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 0, 0);
JMF	0:2563b0415d1f	1997	}
JMF	0:2563b0415d1f	1998	}
JMF	0:2563b0415d1f	1999
JMF	0:2563b0415d1f	2000	/*
JMF	0:2563b0415d1f	2001	* \brief Function is a call back for CCA ED done interrupt.
JMF	0:2563b0415d1f	2002	*
JMF	0:2563b0415d1f	2003	* \param none
JMF	0:2563b0415d1f	2004	*
JMF	0:2563b0415d1f	2005	* \return none
JMF	0:2563b0415d1f	2006	*/
JMF	0:2563b0415d1f	2007	static void rf_handle_cca_ed_done(void)
JMF	0:2563b0415d1f	2008	{
JMF	0:2563b0415d1f	2009	if (!rf_flags_check(RFF_CCA)) {
JMF	0:2563b0415d1f	2010	return;
JMF	0:2563b0415d1f	2011	}
JMF	0:2563b0415d1f	2012	rf_flags_clear(RFF_CCA);
JMF	0:2563b0415d1f	2013	/Check the result of CCA process/
JMF	0:2563b0415d1f	2014	if(rf_if_check_cca())
JMF	0:2563b0415d1f	2015	{
JMF	0:2563b0415d1f	2016	rf_start_tx();
JMF	0:2563b0415d1f	2017	}
JMF	0:2563b0415d1f	2018	else
JMF	0:2563b0415d1f	2019	{
JMF	0:2563b0415d1f	2020	/Re-enable reception/
JMF	0:2563b0415d1f	2021	rf_disable_static_frame_buffer_protection();
JMF	0:2563b0415d1f	2022	/Send CCA fail notification/
JMF	0:2563b0415d1f	2023	if(device_driver.phy_tx_done_cb){
JMF	0:2563b0415d1f	2024	device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
JMF	0:2563b0415d1f	2025	}
JMF	0:2563b0415d1f	2026	}
JMF	0:2563b0415d1f	2027	}
JMF	0:2563b0415d1f	2028
JMF	0:2563b0415d1f	2029	/*
JMF	0:2563b0415d1f	2030	* \brief Function returns the TX power variable.
JMF	0:2563b0415d1f	2031	*
JMF	0:2563b0415d1f	2032	* \param none
JMF	0:2563b0415d1f	2033	*
JMF	0:2563b0415d1f	2034	* \return radio_tx_power TX power variable
JMF	0:2563b0415d1f	2035	*/
JMF	0:2563b0415d1f	2036	MBED_UNUSED static uint8_t rf_tx_power_get(void)
JMF	0:2563b0415d1f	2037	{
JMF	0:2563b0415d1f	2038	return radio_tx_power;
JMF	0:2563b0415d1f	2039	}
JMF	0:2563b0415d1f	2040
JMF	0:2563b0415d1f	2041	/*
JMF	0:2563b0415d1f	2042	* \brief Function enables the usage of Antenna diversity.
JMF	0:2563b0415d1f	2043	*
JMF	0:2563b0415d1f	2044	* \param none
JMF	0:2563b0415d1f	2045	*
JMF	0:2563b0415d1f	2046	* \return 0 Success
JMF	0:2563b0415d1f	2047	*/
JMF	0:2563b0415d1f	2048	MBED_UNUSED static int8_t rf_enable_antenna_diversity(void)
JMF	0:2563b0415d1f	2049	{
JMF	0:2563b0415d1f	2050	int8_t ret_val = 0;
JMF	0:2563b0415d1f	2051	rf_use_antenna_diversity = 1;
JMF	0:2563b0415d1f	2052	return ret_val;
JMF	0:2563b0415d1f	2053	}
JMF	0:2563b0415d1f	2054
JMF	0:2563b0415d1f	2055	/*
JMF	0:2563b0415d1f	2056	* \brief Function gives the control of RF states to MAC.
JMF	0:2563b0415d1f	2057	*
JMF	0:2563b0415d1f	2058	* \param new_state RF state
JMF	0:2563b0415d1f	2059	* \param rf_channel RF channel
JMF	0:2563b0415d1f	2060	*
JMF	0:2563b0415d1f	2061	* \return 0 Success
JMF	0:2563b0415d1f	2062	*/
JMF	0:2563b0415d1f	2063	static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
JMF	0:2563b0415d1f	2064	{
JMF	0:2563b0415d1f	2065	int8_t ret_val = 0;
JMF	0:2563b0415d1f	2066	switch (new_state)
JMF	0:2563b0415d1f	2067	{
JMF	0:2563b0415d1f	2068	/Reset PHY driver and set to idle/
JMF	0:2563b0415d1f	2069	case PHY_INTERFACE_RESET:
JMF	0:2563b0415d1f	2070	break;
JMF	0:2563b0415d1f	2071	/Disable PHY Interface driver/
JMF	0:2563b0415d1f	2072	case PHY_INTERFACE_DOWN:
JMF	0:2563b0415d1f	2073	rf_shutdown();
JMF	0:2563b0415d1f	2074	break;
JMF	0:2563b0415d1f	2075	/Enable PHY Interface driver/
JMF	0:2563b0415d1f	2076	case PHY_INTERFACE_UP:
JMF	0:2563b0415d1f	2077	rf_mode = RF_MODE_NORMAL;
JMF	0:2563b0415d1f	2078	rf_channel_set(rf_channel);
JMF	0:2563b0415d1f	2079	rf_receive();
JMF	0:2563b0415d1f	2080	rf_if_enable_irq();
JMF	0:2563b0415d1f	2081	break;
JMF	0:2563b0415d1f	2082	/Enable wireless interface ED scan mode/
JMF	0:2563b0415d1f	2083	case PHY_INTERFACE_RX_ENERGY_STATE:
JMF	0:2563b0415d1f	2084	rf_mode = RF_MODE_ED;
JMF	0:2563b0415d1f	2085	rf_channel_set(rf_channel);
JMF	0:2563b0415d1f	2086	rf_receive();
JMF	0:2563b0415d1f	2087	rf_if_disable_irq();
JMF	0:2563b0415d1f	2088	// Read status to clear pending flags.
JMF	0:2563b0415d1f	2089	rf_if_read_register(IRQ_STATUS);
JMF	0:2563b0415d1f	2090	// Must set interrupt mask to be able to read IRQ status. GPIO interrupt is disabled.
JMF	0:2563b0415d1f	2091	rf_if_enable_cca_ed_done_interrupt();
JMF	0:2563b0415d1f	2092	// ED can be initiated by writing arbitrary value to PHY_ED_LEVEL
JMF	0:2563b0415d1f	2093	rf_if_write_register(PHY_ED_LEVEL, 0xff);
JMF	0:2563b0415d1f	2094	break;
JMF	0:2563b0415d1f	2095	case PHY_INTERFACE_SNIFFER_STATE: /*< Enable Sniffer state /
JMF	0:2563b0415d1f	2096	rf_mode = RF_MODE_SNIFFER;
JMF	0:2563b0415d1f	2097	rf_channel_set(rf_channel);
JMF	0:2563b0415d1f	2098	rf_flags_clear(RFF_RX);
JMF	0:2563b0415d1f	2099	rf_receive();
JMF	0:2563b0415d1f	2100	rf_if_enable_irq();
JMF	0:2563b0415d1f	2101	break;
JMF	0:2563b0415d1f	2102	}
JMF	0:2563b0415d1f	2103	return ret_val;
JMF	0:2563b0415d1f	2104	}
JMF	0:2563b0415d1f	2105
JMF	0:2563b0415d1f	2106	/*
JMF	0:2563b0415d1f	2107	* \brief Function controls the ACK pending, channel setting and energy detection.
JMF	0:2563b0415d1f	2108	*
JMF	0:2563b0415d1f	2109	* \param extension_type Type of control
JMF	0:2563b0415d1f	2110	* \param data_ptr Data from NET library
JMF	0:2563b0415d1f	2111	*
JMF	0:2563b0415d1f	2112	* \return 0 Success
JMF	0:2563b0415d1f	2113	*/
JMF	0:2563b0415d1f	2114	static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
JMF	0:2563b0415d1f	2115	{
JMF	0:2563b0415d1f	2116	switch (extension_type)
JMF	0:2563b0415d1f	2117	{
JMF	0:2563b0415d1f	2118	/Control MAC pending bit for Indirect data transmission/
JMF	0:2563b0415d1f	2119	case PHY_EXTENSION_CTRL_PENDING_BIT:
JMF	0:2563b0415d1f	2120	if(*data_ptr)
JMF	0:2563b0415d1f	2121	{
JMF	0:2563b0415d1f	2122	rf_if_ack_pending_ctrl(1);
JMF	0:2563b0415d1f	2123	}
JMF	0:2563b0415d1f	2124	else
JMF	0:2563b0415d1f	2125	{
JMF	0:2563b0415d1f	2126	rf_if_ack_pending_ctrl(0);
JMF	0:2563b0415d1f	2127	}
JMF	0:2563b0415d1f	2128	break;
JMF	0:2563b0415d1f	2129	/Return frame pending status/
JMF	0:2563b0415d1f	2130	case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS:
JMF	0:2563b0415d1f	2131	*data_ptr = rf_if_last_acked_pending();
JMF	0:2563b0415d1f	2132	break;
JMF	0:2563b0415d1f	2133	/Set channel/
JMF	0:2563b0415d1f	2134	case PHY_EXTENSION_SET_CHANNEL:
JMF	0:2563b0415d1f	2135	break;
JMF	0:2563b0415d1f	2136	/Read energy on the channel/
JMF	0:2563b0415d1f	2137	case PHY_EXTENSION_READ_CHANNEL_ENERGY:
JMF	0:2563b0415d1f	2138	// End of the ED measurement is indicated by CCA_ED_DONE
JMF	0:2563b0415d1f	2139	while (!(rf_if_read_register(IRQ_STATUS) & CCA_ED_DONE));
JMF	0:2563b0415d1f	2140	// RF input power: RSSI base level + 1[db] * PHY_ED_LEVEL
JMF	0:2563b0415d1f	2141	*data_ptr = rf_sensitivity + rf_if_read_register(PHY_ED_LEVEL);
JMF	0:2563b0415d1f	2142	// Read status to clear pending flags.
JMF	0:2563b0415d1f	2143	rf_if_read_register(IRQ_STATUS);
JMF	0:2563b0415d1f	2144	// Next ED measurement is started, next PHY_EXTENSION_READ_CHANNEL_ENERGY call will return the result.
JMF	0:2563b0415d1f	2145	rf_if_write_register(PHY_ED_LEVEL, 0xff);
JMF	0:2563b0415d1f	2146	break;
JMF	0:2563b0415d1f	2147	/Read status of the link/
JMF	0:2563b0415d1f	2148	case PHY_EXTENSION_READ_LINK_STATUS:
JMF	0:2563b0415d1f	2149	break;
JMF	0:2563b0415d1f	2150	default:
JMF	0:2563b0415d1f	2151	break;
JMF	0:2563b0415d1f	2152	}
JMF	0:2563b0415d1f	2153	return 0;
JMF	0:2563b0415d1f	2154	}
JMF	0:2563b0415d1f	2155
JMF	0:2563b0415d1f	2156	/*
JMF	0:2563b0415d1f	2157	* \brief Function sets the addresses to RF address filters.
JMF	0:2563b0415d1f	2158	*
JMF	0:2563b0415d1f	2159	* \param address_type Type of address
JMF	0:2563b0415d1f	2160	* \param address_ptr Pointer to given address
JMF	0:2563b0415d1f	2161	*
JMF	0:2563b0415d1f	2162	* \return 0 Success
JMF	0:2563b0415d1f	2163	*/
JMF	0:2563b0415d1f	2164	static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
JMF	0:2563b0415d1f	2165	{
JMF	0:2563b0415d1f	2166	int8_t ret_val = 0;
JMF	0:2563b0415d1f	2167	switch (address_type)
JMF	0:2563b0415d1f	2168	{
JMF	0:2563b0415d1f	2169	/Set 48-bit address/
JMF	0:2563b0415d1f	2170	case PHY_MAC_48BIT:
JMF	0:2563b0415d1f	2171	break;
JMF	0:2563b0415d1f	2172	/Set 64-bit address/
JMF	0:2563b0415d1f	2173	case PHY_MAC_64BIT:
JMF	0:2563b0415d1f	2174	rf_set_address(address_ptr);
JMF	0:2563b0415d1f	2175	break;
JMF	0:2563b0415d1f	2176	/Set 16-bit address/
JMF	0:2563b0415d1f	2177	case PHY_MAC_16BIT:
JMF	0:2563b0415d1f	2178	rf_set_short_adr(address_ptr);
JMF	0:2563b0415d1f	2179	break;
JMF	0:2563b0415d1f	2180	/Set PAN Id/
JMF	0:2563b0415d1f	2181	case PHY_MAC_PANID:
JMF	0:2563b0415d1f	2182	rf_set_pan_id(address_ptr);
JMF	0:2563b0415d1f	2183	break;
JMF	0:2563b0415d1f	2184	}
JMF	0:2563b0415d1f	2185	return ret_val;
JMF	0:2563b0415d1f	2186	}
JMF	0:2563b0415d1f	2187
JMF	0:2563b0415d1f	2188	/*
JMF	0:2563b0415d1f	2189	* \brief Function initialises the ACK wait time and returns the used PHY mode.
JMF	0:2563b0415d1f	2190	*
JMF	0:2563b0415d1f	2191	* \param none
JMF	0:2563b0415d1f	2192	*
JMF	0:2563b0415d1f	2193	* \return tmp Used PHY mode
JMF	0:2563b0415d1f	2194	*/
JMF	0:2563b0415d1f	2195	static void rf_init_phy_mode(void)
JMF	0:2563b0415d1f	2196	{
JMF	0:2563b0415d1f	2197	uint8_t tmp = 0;
JMF	0:2563b0415d1f	2198	uint8_t part = rf_if_read_part_num();
JMF	0:2563b0415d1f	2199	/Read used PHY Mode/
JMF	0:2563b0415d1f	2200	tmp = rf_if_read_register(TRX_CTRL_2);
JMF	0:2563b0415d1f	2201	/Set ACK wait time for used data rate/
JMF	0:2563b0415d1f	2202	if(part == PART_AT86RF212)
JMF	0:2563b0415d1f	2203	{
JMF	0:2563b0415d1f	2204	if((tmp & 0x1f) == 0x00)
JMF	0:2563b0415d1f	2205	{
JMF	0:2563b0415d1f	2206	rf_sensitivity = -110;
JMF	0:2563b0415d1f	2207	rf_ack_wait_duration = 938;
JMF	0:2563b0415d1f	2208	tmp = BPSK_20;
JMF	0:2563b0415d1f	2209	}
JMF	0:2563b0415d1f	2210	else if((tmp & 0x1f) == 0x04)
JMF	0:2563b0415d1f	2211	{
JMF	0:2563b0415d1f	2212	rf_sensitivity = -108;
JMF	0:2563b0415d1f	2213	rf_ack_wait_duration = 469;
JMF	0:2563b0415d1f	2214	tmp = BPSK_40;
JMF	0:2563b0415d1f	2215	}
JMF	0:2563b0415d1f	2216	else if((tmp & 0x1f) == 0x14)
JMF	0:2563b0415d1f	2217	{
JMF	0:2563b0415d1f	2218	rf_sensitivity = -108;
JMF	0:2563b0415d1f	2219	rf_ack_wait_duration = 469;
JMF	0:2563b0415d1f	2220	tmp = BPSK_40_ALT;
JMF	0:2563b0415d1f	2221	}
JMF	0:2563b0415d1f	2222	else if((tmp & 0x1f) == 0x08)
JMF	0:2563b0415d1f	2223	{
JMF	0:2563b0415d1f	2224	rf_sensitivity = -101;
JMF	0:2563b0415d1f	2225	rf_ack_wait_duration = 50;
JMF	0:2563b0415d1f	2226	tmp = OQPSK_SIN_RC_100;
JMF	0:2563b0415d1f	2227	}
JMF	0:2563b0415d1f	2228	else if((tmp & 0x1f) == 0x09)
JMF	0:2563b0415d1f	2229	{
JMF	0:2563b0415d1f	2230	rf_sensitivity = -99;
JMF	0:2563b0415d1f	2231	rf_ack_wait_duration = 30;
JMF	0:2563b0415d1f	2232	tmp = OQPSK_SIN_RC_200;
JMF	0:2563b0415d1f	2233	}
JMF	0:2563b0415d1f	2234	else if((tmp & 0x1f) == 0x18)
JMF	0:2563b0415d1f	2235	{
JMF	0:2563b0415d1f	2236	rf_sensitivity = -102;
JMF	0:2563b0415d1f	2237	rf_ack_wait_duration = 50;
JMF	0:2563b0415d1f	2238	tmp = OQPSK_RC_100;
JMF	0:2563b0415d1f	2239	}
JMF	0:2563b0415d1f	2240	else if((tmp & 0x1f) == 0x19)
JMF	0:2563b0415d1f	2241	{
JMF	0:2563b0415d1f	2242	rf_sensitivity = -100;
JMF	0:2563b0415d1f	2243	rf_ack_wait_duration = 30;
JMF	0:2563b0415d1f	2244	tmp = OQPSK_RC_200;
JMF	0:2563b0415d1f	2245	}
JMF	0:2563b0415d1f	2246	else if((tmp & 0x1f) == 0x0c)
JMF	0:2563b0415d1f	2247	{
JMF	0:2563b0415d1f	2248	rf_sensitivity = -100;
JMF	0:2563b0415d1f	2249	rf_ack_wait_duration = 20;
JMF	0:2563b0415d1f	2250	tmp = OQPSK_SIN_250;
JMF	0:2563b0415d1f	2251	}
JMF	0:2563b0415d1f	2252	else if((tmp & 0x1f) == 0x0d)
JMF	0:2563b0415d1f	2253	{
JMF	0:2563b0415d1f	2254	rf_sensitivity = -98;
JMF	0:2563b0415d1f	2255	rf_ack_wait_duration = 25;
JMF	0:2563b0415d1f	2256	tmp = OQPSK_SIN_500;
JMF	0:2563b0415d1f	2257	}
JMF	0:2563b0415d1f	2258	else if((tmp & 0x1f) == 0x0f)
JMF	0:2563b0415d1f	2259	{
JMF	0:2563b0415d1f	2260	rf_sensitivity = -98;
JMF	0:2563b0415d1f	2261	rf_ack_wait_duration = 25;
JMF	0:2563b0415d1f	2262	tmp = OQPSK_SIN_500_ALT;
JMF	0:2563b0415d1f	2263	}
JMF	0:2563b0415d1f	2264	else if((tmp & 0x1f) == 0x1c)
JMF	0:2563b0415d1f	2265	{
JMF	0:2563b0415d1f	2266	rf_sensitivity = -101;
JMF	0:2563b0415d1f	2267	rf_ack_wait_duration = 20;
JMF	0:2563b0415d1f	2268	tmp = OQPSK_RC_250;
JMF	0:2563b0415d1f	2269	}
JMF	0:2563b0415d1f	2270	else if((tmp & 0x1f) == 0x1d)
JMF	0:2563b0415d1f	2271	{
JMF	0:2563b0415d1f	2272	rf_sensitivity = -99;
JMF	0:2563b0415d1f	2273	rf_ack_wait_duration = 25;
JMF	0:2563b0415d1f	2274	tmp = OQPSK_RC_500;
JMF	0:2563b0415d1f	2275	}
JMF	0:2563b0415d1f	2276	else if((tmp & 0x1f) == 0x1f)
JMF	0:2563b0415d1f	2277	{
JMF	0:2563b0415d1f	2278	rf_sensitivity = -99;
JMF	0:2563b0415d1f	2279	rf_ack_wait_duration = 25;
JMF	0:2563b0415d1f	2280	tmp = OQPSK_RC_500_ALT;
JMF	0:2563b0415d1f	2281	}
JMF	0:2563b0415d1f	2282	else if((tmp & 0x3f) == 0x2A)
JMF	0:2563b0415d1f	2283	{
JMF	0:2563b0415d1f	2284	rf_sensitivity = -91;
JMF	0:2563b0415d1f	2285	rf_ack_wait_duration = 25;
JMF	0:2563b0415d1f	2286	tmp = OQPSK_SIN_RC_400_SCR_ON;
JMF	0:2563b0415d1f	2287	}
JMF	0:2563b0415d1f	2288	else if((tmp & 0x3f) == 0x0A)
JMF	0:2563b0415d1f	2289	{
JMF	0:2563b0415d1f	2290	rf_sensitivity = -91;
JMF	0:2563b0415d1f	2291	rf_ack_wait_duration = 25;
JMF	0:2563b0415d1f	2292	tmp = OQPSK_SIN_RC_400_SCR_OFF;
JMF	0:2563b0415d1f	2293	}
JMF	0:2563b0415d1f	2294	else if((tmp & 0x3f) == 0x3A)
JMF	0:2563b0415d1f	2295	{
JMF	0:2563b0415d1f	2296	rf_sensitivity = -97;
JMF	0:2563b0415d1f	2297	rf_ack_wait_duration = 25;
JMF	0:2563b0415d1f	2298	tmp = OQPSK_RC_400_SCR_ON;
JMF	0:2563b0415d1f	2299	}
JMF	0:2563b0415d1f	2300	else if((tmp & 0x3f) == 0x1A)
JMF	0:2563b0415d1f	2301	{
JMF	0:2563b0415d1f	2302	rf_sensitivity = -97;
JMF	0:2563b0415d1f	2303	rf_ack_wait_duration = 25;
JMF	0:2563b0415d1f	2304	tmp = OQPSK_RC_400_SCR_OFF;
JMF	0:2563b0415d1f	2305	}
JMF	0:2563b0415d1f	2306	else if((tmp & 0x3f) == 0x2E)
JMF	0:2563b0415d1f	2307	{
JMF	0:2563b0415d1f	2308	rf_sensitivity = -93;
JMF	0:2563b0415d1f	2309	rf_ack_wait_duration = 13;
JMF	0:2563b0415d1f	2310	tmp = OQPSK_SIN_1000_SCR_ON;
JMF	0:2563b0415d1f	2311	}
JMF	0:2563b0415d1f	2312	else if((tmp & 0x3f) == 0x0E)
JMF	0:2563b0415d1f	2313	{
JMF	0:2563b0415d1f	2314	rf_sensitivity = -93;
JMF	0:2563b0415d1f	2315	rf_ack_wait_duration = 13;
JMF	0:2563b0415d1f	2316	tmp = OQPSK_SIN_1000_SCR_OFF;
JMF	0:2563b0415d1f	2317	}
JMF	0:2563b0415d1f	2318	else if((tmp & 0x3f) == 0x3E)
JMF	0:2563b0415d1f	2319	{
JMF	0:2563b0415d1f	2320	rf_sensitivity = -95;
JMF	0:2563b0415d1f	2321	rf_ack_wait_duration = 13;
JMF	0:2563b0415d1f	2322	tmp = OQPSK_RC_1000_SCR_ON;
JMF	0:2563b0415d1f	2323	}
JMF	0:2563b0415d1f	2324	else if((tmp & 0x3f) == 0x1E)
JMF	0:2563b0415d1f	2325	{
JMF	0:2563b0415d1f	2326	rf_sensitivity = -95;
JMF	0:2563b0415d1f	2327	rf_ack_wait_duration = 13;
JMF	0:2563b0415d1f	2328	tmp = OQPSK_RC_1000_SCR_OFF;
JMF	0:2563b0415d1f	2329	}
JMF	0:2563b0415d1f	2330	}
JMF	0:2563b0415d1f	2331	else
JMF	0:2563b0415d1f	2332	{
JMF	0:2563b0415d1f	2333	rf_sensitivity = -101;
JMF	0:2563b0415d1f	2334	rf_ack_wait_duration = 20;
JMF	0:2563b0415d1f	2335	}
JMF	0:2563b0415d1f	2336	/Board design might reduces the sensitivity/
JMF	0:2563b0415d1f	2337	//rf_sensitivity += RF_SENSITIVITY_CALIBRATION;
JMF	0:2563b0415d1f	2338	}
JMF	0:2563b0415d1f	2339
JMF	0:2563b0415d1f	2340
JMF	0:2563b0415d1f	2341	static uint8_t rf_scale_lqi(int8_t rssi)
JMF	0:2563b0415d1f	2342	{
JMF	0:2563b0415d1f	2343	uint8_t scaled_lqi;
JMF	0:2563b0415d1f	2344
JMF	0:2563b0415d1f	2345	/rssi < RF sensitivity/
JMF	0:2563b0415d1f	2346	if(rssi < rf_sensitivity)
JMF	0:2563b0415d1f	2347	scaled_lqi=0;
JMF	0:2563b0415d1f	2348	/-91 dBm < rssi < -81 dBm (AT86RF233 XPro)/
JMF	0:2563b0415d1f	2349	/-90 dBm < rssi < -80 dBm (AT86RF212B XPro)/
JMF	0:2563b0415d1f	2350	else if(rssi < (rf_sensitivity + 10))
JMF	0:2563b0415d1f	2351	scaled_lqi=31;
JMF	0:2563b0415d1f	2352	/-81 dBm < rssi < -71 dBm (AT86RF233 XPro)/
JMF	0:2563b0415d1f	2353	/-80 dBm < rssi < -70 dBm (AT86RF212B XPro)/
JMF	0:2563b0415d1f	2354	else if(rssi < (rf_sensitivity + 20))
JMF	0:2563b0415d1f	2355	scaled_lqi=207;
JMF	0:2563b0415d1f	2356	/-71 dBm < rssi < -61 dBm (AT86RF233 XPro)/
JMF	0:2563b0415d1f	2357	/-70 dBm < rssi < -60 dBm (AT86RF212B XPro)/
JMF	0:2563b0415d1f	2358	else if(rssi < (rf_sensitivity + 30))
JMF	0:2563b0415d1f	2359	scaled_lqi=255;
JMF	0:2563b0415d1f	2360	/-61 dBm < rssi < -51 dBm (AT86RF233 XPro)/
JMF	0:2563b0415d1f	2361	/-60 dBm < rssi < -50 dBm (AT86RF212B XPro)/
JMF	0:2563b0415d1f	2362	else if(rssi < (rf_sensitivity + 40))
JMF	0:2563b0415d1f	2363	scaled_lqi=255;
JMF	0:2563b0415d1f	2364	/-51 dBm < rssi < -41 dBm (AT86RF233 XPro)/
JMF	0:2563b0415d1f	2365	/-50 dBm < rssi < -40 dBm (AT86RF212B XPro)/
JMF	0:2563b0415d1f	2366	else if(rssi < (rf_sensitivity + 50))
JMF	0:2563b0415d1f	2367	scaled_lqi=255;
JMF	0:2563b0415d1f	2368	/-41 dBm < rssi < -31 dBm (AT86RF233 XPro)/
JMF	0:2563b0415d1f	2369	/-40 dBm < rssi < -30 dBm (AT86RF212B XPro)/
JMF	0:2563b0415d1f	2370	else if(rssi < (rf_sensitivity + 60))
JMF	0:2563b0415d1f	2371	scaled_lqi=255;
JMF	0:2563b0415d1f	2372	/-31 dBm < rssi < -21 dBm (AT86RF233 XPro)/
JMF	0:2563b0415d1f	2373	/-30 dBm < rssi < -20 dBm (AT86RF212B XPro)/
JMF	0:2563b0415d1f	2374	else if(rssi < (rf_sensitivity + 70))
JMF	0:2563b0415d1f	2375	scaled_lqi=255;
JMF	0:2563b0415d1f	2376	/rssi > RF saturation/
JMF	0:2563b0415d1f	2377	else if(rssi > (rf_sensitivity + 80))
JMF	0:2563b0415d1f	2378	scaled_lqi=111;
JMF	0:2563b0415d1f	2379	/-21 dBm < rssi < -11 dBm (AT86RF233 XPro)/
JMF	0:2563b0415d1f	2380	/-20 dBm < rssi < -10 dBm (AT86RF212B XPro)/
JMF	0:2563b0415d1f	2381	else
JMF	0:2563b0415d1f	2382	scaled_lqi=255;
JMF	0:2563b0415d1f	2383
JMF	0:2563b0415d1f	2384	return scaled_lqi;
JMF	0:2563b0415d1f	2385	}
JMF	0:2563b0415d1f	2386
JMF	0:2563b0415d1f	2387	NanostackRfPhyAtmel::NanostackRfPhyAtmel(PinName spi_mosi, PinName spi_miso,
JMF	0:2563b0415d1f	2388	PinName spi_sclk, PinName spi_cs, PinName spi_rst, PinName spi_slp, PinName spi_irq,
JMF	0:2563b0415d1f	2389	PinName i2c_sda, PinName i2c_scl)
JMF	0:2563b0415d1f	2390	: _mac(i2c_sda, i2c_scl), _mac_addr(), _rf(NULL), _mac_set(false),
JMF	0:2563b0415d1f	2391	_spi_mosi(spi_mosi), _spi_miso(spi_miso), _spi_sclk(spi_sclk),
JMF	0:2563b0415d1f	2392	_spi_cs(spi_cs), _spi_rst(spi_rst), _spi_slp(spi_slp), _spi_irq(spi_irq)
JMF	0:2563b0415d1f	2393	{
JMF	0:2563b0415d1f	2394	_rf = new RFBits(_spi_mosi, _spi_miso, _spi_sclk, _spi_cs, _spi_rst, _spi_slp, _spi_irq);
JMF	0:2563b0415d1f	2395	}
JMF	0:2563b0415d1f	2396
JMF	0:2563b0415d1f	2397	NanostackRfPhyAtmel::~NanostackRfPhyAtmel()
JMF	0:2563b0415d1f	2398	{
JMF	0:2563b0415d1f	2399	delete _rf;
JMF	0:2563b0415d1f	2400	}
JMF	0:2563b0415d1f	2401
JMF	0:2563b0415d1f	2402	int8_t NanostackRfPhyAtmel::rf_register()
JMF	0:2563b0415d1f	2403	{
JMF	0:2563b0415d1f	2404	if (NULL == _rf) {
JMF	0:2563b0415d1f	2405	return -1;
JMF	0:2563b0415d1f	2406	}
JMF	0:2563b0415d1f	2407
JMF	0:2563b0415d1f	2408	rf_if_lock();
JMF	0:2563b0415d1f	2409
JMF	0:2563b0415d1f	2410	if (rf != NULL) {
JMF	0:2563b0415d1f	2411	rf_if_unlock();
JMF	0:2563b0415d1f	2412	error("Multiple registrations of NanostackRfPhyAtmel not supported");
JMF	0:2563b0415d1f	2413	return -1;
JMF	0:2563b0415d1f	2414	}
JMF	0:2563b0415d1f	2415
JMF	0:2563b0415d1f	2416	// Read the mac address if it hasn't been set by a user
JMF	0:2563b0415d1f	2417	rf = _rf;
JMF	0:2563b0415d1f	2418	if (!_mac_set) {
JMF	0:2563b0415d1f	2419	int ret = _mac.read_eui64((void*)_mac_addr);
JMF	0:2563b0415d1f	2420	if (ret < 0) {
JMF	0:2563b0415d1f	2421	rf = NULL;
JMF	0:2563b0415d1f	2422	rf_if_unlock();
JMF	0:2563b0415d1f	2423	return -1;
JMF	0:2563b0415d1f	2424	}
JMF	0:2563b0415d1f	2425	}
JMF	0:2563b0415d1f	2426
JMF	0:2563b0415d1f	2427	int8_t radio_id = rf_device_register(_mac_addr);
JMF	0:2563b0415d1f	2428	if (radio_id < 0) {
JMF	0:2563b0415d1f	2429	rf = NULL;
JMF	0:2563b0415d1f	2430	}
JMF	0:2563b0415d1f	2431
JMF	0:2563b0415d1f	2432	rf_if_unlock();
JMF	0:2563b0415d1f	2433	return radio_id;
JMF	0:2563b0415d1f	2434	}
JMF	0:2563b0415d1f	2435
JMF	0:2563b0415d1f	2436	void NanostackRfPhyAtmel::rf_unregister()
JMF	0:2563b0415d1f	2437	{
JMF	0:2563b0415d1f	2438	rf_if_lock();
JMF	0:2563b0415d1f	2439
JMF	0:2563b0415d1f	2440	if (NULL == rf) {
JMF	0:2563b0415d1f	2441	rf_if_unlock();
JMF	0:2563b0415d1f	2442	return;
JMF	0:2563b0415d1f	2443	}
JMF	0:2563b0415d1f	2444
JMF	0:2563b0415d1f	2445	rf_device_unregister();
JMF	0:2563b0415d1f	2446	rf = NULL;
JMF	0:2563b0415d1f	2447
JMF	0:2563b0415d1f	2448	rf_if_unlock();
JMF	0:2563b0415d1f	2449	}
JMF	0:2563b0415d1f	2450
JMF	0:2563b0415d1f	2451	void NanostackRfPhyAtmel::get_mac_address(uint8_t *mac)
JMF	0:2563b0415d1f	2452	{
JMF	0:2563b0415d1f	2453	rf_if_lock();
JMF	0:2563b0415d1f	2454
JMF	0:2563b0415d1f	2455	if (NULL == rf) {
JMF	0:2563b0415d1f	2456	error("NanostackRfPhyAtmel Must be registered to read mac address");
JMF	0:2563b0415d1f	2457	rf_if_unlock();
JMF	0:2563b0415d1f	2458	return;
JMF	0:2563b0415d1f	2459	}
JMF	0:2563b0415d1f	2460	memcpy((void)mac, (void)_mac_addr, sizeof(_mac_addr));
JMF	0:2563b0415d1f	2461
JMF	0:2563b0415d1f	2462	rf_if_unlock();
JMF	0:2563b0415d1f	2463	}
JMF	0:2563b0415d1f	2464
JMF	0:2563b0415d1f	2465	void NanostackRfPhyAtmel::set_mac_address(uint8_t *mac)
JMF	0:2563b0415d1f	2466	{
JMF	0:2563b0415d1f	2467	rf_if_lock();
JMF	0:2563b0415d1f	2468
JMF	0:2563b0415d1f	2469	if (NULL != rf) {
JMF	0:2563b0415d1f	2470	error("NanostackRfPhyAtmel cannot change mac address when running");
JMF	0:2563b0415d1f	2471	rf_if_unlock();
JMF	0:2563b0415d1f	2472	return;
JMF	0:2563b0415d1f	2473	}
JMF	0:2563b0415d1f	2474	memcpy((void)_mac_addr, (void)mac, sizeof(_mac_addr));
JMF	0:2563b0415d1f	2475	_mac_set = true;
JMF	0:2563b0415d1f	2476
JMF	0:2563b0415d1f	2477	rf_if_unlock();
JMF	0:2563b0415d1f	2478	}
JMF	0:2563b0415d1f	2479

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Type:	Library
Created:	19 Apr 2017
Imports:	230
Forks:	2
Commits:	6
Dependents:	2
Dependencies:	1
Followers:	2

The code in this repository is Apache licensed.

atmel-rf-driver/source/NanostackRfPhyAtmel.cpp@5:391eac6a0a94, 2017-04-23 (annotated)

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