Satellite Observers Workbench. NOT yet complete, just published for forum posters to \"cherry pick\" pieces of code as requiered as an example.

Dependencies:   mbed

Committer:
AjK
Date:
Mon Oct 11 10:34:55 2010 +0000
Revision:
0:0a841b89d614
Totally Alpha quality as this project isn\t completed. Just publishing it as it answers many questions asked in the forums

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AjK 0:0a841b89d614 1 /****************************************************************************
AjK 0:0a841b89d614 2 * Copyright 2010 Andy Kirkham, Stellar Technologies Ltd
AjK 0:0a841b89d614 3 *
AjK 0:0a841b89d614 4 * This file is part of the Satellite Observers Workbench (SOWB).
AjK 0:0a841b89d614 5 *
AjK 0:0a841b89d614 6 * SOWB is free software: you can redistribute it and/or modify
AjK 0:0a841b89d614 7 * it under the terms of the GNU General Public License as published by
AjK 0:0a841b89d614 8 * the Free Software Foundation, either version 3 of the License, or
AjK 0:0a841b89d614 9 * (at your option) any later version.
AjK 0:0a841b89d614 10 *
AjK 0:0a841b89d614 11 * SOWB is distributed in the hope that it will be useful,
AjK 0:0a841b89d614 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
AjK 0:0a841b89d614 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
AjK 0:0a841b89d614 14 * GNU General Public License for more details.
AjK 0:0a841b89d614 15 *
AjK 0:0a841b89d614 16 * You should have received a copy of the GNU General Public License
AjK 0:0a841b89d614 17 * along with SOWB. If not, see <http://www.gnu.org/licenses/>.
AjK 0:0a841b89d614 18 *
AjK 0:0a841b89d614 19 * $Id: main.cpp 5 2010-07-12 20:51:11Z ajk $
AjK 0:0a841b89d614 20 *
AjK 0:0a841b89d614 21 ***************************************************************************/
AjK 0:0a841b89d614 22
AjK 0:0a841b89d614 23 #include "sowb.h"
AjK 0:0a841b89d614 24 #include "debug.h"
AjK 0:0a841b89d614 25 #include "dma.h"
AjK 0:0a841b89d614 26
AjK 0:0a841b89d614 27 uint32_t channel_in_use_flags = 0;
AjK 0:0a841b89d614 28
AjK 0:0a841b89d614 29 /* Declare callback functions here before placing
AjK 0:0a841b89d614 30 in the array below. */
AjK 0:0a841b89d614 31 int flash_read_dma0_irq(int);
AjK 0:0a841b89d614 32 int flash_read_dma1_irq(int);
AjK 0:0a841b89d614 33 int flash_write_dma0_irq(int);
AjK 0:0a841b89d614 34
AjK 0:0a841b89d614 35 /* Make sure each array definition below ends with
AjK 0:0a841b89d614 36 a NULL,NULL struct to mark the end of the array. */
AjK 0:0a841b89d614 37
AjK 0:0a841b89d614 38 const DMA_CALLBACKS dma_channel0[] = {
AjK 0:0a841b89d614 39 { flash_read_dma0_irq, flash_read_dma0_irq },
AjK 0:0a841b89d614 40 { flash_write_dma0_irq, flash_write_dma0_irq },
AjK 0:0a841b89d614 41 { NULL, NULL }
AjK 0:0a841b89d614 42 };
AjK 0:0a841b89d614 43
AjK 0:0a841b89d614 44 const DMA_CALLBACKS dma_channel1[] = {
AjK 0:0a841b89d614 45 { flash_read_dma1_irq, flash_read_dma1_irq },
AjK 0:0a841b89d614 46 { NULL, NULL }
AjK 0:0a841b89d614 47 };
AjK 0:0a841b89d614 48
AjK 0:0a841b89d614 49 const DMA_CALLBACKS dma_channel2[] = {
AjK 0:0a841b89d614 50 { NULL, NULL }
AjK 0:0a841b89d614 51 };
AjK 0:0a841b89d614 52
AjK 0:0a841b89d614 53 const DMA_CALLBACKS dma_channel3[] = {
AjK 0:0a841b89d614 54 { NULL, NULL }
AjK 0:0a841b89d614 55 };
AjK 0:0a841b89d614 56
AjK 0:0a841b89d614 57 const DMA_CALLBACKS dma_channel4[] = {
AjK 0:0a841b89d614 58 { NULL, NULL }
AjK 0:0a841b89d614 59 };
AjK 0:0a841b89d614 60
AjK 0:0a841b89d614 61 const DMA_CALLBACKS dma_channel5[] = {
AjK 0:0a841b89d614 62 { NULL, NULL }
AjK 0:0a841b89d614 63 };
AjK 0:0a841b89d614 64
AjK 0:0a841b89d614 65 const DMA_CALLBACKS dma_channel6[] = {
AjK 0:0a841b89d614 66 { NULL, NULL }
AjK 0:0a841b89d614 67 };
AjK 0:0a841b89d614 68
AjK 0:0a841b89d614 69 const DMA_CALLBACKS dma_channel7[] = {
AjK 0:0a841b89d614 70 { NULL, NULL }
AjK 0:0a841b89d614 71 };
AjK 0:0a841b89d614 72
AjK 0:0a841b89d614 73 /* Don't change anything below here. */
AjK 0:0a841b89d614 74
AjK 0:0a841b89d614 75 /* An array of pointers to the channel ISR handlers. */
AjK 0:0a841b89d614 76 const DMA_CALLBACKS *dma_channels[8] = {
AjK 0:0a841b89d614 77 dma_channel0, dma_channel1, dma_channel2, dma_channel3,
AjK 0:0a841b89d614 78 dma_channel4, dma_channel5, dma_channel6, dma_channel7
AjK 0:0a841b89d614 79 };
AjK 0:0a841b89d614 80
AjK 0:0a841b89d614 81 /** DMA_IRQHandler
AjK 0:0a841b89d614 82 */
AjK 0:0a841b89d614 83 extern "C" void DMA_IRQHandler(void) __irq {
AjK 0:0a841b89d614 84 for (int channel_number = 0; channel_number < 8; channel_number++) {
AjK 0:0a841b89d614 85 if (LPC_GPDMA->DMACIntStat & (1UL << channel_number)) {
AjK 0:0a841b89d614 86 if (LPC_GPDMA->DMACIntTCStat & (1UL << channel_number)) {
AjK 0:0a841b89d614 87 int irq_idx = 0;
AjK 0:0a841b89d614 88 while (dma_channels[channel_number][irq_idx].TcCallback != NULL) {
AjK 0:0a841b89d614 89 if ((dma_channels[channel_number][irq_idx].TcCallback)(channel_number)) {
AjK 0:0a841b89d614 90 LPC_GPDMA->DMACIntTCClear = (1UL << channel_number);
AjK 0:0a841b89d614 91 break;
AjK 0:0a841b89d614 92 }
AjK 0:0a841b89d614 93 irq_idx++;
AjK 0:0a841b89d614 94 }
AjK 0:0a841b89d614 95 }
AjK 0:0a841b89d614 96 if (LPC_GPDMA->DMACIntErrStat & (1UL << channel_number)) {
AjK 0:0a841b89d614 97 int irq_idx = 0;
AjK 0:0a841b89d614 98 while (dma_channels[channel_number][irq_idx].ErrCallback != NULL) {
AjK 0:0a841b89d614 99 if ((dma_channels[channel_number][irq_idx].ErrCallback)(channel_number)) {
AjK 0:0a841b89d614 100 LPC_GPDMA->DMACIntErrClr = (1UL << channel_number);
AjK 0:0a841b89d614 101 break;
AjK 0:0a841b89d614 102 }
AjK 0:0a841b89d614 103 irq_idx++;
AjK 0:0a841b89d614 104 }
AjK 0:0a841b89d614 105 }
AjK 0:0a841b89d614 106 }
AjK 0:0a841b89d614 107 }
AjK 0:0a841b89d614 108
AjK 0:0a841b89d614 109 /* IRQ should be handled by now, check to make sure. */
AjK 0:0a841b89d614 110 if (LPC_GPDMA->DMACIntStat) {
AjK 0:0a841b89d614 111 LPC_GPDMA->DMACIntTCClear = (uint32_t)0xFF; /* If not, clear anyway! */
AjK 0:0a841b89d614 112 }
AjK 0:0a841b89d614 113 if (LPC_GPDMA->DMACIntErrStat) {
AjK 0:0a841b89d614 114 LPC_GPDMA->DMACIntErrClr = (uint32_t)0xFF; /* If not, clear anyway! */
AjK 0:0a841b89d614 115 }
AjK 0:0a841b89d614 116 }
AjK 0:0a841b89d614 117
AjK 0:0a841b89d614 118
AjK 0:0a841b89d614 119 /** DMA_init
AjK 0:0a841b89d614 120 */
AjK 0:0a841b89d614 121 void DMA_init(void) {
AjK 0:0a841b89d614 122 DEBUG_INIT_START;
AjK 0:0a841b89d614 123 LPC_SC->PCONP |= (1UL << 29);
AjK 0:0a841b89d614 124 LPC_GPDMA->DMACConfig = 1;
AjK 0:0a841b89d614 125 NVIC_SetVector(DMA_IRQn, (uint32_t)DMA_IRQHandler);
AjK 0:0a841b89d614 126 NVIC_EnableIRQ(DMA_IRQn);
AjK 0:0a841b89d614 127 DEBUG_INIT_END;
AjK 0:0a841b89d614 128 }
AjK 0:0a841b89d614 129
AjK 0:0a841b89d614 130 /** DMA_process
AjK 0:0a841b89d614 131 */
AjK 0:0a841b89d614 132 void DMA_process(void) {
AjK 0:0a841b89d614 133 /* Nothing to do. */
AjK 0:0a841b89d614 134 }
AjK 0:0a841b89d614 135
AjK 0:0a841b89d614 136 /** dma_request_channel
AjK 0:0a841b89d614 137 *
AjK 0:0a841b89d614 138 * Used to request control of a DMA channel. Allows modules
AjK 0:0a841b89d614 139 * to share channels if needed.
AjK 0:0a841b89d614 140 *
AjK 0:0a841b89d614 141 * @param int channel The channel being requested.
AjK 0:0a841b89d614 142 * @return bool true if given control, false if another is already in control.
AjK 0:0a841b89d614 143 */
AjK 0:0a841b89d614 144 bool DMA_request_channel(int channel) {
AjK 0:0a841b89d614 145 if (!(channel_in_use_flags & (1UL << channel))) {
AjK 0:0a841b89d614 146 channel_in_use_flags |= (1UL << channel);
AjK 0:0a841b89d614 147 return true;
AjK 0:0a841b89d614 148 }
AjK 0:0a841b89d614 149 return false;
AjK 0:0a841b89d614 150 }
AjK 0:0a841b89d614 151
AjK 0:0a841b89d614 152 /** dma_release_channel
AjK 0:0a841b89d614 153 *
AjK 0:0a841b89d614 154 * Used to release a previously requested channel.
AjK 0:0a841b89d614 155 *
AjK 0:0a841b89d614 156 * @param int channel The channel to release.
AjK 0:0a841b89d614 157 */
AjK 0:0a841b89d614 158 void DMA_release_channel(int channel) {
AjK 0:0a841b89d614 159 channel_in_use_flags &= ~(1UL << channel);
AjK 0:0a841b89d614 160 }
AjK 0:0a841b89d614 161