DATALUTS.cpp

00001 /*
00002     Copyright (c) 2010 Andy Kirkham
00003  
00004     Permission is hereby granted, free of charge, to any person obtaining a copy
00005     of this software and associated documentation files (the "Software"), to deal
00006     in the Software without restriction, including without limitation the rights
00007     to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
00008     copies of the Software, and to permit persons to whom the Software is
00009     furnished to do so, subject to the following conditions:
00010  
00011     The above copyright notice and this permission notice shall be included in
00012     all copies or substantial portions of the Software.
00013  
00014     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
00015     IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
00016     FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
00017     AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
00018     LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
00019     OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
00020     THE SOFTWARE.
00021 */
00022 
00023 #include "MODDMA.h"
00024 
00025 #ifndef MBED_H
00026 #include "mbed.h"
00027 #endif
00028 
00029 #ifndef MODDMA_CONFIG_H
00030 #include "CONFIG.h"
00031 #endif
00032 
00033 namespace AjK {
00034 
00035 uint32_t
00036 MODDMA::LUTPerAddr(int n)
00037 {
00038     const uint32_t lut[] = { 
00039           (uint32_t)&LPC_SSP0->DR         // SSP0 Tx
00040         , (uint32_t)&LPC_SSP0->DR         // SSP0 Rx
00041         , (uint32_t)&LPC_SSP1->DR         // SSP1 Tx
00042         , (uint32_t)&LPC_SSP1->DR         // SSP1 Rx
00043         , (uint32_t)&LPC_ADC->ADGDR       // ADC
00044         , (uint32_t)&LPC_I2S->I2STXFIFO   // I2S Tx
00045         , (uint32_t)&LPC_I2S->I2SRXFIFO   // I2S Rx
00046         , (uint32_t)&LPC_DAC->DACR        // DAC
00047         , (uint32_t)&LPC_UART0->THR       // UART0 Tx
00048         , (uint32_t)&LPC_UART0->RBR       // UART0 Rx
00049         , (uint32_t)&LPC_UART1->THR       // UART1 Tx
00050         , (uint32_t)&LPC_UART1->RBR       // UART1 Rx
00051         , (uint32_t)&LPC_UART2->THR       // UART2 Tx
00052         , (uint32_t)&LPC_UART2->RBR       // UART2 Rx
00053         , (uint32_t)&LPC_UART3->THR       // UART3 Tx
00054         , (uint32_t)&LPC_UART3->RBR       // UART3 Rx
00055         , (uint32_t)&LPC_TIM0->MR0        // MAT0.0
00056         , (uint32_t)&LPC_TIM0->MR1        // MAT0.1
00057         , (uint32_t)&LPC_TIM1->MR0        // MAT1.0
00058         , (uint32_t)&LPC_TIM1->MR1        // MAT1.1
00059         , (uint32_t)&LPC_TIM2->MR0        // MAT2.0
00060         , (uint32_t)&LPC_TIM2->MR1        // MAT2.1
00061         , (uint32_t)&LPC_TIM3->MR0        // MAT3.0
00062         , (uint32_t)&LPC_TIM3->MR1        // MAT3.1   
00063     };
00064     return lut[n & 0xFF];    
00065 }
00066 
00067 uint32_t
00068 MODDMA::Channel_p(int channel)
00069 {
00070     const uint32_t lut[] = {
00071           (uint32_t)LPC_GPDMACH0
00072         , (uint32_t)LPC_GPDMACH1
00073         , (uint32_t)LPC_GPDMACH2
00074         , (uint32_t)LPC_GPDMACH3
00075         , (uint32_t)LPC_GPDMACH4
00076         , (uint32_t)LPC_GPDMACH5
00077         , (uint32_t)LPC_GPDMACH6
00078         , (uint32_t)LPC_GPDMACH7
00079     };
00080     return lut[channel & 0xFF];
00081 }
00082 
00083 uint8_t
00084 MODDMA::LUTPerBurst(int n)
00085 {
00086     const uint8_t lut[] = {
00087           (uint8_t)_4        // SSP0 Tx 
00088         , (uint8_t)_4        // SSP0 Rx
00089         , (uint8_t)_4        // SSP1 Tx
00090         , (uint8_t)_4        // SSP1 Rx
00091         , (uint8_t)_1        // ADC
00092         , (uint8_t)_32       // I2S channel 0
00093         , (uint8_t)_32      // I2S channel 1
00094         , (uint8_t)_1       // DAC
00095         , (uint8_t)_1       // UART0 Tx
00096         , (uint8_t)_1       // UART0 Rx
00097         , (uint8_t)_1       // UART1 Tx
00098         , (uint8_t)_1       // UART1 Rx
00099         , (uint8_t)_1       // UART2 Tx
00100         , (uint8_t)_1       // UART2 Rx
00101         , (uint8_t)_1       // UART3 Tx
00102         , (uint8_t)_1       // UART3 Rx
00103         , (uint8_t)_1       // MAT0.0
00104         , (uint8_t)_1       // MAT0.1
00105         , (uint8_t)_1       // MAT1.0
00106         , (uint8_t)_1       // MAT1.1
00107         , (uint8_t)_1       // MAT2.0
00108         , (uint8_t)_1       // MAT2.1
00109         , (uint8_t)_1       // MAT3.0
00110         , (uint8_t)_1       // MAT3.1
00111     };
00112     return lut[n & 0xFFF];
00113 }
00114 
00115 uint8_t
00116 MODDMA::LUTPerWid(int n)
00117 {
00118     const uint8_t lut[] = {
00119           (uint8_t)byte       // SSP0 Tx
00120         , (uint8_t)byte       // SSP0 Rx
00121         , (uint8_t)byte       // SSP1 Tx
00122         , (uint8_t)byte       // SSP1 Rx
00123         , (uint8_t)word       // ADC
00124         , (uint8_t)word      // I2S channel 0
00125         , (uint8_t)word      // I2S channel 1
00126         , (uint8_t)word      // DAC 
00127         , (uint8_t)byte      // UART0 Tx
00128         , (uint8_t)byte      // UART0 Rx
00129         , (uint8_t)byte      // UART1 Tx
00130         , (uint8_t)byte      // UART1 Rx
00131         , (uint8_t)byte      // UART2 Tx
00132         , (uint8_t)byte      // UART2 Rx
00133         , (uint8_t)byte      // UART3 Tx
00134         , (uint8_t)byte      // UART3 Rx  
00135         , (uint8_t)word      // MAT0.0
00136         , (uint8_t)word      // MAT0.1
00137         , (uint8_t)word      // MAT1.0
00138         , (uint8_t)word      // MAT1.1
00139         , (uint8_t)word      // MAT2.0
00140         , (uint8_t)word      // MAT2.1
00141         , (uint8_t)word      // MAT3.0
00142         , (uint8_t)word      // MAT3.1  
00143     };
00144     return lut[n & 0xFFF];
00145 }
00146 
00147 }; // namespace AjK ends