Andy K / MODDMA

MODDMA GPDMA Controller New features: transfer pins to memory buffer under periodic timer control and send double buffers to DAC

Dependents:   FirstTest WaveSim IO-dma-memmem DACDMAfuncgenlib ... more

SETUP.cpp@11:19009be5a0e7, 2011-03-13 (annotated)

Committer:
AjK
Date:
Sun Mar 13 12:46:55 2011 +0000
Revision:
11:19009be5a0e7
Parent:
8:cb4d323ce6fd
Child:
12:1dfee7208043
1.7 See changeLog.c

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AjK 8:cb4d323ce6fd 1 /*
AjK 8:cb4d323ce6fd 2 Copyright (c) 2010 Andy Kirkham
AjK 8:cb4d323ce6fd 3
AjK 8:cb4d323ce6fd 4 Permission is hereby granted, free of charge, to any person obtaining a copy
AjK 8:cb4d323ce6fd 5 of this software and associated documentation files (the "Software"), to deal
AjK 8:cb4d323ce6fd 6 in the Software without restriction, including without limitation the rights
AjK 8:cb4d323ce6fd 7 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
AjK 8:cb4d323ce6fd 8 copies of the Software, and to permit persons to whom the Software is
AjK 8:cb4d323ce6fd 9 furnished to do so, subject to the following conditions:
AjK 8:cb4d323ce6fd 10
AjK 8:cb4d323ce6fd 11 The above copyright notice and this permission notice shall be included in
AjK 8:cb4d323ce6fd 12 all copies or substantial portions of the Software.
AjK 8:cb4d323ce6fd 13
AjK 8:cb4d323ce6fd 14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
AjK 8:cb4d323ce6fd 15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
AjK 8:cb4d323ce6fd 16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AjK 8:cb4d323ce6fd 17 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
AjK 8:cb4d323ce6fd 18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
AjK 8:cb4d323ce6fd 19 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
AjK 8:cb4d323ce6fd 20 THE SOFTWARE.
AjK 8:cb4d323ce6fd 21 */
AjK 8:cb4d323ce6fd 22
AjK 8:cb4d323ce6fd 23 #include "MODDMA.h"
AjK 8:cb4d323ce6fd 24
AjK 8:cb4d323ce6fd 25 namespace AjK {
AjK 8:cb4d323ce6fd 26
AjK 8:cb4d323ce6fd 27 uint32_t
AjK 8:cb4d323ce6fd 28 MODDMA::Setup(MODDMA_Config *config)
AjK 8:cb4d323ce6fd 29 {
AjK 8:cb4d323ce6fd 30 LPC_GPDMACH_TypeDef *pChannel = (LPC_GPDMACH_TypeDef *)Channel_p( config->channelNum() );
AjK 8:cb4d323ce6fd 31
AjK 8:cb4d323ce6fd 32 setups[config->channelNum() & 0x7] = config;
AjK 8:cb4d323ce6fd 33
AjK 8:cb4d323ce6fd 34 // Reset the Interrupt status
AjK 8:cb4d323ce6fd 35 LPC_GPDMA->DMACIntTCClear = IntTCClear_Ch( config->channelNum() );
AjK 8:cb4d323ce6fd 36 LPC_GPDMA->DMACIntErrClr = IntErrClr_Ch ( config->channelNum() );
AjK 8:cb4d323ce6fd 37
AjK 8:cb4d323ce6fd 38 // Clear DMA configure
AjK 8:cb4d323ce6fd 39 pChannel->DMACCControl = 0x00;
AjK 8:cb4d323ce6fd 40 pChannel->DMACCConfig = 0x00;
AjK 8:cb4d323ce6fd 41
AjK 8:cb4d323ce6fd 42 // Assign Linker List Item value
AjK 8:cb4d323ce6fd 43 pChannel->DMACCLLI = config->dmaLLI();
AjK 8:cb4d323ce6fd 44
AjK 8:cb4d323ce6fd 45 // Set value to Channel Control Registers
AjK 8:cb4d323ce6fd 46 switch (config->transferType()) {
AjK 8:cb4d323ce6fd 47
AjK 8:cb4d323ce6fd 48 // Memory to memory
AjK 8:cb4d323ce6fd 49 case m2m:
AjK 8:cb4d323ce6fd 50 // Assign physical source and destination address
AjK 8:cb4d323ce6fd 51 pChannel->DMACCSrcAddr = config->srcMemAddr();
AjK 8:cb4d323ce6fd 52 pChannel->DMACCDestAddr = config->dstMemAddr();
AjK 8:cb4d323ce6fd 53 pChannel->DMACCControl
AjK 8:cb4d323ce6fd 54 = CxControl_TransferSize(config->transferSize())
AjK 8:cb4d323ce6fd 55 | CxControl_SBSize(_32)
AjK 8:cb4d323ce6fd 56 | CxControl_DBSize(_32)
AjK 8:cb4d323ce6fd 57 | CxControl_SWidth(config->transferWidth())
AjK 8:cb4d323ce6fd 58 | CxControl_DWidth(config->transferWidth())
AjK 8:cb4d323ce6fd 59 | CxControl_SI()
AjK 8:cb4d323ce6fd 60 | CxControl_DI()
AjK 8:cb4d323ce6fd 61 | CxControl_I();
AjK 8:cb4d323ce6fd 62 break;
AjK 8:cb4d323ce6fd 63
AjK 8:cb4d323ce6fd 64 // Memory to peripheral
AjK 8:cb4d323ce6fd 65 case m2p:
AjK 8:cb4d323ce6fd 66 // Assign physical source
AjK 8:cb4d323ce6fd 67 pChannel->DMACCSrcAddr = config->srcMemAddr();
AjK 8:cb4d323ce6fd 68 // Assign peripheral destination address
AjK 8:cb4d323ce6fd 69 pChannel->DMACCDestAddr = (uint32_t)LUTPerAddr(config->dstConn());
AjK 8:cb4d323ce6fd 70 pChannel->DMACCControl
AjK 8:cb4d323ce6fd 71 = CxControl_TransferSize((uint32_t)config->transferSize())
AjK 8:cb4d323ce6fd 72 | CxControl_SBSize((uint32_t)LUTPerBurst(config->dstConn()))
AjK 8:cb4d323ce6fd 73 | CxControl_DBSize((uint32_t)LUTPerBurst(config->dstConn()))
AjK 8:cb4d323ce6fd 74 | CxControl_SWidth((uint32_t)LUTPerWid(config->dstConn()))
AjK 8:cb4d323ce6fd 75 | CxControl_DWidth((uint32_t)LUTPerWid(config->dstConn()))
AjK 8:cb4d323ce6fd 76 | CxControl_SI()
AjK 8:cb4d323ce6fd 77 | CxControl_I();
AjK 8:cb4d323ce6fd 78 break;
AjK 8:cb4d323ce6fd 79
AjK 8:cb4d323ce6fd 80 // Peripheral to memory
AjK 8:cb4d323ce6fd 81 case p2m:
AjK 8:cb4d323ce6fd 82 // Assign peripheral source address
AjK 8:cb4d323ce6fd 83 pChannel->DMACCSrcAddr = (uint32_t)LUTPerAddr(config->srcConn());
AjK 8:cb4d323ce6fd 84 // Assign memory destination address
AjK 8:cb4d323ce6fd 85 pChannel->DMACCDestAddr = config->dstMemAddr();
AjK 8:cb4d323ce6fd 86 pChannel->DMACCControl
AjK 8:cb4d323ce6fd 87 = CxControl_TransferSize((uint32_t)config->transferSize())
AjK 8:cb4d323ce6fd 88 | CxControl_SBSize((uint32_t)LUTPerBurst(config->srcConn()))
AjK 8:cb4d323ce6fd 89 | CxControl_DBSize((uint32_t)LUTPerBurst(config->srcConn()))
AjK 8:cb4d323ce6fd 90 | CxControl_SWidth((uint32_t)LUTPerWid(config->srcConn()))
AjK 8:cb4d323ce6fd 91 | CxControl_DWidth((uint32_t)LUTPerWid(config->srcConn()))
AjK 8:cb4d323ce6fd 92 | CxControl_DI()
AjK 8:cb4d323ce6fd 93 | CxControl_I();
AjK 8:cb4d323ce6fd 94 break;
AjK 8:cb4d323ce6fd 95
AjK 8:cb4d323ce6fd 96 // Peripheral to peripheral
AjK 8:cb4d323ce6fd 97 case p2p:
AjK 8:cb4d323ce6fd 98 // Assign peripheral source address
AjK 8:cb4d323ce6fd 99 pChannel->DMACCSrcAddr = (uint32_t)LUTPerAddr(config->srcConn());
AjK 8:cb4d323ce6fd 100 // Assign peripheral destination address
AjK 8:cb4d323ce6fd 101 pChannel->DMACCDestAddr = (uint32_t)LUTPerAddr(config->dstConn());
AjK 8:cb4d323ce6fd 102 pChannel->DMACCControl
AjK 8:cb4d323ce6fd 103 = CxControl_TransferSize((uint32_t)config->transferSize())
AjK 8:cb4d323ce6fd 104 | CxControl_SBSize((uint32_t)LUTPerBurst(config->srcConn()))
AjK 8:cb4d323ce6fd 105 | CxControl_DBSize((uint32_t)LUTPerBurst(config->dstConn()))
AjK 8:cb4d323ce6fd 106 | CxControl_SWidth((uint32_t)LUTPerWid(config->srcConn()))
AjK 8:cb4d323ce6fd 107 | CxControl_DWidth((uint32_t)LUTPerWid(config->dstConn()))
AjK 8:cb4d323ce6fd 108 | CxControl_I();
AjK 8:cb4d323ce6fd 109 break;
AjK 8:cb4d323ce6fd 110
AjK 8:cb4d323ce6fd 111 // Do not support any more transfer type, return ERROR
AjK 8:cb4d323ce6fd 112 default:
AjK 8:cb4d323ce6fd 113 return 0;
AjK 8:cb4d323ce6fd 114 }
AjK 8:cb4d323ce6fd 115
AjK 8:cb4d323ce6fd 116 // Re-Configure DMA Request Select for source peripheral
AjK 8:cb4d323ce6fd 117 if (config->srcConn() > 15) {
AjK 8:cb4d323ce6fd 118 LPC_SC->RESERVED9 |= (1 << (config->srcConn() - 16));
AjK 8:cb4d323ce6fd 119 }
AjK 8:cb4d323ce6fd 120 else {
AjK 8:cb4d323ce6fd 121 LPC_SC->RESERVED9 &= ~(1 << (config->srcConn() - 8));
AjK 8:cb4d323ce6fd 122 }
AjK 8:cb4d323ce6fd 123
AjK 8:cb4d323ce6fd 124 // Re-Configure DMA Request Select for Destination peripheral
AjK 8:cb4d323ce6fd 125 if (config->dstConn() > 15) {
AjK 8:cb4d323ce6fd 126 LPC_SC->RESERVED9 |= (1 << (config->dstConn() - 16));
AjK 8:cb4d323ce6fd 127 }
AjK 8:cb4d323ce6fd 128 else {
AjK 8:cb4d323ce6fd 129 LPC_SC->RESERVED9 &= ~(1 << (config->dstConn() - 8));
AjK 8:cb4d323ce6fd 130 }
AjK 8:cb4d323ce6fd 131
AjK 8:cb4d323ce6fd 132 // Enable DMA channels, little endian
AjK 8:cb4d323ce6fd 133 LPC_GPDMA->DMACConfig = _E;
AjK 8:cb4d323ce6fd 134 while (!(LPC_GPDMA->DMACConfig & _E));
AjK 8:cb4d323ce6fd 135
AjK 8:cb4d323ce6fd 136 // Calculate absolute value for Connection number
AjK 8:cb4d323ce6fd 137 uint32_t tmp1 = config->srcConn(); tmp1 = ((tmp1 > 15) ? (tmp1 - 8) : tmp1);
AjK 8:cb4d323ce6fd 138 uint32_t tmp2 = config->dstConn(); tmp2 = ((tmp2 > 15) ? (tmp2 - 8) : tmp2);
AjK 8:cb4d323ce6fd 139
AjK 8:cb4d323ce6fd 140 // Configure DMA Channel, enable Error Counter and Terminate counter
AjK 8:cb4d323ce6fd 141 pChannel->DMACCConfig
AjK 8:cb4d323ce6fd 142 = CxConfig_IE()
AjK 8:cb4d323ce6fd 143 | CxConfig_ITC()
AjK 8:cb4d323ce6fd 144 | CxConfig_TransferType((uint32_t)config->transferType())
AjK 8:cb4d323ce6fd 145 | CxConfig_SrcPeripheral(tmp1)
AjK 8:cb4d323ce6fd 146 | CxConfig_DestPeripheral(tmp2);
AjK 8:cb4d323ce6fd 147
AjK 8:cb4d323ce6fd 148 return pChannel->DMACCControl;
AjK 8:cb4d323ce6fd 149 }
AjK 8:cb4d323ce6fd 150
AjK 8:cb4d323ce6fd 151 }; // namespace AjK ends
AjK 8:cb4d323ce6fd 152