LSM6DSO - iNEMO inertial module: 3D accelerometer and 3D gy…

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iNEMO inertial module: 3D accelerometer and 3D gyroscope.

Dependencies: X_NUCLEO_COMMON ST_INTERFACES

Dependents: X_NUCLEO_IKS01A3 X_NUCLEO_IKS01A3

lsm6dso_reg.h@3:4274d9103f1d, 2019-07-24 (annotated)

Committer:: cparata
Date:: Wed Jul 24 14:19:35 2019 +0000
Revision:: 3:4274d9103f1d
Parent:: 2:4d14e9edf37e
Child:: 4:77faf76e3cd8

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User	Revision	Line number	New contents of line
cparata	0:6d69e896ce38	1	/*
cparata	0:6d69e896ce38	2	******************************************************************************
cparata	0:6d69e896ce38	3	* @file lsm6dso_reg.h
cparata	0:6d69e896ce38	4	* @author Sensor Solutions Software Team
cparata	0:6d69e896ce38	5	* @brief This file contains all the functions prototypes for the
cparata	0:6d69e896ce38	6	* lsm6dso_reg.c driver.
cparata	0:6d69e896ce38	7	******************************************************************************
cparata	0:6d69e896ce38	8	* @attention
cparata	0:6d69e896ce38	9	*
cparata	0:6d69e896ce38	10	* <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
cparata	0:6d69e896ce38	11	*
cparata	0:6d69e896ce38	12	* Redistribution and use in source and binary forms, with or without
cparata	0:6d69e896ce38	13	* modification, are permitted provided that the following conditions
cparata	0:6d69e896ce38	14	* are met:
cparata	0:6d69e896ce38	15	* 1. Redistributions of source code must retain the above copyright notice,
cparata	0:6d69e896ce38	16	* this list of conditions and the following disclaimer.
cparata	0:6d69e896ce38	17	* 2. Redistributions in binary form must reproduce the above copyright
cparata	0:6d69e896ce38	18	* notice, this list of conditions and the following disclaimer in the
cparata	0:6d69e896ce38	19	* documentation and/or other materials provided with the distribution.
cparata	0:6d69e896ce38	20	* 3. Neither the name of STMicroelectronics nor the names of its
cparata	0:6d69e896ce38	21	* contributors may be used to endorse or promote products derived from
cparata	0:6d69e896ce38	22	* this software without specific prior written permission.
cparata	0:6d69e896ce38	23	*
cparata	0:6d69e896ce38	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
cparata	0:6d69e896ce38	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
cparata	0:6d69e896ce38	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
cparata	0:6d69e896ce38	27	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
cparata	0:6d69e896ce38	28	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
cparata	0:6d69e896ce38	29	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
cparata	0:6d69e896ce38	30	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
cparata	0:6d69e896ce38	31	* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
cparata	0:6d69e896ce38	32	* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
cparata	0:6d69e896ce38	33	* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
cparata	0:6d69e896ce38	34	* POSSIBILITY OF SUCH DAMAGE.
cparata	0:6d69e896ce38	35	*
cparata	0:6d69e896ce38	36	*/
cparata	0:6d69e896ce38	37
cparata	0:6d69e896ce38	38	/* Define to prevent recursive inclusion -------------------------------------*/
cparata	0:6d69e896ce38	39	#ifndef LSM6DSO_DRIVER_H
cparata	0:6d69e896ce38	40	#define LSM6DSO_DRIVER_H
cparata	0:6d69e896ce38	41
cparata	0:6d69e896ce38	42	#ifdef __cplusplus
cparata	3:4274d9103f1d	43	extern "C" {
cparata	0:6d69e896ce38	44	#endif
cparata	0:6d69e896ce38	45
cparata	0:6d69e896ce38	46	/* Includes ------------------------------------------------------------------*/
cparata	0:6d69e896ce38	47	#include <stdint.h>
cparata	0:6d69e896ce38	48	#include <math.h>
cparata	0:6d69e896ce38	49
cparata	0:6d69e896ce38	50	/** @addtogroup LSM6DSO
cparata	0:6d69e896ce38	51	* @{
cparata	0:6d69e896ce38	52	*
cparata	0:6d69e896ce38	53	*/
cparata	0:6d69e896ce38	54
cparata	0:6d69e896ce38	55	/** @defgroup LSM6DSO_sensors_common_types
cparata	0:6d69e896ce38	56	* @{
cparata	0:6d69e896ce38	57	*
cparata	0:6d69e896ce38	58	*/
cparata	0:6d69e896ce38	59
cparata	0:6d69e896ce38	60	#ifndef MEMS_SHARED_TYPES
cparata	0:6d69e896ce38	61	#define MEMS_SHARED_TYPES
cparata	0:6d69e896ce38	62
cparata	0:6d69e896ce38	63	/**
cparata	0:6d69e896ce38	64	* @defgroup axisXbitXX_t
cparata	0:6d69e896ce38	65	* @brief These unions are useful to represent different sensors data type.
cparata	0:6d69e896ce38	66	* These unions are not need by the driver.
cparata	0:6d69e896ce38	67	*
cparata	0:6d69e896ce38	68	* REMOVING the unions you are compliant with:
cparata	0:6d69e896ce38	69	* MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
cparata	0:6d69e896ce38	70	*
cparata	0:6d69e896ce38	71	* @{
cparata	0:6d69e896ce38	72	*
cparata	0:6d69e896ce38	73	*/
cparata	0:6d69e896ce38	74
cparata	3:4274d9103f1d	75	typedef union {
cparata	3:4274d9103f1d	76	int16_t i16bit[3];
cparata	3:4274d9103f1d	77	uint8_t u8bit[6];
cparata	0:6d69e896ce38	78	} axis3bit16_t;
cparata	0:6d69e896ce38	79
cparata	3:4274d9103f1d	80	typedef union {
cparata	3:4274d9103f1d	81	int16_t i16bit;
cparata	3:4274d9103f1d	82	uint8_t u8bit[2];
cparata	0:6d69e896ce38	83	} axis1bit16_t;
cparata	0:6d69e896ce38	84
cparata	3:4274d9103f1d	85	typedef union {
cparata	3:4274d9103f1d	86	int32_t i32bit[3];
cparata	3:4274d9103f1d	87	uint8_t u8bit[12];
cparata	0:6d69e896ce38	88	} axis3bit32_t;
cparata	0:6d69e896ce38	89
cparata	3:4274d9103f1d	90	typedef union {
cparata	3:4274d9103f1d	91	int32_t i32bit;
cparata	3:4274d9103f1d	92	uint8_t u8bit[4];
cparata	0:6d69e896ce38	93	} axis1bit32_t;
cparata	0:6d69e896ce38	94
cparata	0:6d69e896ce38	95	/**
cparata	0:6d69e896ce38	96	* @}
cparata	0:6d69e896ce38	97	*
cparata	0:6d69e896ce38	98	*/
cparata	0:6d69e896ce38	99
cparata	3:4274d9103f1d	100	typedef struct {
cparata	3:4274d9103f1d	101	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	102	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	103	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	104	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	105	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	106	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	107	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	108	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	109	} bitwise_t;
cparata	0:6d69e896ce38	110
cparata	0:6d69e896ce38	111	#define PROPERTY_DISABLE (0U)
cparata	0:6d69e896ce38	112	#define PROPERTY_ENABLE (1U)
cparata	0:6d69e896ce38	113
cparata	0:6d69e896ce38	114	#endif /* MEMS_SHARED_TYPES */
cparata	0:6d69e896ce38	115
cparata	0:6d69e896ce38	116	/**
cparata	0:6d69e896ce38	117	* @}
cparata	0:6d69e896ce38	118	*
cparata	0:6d69e896ce38	119	*/
cparata	0:6d69e896ce38	120
cparata	0:6d69e896ce38	121	/** @addtogroup LSM6DSO_Interfaces_Functions
cparata	0:6d69e896ce38	122	* @brief This section provide a set of functions used to read and
cparata	0:6d69e896ce38	123	* write a generic register of the device.
cparata	0:6d69e896ce38	124	* MANDATORY: return 0 -> no Error.
cparata	0:6d69e896ce38	125	* @{
cparata	0:6d69e896ce38	126	*
cparata	0:6d69e896ce38	127	*/
cparata	0:6d69e896ce38	128
cparata	3:4274d9103f1d	129	typedef int32_t (lsm6dso_write_ptr)(void , uint8_t, uint8_t *, uint16_t);
cparata	3:4274d9103f1d	130	typedef int32_t (lsm6dso_read_ptr)(void , uint8_t, uint8_t *, uint16_t);
cparata	0:6d69e896ce38	131
cparata	0:6d69e896ce38	132	typedef struct {
cparata	3:4274d9103f1d	133	/ Component mandatory fields /
cparata	3:4274d9103f1d	134	lsm6dso_write_ptr write_reg;
cparata	3:4274d9103f1d	135	lsm6dso_read_ptr read_reg;
cparata	3:4274d9103f1d	136	/ Customizable optional pointer /
cparata	3:4274d9103f1d	137	void *handle;
cparata	0:6d69e896ce38	138	} lsm6dso_ctx_t;
cparata	0:6d69e896ce38	139
cparata	0:6d69e896ce38	140	/**
cparata	0:6d69e896ce38	141	* @}
cparata	0:6d69e896ce38	142	*
cparata	0:6d69e896ce38	143	*/
cparata	0:6d69e896ce38	144
cparata	0:6d69e896ce38	145	/** @defgroup LSM6DSO_Infos
cparata	0:6d69e896ce38	146	* @{
cparata	0:6d69e896ce38	147	*
cparata	0:6d69e896ce38	148	*/
cparata	0:6d69e896ce38	149
cparata	0:6d69e896ce38	150	/ I2C Device Address 8 bit format if SA0=0 -> D5 if SA0=1 -> D7 /
cparata	0:6d69e896ce38	151	#define LSM6DSO_I2C_ADD_L 0xD5
cparata	0:6d69e896ce38	152	#define LSM6DSO_I2C_ADD_H 0xD7
cparata	0:6d69e896ce38	153
cparata	0:6d69e896ce38	154	/ Device Identification (Who am I) /
cparata	0:6d69e896ce38	155	#define LSM6DSO_ID 0x6C
cparata	0:6d69e896ce38	156
cparata	0:6d69e896ce38	157	/**
cparata	0:6d69e896ce38	158	* @}
cparata	0:6d69e896ce38	159	*
cparata	0:6d69e896ce38	160	*/
cparata	0:6d69e896ce38	161
cparata	0:6d69e896ce38	162	#define LSM6DSO_FUNC_CFG_ACCESS 0x01U
cparata	0:6d69e896ce38	163	typedef struct {
cparata	3:4274d9103f1d	164	uint8_t not_used_01 : 6;
cparata	3:4274d9103f1d	165	uint8_t reg_access : 2; /* shub_reg_access + func_cfg_access */
cparata	0:6d69e896ce38	166	} lsm6dso_func_cfg_access_t;
cparata	0:6d69e896ce38	167
cparata	0:6d69e896ce38	168	#define LSM6DSO_PIN_CTRL 0x02U
cparata	0:6d69e896ce38	169	typedef struct {
cparata	3:4274d9103f1d	170	uint8_t not_used_01 : 6;
cparata	3:4274d9103f1d	171	uint8_t sdo_pu_en : 1;
cparata	3:4274d9103f1d	172	uint8_t ois_pu_dis : 1;
cparata	0:6d69e896ce38	173	} lsm6dso_pin_ctrl_t;
cparata	0:6d69e896ce38	174
cparata	0:6d69e896ce38	175	#define LSM6DSO_FIFO_CTRL1 0x07U
cparata	0:6d69e896ce38	176	typedef struct {
cparata	3:4274d9103f1d	177	uint8_t wtm : 8;
cparata	0:6d69e896ce38	178	} lsm6dso_fifo_ctrl1_t;
cparata	0:6d69e896ce38	179
cparata	0:6d69e896ce38	180	#define LSM6DSO_FIFO_CTRL2 0x08U
cparata	0:6d69e896ce38	181	typedef struct {
cparata	3:4274d9103f1d	182	uint8_t wtm : 1;
cparata	3:4274d9103f1d	183	uint8_t uncoptr_rate : 2;
cparata	3:4274d9103f1d	184	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	185	uint8_t odrchg_en : 1;
cparata	3:4274d9103f1d	186	uint8_t not_used_02 : 1;
cparata	3:4274d9103f1d	187	uint8_t fifo_compr_rt_en : 1;
cparata	3:4274d9103f1d	188	uint8_t stop_on_wtm : 1;
cparata	0:6d69e896ce38	189	} lsm6dso_fifo_ctrl2_t;
cparata	0:6d69e896ce38	190
cparata	0:6d69e896ce38	191	#define LSM6DSO_FIFO_CTRL3 0x09U
cparata	0:6d69e896ce38	192	typedef struct {
cparata	3:4274d9103f1d	193	uint8_t bdr_xl : 4;
cparata	3:4274d9103f1d	194	uint8_t bdr_gy : 4;
cparata	0:6d69e896ce38	195	} lsm6dso_fifo_ctrl3_t;
cparata	0:6d69e896ce38	196
cparata	0:6d69e896ce38	197	#define LSM6DSO_FIFO_CTRL4 0x0AU
cparata	0:6d69e896ce38	198	typedef struct {
cparata	3:4274d9103f1d	199	uint8_t fifo_mode : 3;
cparata	3:4274d9103f1d	200	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	201	uint8_t odr_t_batch : 2;
cparata	3:4274d9103f1d	202	uint8_t odr_ts_batch : 2;
cparata	0:6d69e896ce38	203	} lsm6dso_fifo_ctrl4_t;
cparata	0:6d69e896ce38	204
cparata	0:6d69e896ce38	205	#define LSM6DSO_COUNTER_BDR_REG1 0x0BU
cparata	0:6d69e896ce38	206	typedef struct {
cparata	3:4274d9103f1d	207	uint8_t cnt_bdr_th : 3;
cparata	3:4274d9103f1d	208	uint8_t not_used_01 : 2;
cparata	3:4274d9103f1d	209	uint8_t trig_counter_bdr : 1;
cparata	3:4274d9103f1d	210	uint8_t rst_counter_bdr : 1;
cparata	3:4274d9103f1d	211	uint8_t dataready_pulsed : 1;
cparata	0:6d69e896ce38	212	} lsm6dso_counter_bdr_reg1_t;
cparata	0:6d69e896ce38	213
cparata	0:6d69e896ce38	214	#define LSM6DSO_COUNTER_BDR_REG2 0x0CU
cparata	0:6d69e896ce38	215	typedef struct {
cparata	3:4274d9103f1d	216	uint8_t cnt_bdr_th : 8;
cparata	0:6d69e896ce38	217	} lsm6dso_counter_bdr_reg2_t;
cparata	0:6d69e896ce38	218
cparata	0:6d69e896ce38	219	#define LSM6DSO_INT1_CTRL 0x0D
cparata	0:6d69e896ce38	220	typedef struct {
cparata	3:4274d9103f1d	221	uint8_t int1_drdy_xl : 1;
cparata	3:4274d9103f1d	222	uint8_t int1_drdy_g : 1;
cparata	3:4274d9103f1d	223	uint8_t int1_boot : 1;
cparata	3:4274d9103f1d	224	uint8_t int1_fifo_th : 1;
cparata	3:4274d9103f1d	225	uint8_t int1_fifo_ovr : 1;
cparata	3:4274d9103f1d	226	uint8_t int1_fifo_full : 1;
cparata	3:4274d9103f1d	227	uint8_t int1_cnt_bdr : 1;
cparata	3:4274d9103f1d	228	uint8_t den_drdy_flag : 1;
cparata	0:6d69e896ce38	229	} lsm6dso_int1_ctrl_t;
cparata	0:6d69e896ce38	230
cparata	0:6d69e896ce38	231	#define LSM6DSO_INT2_CTRL 0x0EU
cparata	0:6d69e896ce38	232	typedef struct {
cparata	3:4274d9103f1d	233	uint8_t int2_drdy_xl : 1;
cparata	3:4274d9103f1d	234	uint8_t int2_drdy_g : 1;
cparata	3:4274d9103f1d	235	uint8_t int2_drdy_temp : 1;
cparata	3:4274d9103f1d	236	uint8_t int2_fifo_th : 1;
cparata	3:4274d9103f1d	237	uint8_t int2_fifo_ovr : 1;
cparata	3:4274d9103f1d	238	uint8_t int2_fifo_full : 1;
cparata	3:4274d9103f1d	239	uint8_t int2_cnt_bdr : 1;
cparata	3:4274d9103f1d	240	uint8_t not_used_01 : 1;
cparata	0:6d69e896ce38	241	} lsm6dso_int2_ctrl_t;
cparata	0:6d69e896ce38	242
cparata	0:6d69e896ce38	243	#define LSM6DSO_WHO_AM_I 0x0FU
cparata	0:6d69e896ce38	244	#define LSM6DSO_CTRL1_XL 0x10U
cparata	0:6d69e896ce38	245	typedef struct {
cparata	3:4274d9103f1d	246	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	247	uint8_t lpf2_xl_en : 1;
cparata	3:4274d9103f1d	248	uint8_t fs_xl : 2;
cparata	3:4274d9103f1d	249	uint8_t odr_xl : 4;
cparata	0:6d69e896ce38	250	} lsm6dso_ctrl1_xl_t;
cparata	0:6d69e896ce38	251
cparata	0:6d69e896ce38	252	#define LSM6DSO_CTRL2_G 0x11U
cparata	0:6d69e896ce38	253	typedef struct {
cparata	3:4274d9103f1d	254	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	255	uint8_t fs_g : 3; /* fs_125 + fs_g */
cparata	3:4274d9103f1d	256	uint8_t odr_g : 4;
cparata	0:6d69e896ce38	257	} lsm6dso_ctrl2_g_t;
cparata	0:6d69e896ce38	258
cparata	0:6d69e896ce38	259	#define LSM6DSO_CTRL3_C 0x12U
cparata	0:6d69e896ce38	260	typedef struct {
cparata	3:4274d9103f1d	261	uint8_t sw_reset : 1;
cparata	3:4274d9103f1d	262	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	263	uint8_t if_inc : 1;
cparata	3:4274d9103f1d	264	uint8_t sim : 1;
cparata	3:4274d9103f1d	265	uint8_t pp_od : 1;
cparata	3:4274d9103f1d	266	uint8_t h_lactive : 1;
cparata	3:4274d9103f1d	267	uint8_t bdu : 1;
cparata	3:4274d9103f1d	268	uint8_t boot : 1;
cparata	0:6d69e896ce38	269	} lsm6dso_ctrl3_c_t;
cparata	0:6d69e896ce38	270
cparata	0:6d69e896ce38	271	#define LSM6DSO_CTRL4_C 0x13U
cparata	0:6d69e896ce38	272	typedef struct {
cparata	3:4274d9103f1d	273	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	274	uint8_t lpf1_sel_g : 1;
cparata	3:4274d9103f1d	275	uint8_t i2c_disable : 1;
cparata	3:4274d9103f1d	276	uint8_t drdy_mask : 1;
cparata	3:4274d9103f1d	277	uint8_t not_used_02 : 1;
cparata	3:4274d9103f1d	278	uint8_t int2_on_int1 : 1;
cparata	3:4274d9103f1d	279	uint8_t sleep_g : 1;
cparata	3:4274d9103f1d	280	uint8_t not_used_03 : 1;
cparata	0:6d69e896ce38	281	} lsm6dso_ctrl4_c_t;
cparata	0:6d69e896ce38	282
cparata	0:6d69e896ce38	283	#define LSM6DSO_CTRL5_C 0x14U
cparata	0:6d69e896ce38	284	typedef struct {
cparata	3:4274d9103f1d	285	uint8_t st_xl : 2;
cparata	3:4274d9103f1d	286	uint8_t st_g : 2;
cparata	3:4274d9103f1d	287	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	288	uint8_t rounding : 2;
cparata	3:4274d9103f1d	289	uint8_t xl_ulp_en : 1;
cparata	0:6d69e896ce38	290	} lsm6dso_ctrl5_c_t;
cparata	0:6d69e896ce38	291
cparata	0:6d69e896ce38	292	#define LSM6DSO_CTRL6_C 0x15U
cparata	0:6d69e896ce38	293	typedef struct {
cparata	3:4274d9103f1d	294	uint8_t ftype : 3;
cparata	3:4274d9103f1d	295	uint8_t usr_off_w : 1;
cparata	3:4274d9103f1d	296	uint8_t xl_hm_mode : 1;
cparata	3:4274d9103f1d	297	uint8_t den_mode : 3; /* trig_en + lvl1_en + lvl2_en */
cparata	0:6d69e896ce38	298	} lsm6dso_ctrl6_c_t;
cparata	0:6d69e896ce38	299
cparata	0:6d69e896ce38	300	#define LSM6DSO_CTRL7_G 0x16U
cparata	0:6d69e896ce38	301	typedef struct {
cparata	3:4274d9103f1d	302	uint8_t ois_on : 1;
cparata	3:4274d9103f1d	303	uint8_t usr_off_on_out : 1;
cparata	3:4274d9103f1d	304	uint8_t ois_on_en : 1;
cparata	3:4274d9103f1d	305	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	306	uint8_t hpm_g : 2;
cparata	3:4274d9103f1d	307	uint8_t hp_en_g : 1;
cparata	3:4274d9103f1d	308	uint8_t g_hm_mode : 1;
cparata	0:6d69e896ce38	309	} lsm6dso_ctrl7_g_t;
cparata	0:6d69e896ce38	310
cparata	0:6d69e896ce38	311	#define LSM6DSO_CTRL8_XL 0x17U
cparata	0:6d69e896ce38	312	typedef struct {
cparata	3:4274d9103f1d	313	uint8_t low_pass_on_6d : 1;
cparata	3:4274d9103f1d	314	uint8_t xl_fs_mode : 1;
cparata	3:4274d9103f1d	315	uint8_t hp_slope_xl_en : 1;
cparata	3:4274d9103f1d	316	uint8_t fastsettl_mode_xl : 1;
cparata	3:4274d9103f1d	317	uint8_t hp_ref_mode_xl : 1;
cparata	3:4274d9103f1d	318	uint8_t hpcf_xl : 3;
cparata	0:6d69e896ce38	319	} lsm6dso_ctrl8_xl_t;
cparata	0:6d69e896ce38	320
cparata	0:6d69e896ce38	321	#define LSM6DSO_CTRL9_XL 0x18U
cparata	0:6d69e896ce38	322	typedef struct {
cparata	3:4274d9103f1d	323	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	324	uint8_t i3c_disable : 1;
cparata	3:4274d9103f1d	325	uint8_t den_lh : 1;
cparata	3:4274d9103f1d	326	uint8_t den_xl_g : 2; /* den_xl_en + den_xl_g */
cparata	3:4274d9103f1d	327	uint8_t den_z : 1;
cparata	3:4274d9103f1d	328	uint8_t den_y : 1;
cparata	3:4274d9103f1d	329	uint8_t den_x : 1;
cparata	0:6d69e896ce38	330	} lsm6dso_ctrl9_xl_t;
cparata	0:6d69e896ce38	331
cparata	0:6d69e896ce38	332	#define LSM6DSO_CTRL10_C 0x19U
cparata	0:6d69e896ce38	333	typedef struct {
cparata	3:4274d9103f1d	334	uint8_t not_used_01 : 5;
cparata	3:4274d9103f1d	335	uint8_t timestamp_en : 1;
cparata	3:4274d9103f1d	336	uint8_t not_used_02 : 2;
cparata	0:6d69e896ce38	337	} lsm6dso_ctrl10_c_t;
cparata	0:6d69e896ce38	338
cparata	0:6d69e896ce38	339	#define LSM6DSO_ALL_INT_SRC 0x1AU
cparata	0:6d69e896ce38	340	typedef struct {
cparata	3:4274d9103f1d	341	uint8_t ff_ia : 1;
cparata	3:4274d9103f1d	342	uint8_t wu_ia : 1;
cparata	3:4274d9103f1d	343	uint8_t single_tap : 1;
cparata	3:4274d9103f1d	344	uint8_t double_tap : 1;
cparata	3:4274d9103f1d	345	uint8_t d6d_ia : 1;
cparata	3:4274d9103f1d	346	uint8_t sleep_change_ia : 1;
cparata	3:4274d9103f1d	347	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	348	uint8_t timestamp_endcount : 1;
cparata	0:6d69e896ce38	349	} lsm6dso_all_int_src_t;
cparata	0:6d69e896ce38	350
cparata	0:6d69e896ce38	351	#define LSM6DSO_WAKE_UP_SRC 0x1BU
cparata	0:6d69e896ce38	352	typedef struct {
cparata	3:4274d9103f1d	353	uint8_t z_wu : 1;
cparata	3:4274d9103f1d	354	uint8_t y_wu : 1;
cparata	3:4274d9103f1d	355	uint8_t x_wu : 1;
cparata	3:4274d9103f1d	356	uint8_t wu_ia : 1;
cparata	3:4274d9103f1d	357	uint8_t sleep_state : 1;
cparata	3:4274d9103f1d	358	uint8_t ff_ia : 1;
cparata	3:4274d9103f1d	359	uint8_t sleep_change_ia : 1;
cparata	3:4274d9103f1d	360	uint8_t not_used_01 : 1;
cparata	0:6d69e896ce38	361	} lsm6dso_wake_up_src_t;
cparata	0:6d69e896ce38	362
cparata	0:6d69e896ce38	363	#define LSM6DSO_TAP_SRC 0x1CU
cparata	0:6d69e896ce38	364	typedef struct {
cparata	3:4274d9103f1d	365	uint8_t z_tap : 1;
cparata	3:4274d9103f1d	366	uint8_t y_tap : 1;
cparata	3:4274d9103f1d	367	uint8_t x_tap : 1;
cparata	3:4274d9103f1d	368	uint8_t tap_sign : 1;
cparata	3:4274d9103f1d	369	uint8_t double_tap : 1;
cparata	3:4274d9103f1d	370	uint8_t single_tap : 1;
cparata	3:4274d9103f1d	371	uint8_t tap_ia : 1;
cparata	3:4274d9103f1d	372	uint8_t not_used_02 : 1;
cparata	0:6d69e896ce38	373	} lsm6dso_tap_src_t;
cparata	0:6d69e896ce38	374
cparata	0:6d69e896ce38	375	#define LSM6DSO_D6D_SRC 0x1DU
cparata	0:6d69e896ce38	376	typedef struct {
cparata	3:4274d9103f1d	377	uint8_t xl : 1;
cparata	3:4274d9103f1d	378	uint8_t xh : 1;
cparata	3:4274d9103f1d	379	uint8_t yl : 1;
cparata	3:4274d9103f1d	380	uint8_t yh : 1;
cparata	3:4274d9103f1d	381	uint8_t zl : 1;
cparata	3:4274d9103f1d	382	uint8_t zh : 1;
cparata	3:4274d9103f1d	383	uint8_t d6d_ia : 1;
cparata	3:4274d9103f1d	384	uint8_t den_drdy : 1;
cparata	0:6d69e896ce38	385	} lsm6dso_d6d_src_t;
cparata	0:6d69e896ce38	386
cparata	0:6d69e896ce38	387	#define LSM6DSO_STATUS_REG 0x1EU
cparata	0:6d69e896ce38	388	typedef struct {
cparata	3:4274d9103f1d	389	uint8_t xlda : 1;
cparata	3:4274d9103f1d	390	uint8_t gda : 1;
cparata	3:4274d9103f1d	391	uint8_t tda : 1;
cparata	3:4274d9103f1d	392	uint8_t not_used_01 : 5;
cparata	0:6d69e896ce38	393	} lsm6dso_status_reg_t;
cparata	0:6d69e896ce38	394
cparata	0:6d69e896ce38	395	#define LSM6DSO_STATUS_SPIAUX 0x1EU
cparata	0:6d69e896ce38	396	typedef struct {
cparata	3:4274d9103f1d	397	uint8_t xlda : 1;
cparata	3:4274d9103f1d	398	uint8_t gda : 1;
cparata	3:4274d9103f1d	399	uint8_t gyro_settling : 1;
cparata	3:4274d9103f1d	400	uint8_t not_used_01 : 5;
cparata	0:6d69e896ce38	401	} lsm6dso_status_spiaux_t;
cparata	0:6d69e896ce38	402
cparata	0:6d69e896ce38	403	#define LSM6DSO_OUT_TEMP_L 0x20U
cparata	0:6d69e896ce38	404	#define LSM6DSO_OUT_TEMP_H 0x21U
cparata	0:6d69e896ce38	405	#define LSM6DSO_OUTX_L_G 0x22U
cparata	0:6d69e896ce38	406	#define LSM6DSO_OUTX_H_G 0x23U
cparata	0:6d69e896ce38	407	#define LSM6DSO_OUTY_L_G 0x24U
cparata	0:6d69e896ce38	408	#define LSM6DSO_OUTY_H_G 0x25U
cparata	0:6d69e896ce38	409	#define LSM6DSO_OUTZ_L_G 0x26U
cparata	0:6d69e896ce38	410	#define LSM6DSO_OUTZ_H_G 0x27U
cparata	0:6d69e896ce38	411	#define LSM6DSO_OUTX_L_A 0x28U
cparata	0:6d69e896ce38	412	#define LSM6DSO_OUTX_H_A 0x29U
cparata	0:6d69e896ce38	413	#define LSM6DSO_OUTY_L_A 0x2AU
cparata	0:6d69e896ce38	414	#define LSM6DSO_OUTY_H_A 0x2BU
cparata	0:6d69e896ce38	415	#define LSM6DSO_OUTZ_L_A 0x2CU
cparata	0:6d69e896ce38	416	#define LSM6DSO_OUTZ_H_A 0x2DU
cparata	0:6d69e896ce38	417	#define LSM6DSO_EMB_FUNC_STATUS_MAINPAGE 0x35U
cparata	0:6d69e896ce38	418	typedef struct {
cparata	3:4274d9103f1d	419	uint8_t not_used_01 : 3;
cparata	3:4274d9103f1d	420	uint8_t is_step_det : 1;
cparata	3:4274d9103f1d	421	uint8_t is_tilt : 1;
cparata	3:4274d9103f1d	422	uint8_t is_sigmot : 1;
cparata	3:4274d9103f1d	423	uint8_t not_used_02 : 1;
cparata	3:4274d9103f1d	424	uint8_t is_fsm_lc : 1;
cparata	0:6d69e896ce38	425	} lsm6dso_emb_func_status_mainpage_t;
cparata	0:6d69e896ce38	426
cparata	0:6d69e896ce38	427	#define LSM6DSO_FSM_STATUS_A_MAINPAGE 0x36U
cparata	0:6d69e896ce38	428	typedef struct {
cparata	3:4274d9103f1d	429	uint8_t is_fsm1 : 1;
cparata	3:4274d9103f1d	430	uint8_t is_fsm2 : 1;
cparata	3:4274d9103f1d	431	uint8_t is_fsm3 : 1;
cparata	3:4274d9103f1d	432	uint8_t is_fsm4 : 1;
cparata	3:4274d9103f1d	433	uint8_t is_fsm5 : 1;
cparata	3:4274d9103f1d	434	uint8_t is_fsm6 : 1;
cparata	3:4274d9103f1d	435	uint8_t is_fsm7 : 1;
cparata	3:4274d9103f1d	436	uint8_t is_fsm8 : 1;
cparata	3:4274d9103f1d	437	} lsm6dso_fsm_status_a_mainpage_t;
cparata	0:6d69e896ce38	438
cparata	0:6d69e896ce38	439	#define LSM6DSO_FSM_STATUS_B_MAINPAGE 0x37U
cparata	0:6d69e896ce38	440	typedef struct {
cparata	3:4274d9103f1d	441	uint8_t IS_FSM9 : 1;
cparata	3:4274d9103f1d	442	uint8_t IS_FSM10 : 1;
cparata	3:4274d9103f1d	443	uint8_t IS_FSM11 : 1;
cparata	3:4274d9103f1d	444	uint8_t IS_FSM12 : 1;
cparata	3:4274d9103f1d	445	uint8_t IS_FSM13 : 1;
cparata	3:4274d9103f1d	446	uint8_t IS_FSM14 : 1;
cparata	3:4274d9103f1d	447	uint8_t IS_FSM15 : 1;
cparata	3:4274d9103f1d	448	uint8_t IS_FSM16 : 1;
cparata	0:6d69e896ce38	449	} lsm6dso_fsm_status_b_mainpage_t;
cparata	0:6d69e896ce38	450
cparata	0:6d69e896ce38	451	#define LSM6DSO_STATUS_MASTER_MAINPAGE 0x39U
cparata	0:6d69e896ce38	452	typedef struct {
cparata	3:4274d9103f1d	453	uint8_t sens_hub_endop : 1;
cparata	3:4274d9103f1d	454	uint8_t not_used_01 : 2;
cparata	3:4274d9103f1d	455	uint8_t slave0_nack : 1;
cparata	3:4274d9103f1d	456	uint8_t slave1_nack : 1;
cparata	3:4274d9103f1d	457	uint8_t slave2_nack : 1;
cparata	3:4274d9103f1d	458	uint8_t slave3_nack : 1;
cparata	3:4274d9103f1d	459	uint8_t wr_once_done : 1;
cparata	0:6d69e896ce38	460	} lsm6dso_status_master_mainpage_t;
cparata	0:6d69e896ce38	461
cparata	0:6d69e896ce38	462	#define LSM6DSO_FIFO_STATUS1 0x3AU
cparata	0:6d69e896ce38	463	typedef struct {
cparata	3:4274d9103f1d	464	uint8_t diff_fifo : 8;
cparata	0:6d69e896ce38	465	} lsm6dso_fifo_status1_t;
cparata	0:6d69e896ce38	466
cparata	0:6d69e896ce38	467	#define LSM6DSO_FIFO_STATUS2 0x3B
cparata	0:6d69e896ce38	468	typedef struct {
cparata	3:4274d9103f1d	469	uint8_t diff_fifo : 2;
cparata	3:4274d9103f1d	470	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	471	uint8_t over_run_latched : 1;
cparata	3:4274d9103f1d	472	uint8_t counter_bdr_ia : 1;
cparata	3:4274d9103f1d	473	uint8_t fifo_full_ia : 1;
cparata	3:4274d9103f1d	474	uint8_t fifo_ovr_ia : 1;
cparata	3:4274d9103f1d	475	uint8_t fifo_wtm_ia : 1;
cparata	0:6d69e896ce38	476	} lsm6dso_fifo_status2_t;
cparata	0:6d69e896ce38	477
cparata	0:6d69e896ce38	478	#define LSM6DSO_TIMESTAMP0 0x40U
cparata	0:6d69e896ce38	479	#define LSM6DSO_TIMESTAMP1 0x41U
cparata	0:6d69e896ce38	480	#define LSM6DSO_TIMESTAMP2 0x42U
cparata	0:6d69e896ce38	481	#define LSM6DSO_TIMESTAMP3 0x43U
cparata	0:6d69e896ce38	482	#define LSM6DSO_TAP_CFG0 0x56U
cparata	0:6d69e896ce38	483	typedef struct {
cparata	3:4274d9103f1d	484	uint8_t lir : 1;
cparata	3:4274d9103f1d	485	uint8_t tap_z_en : 1;
cparata	3:4274d9103f1d	486	uint8_t tap_y_en : 1;
cparata	3:4274d9103f1d	487	uint8_t tap_x_en : 1;
cparata	3:4274d9103f1d	488	uint8_t slope_fds : 1;
cparata	3:4274d9103f1d	489	uint8_t sleep_status_on_int : 1;
cparata	3:4274d9103f1d	490	uint8_t int_clr_on_read : 1;
cparata	3:4274d9103f1d	491	uint8_t not_used_01 : 1;
cparata	0:6d69e896ce38	492	} lsm6dso_tap_cfg0_t;
cparata	0:6d69e896ce38	493
cparata	0:6d69e896ce38	494	#define LSM6DSO_TAP_CFG1 0x57U
cparata	0:6d69e896ce38	495	typedef struct {
cparata	3:4274d9103f1d	496	uint8_t tap_ths_x : 5;
cparata	3:4274d9103f1d	497	uint8_t tap_priority : 3;
cparata	0:6d69e896ce38	498	} lsm6dso_tap_cfg1_t;
cparata	0:6d69e896ce38	499
cparata	0:6d69e896ce38	500	#define LSM6DSO_TAP_CFG2 0x58U
cparata	0:6d69e896ce38	501	typedef struct {
cparata	3:4274d9103f1d	502	uint8_t tap_ths_y : 5;
cparata	3:4274d9103f1d	503	uint8_t inact_en : 2;
cparata	3:4274d9103f1d	504	uint8_t interrupts_enable : 1;
cparata	0:6d69e896ce38	505	} lsm6dso_tap_cfg2_t;
cparata	0:6d69e896ce38	506
cparata	0:6d69e896ce38	507	#define LSM6DSO_TAP_THS_6D 0x59U
cparata	0:6d69e896ce38	508	typedef struct {
cparata	3:4274d9103f1d	509	uint8_t tap_ths_z : 5;
cparata	3:4274d9103f1d	510	uint8_t sixd_ths : 2;
cparata	3:4274d9103f1d	511	uint8_t d4d_en : 1;
cparata	0:6d69e896ce38	512	} lsm6dso_tap_ths_6d_t;
cparata	0:6d69e896ce38	513
cparata	0:6d69e896ce38	514	#define LSM6DSO_INT_DUR2 0x5AU
cparata	0:6d69e896ce38	515	typedef struct {
cparata	3:4274d9103f1d	516	uint8_t shock : 2;
cparata	3:4274d9103f1d	517	uint8_t quiet : 2;
cparata	3:4274d9103f1d	518	uint8_t dur : 4;
cparata	0:6d69e896ce38	519	} lsm6dso_int_dur2_t;
cparata	0:6d69e896ce38	520
cparata	0:6d69e896ce38	521	#define LSM6DSO_WAKE_UP_THS 0x5BU
cparata	0:6d69e896ce38	522	typedef struct {
cparata	3:4274d9103f1d	523	uint8_t wk_ths : 6;
cparata	3:4274d9103f1d	524	uint8_t usr_off_on_wu : 1;
cparata	3:4274d9103f1d	525	uint8_t single_double_tap : 1;
cparata	0:6d69e896ce38	526	} lsm6dso_wake_up_ths_t;
cparata	0:6d69e896ce38	527
cparata	0:6d69e896ce38	528	#define LSM6DSO_WAKE_UP_DUR 0x5CU
cparata	0:6d69e896ce38	529	typedef struct {
cparata	3:4274d9103f1d	530	uint8_t sleep_dur : 4;
cparata	3:4274d9103f1d	531	uint8_t wake_ths_w : 1;
cparata	3:4274d9103f1d	532	uint8_t wake_dur : 2;
cparata	3:4274d9103f1d	533	uint8_t ff_dur : 1;
cparata	0:6d69e896ce38	534	} lsm6dso_wake_up_dur_t;
cparata	0:6d69e896ce38	535
cparata	0:6d69e896ce38	536	#define LSM6DSO_FREE_FALL 0x5DU
cparata	0:6d69e896ce38	537	typedef struct {
cparata	3:4274d9103f1d	538	uint8_t ff_ths : 3;
cparata	3:4274d9103f1d	539	uint8_t ff_dur : 5;
cparata	0:6d69e896ce38	540	} lsm6dso_free_fall_t;
cparata	0:6d69e896ce38	541
cparata	0:6d69e896ce38	542	#define LSM6DSO_MD1_CFG 0x5EU
cparata	0:6d69e896ce38	543	typedef struct {
cparata	3:4274d9103f1d	544	uint8_t int1_shub : 1;
cparata	3:4274d9103f1d	545	uint8_t int1_emb_func : 1;
cparata	3:4274d9103f1d	546	uint8_t int1_6d : 1;
cparata	3:4274d9103f1d	547	uint8_t int1_double_tap : 1;
cparata	3:4274d9103f1d	548	uint8_t int1_ff : 1;
cparata	3:4274d9103f1d	549	uint8_t int1_wu : 1;
cparata	3:4274d9103f1d	550	uint8_t int1_single_tap : 1;
cparata	3:4274d9103f1d	551	uint8_t int1_sleep_change : 1;
cparata	0:6d69e896ce38	552	} lsm6dso_md1_cfg_t;
cparata	0:6d69e896ce38	553
cparata	0:6d69e896ce38	554	#define LSM6DSO_MD2_CFG 0x5FU
cparata	0:6d69e896ce38	555	typedef struct {
cparata	3:4274d9103f1d	556	uint8_t int2_timestamp : 1;
cparata	3:4274d9103f1d	557	uint8_t int2_emb_func : 1;
cparata	3:4274d9103f1d	558	uint8_t int2_6d : 1;
cparata	3:4274d9103f1d	559	uint8_t int2_double_tap : 1;
cparata	3:4274d9103f1d	560	uint8_t int2_ff : 1;
cparata	3:4274d9103f1d	561	uint8_t int2_wu : 1;
cparata	3:4274d9103f1d	562	uint8_t int2_single_tap : 1;
cparata	3:4274d9103f1d	563	uint8_t int2_sleep_change : 1;
cparata	0:6d69e896ce38	564	} lsm6dso_md2_cfg_t;
cparata	0:6d69e896ce38	565
cparata	0:6d69e896ce38	566	#define LSM6DSO_I3C_BUS_AVB 0x62U
cparata	0:6d69e896ce38	567	typedef struct {
cparata	3:4274d9103f1d	568	uint8_t pd_dis_int1 : 1;
cparata	3:4274d9103f1d	569	uint8_t not_used_01 : 2;
cparata	3:4274d9103f1d	570	uint8_t i3c_bus_avb_sel : 2;
cparata	3:4274d9103f1d	571	uint8_t not_used_02 : 3;
cparata	0:6d69e896ce38	572	} lsm6dso_i3c_bus_avb_t;
cparata	0:6d69e896ce38	573
cparata	0:6d69e896ce38	574	#define LSM6DSO_INTERNAL_FREQ_FINE 0x63U
cparata	0:6d69e896ce38	575	typedef struct {
cparata	3:4274d9103f1d	576	uint8_t freq_fine : 8;
cparata	0:6d69e896ce38	577	} lsm6dso_internal_freq_fine_t;
cparata	0:6d69e896ce38	578
cparata	0:6d69e896ce38	579	#define LSM6DSO_INT_OIS 0x6FU
cparata	0:6d69e896ce38	580	typedef struct {
cparata	3:4274d9103f1d	581	uint8_t st_xl_ois : 2;
cparata	3:4274d9103f1d	582	uint8_t not_used_01 : 3;
cparata	3:4274d9103f1d	583	uint8_t den_lh_ois : 1;
cparata	3:4274d9103f1d	584	uint8_t lvl2_ois : 1;
cparata	3:4274d9103f1d	585	uint8_t int2_drdy_ois : 1;
cparata	0:6d69e896ce38	586	} lsm6dso_int_ois_t;
cparata	0:6d69e896ce38	587
cparata	0:6d69e896ce38	588	#define LSM6DSO_CTRL1_OIS 0x70U
cparata	0:6d69e896ce38	589	typedef struct {
cparata	3:4274d9103f1d	590	uint8_t ois_en_spi2 : 1;
cparata	3:4274d9103f1d	591	uint8_t fs_g_ois : 3; /* fs_125_ois + fs[1:0]_g_ois */
cparata	3:4274d9103f1d	592	uint8_t mode4_en : 1;
cparata	3:4274d9103f1d	593	uint8_t sim_ois : 1;
cparata	3:4274d9103f1d	594	uint8_t lvl1_ois : 1;
cparata	3:4274d9103f1d	595	uint8_t not_used_01 : 1;
cparata	0:6d69e896ce38	596	} lsm6dso_ctrl1_ois_t;
cparata	0:6d69e896ce38	597
cparata	0:6d69e896ce38	598	#define LSM6DSO_CTRL2_OIS 0x71U
cparata	0:6d69e896ce38	599	typedef struct {
cparata	3:4274d9103f1d	600	uint8_t hp_en_ois : 1;
cparata	3:4274d9103f1d	601	uint8_t ftype_ois : 2;
cparata	3:4274d9103f1d	602	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	603	uint8_t hpm_ois : 2;
cparata	3:4274d9103f1d	604	uint8_t not_used_02 : 2;
cparata	0:6d69e896ce38	605	} lsm6dso_ctrl2_ois_t;
cparata	0:6d69e896ce38	606
cparata	0:6d69e896ce38	607	#define LSM6DSO_CTRL3_OIS 0x72U
cparata	0:6d69e896ce38	608	typedef struct {
cparata	3:4274d9103f1d	609	uint8_t st_ois_clampdis : 1;
cparata	3:4274d9103f1d	610	uint8_t st_ois : 2;
cparata	3:4274d9103f1d	611	uint8_t filter_xl_conf_ois : 3;
cparata	3:4274d9103f1d	612	uint8_t fs_xl_ois : 2;
cparata	0:6d69e896ce38	613	} lsm6dso_ctrl3_ois_t;
cparata	0:6d69e896ce38	614
cparata	0:6d69e896ce38	615	#define LSM6DSO_X_OFS_USR 0x73U
cparata	0:6d69e896ce38	616	#define LSM6DSO_Y_OFS_USR 0x74U
cparata	0:6d69e896ce38	617	#define LSM6DSO_Z_OFS_USR 0x75U
cparata	0:6d69e896ce38	618	#define LSM6DSO_FIFO_DATA_OUT_TAG 0x78U
cparata	0:6d69e896ce38	619	typedef struct {
cparata	3:4274d9103f1d	620	uint8_t tag_parity : 1;
cparata	3:4274d9103f1d	621	uint8_t tag_cnt : 2;
cparata	3:4274d9103f1d	622	uint8_t tag_sensor : 5;
cparata	0:6d69e896ce38	623	} lsm6dso_fifo_data_out_tag_t;
cparata	0:6d69e896ce38	624
cparata	0:6d69e896ce38	625	#define LSM6DSO_FIFO_DATA_OUT_X_L 0x79U
cparata	0:6d69e896ce38	626	#define LSM6DSO_FIFO_DATA_OUT_X_H 0x7AU
cparata	0:6d69e896ce38	627	#define LSM6DSO_FIFO_DATA_OUT_Y_L 0x7BU
cparata	0:6d69e896ce38	628	#define LSM6DSO_FIFO_DATA_OUT_Y_H 0x7CU
cparata	0:6d69e896ce38	629	#define LSM6DSO_FIFO_DATA_OUT_Z_L 0x7DU
cparata	0:6d69e896ce38	630	#define LSM6DSO_FIFO_DATA_OUT_Z_H 0x7EU
cparata	0:6d69e896ce38	631	#define LSM6DSO_PAGE_SEL 0x02U
cparata	0:6d69e896ce38	632	typedef struct {
cparata	3:4274d9103f1d	633	uint8_t not_used_01 : 4;
cparata	3:4274d9103f1d	634	uint8_t page_sel : 4;
cparata	0:6d69e896ce38	635	} lsm6dso_page_sel_t;
cparata	0:6d69e896ce38	636
cparata	0:6d69e896ce38	637	#define LSM6DSO_EMB_FUNC_EN_A 0x04U
cparata	0:6d69e896ce38	638	typedef struct {
cparata	3:4274d9103f1d	639	uint8_t not_used_01 : 3;
cparata	3:4274d9103f1d	640	uint8_t pedo_en : 1;
cparata	3:4274d9103f1d	641	uint8_t tilt_en : 1;
cparata	3:4274d9103f1d	642	uint8_t sign_motion_en : 1;
cparata	3:4274d9103f1d	643	uint8_t not_used_02 : 2;
cparata	0:6d69e896ce38	644	} lsm6dso_emb_func_en_a_t;
cparata	0:6d69e896ce38	645
cparata	0:6d69e896ce38	646	#define LSM6DSO_EMB_FUNC_EN_B 0x05U
cparata	0:6d69e896ce38	647	typedef struct {
cparata	3:4274d9103f1d	648	uint8_t fsm_en : 1;
cparata	3:4274d9103f1d	649	uint8_t not_used_01 : 2;
cparata	3:4274d9103f1d	650	uint8_t fifo_compr_en : 1;
cparata	3:4274d9103f1d	651	uint8_t pedo_adv_en : 1;
cparata	3:4274d9103f1d	652	uint8_t not_used_02 : 3;
cparata	0:6d69e896ce38	653	} lsm6dso_emb_func_en_b_t;
cparata	0:6d69e896ce38	654
cparata	0:6d69e896ce38	655	#define LSM6DSO_PAGE_ADDRESS 0x08U
cparata	0:6d69e896ce38	656	typedef struct {
cparata	3:4274d9103f1d	657	uint8_t page_addr : 8;
cparata	0:6d69e896ce38	658	} lsm6dso_page_address_t;
cparata	0:6d69e896ce38	659
cparata	0:6d69e896ce38	660	#define LSM6DSO_PAGE_VALUE 0x09U
cparata	0:6d69e896ce38	661	typedef struct {
cparata	3:4274d9103f1d	662	uint8_t page_value : 8;
cparata	0:6d69e896ce38	663	} lsm6dso_page_value_t;
cparata	0:6d69e896ce38	664
cparata	0:6d69e896ce38	665	#define LSM6DSO_EMB_FUNC_INT1 0x0AU
cparata	0:6d69e896ce38	666	typedef struct {
cparata	3:4274d9103f1d	667	uint8_t not_used_01 : 3;
cparata	3:4274d9103f1d	668	uint8_t int1_step_detector : 1;
cparata	3:4274d9103f1d	669	uint8_t int1_tilt : 1;
cparata	3:4274d9103f1d	670	uint8_t int1_sig_mot : 1;
cparata	3:4274d9103f1d	671	uint8_t not_used_02 : 1;
cparata	3:4274d9103f1d	672	uint8_t int1_fsm_lc : 1;
cparata	0:6d69e896ce38	673	} lsm6dso_emb_func_int1_t;
cparata	0:6d69e896ce38	674
cparata	0:6d69e896ce38	675	#define LSM6DSO_FSM_INT1_A 0x0BU
cparata	0:6d69e896ce38	676	typedef struct {
cparata	3:4274d9103f1d	677	uint8_t int1_fsm1 : 1;
cparata	3:4274d9103f1d	678	uint8_t int1_fsm2 : 1;
cparata	3:4274d9103f1d	679	uint8_t int1_fsm3 : 1;
cparata	3:4274d9103f1d	680	uint8_t int1_fsm4 : 1;
cparata	3:4274d9103f1d	681	uint8_t int1_fsm5 : 1;
cparata	3:4274d9103f1d	682	uint8_t int1_fsm6 : 1;
cparata	3:4274d9103f1d	683	uint8_t int1_fsm7 : 1;
cparata	3:4274d9103f1d	684	uint8_t int1_fsm8 : 1;
cparata	0:6d69e896ce38	685	} lsm6dso_fsm_int1_a_t;
cparata	0:6d69e896ce38	686
cparata	0:6d69e896ce38	687	#define LSM6DSO_FSM_INT1_B 0x0CU
cparata	0:6d69e896ce38	688	typedef struct {
cparata	3:4274d9103f1d	689	uint8_t int1_fsm9 : 1;
cparata	3:4274d9103f1d	690	uint8_t int1_fsm10 : 1;
cparata	3:4274d9103f1d	691	uint8_t int1_fsm11 : 1;
cparata	3:4274d9103f1d	692	uint8_t int1_fsm12 : 1;
cparata	3:4274d9103f1d	693	uint8_t int1_fsm13 : 1;
cparata	3:4274d9103f1d	694	uint8_t int1_fsm14 : 1;
cparata	3:4274d9103f1d	695	uint8_t int1_fsm15 : 1;
cparata	3:4274d9103f1d	696	uint8_t int1_fsm16 : 1;
cparata	0:6d69e896ce38	697	} lsm6dso_fsm_int1_b_t;
cparata	0:6d69e896ce38	698
cparata	0:6d69e896ce38	699	#define LSM6DSO_EMB_FUNC_INT2 0x0EU
cparata	0:6d69e896ce38	700	typedef struct {
cparata	3:4274d9103f1d	701	uint8_t not_used_01 : 3;
cparata	3:4274d9103f1d	702	uint8_t int2_step_detector : 1;
cparata	3:4274d9103f1d	703	uint8_t int2_tilt : 1;
cparata	3:4274d9103f1d	704	uint8_t int2_sig_mot : 1;
cparata	3:4274d9103f1d	705	uint8_t not_used_02 : 1;
cparata	3:4274d9103f1d	706	uint8_t int2_fsm_lc : 1;
cparata	0:6d69e896ce38	707	} lsm6dso_emb_func_int2_t;
cparata	0:6d69e896ce38	708
cparata	0:6d69e896ce38	709	#define LSM6DSO_FSM_INT2_A 0x0FU
cparata	0:6d69e896ce38	710	typedef struct {
cparata	3:4274d9103f1d	711	uint8_t int2_fsm1 : 1;
cparata	3:4274d9103f1d	712	uint8_t int2_fsm2 : 1;
cparata	3:4274d9103f1d	713	uint8_t int2_fsm3 : 1;
cparata	3:4274d9103f1d	714	uint8_t int2_fsm4 : 1;
cparata	3:4274d9103f1d	715	uint8_t int2_fsm5 : 1;
cparata	3:4274d9103f1d	716	uint8_t int2_fsm6 : 1;
cparata	3:4274d9103f1d	717	uint8_t int2_fsm7 : 1;
cparata	3:4274d9103f1d	718	uint8_t int2_fsm8 : 1;
cparata	0:6d69e896ce38	719	} lsm6dso_fsm_int2_a_t;
cparata	0:6d69e896ce38	720
cparata	0:6d69e896ce38	721	#define LSM6DSO_FSM_INT2_B 0x10U
cparata	0:6d69e896ce38	722	typedef struct {
cparata	3:4274d9103f1d	723	uint8_t int2_fsm9 : 1;
cparata	3:4274d9103f1d	724	uint8_t int2_fsm10 : 1;
cparata	3:4274d9103f1d	725	uint8_t int2_fsm11 : 1;
cparata	3:4274d9103f1d	726	uint8_t int2_fsm12 : 1;
cparata	3:4274d9103f1d	727	uint8_t int2_fsm13 : 1;
cparata	3:4274d9103f1d	728	uint8_t int2_fsm14 : 1;
cparata	3:4274d9103f1d	729	uint8_t int2_fsm15 : 1;
cparata	3:4274d9103f1d	730	uint8_t int2_fsm16 : 1;
cparata	0:6d69e896ce38	731	} lsm6dso_fsm_int2_b_t;
cparata	0:6d69e896ce38	732
cparata	0:6d69e896ce38	733	#define LSM6DSO_EMB_FUNC_STATUS 0x12U
cparata	0:6d69e896ce38	734	typedef struct {
cparata	3:4274d9103f1d	735	uint8_t not_used_01 : 3;
cparata	3:4274d9103f1d	736	uint8_t is_step_det : 1;
cparata	3:4274d9103f1d	737	uint8_t is_tilt : 1;
cparata	3:4274d9103f1d	738	uint8_t is_sigmot : 1;
cparata	3:4274d9103f1d	739	uint8_t not_used_02 : 1;
cparata	3:4274d9103f1d	740	uint8_t is_fsm_lc : 1;
cparata	0:6d69e896ce38	741	} lsm6dso_emb_func_status_t;
cparata	0:6d69e896ce38	742
cparata	0:6d69e896ce38	743	#define LSM6DSO_FSM_STATUS_A 0x13U
cparata	0:6d69e896ce38	744	typedef struct {
cparata	3:4274d9103f1d	745	uint8_t is_fsm1 : 1;
cparata	3:4274d9103f1d	746	uint8_t is_fsm2 : 1;
cparata	3:4274d9103f1d	747	uint8_t is_fsm3 : 1;
cparata	3:4274d9103f1d	748	uint8_t is_fsm4 : 1;
cparata	3:4274d9103f1d	749	uint8_t is_fsm5 : 1;
cparata	3:4274d9103f1d	750	uint8_t is_fsm6 : 1;
cparata	3:4274d9103f1d	751	uint8_t is_fsm7 : 1;
cparata	3:4274d9103f1d	752	uint8_t is_fsm8 : 1;
cparata	0:6d69e896ce38	753	} lsm6dso_fsm_status_a_t;
cparata	0:6d69e896ce38	754
cparata	0:6d69e896ce38	755	#define LSM6DSO_FSM_STATUS_B 0x14U
cparata	0:6d69e896ce38	756	typedef struct {
cparata	3:4274d9103f1d	757	uint8_t is_fsm9 : 1;
cparata	3:4274d9103f1d	758	uint8_t is_fsm10 : 1;
cparata	3:4274d9103f1d	759	uint8_t is_fsm11 : 1;
cparata	3:4274d9103f1d	760	uint8_t is_fsm12 : 1;
cparata	3:4274d9103f1d	761	uint8_t is_fsm13 : 1;
cparata	3:4274d9103f1d	762	uint8_t is_fsm14 : 1;
cparata	3:4274d9103f1d	763	uint8_t is_fsm15 : 1;
cparata	3:4274d9103f1d	764	uint8_t is_fsm16 : 1;
cparata	0:6d69e896ce38	765	} lsm6dso_fsm_status_b_t;
cparata	0:6d69e896ce38	766
cparata	0:6d69e896ce38	767	#define LSM6DSO_PAGE_RW 0x17U
cparata	0:6d69e896ce38	768	typedef struct {
cparata	3:4274d9103f1d	769	uint8_t not_used_01 : 5;
cparata	3:4274d9103f1d	770	uint8_t page_rw : 2; /* page_write + page_read */
cparata	3:4274d9103f1d	771	uint8_t emb_func_lir : 1;
cparata	0:6d69e896ce38	772	} lsm6dso_page_rw_t;
cparata	0:6d69e896ce38	773
cparata	0:6d69e896ce38	774	#define LSM6DSO_EMB_FUNC_FIFO_CFG 0x44U
cparata	0:6d69e896ce38	775	typedef struct {
cparata	3:4274d9103f1d	776	uint8_t not_used_00 : 6;
cparata	3:4274d9103f1d	777	uint8_t pedo_fifo_en : 1;
cparata	3:4274d9103f1d	778	uint8_t not_used_01 : 1;
cparata	0:6d69e896ce38	779	} lsm6dso_emb_func_fifo_cfg_t;
cparata	0:6d69e896ce38	780
cparata	0:6d69e896ce38	781	#define LSM6DSO_FSM_ENABLE_A 0x46U
cparata	0:6d69e896ce38	782	typedef struct {
cparata	3:4274d9103f1d	783	uint8_t fsm1_en : 1;
cparata	3:4274d9103f1d	784	uint8_t fsm2_en : 1;
cparata	3:4274d9103f1d	785	uint8_t fsm3_en : 1;
cparata	3:4274d9103f1d	786	uint8_t fsm4_en : 1;
cparata	3:4274d9103f1d	787	uint8_t fsm5_en : 1;
cparata	3:4274d9103f1d	788	uint8_t fsm6_en : 1;
cparata	3:4274d9103f1d	789	uint8_t fsm7_en : 1;
cparata	3:4274d9103f1d	790	uint8_t fsm8_en : 1;
cparata	0:6d69e896ce38	791	} lsm6dso_fsm_enable_a_t;
cparata	0:6d69e896ce38	792
cparata	0:6d69e896ce38	793	#define LSM6DSO_FSM_ENABLE_B 0x47U
cparata	0:6d69e896ce38	794	typedef struct {
cparata	3:4274d9103f1d	795	uint8_t fsm9_en : 1;
cparata	3:4274d9103f1d	796	uint8_t fsm10_en : 1;
cparata	3:4274d9103f1d	797	uint8_t fsm11_en : 1;
cparata	3:4274d9103f1d	798	uint8_t fsm12_en : 1;
cparata	3:4274d9103f1d	799	uint8_t fsm13_en : 1;
cparata	3:4274d9103f1d	800	uint8_t fsm14_en : 1;
cparata	3:4274d9103f1d	801	uint8_t fsm15_en : 1;
cparata	3:4274d9103f1d	802	uint8_t fsm16_en : 1;
cparata	0:6d69e896ce38	803	} lsm6dso_fsm_enable_b_t;
cparata	0:6d69e896ce38	804
cparata	0:6d69e896ce38	805	#define LSM6DSO_FSM_LONG_COUNTER_L 0x48U
cparata	0:6d69e896ce38	806	#define LSM6DSO_FSM_LONG_COUNTER_H 0x49U
cparata	0:6d69e896ce38	807	#define LSM6DSO_FSM_LONG_COUNTER_CLEAR 0x4AU
cparata	0:6d69e896ce38	808	typedef struct {
cparata	3:4274d9103f1d	809	uint8_t fsm_lc_clr : 2; /* fsm_lc_cleared + fsm_lc_clear */
cparata	3:4274d9103f1d	810	uint8_t not_used_01 : 6;
cparata	0:6d69e896ce38	811	} lsm6dso_fsm_long_counter_clear_t;
cparata	0:6d69e896ce38	812
cparata	0:6d69e896ce38	813	#define LSM6DSO_FSM_OUTS1 0x4CU
cparata	0:6d69e896ce38	814	typedef struct {
cparata	3:4274d9103f1d	815	uint8_t n_v : 1;
cparata	3:4274d9103f1d	816	uint8_t p_v : 1;
cparata	3:4274d9103f1d	817	uint8_t n_z : 1;
cparata	3:4274d9103f1d	818	uint8_t p_z : 1;
cparata	3:4274d9103f1d	819	uint8_t n_y : 1;
cparata	3:4274d9103f1d	820	uint8_t p_y : 1;
cparata	3:4274d9103f1d	821	uint8_t n_x : 1;
cparata	3:4274d9103f1d	822	uint8_t p_x : 1;
cparata	0:6d69e896ce38	823	} lsm6dso_fsm_outs1_t;
cparata	0:6d69e896ce38	824
cparata	0:6d69e896ce38	825	#define LSM6DSO_FSM_OUTS2 0x4DU
cparata	0:6d69e896ce38	826	typedef struct {
cparata	3:4274d9103f1d	827	uint8_t n_v : 1;
cparata	3:4274d9103f1d	828	uint8_t p_v : 1;
cparata	3:4274d9103f1d	829	uint8_t n_z : 1;
cparata	3:4274d9103f1d	830	uint8_t p_z : 1;
cparata	3:4274d9103f1d	831	uint8_t n_y : 1;
cparata	3:4274d9103f1d	832	uint8_t p_y : 1;
cparata	3:4274d9103f1d	833	uint8_t n_x : 1;
cparata	3:4274d9103f1d	834	uint8_t p_x : 1;
cparata	0:6d69e896ce38	835	} lsm6dso_fsm_outs2_t;
cparata	0:6d69e896ce38	836
cparata	0:6d69e896ce38	837	#define LSM6DSO_FSM_OUTS3 0x4EU
cparata	0:6d69e896ce38	838	typedef struct {
cparata	3:4274d9103f1d	839	uint8_t n_v : 1;
cparata	3:4274d9103f1d	840	uint8_t p_v : 1;
cparata	3:4274d9103f1d	841	uint8_t n_z : 1;
cparata	3:4274d9103f1d	842	uint8_t p_z : 1;
cparata	3:4274d9103f1d	843	uint8_t n_y : 1;
cparata	3:4274d9103f1d	844	uint8_t p_y : 1;
cparata	3:4274d9103f1d	845	uint8_t n_x : 1;
cparata	3:4274d9103f1d	846	uint8_t p_x : 1;
cparata	0:6d69e896ce38	847	} lsm6dso_fsm_outs3_t;
cparata	0:6d69e896ce38	848
cparata	0:6d69e896ce38	849	#define LSM6DSO_FSM_OUTS4 0x4FU
cparata	0:6d69e896ce38	850	typedef struct {
cparata	3:4274d9103f1d	851	uint8_t n_v : 1;
cparata	3:4274d9103f1d	852	uint8_t p_v : 1;
cparata	3:4274d9103f1d	853	uint8_t n_z : 1;
cparata	3:4274d9103f1d	854	uint8_t p_z : 1;
cparata	3:4274d9103f1d	855	uint8_t n_y : 1;
cparata	3:4274d9103f1d	856	uint8_t p_y : 1;
cparata	3:4274d9103f1d	857	uint8_t n_x : 1;
cparata	3:4274d9103f1d	858	uint8_t p_x : 1;
cparata	0:6d69e896ce38	859	} lsm6dso_fsm_outs4_t;
cparata	0:6d69e896ce38	860
cparata	0:6d69e896ce38	861	#define LSM6DSO_FSM_OUTS5 0x50U
cparata	0:6d69e896ce38	862	typedef struct {
cparata	3:4274d9103f1d	863	uint8_t n_v : 1;
cparata	3:4274d9103f1d	864	uint8_t p_v : 1;
cparata	3:4274d9103f1d	865	uint8_t n_z : 1;
cparata	3:4274d9103f1d	866	uint8_t p_z : 1;
cparata	3:4274d9103f1d	867	uint8_t n_y : 1;
cparata	3:4274d9103f1d	868	uint8_t p_y : 1;
cparata	3:4274d9103f1d	869	uint8_t n_x : 1;
cparata	3:4274d9103f1d	870	uint8_t p_x : 1;
cparata	0:6d69e896ce38	871	} lsm6dso_fsm_outs5_t;
cparata	0:6d69e896ce38	872
cparata	0:6d69e896ce38	873	#define LSM6DSO_FSM_OUTS6 0x51U
cparata	0:6d69e896ce38	874	typedef struct {
cparata	3:4274d9103f1d	875	uint8_t n_v : 1;
cparata	3:4274d9103f1d	876	uint8_t p_v : 1;
cparata	3:4274d9103f1d	877	uint8_t n_z : 1;
cparata	3:4274d9103f1d	878	uint8_t p_z : 1;
cparata	3:4274d9103f1d	879	uint8_t n_y : 1;
cparata	3:4274d9103f1d	880	uint8_t p_y : 1;
cparata	3:4274d9103f1d	881	uint8_t n_x : 1;
cparata	3:4274d9103f1d	882	uint8_t p_x : 1;
cparata	0:6d69e896ce38	883	} lsm6dso_fsm_outs6_t;
cparata	0:6d69e896ce38	884
cparata	0:6d69e896ce38	885	#define LSM6DSO_FSM_OUTS7 0x52U
cparata	0:6d69e896ce38	886	typedef struct {
cparata	3:4274d9103f1d	887	uint8_t n_v : 1;
cparata	3:4274d9103f1d	888	uint8_t p_v : 1;
cparata	3:4274d9103f1d	889	uint8_t n_z : 1;
cparata	3:4274d9103f1d	890	uint8_t p_z : 1;
cparata	3:4274d9103f1d	891	uint8_t n_y : 1;
cparata	3:4274d9103f1d	892	uint8_t p_y : 1;
cparata	3:4274d9103f1d	893	uint8_t n_x : 1;
cparata	3:4274d9103f1d	894	uint8_t p_x : 1;
cparata	0:6d69e896ce38	895	} lsm6dso_fsm_outs7_t;
cparata	0:6d69e896ce38	896
cparata	0:6d69e896ce38	897	#define LSM6DSO_FSM_OUTS8 0x53U
cparata	0:6d69e896ce38	898	typedef struct {
cparata	3:4274d9103f1d	899	uint8_t n_v : 1;
cparata	3:4274d9103f1d	900	uint8_t p_v : 1;
cparata	3:4274d9103f1d	901	uint8_t n_z : 1;
cparata	3:4274d9103f1d	902	uint8_t p_z : 1;
cparata	3:4274d9103f1d	903	uint8_t n_y : 1;
cparata	3:4274d9103f1d	904	uint8_t p_y : 1;
cparata	3:4274d9103f1d	905	uint8_t n_x : 1;
cparata	3:4274d9103f1d	906	uint8_t p_x : 1;
cparata	0:6d69e896ce38	907	} lsm6dso_fsm_outs8_t;
cparata	0:6d69e896ce38	908
cparata	0:6d69e896ce38	909	#define LSM6DSO_FSM_OUTS9 0x54U
cparata	0:6d69e896ce38	910	typedef struct {
cparata	3:4274d9103f1d	911	uint8_t n_v : 1;
cparata	3:4274d9103f1d	912	uint8_t p_v : 1;
cparata	3:4274d9103f1d	913	uint8_t n_z : 1;
cparata	3:4274d9103f1d	914	uint8_t p_z : 1;
cparata	3:4274d9103f1d	915	uint8_t n_y : 1;
cparata	3:4274d9103f1d	916	uint8_t p_y : 1;
cparata	3:4274d9103f1d	917	uint8_t n_x : 1;
cparata	3:4274d9103f1d	918	uint8_t p_x : 1;
cparata	0:6d69e896ce38	919	} lsm6dso_fsm_outs9_t;
cparata	0:6d69e896ce38	920
cparata	0:6d69e896ce38	921	#define LSM6DSO_FSM_OUTS10 0x55U
cparata	0:6d69e896ce38	922	typedef struct {
cparata	3:4274d9103f1d	923	uint8_t n_v : 1;
cparata	3:4274d9103f1d	924	uint8_t p_v : 1;
cparata	3:4274d9103f1d	925	uint8_t n_z : 1;
cparata	3:4274d9103f1d	926	uint8_t p_z : 1;
cparata	3:4274d9103f1d	927	uint8_t n_y : 1;
cparata	3:4274d9103f1d	928	uint8_t p_y : 1;
cparata	3:4274d9103f1d	929	uint8_t n_x : 1;
cparata	3:4274d9103f1d	930	uint8_t p_x : 1;
cparata	0:6d69e896ce38	931	} lsm6dso_fsm_outs10_t;
cparata	0:6d69e896ce38	932
cparata	0:6d69e896ce38	933	#define LSM6DSO_FSM_OUTS11 0x56U
cparata	0:6d69e896ce38	934	typedef struct {
cparata	3:4274d9103f1d	935	uint8_t n_v : 1;
cparata	3:4274d9103f1d	936	uint8_t p_v : 1;
cparata	3:4274d9103f1d	937	uint8_t n_z : 1;
cparata	3:4274d9103f1d	938	uint8_t p_z : 1;
cparata	3:4274d9103f1d	939	uint8_t n_y : 1;
cparata	3:4274d9103f1d	940	uint8_t p_y : 1;
cparata	3:4274d9103f1d	941	uint8_t n_x : 1;
cparata	3:4274d9103f1d	942	uint8_t p_x : 1;
cparata	0:6d69e896ce38	943	} lsm6dso_fsm_outs11_t;
cparata	0:6d69e896ce38	944
cparata	0:6d69e896ce38	945	#define LSM6DSO_FSM_OUTS12 0x57U
cparata	0:6d69e896ce38	946	typedef struct {
cparata	3:4274d9103f1d	947	uint8_t n_v : 1;
cparata	3:4274d9103f1d	948	uint8_t p_v : 1;
cparata	3:4274d9103f1d	949	uint8_t n_z : 1;
cparata	3:4274d9103f1d	950	uint8_t p_z : 1;
cparata	3:4274d9103f1d	951	uint8_t n_y : 1;
cparata	3:4274d9103f1d	952	uint8_t p_y : 1;
cparata	3:4274d9103f1d	953	uint8_t n_x : 1;
cparata	3:4274d9103f1d	954	uint8_t p_x : 1;
cparata	0:6d69e896ce38	955	} lsm6dso_fsm_outs12_t;
cparata	0:6d69e896ce38	956
cparata	0:6d69e896ce38	957	#define LSM6DSO_FSM_OUTS13 0x58U
cparata	0:6d69e896ce38	958	typedef struct {
cparata	3:4274d9103f1d	959	uint8_t n_v : 1;
cparata	3:4274d9103f1d	960	uint8_t p_v : 1;
cparata	3:4274d9103f1d	961	uint8_t n_z : 1;
cparata	3:4274d9103f1d	962	uint8_t p_z : 1;
cparata	3:4274d9103f1d	963	uint8_t n_y : 1;
cparata	3:4274d9103f1d	964	uint8_t p_y : 1;
cparata	3:4274d9103f1d	965	uint8_t n_x : 1;
cparata	3:4274d9103f1d	966	uint8_t p_x : 1;
cparata	0:6d69e896ce38	967	} lsm6dso_fsm_outs13_t;
cparata	0:6d69e896ce38	968
cparata	0:6d69e896ce38	969	#define LSM6DSO_FSM_OUTS14 0x59U
cparata	0:6d69e896ce38	970	typedef struct {
cparata	3:4274d9103f1d	971	uint8_t n_v : 1;
cparata	3:4274d9103f1d	972	uint8_t p_v : 1;
cparata	3:4274d9103f1d	973	uint8_t n_z : 1;
cparata	3:4274d9103f1d	974	uint8_t p_z : 1;
cparata	3:4274d9103f1d	975	uint8_t n_y : 1;
cparata	3:4274d9103f1d	976	uint8_t p_y : 1;
cparata	3:4274d9103f1d	977	uint8_t n_x : 1;
cparata	3:4274d9103f1d	978	uint8_t p_x : 1;
cparata	0:6d69e896ce38	979	} lsm6dso_fsm_outs14_t;
cparata	0:6d69e896ce38	980
cparata	0:6d69e896ce38	981	#define LSM6DSO_FSM_OUTS15 0x5AU
cparata	0:6d69e896ce38	982	typedef struct {
cparata	3:4274d9103f1d	983	uint8_t n_v : 1;
cparata	3:4274d9103f1d	984	uint8_t p_v : 1;
cparata	3:4274d9103f1d	985	uint8_t n_z : 1;
cparata	3:4274d9103f1d	986	uint8_t p_z : 1;
cparata	3:4274d9103f1d	987	uint8_t n_y : 1;
cparata	3:4274d9103f1d	988	uint8_t p_y : 1;
cparata	3:4274d9103f1d	989	uint8_t n_x : 1;
cparata	3:4274d9103f1d	990	uint8_t p_x : 1;
cparata	0:6d69e896ce38	991	} lsm6dso_fsm_outs15_t;
cparata	0:6d69e896ce38	992
cparata	0:6d69e896ce38	993	#define LSM6DSO_FSM_OUTS16 0x5BU
cparata	0:6d69e896ce38	994	typedef struct {
cparata	3:4274d9103f1d	995	uint8_t n_v : 1;
cparata	3:4274d9103f1d	996	uint8_t p_v : 1;
cparata	3:4274d9103f1d	997	uint8_t n_z : 1;
cparata	3:4274d9103f1d	998	uint8_t p_z : 1;
cparata	3:4274d9103f1d	999	uint8_t n_y : 1;
cparata	3:4274d9103f1d	1000	uint8_t p_y : 1;
cparata	3:4274d9103f1d	1001	uint8_t n_x : 1;
cparata	3:4274d9103f1d	1002	uint8_t p_x : 1;
cparata	0:6d69e896ce38	1003	} lsm6dso_fsm_outs16_t;
cparata	0:6d69e896ce38	1004
cparata	0:6d69e896ce38	1005	#define LSM6DSO_EMB_FUNC_ODR_CFG_B 0x5FU
cparata	0:6d69e896ce38	1006	typedef struct {
cparata	3:4274d9103f1d	1007	uint8_t not_used_01 : 3;
cparata	3:4274d9103f1d	1008	uint8_t fsm_odr : 2;
cparata	3:4274d9103f1d	1009	uint8_t not_used_02 : 3;
cparata	0:6d69e896ce38	1010	} lsm6dso_emb_func_odr_cfg_b_t;
cparata	0:6d69e896ce38	1011
cparata	0:6d69e896ce38	1012	#define LSM6DSO_STEP_COUNTER_L 0x62U
cparata	0:6d69e896ce38	1013	#define LSM6DSO_STEP_COUNTER_H 0x63U
cparata	0:6d69e896ce38	1014	#define LSM6DSO_EMB_FUNC_SRC 0x64U
cparata	0:6d69e896ce38	1015	typedef struct {
cparata	3:4274d9103f1d	1016	uint8_t not_used_01 : 2;
cparata	3:4274d9103f1d	1017	uint8_t stepcounter_bit_set : 1;
cparata	3:4274d9103f1d	1018	uint8_t step_overflow : 1;
cparata	3:4274d9103f1d	1019	uint8_t step_count_delta_ia : 1;
cparata	3:4274d9103f1d	1020	uint8_t step_detected : 1;
cparata	3:4274d9103f1d	1021	uint8_t not_used_02 : 1;
cparata	3:4274d9103f1d	1022	uint8_t pedo_rst_step : 1;
cparata	0:6d69e896ce38	1023	} lsm6dso_emb_func_src_t;
cparata	0:6d69e896ce38	1024
cparata	0:6d69e896ce38	1025	#define LSM6DSO_EMB_FUNC_INIT_A 0x66U
cparata	0:6d69e896ce38	1026	typedef struct {
cparata	3:4274d9103f1d	1027	uint8_t not_used_01 : 3;
cparata	3:4274d9103f1d	1028	uint8_t step_det_init : 1;
cparata	3:4274d9103f1d	1029	uint8_t tilt_init : 1;
cparata	3:4274d9103f1d	1030	uint8_t sig_mot_init : 1;
cparata	3:4274d9103f1d	1031	uint8_t not_used_02 : 2;
cparata	0:6d69e896ce38	1032	} lsm6dso_emb_func_init_a_t;
cparata	0:6d69e896ce38	1033
cparata	0:6d69e896ce38	1034	#define LSM6DSO_EMB_FUNC_INIT_B 0x67U
cparata	0:6d69e896ce38	1035	typedef struct {
cparata	3:4274d9103f1d	1036	uint8_t fsm_init : 1;
cparata	3:4274d9103f1d	1037	uint8_t not_used_01 : 2;
cparata	3:4274d9103f1d	1038	uint8_t fifo_compr_init : 1;
cparata	3:4274d9103f1d	1039	uint8_t not_used_02 : 4;
cparata	0:6d69e896ce38	1040	} lsm6dso_emb_func_init_b_t;
cparata	0:6d69e896ce38	1041
cparata	0:6d69e896ce38	1042	#define LSM6DSO_MAG_SENSITIVITY_L 0xBAU
cparata	0:6d69e896ce38	1043	#define LSM6DSO_MAG_SENSITIVITY_H 0xBBU
cparata	0:6d69e896ce38	1044	#define LSM6DSO_MAG_OFFX_L 0xC0U
cparata	0:6d69e896ce38	1045	#define LSM6DSO_MAG_OFFX_H 0xC1U
cparata	0:6d69e896ce38	1046	#define LSM6DSO_MAG_OFFY_L 0xC2U
cparata	0:6d69e896ce38	1047	#define LSM6DSO_MAG_OFFY_H 0xC3U
cparata	0:6d69e896ce38	1048	#define LSM6DSO_MAG_OFFZ_L 0xC4U
cparata	0:6d69e896ce38	1049	#define LSM6DSO_MAG_OFFZ_H 0xC5U
cparata	0:6d69e896ce38	1050	#define LSM6DSO_MAG_SI_XX_L 0xC6U
cparata	0:6d69e896ce38	1051	#define LSM6DSO_MAG_SI_XX_H 0xC7U
cparata	0:6d69e896ce38	1052	#define LSM6DSO_MAG_SI_XY_L 0xC8U
cparata	0:6d69e896ce38	1053	#define LSM6DSO_MAG_SI_XY_H 0xC9U
cparata	0:6d69e896ce38	1054	#define LSM6DSO_MAG_SI_XZ_L 0xCAU
cparata	0:6d69e896ce38	1055	#define LSM6DSO_MAG_SI_XZ_H 0xCBU
cparata	0:6d69e896ce38	1056	#define LSM6DSO_MAG_SI_YY_L 0xCCU
cparata	0:6d69e896ce38	1057	#define LSM6DSO_MAG_SI_YY_H 0xCDU
cparata	0:6d69e896ce38	1058	#define LSM6DSO_MAG_SI_YZ_L 0xCEU
cparata	0:6d69e896ce38	1059	#define LSM6DSO_MAG_SI_YZ_H 0xCFU
cparata	0:6d69e896ce38	1060	#define LSM6DSO_MAG_SI_ZZ_L 0xD0U
cparata	0:6d69e896ce38	1061	#define LSM6DSO_MAG_SI_ZZ_H 0xD1U
cparata	0:6d69e896ce38	1062	#define LSM6DSO_MAG_CFG_A 0xD4U
cparata	0:6d69e896ce38	1063	typedef struct {
cparata	3:4274d9103f1d	1064	uint8_t mag_z_axis : 3;
cparata	3:4274d9103f1d	1065	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	1066	uint8_t mag_y_axis : 3;
cparata	3:4274d9103f1d	1067	uint8_t not_used_02 : 1;
cparata	0:6d69e896ce38	1068	} lsm6dso_mag_cfg_a_t;
cparata	0:6d69e896ce38	1069
cparata	0:6d69e896ce38	1070	#define LSM6DSO_MAG_CFG_B 0xD5U
cparata	0:6d69e896ce38	1071	typedef struct {
cparata	3:4274d9103f1d	1072	uint8_t mag_x_axis : 3;
cparata	3:4274d9103f1d	1073	uint8_t not_used_01 : 5;
cparata	0:6d69e896ce38	1074	} lsm6dso_mag_cfg_b_t;
cparata	0:6d69e896ce38	1075
cparata	0:6d69e896ce38	1076	#define LSM6DSO_FSM_LC_TIMEOUT_L 0x17AU
cparata	0:6d69e896ce38	1077	#define LSM6DSO_FSM_LC_TIMEOUT_H 0x17BU
cparata	0:6d69e896ce38	1078	#define LSM6DSO_FSM_PROGRAMS 0x17CU
cparata	0:6d69e896ce38	1079	#define LSM6DSO_FSM_START_ADD_L 0x17EU
cparata	0:6d69e896ce38	1080	#define LSM6DSO_FSM_START_ADD_H 0x17FU
cparata	0:6d69e896ce38	1081	#define LSM6DSO_PEDO_CMD_REG 0x183U
cparata	0:6d69e896ce38	1082	typedef struct {
cparata	3:4274d9103f1d	1083	uint8_t ad_det_en : 1;
cparata	3:4274d9103f1d	1084	uint8_t not_used_01 : 1;
cparata	3:4274d9103f1d	1085	uint8_t fp_rejection_en : 1;
cparata	3:4274d9103f1d	1086	uint8_t carry_count_en : 1;
cparata	3:4274d9103f1d	1087	uint8_t not_used_02 : 4;
cparata	0:6d69e896ce38	1088	} lsm6dso_pedo_cmd_reg_t;
cparata	0:6d69e896ce38	1089
cparata	0:6d69e896ce38	1090	#define LSM6DSO_PEDO_DEB_STEPS_CONF 0x184U
cparata	0:6d69e896ce38	1091	#define LSM6DSO_PEDO_SC_DELTAT_L 0x1D0U
cparata	0:6d69e896ce38	1092	#define LSM6DSO_PEDO_SC_DELTAT_H 0x1D1U
cparata	0:6d69e896ce38	1093	#define LSM6DSO_SENSOR_HUB_1 0x02U
cparata	0:6d69e896ce38	1094	typedef struct {
cparata	3:4274d9103f1d	1095	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1096	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1097	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1098	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1099	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1100	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1101	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1102	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1103	} lsm6dso_sensor_hub_1_t;
cparata	0:6d69e896ce38	1104
cparata	0:6d69e896ce38	1105	#define LSM6DSO_SENSOR_HUB_2 0x03U
cparata	0:6d69e896ce38	1106	typedef struct {
cparata	3:4274d9103f1d	1107	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1108	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1109	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1110	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1111	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1112	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1113	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1114	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1115	} lsm6dso_sensor_hub_2_t;
cparata	0:6d69e896ce38	1116
cparata	0:6d69e896ce38	1117	#define LSM6DSO_SENSOR_HUB_3 0x04U
cparata	0:6d69e896ce38	1118	typedef struct {
cparata	3:4274d9103f1d	1119	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1120	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1121	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1122	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1123	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1124	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1125	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1126	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1127	} lsm6dso_sensor_hub_3_t;
cparata	0:6d69e896ce38	1128
cparata	0:6d69e896ce38	1129	#define LSM6DSO_SENSOR_HUB_4 0x05U
cparata	0:6d69e896ce38	1130	typedef struct {
cparata	3:4274d9103f1d	1131	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1132	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1133	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1134	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1135	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1136	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1137	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1138	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1139	} lsm6dso_sensor_hub_4_t;
cparata	0:6d69e896ce38	1140
cparata	0:6d69e896ce38	1141	#define LSM6DSO_SENSOR_HUB_5 0x06U
cparata	0:6d69e896ce38	1142	typedef struct {
cparata	3:4274d9103f1d	1143	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1144	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1145	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1146	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1147	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1148	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1149	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1150	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1151	} lsm6dso_sensor_hub_5_t;
cparata	0:6d69e896ce38	1152
cparata	0:6d69e896ce38	1153	#define LSM6DSO_SENSOR_HUB_6 0x07U
cparata	0:6d69e896ce38	1154	typedef struct {
cparata	3:4274d9103f1d	1155	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1156	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1157	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1158	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1159	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1160	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1161	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1162	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1163	} lsm6dso_sensor_hub_6_t;
cparata	0:6d69e896ce38	1164
cparata	0:6d69e896ce38	1165	#define LSM6DSO_SENSOR_HUB_7 0x08U
cparata	0:6d69e896ce38	1166	typedef struct {
cparata	3:4274d9103f1d	1167	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1168	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1169	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1170	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1171	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1172	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1173	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1174	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1175	} lsm6dso_sensor_hub_7_t;
cparata	0:6d69e896ce38	1176
cparata	0:6d69e896ce38	1177	#define LSM6DSO_SENSOR_HUB_8 0x09U
cparata	0:6d69e896ce38	1178	typedef struct {
cparata	3:4274d9103f1d	1179	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1180	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1181	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1182	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1183	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1184	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1185	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1186	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1187	} lsm6dso_sensor_hub_8_t;
cparata	0:6d69e896ce38	1188
cparata	0:6d69e896ce38	1189	#define LSM6DSO_SENSOR_HUB_9 0x0AU
cparata	0:6d69e896ce38	1190	typedef struct {
cparata	3:4274d9103f1d	1191	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1192	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1193	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1194	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1195	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1196	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1197	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1198	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1199	} lsm6dso_sensor_hub_9_t;
cparata	0:6d69e896ce38	1200
cparata	0:6d69e896ce38	1201	#define LSM6DSO_SENSOR_HUB_10 0x0BU
cparata	0:6d69e896ce38	1202	typedef struct {
cparata	3:4274d9103f1d	1203	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1204	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1205	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1206	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1207	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1208	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1209	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1210	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1211	} lsm6dso_sensor_hub_10_t;
cparata	0:6d69e896ce38	1212
cparata	0:6d69e896ce38	1213	#define LSM6DSO_SENSOR_HUB_11 0x0CU
cparata	0:6d69e896ce38	1214	typedef struct {
cparata	3:4274d9103f1d	1215	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1216	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1217	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1218	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1219	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1220	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1221	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1222	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1223	} lsm6dso_sensor_hub_11_t;
cparata	0:6d69e896ce38	1224
cparata	0:6d69e896ce38	1225	#define LSM6DSO_SENSOR_HUB_12 0x0DU
cparata	0:6d69e896ce38	1226	typedef struct {
cparata	3:4274d9103f1d	1227	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1228	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1229	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1230	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1231	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1232	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1233	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1234	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1235	} lsm6dso_sensor_hub_12_t;
cparata	0:6d69e896ce38	1236
cparata	0:6d69e896ce38	1237	#define LSM6DSO_SENSOR_HUB_13 0x0EU
cparata	0:6d69e896ce38	1238	typedef struct {
cparata	3:4274d9103f1d	1239	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1240	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1241	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1242	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1243	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1244	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1245	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1246	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1247	} lsm6dso_sensor_hub_13_t;
cparata	0:6d69e896ce38	1248
cparata	0:6d69e896ce38	1249	#define LSM6DSO_SENSOR_HUB_14 0x0FU
cparata	0:6d69e896ce38	1250	typedef struct {
cparata	3:4274d9103f1d	1251	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1252	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1253	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1254	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1255	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1256	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1257	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1258	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1259	} lsm6dso_sensor_hub_14_t;
cparata	0:6d69e896ce38	1260
cparata	0:6d69e896ce38	1261	#define LSM6DSO_SENSOR_HUB_15 0x10U
cparata	0:6d69e896ce38	1262	typedef struct {
cparata	3:4274d9103f1d	1263	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1264	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1265	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1266	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1267	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1268	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1269	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1270	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1271	} lsm6dso_sensor_hub_15_t;
cparata	0:6d69e896ce38	1272
cparata	0:6d69e896ce38	1273	#define LSM6DSO_SENSOR_HUB_16 0x11U
cparata	0:6d69e896ce38	1274	typedef struct {
cparata	3:4274d9103f1d	1275	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1276	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1277	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1278	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1279	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1280	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1281	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1282	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1283	} lsm6dso_sensor_hub_16_t;
cparata	0:6d69e896ce38	1284
cparata	0:6d69e896ce38	1285	#define LSM6DSO_SENSOR_HUB_17 0x12U
cparata	0:6d69e896ce38	1286	typedef struct {
cparata	3:4274d9103f1d	1287	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1288	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1289	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1290	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1291	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1292	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1293	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1294	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1295	} lsm6dso_sensor_hub_17_t;
cparata	0:6d69e896ce38	1296
cparata	0:6d69e896ce38	1297	#define LSM6DSO_SENSOR_HUB_18 0x13U
cparata	0:6d69e896ce38	1298	typedef struct {
cparata	3:4274d9103f1d	1299	uint8_t bit0 : 1;
cparata	3:4274d9103f1d	1300	uint8_t bit1 : 1;
cparata	3:4274d9103f1d	1301	uint8_t bit2 : 1;
cparata	3:4274d9103f1d	1302	uint8_t bit3 : 1;
cparata	3:4274d9103f1d	1303	uint8_t bit4 : 1;
cparata	3:4274d9103f1d	1304	uint8_t bit5 : 1;
cparata	3:4274d9103f1d	1305	uint8_t bit6 : 1;
cparata	3:4274d9103f1d	1306	uint8_t bit7 : 1;
cparata	0:6d69e896ce38	1307	} lsm6dso_sensor_hub_18_t;
cparata	0:6d69e896ce38	1308
cparata	0:6d69e896ce38	1309	#define LSM6DSO_MASTER_CONFIG 0x14U
cparata	0:6d69e896ce38	1310	typedef struct {
cparata	3:4274d9103f1d	1311	uint8_t aux_sens_on : 2;
cparata	3:4274d9103f1d	1312	uint8_t master_on : 1;
cparata	3:4274d9103f1d	1313	uint8_t shub_pu_en : 1;
cparata	3:4274d9103f1d	1314	uint8_t pass_through_mode : 1;
cparata	3:4274d9103f1d	1315	uint8_t start_config : 1;
cparata	3:4274d9103f1d	1316	uint8_t write_once : 1;
cparata	3:4274d9103f1d	1317	uint8_t rst_master_regs : 1;
cparata	0:6d69e896ce38	1318	} lsm6dso_master_config_t;
cparata	0:6d69e896ce38	1319
cparata	0:6d69e896ce38	1320	#define LSM6DSO_SLV0_ADD 0x15U
cparata	0:6d69e896ce38	1321	typedef struct {
cparata	3:4274d9103f1d	1322	uint8_t rw_0 : 1;
cparata	3:4274d9103f1d	1323	uint8_t slave0 : 7;
cparata	0:6d69e896ce38	1324	} lsm6dso_slv0_add_t;
cparata	0:6d69e896ce38	1325
cparata	0:6d69e896ce38	1326	#define LSM6DSO_SLV0_SUBADD 0x16U
cparata	0:6d69e896ce38	1327	typedef struct {
cparata	3:4274d9103f1d	1328	uint8_t slave0_reg : 8;
cparata	0:6d69e896ce38	1329	} lsm6dso_slv0_subadd_t;
cparata	0:6d69e896ce38	1330
cparata	0:6d69e896ce38	1331	#define LSM6DSO_SLV0_CONFIG 0x17U
cparata	0:6d69e896ce38	1332	typedef struct {
cparata	3:4274d9103f1d	1333	uint8_t slave0_numop : 3;
cparata	3:4274d9103f1d	1334	uint8_t batch_ext_sens_0_en : 1;
cparata	3:4274d9103f1d	1335	uint8_t not_used_01 : 2;
cparata	3:4274d9103f1d	1336	uint8_t shub_odr : 2;
cparata	0:6d69e896ce38	1337	} lsm6dso_slv0_config_t;
cparata	0:6d69e896ce38	1338
cparata	0:6d69e896ce38	1339	#define LSM6DSO_SLV1_ADD 0x18U
cparata	0:6d69e896ce38	1340	typedef struct {
cparata	3:4274d9103f1d	1341	uint8_t r_1 : 1;
cparata	3:4274d9103f1d	1342	uint8_t slave1_add : 7;
cparata	0:6d69e896ce38	1343	} lsm6dso_slv1_add_t;
cparata	0:6d69e896ce38	1344
cparata	0:6d69e896ce38	1345	#define LSM6DSO_SLV1_SUBADD 0x19U
cparata	0:6d69e896ce38	1346	typedef struct {
cparata	3:4274d9103f1d	1347	uint8_t slave1_reg : 8;
cparata	0:6d69e896ce38	1348	} lsm6dso_slv1_subadd_t;
cparata	0:6d69e896ce38	1349
cparata	0:6d69e896ce38	1350	#define LSM6DSO_SLV1_CONFIG 0x1AU
cparata	0:6d69e896ce38	1351	typedef struct {
cparata	3:4274d9103f1d	1352	uint8_t slave1_numop : 3;
cparata	3:4274d9103f1d	1353	uint8_t batch_ext_sens_1_en : 1;
cparata	3:4274d9103f1d	1354	uint8_t not_used_01 : 4;
cparata	0:6d69e896ce38	1355	} lsm6dso_slv1_config_t;
cparata	0:6d69e896ce38	1356
cparata	0:6d69e896ce38	1357	#define LSM6DSO_SLV2_ADD 0x1BU
cparata	0:6d69e896ce38	1358	typedef struct {
cparata	3:4274d9103f1d	1359	uint8_t r_2 : 1;
cparata	3:4274d9103f1d	1360	uint8_t slave2_add : 7;
cparata	0:6d69e896ce38	1361	} lsm6dso_slv2_add_t;
cparata	0:6d69e896ce38	1362
cparata	0:6d69e896ce38	1363	#define LSM6DSO_SLV2_SUBADD 0x1CU
cparata	0:6d69e896ce38	1364	typedef struct {
cparata	3:4274d9103f1d	1365	uint8_t slave2_reg : 8;
cparata	0:6d69e896ce38	1366	} lsm6dso_slv2_subadd_t;
cparata	0:6d69e896ce38	1367
cparata	0:6d69e896ce38	1368	#define LSM6DSO_SLV2_CONFIG 0x1DU
cparata	0:6d69e896ce38	1369	typedef struct {
cparata	3:4274d9103f1d	1370	uint8_t slave2_numop : 3;
cparata	3:4274d9103f1d	1371	uint8_t batch_ext_sens_2_en : 1;
cparata	3:4274d9103f1d	1372	uint8_t not_used_01 : 4;
cparata	0:6d69e896ce38	1373	} lsm6dso_slv2_config_t;
cparata	0:6d69e896ce38	1374
cparata	0:6d69e896ce38	1375	#define LSM6DSO_SLV3_ADD 0x1EU
cparata	0:6d69e896ce38	1376	typedef struct {
cparata	3:4274d9103f1d	1377	uint8_t r_3 : 1;
cparata	3:4274d9103f1d	1378	uint8_t slave3_add : 7;
cparata	0:6d69e896ce38	1379	} lsm6dso_slv3_add_t;
cparata	0:6d69e896ce38	1380
cparata	0:6d69e896ce38	1381	#define LSM6DSO_SLV3_SUBADD 0x1FU
cparata	0:6d69e896ce38	1382	typedef struct {
cparata	3:4274d9103f1d	1383	uint8_t slave3_reg : 8;
cparata	0:6d69e896ce38	1384	} lsm6dso_slv3_subadd_t;
cparata	0:6d69e896ce38	1385
cparata	0:6d69e896ce38	1386	#define LSM6DSO_SLV3_CONFIG 0x20U
cparata	0:6d69e896ce38	1387	typedef struct {
cparata	3:4274d9103f1d	1388	uint8_t slave3_numop : 3;
cparata	3:4274d9103f1d	1389	uint8_t batch_ext_sens_3_en : 1;
cparata	3:4274d9103f1d	1390	uint8_t not_used_01 : 4;
cparata	0:6d69e896ce38	1391	} lsm6dso_slv3_config_t;
cparata	0:6d69e896ce38	1392
cparata	0:6d69e896ce38	1393	#define LSM6DSO_DATAWRITE_SLV0 0x21U
cparata	0:6d69e896ce38	1394	typedef struct {
cparata	3:4274d9103f1d	1395	uint8_t slave0_dataw : 8;
cparata	0:6d69e896ce38	1396	} lsm6dso_datawrite_src_mode_sub_slv0_t;
cparata	0:6d69e896ce38	1397
cparata	0:6d69e896ce38	1398	#define LSM6DSO_STATUS_MASTER 0x22U
cparata	0:6d69e896ce38	1399	typedef struct {
cparata	3:4274d9103f1d	1400	uint8_t sens_hub_endop : 1;
cparata	3:4274d9103f1d	1401	uint8_t not_used_01 : 2;
cparata	3:4274d9103f1d	1402	uint8_t slave0_nack : 1;
cparata	3:4274d9103f1d	1403	uint8_t slave1_nack : 1;
cparata	3:4274d9103f1d	1404	uint8_t slave2_nack : 1;
cparata	3:4274d9103f1d	1405	uint8_t slave3_nack : 1;
cparata	3:4274d9103f1d	1406	uint8_t wr_once_done : 1;
cparata	0:6d69e896ce38	1407	} lsm6dso_status_master_t;
cparata	0:6d69e896ce38	1408
cparata	2:4d14e9edf37e	1409	#define LSM6DSO_START_FSM_ADD 0x0400U
cparata	2:4d14e9edf37e	1410
cparata	0:6d69e896ce38	1411	/**
cparata	0:6d69e896ce38	1412	* @defgroup LSM6DSO_Register_Union
cparata	0:6d69e896ce38	1413	* @brief This union group all the registers that has a bitfield
cparata	0:6d69e896ce38	1414	* description.
cparata	0:6d69e896ce38	1415	* This union is useful but not need by the driver.
cparata	0:6d69e896ce38	1416	*
cparata	0:6d69e896ce38	1417	* REMOVING this union you are compliant with:
cparata	0:6d69e896ce38	1418	* MISRA-C 2012 [Rule 19.2] -> " Union are not allowed "
cparata	0:6d69e896ce38	1419	*
cparata	0:6d69e896ce38	1420	* @{
cparata	0:6d69e896ce38	1421	*
cparata	0:6d69e896ce38	1422	*/
cparata	3:4274d9103f1d	1423	typedef union {
cparata	3:4274d9103f1d	1424	lsm6dso_func_cfg_access_t func_cfg_access;
cparata	3:4274d9103f1d	1425	lsm6dso_pin_ctrl_t pin_ctrl;
cparata	3:4274d9103f1d	1426	lsm6dso_fifo_ctrl1_t fifo_ctrl1;
cparata	3:4274d9103f1d	1427	lsm6dso_fifo_ctrl2_t fifo_ctrl2;
cparata	3:4274d9103f1d	1428	lsm6dso_fifo_ctrl3_t fifo_ctrl3;
cparata	3:4274d9103f1d	1429	lsm6dso_fifo_ctrl4_t fifo_ctrl4;
cparata	3:4274d9103f1d	1430	lsm6dso_counter_bdr_reg1_t counter_bdr_reg1;
cparata	3:4274d9103f1d	1431	lsm6dso_counter_bdr_reg2_t counter_bdr_reg2;
cparata	3:4274d9103f1d	1432	lsm6dso_int1_ctrl_t int1_ctrl;
cparata	3:4274d9103f1d	1433	lsm6dso_int2_ctrl_t int2_ctrl;
cparata	3:4274d9103f1d	1434	lsm6dso_ctrl1_xl_t ctrl1_xl;
cparata	3:4274d9103f1d	1435	lsm6dso_ctrl2_g_t ctrl2_g;
cparata	3:4274d9103f1d	1436	lsm6dso_ctrl3_c_t ctrl3_c;
cparata	3:4274d9103f1d	1437	lsm6dso_ctrl4_c_t ctrl4_c;
cparata	3:4274d9103f1d	1438	lsm6dso_ctrl5_c_t ctrl5_c;
cparata	3:4274d9103f1d	1439	lsm6dso_ctrl6_c_t ctrl6_c;
cparata	3:4274d9103f1d	1440	lsm6dso_ctrl7_g_t ctrl7_g;
cparata	3:4274d9103f1d	1441	lsm6dso_ctrl8_xl_t ctrl8_xl;
cparata	3:4274d9103f1d	1442	lsm6dso_ctrl9_xl_t ctrl9_xl;
cparata	3:4274d9103f1d	1443	lsm6dso_ctrl10_c_t ctrl10_c;
cparata	3:4274d9103f1d	1444	lsm6dso_all_int_src_t all_int_src;
cparata	3:4274d9103f1d	1445	lsm6dso_wake_up_src_t wake_up_src;
cparata	3:4274d9103f1d	1446	lsm6dso_tap_src_t tap_src;
cparata	3:4274d9103f1d	1447	lsm6dso_d6d_src_t d6d_src;
cparata	3:4274d9103f1d	1448	lsm6dso_status_reg_t status_reg;
cparata	3:4274d9103f1d	1449	lsm6dso_status_spiaux_t status_spiaux;
cparata	3:4274d9103f1d	1450	lsm6dso_fifo_status1_t fifo_status1;
cparata	3:4274d9103f1d	1451	lsm6dso_fifo_status2_t fifo_status2;
cparata	3:4274d9103f1d	1452	lsm6dso_tap_cfg0_t tap_cfg0;
cparata	3:4274d9103f1d	1453	lsm6dso_tap_cfg1_t tap_cfg1;
cparata	3:4274d9103f1d	1454	lsm6dso_tap_cfg2_t tap_cfg2;
cparata	3:4274d9103f1d	1455	lsm6dso_tap_ths_6d_t tap_ths_6d;
cparata	3:4274d9103f1d	1456	lsm6dso_int_dur2_t int_dur2;
cparata	3:4274d9103f1d	1457	lsm6dso_wake_up_ths_t wake_up_ths;
cparata	3:4274d9103f1d	1458	lsm6dso_wake_up_dur_t wake_up_dur;
cparata	3:4274d9103f1d	1459	lsm6dso_free_fall_t free_fall;
cparata	3:4274d9103f1d	1460	lsm6dso_md1_cfg_t md1_cfg;
cparata	3:4274d9103f1d	1461	lsm6dso_md2_cfg_t md2_cfg;
cparata	3:4274d9103f1d	1462	lsm6dso_i3c_bus_avb_t i3c_bus_avb;
cparata	3:4274d9103f1d	1463	lsm6dso_internal_freq_fine_t internal_freq_fine;
cparata	3:4274d9103f1d	1464	lsm6dso_int_ois_t int_ois;
cparata	3:4274d9103f1d	1465	lsm6dso_ctrl1_ois_t ctrl1_ois;
cparata	3:4274d9103f1d	1466	lsm6dso_ctrl2_ois_t ctrl2_ois;
cparata	3:4274d9103f1d	1467	lsm6dso_ctrl3_ois_t ctrl3_ois;
cparata	3:4274d9103f1d	1468	lsm6dso_fifo_data_out_tag_t fifo_data_out_tag;
cparata	3:4274d9103f1d	1469	lsm6dso_page_sel_t page_sel;
cparata	3:4274d9103f1d	1470	lsm6dso_emb_func_en_a_t emb_func_en_a;
cparata	3:4274d9103f1d	1471	lsm6dso_emb_func_en_b_t emb_func_en_b;
cparata	3:4274d9103f1d	1472	lsm6dso_page_address_t page_address;
cparata	3:4274d9103f1d	1473	lsm6dso_page_value_t page_value;
cparata	3:4274d9103f1d	1474	lsm6dso_emb_func_int1_t emb_func_int1;
cparata	3:4274d9103f1d	1475	lsm6dso_fsm_int1_a_t fsm_int1_a;
cparata	3:4274d9103f1d	1476	lsm6dso_fsm_int1_b_t fsm_int1_b;
cparata	3:4274d9103f1d	1477	lsm6dso_emb_func_int2_t emb_func_int2;
cparata	3:4274d9103f1d	1478	lsm6dso_fsm_int2_a_t fsm_int2_a;
cparata	3:4274d9103f1d	1479	lsm6dso_fsm_int2_b_t fsm_int2_b;
cparata	3:4274d9103f1d	1480	lsm6dso_emb_func_status_t emb_func_status;
cparata	3:4274d9103f1d	1481	lsm6dso_fsm_status_a_t fsm_status_a;
cparata	3:4274d9103f1d	1482	lsm6dso_fsm_status_b_t fsm_status_b;
cparata	3:4274d9103f1d	1483	lsm6dso_page_rw_t page_rw;
cparata	3:4274d9103f1d	1484	lsm6dso_emb_func_fifo_cfg_t emb_func_fifo_cfg;
cparata	3:4274d9103f1d	1485	lsm6dso_fsm_enable_a_t fsm_enable_a;
cparata	3:4274d9103f1d	1486	lsm6dso_fsm_enable_b_t fsm_enable_b;
cparata	3:4274d9103f1d	1487	lsm6dso_fsm_long_counter_clear_t fsm_long_counter_clear;
cparata	3:4274d9103f1d	1488	lsm6dso_fsm_outs1_t fsm_outs1;
cparata	3:4274d9103f1d	1489	lsm6dso_fsm_outs2_t fsm_outs2;
cparata	3:4274d9103f1d	1490	lsm6dso_fsm_outs3_t fsm_outs3;
cparata	3:4274d9103f1d	1491	lsm6dso_fsm_outs4_t fsm_outs4;
cparata	3:4274d9103f1d	1492	lsm6dso_fsm_outs5_t fsm_outs5;
cparata	3:4274d9103f1d	1493	lsm6dso_fsm_outs6_t fsm_outs6;
cparata	3:4274d9103f1d	1494	lsm6dso_fsm_outs7_t fsm_outs7;
cparata	3:4274d9103f1d	1495	lsm6dso_fsm_outs8_t fsm_outs8;
cparata	3:4274d9103f1d	1496	lsm6dso_fsm_outs9_t fsm_outs9;
cparata	3:4274d9103f1d	1497	lsm6dso_fsm_outs10_t fsm_outs10;
cparata	3:4274d9103f1d	1498	lsm6dso_fsm_outs11_t fsm_outs11;
cparata	3:4274d9103f1d	1499	lsm6dso_fsm_outs12_t fsm_outs12;
cparata	3:4274d9103f1d	1500	lsm6dso_fsm_outs13_t fsm_outs13;
cparata	3:4274d9103f1d	1501	lsm6dso_fsm_outs14_t fsm_outs14;
cparata	3:4274d9103f1d	1502	lsm6dso_fsm_outs15_t fsm_outs15;
cparata	3:4274d9103f1d	1503	lsm6dso_fsm_outs16_t fsm_outs16;
cparata	3:4274d9103f1d	1504	lsm6dso_emb_func_odr_cfg_b_t emb_func_odr_cfg_b;
cparata	3:4274d9103f1d	1505	lsm6dso_emb_func_src_t emb_func_src;
cparata	3:4274d9103f1d	1506	lsm6dso_emb_func_init_a_t emb_func_init_a;
cparata	3:4274d9103f1d	1507	lsm6dso_emb_func_init_b_t emb_func_init_b;
cparata	3:4274d9103f1d	1508	lsm6dso_mag_cfg_a_t mag_cfg_a;
cparata	3:4274d9103f1d	1509	lsm6dso_mag_cfg_b_t mag_cfg_b;
cparata	3:4274d9103f1d	1510	lsm6dso_pedo_cmd_reg_t pedo_cmd_reg;
cparata	3:4274d9103f1d	1511	lsm6dso_sensor_hub_1_t sensor_hub_1;
cparata	3:4274d9103f1d	1512	lsm6dso_sensor_hub_2_t sensor_hub_2;
cparata	3:4274d9103f1d	1513	lsm6dso_sensor_hub_3_t sensor_hub_3;
cparata	3:4274d9103f1d	1514	lsm6dso_sensor_hub_4_t sensor_hub_4;
cparata	3:4274d9103f1d	1515	lsm6dso_sensor_hub_5_t sensor_hub_5;
cparata	3:4274d9103f1d	1516	lsm6dso_sensor_hub_6_t sensor_hub_6;
cparata	3:4274d9103f1d	1517	lsm6dso_sensor_hub_7_t sensor_hub_7;
cparata	3:4274d9103f1d	1518	lsm6dso_sensor_hub_8_t sensor_hub_8;
cparata	3:4274d9103f1d	1519	lsm6dso_sensor_hub_9_t sensor_hub_9;
cparata	3:4274d9103f1d	1520	lsm6dso_sensor_hub_10_t sensor_hub_10;
cparata	3:4274d9103f1d	1521	lsm6dso_sensor_hub_11_t sensor_hub_11;
cparata	3:4274d9103f1d	1522	lsm6dso_sensor_hub_12_t sensor_hub_12;
cparata	3:4274d9103f1d	1523	lsm6dso_sensor_hub_13_t sensor_hub_13;
cparata	3:4274d9103f1d	1524	lsm6dso_sensor_hub_14_t sensor_hub_14;
cparata	3:4274d9103f1d	1525	lsm6dso_sensor_hub_15_t sensor_hub_15;
cparata	3:4274d9103f1d	1526	lsm6dso_sensor_hub_16_t sensor_hub_16;
cparata	3:4274d9103f1d	1527	lsm6dso_sensor_hub_17_t sensor_hub_17;
cparata	3:4274d9103f1d	1528	lsm6dso_sensor_hub_18_t sensor_hub_18;
cparata	3:4274d9103f1d	1529	lsm6dso_master_config_t master_config;
cparata	3:4274d9103f1d	1530	lsm6dso_slv0_add_t slv0_add;
cparata	3:4274d9103f1d	1531	lsm6dso_slv0_subadd_t slv0_subadd;
cparata	3:4274d9103f1d	1532	lsm6dso_slv0_config_t slv0_config;
cparata	3:4274d9103f1d	1533	lsm6dso_slv1_add_t slv1_add;
cparata	3:4274d9103f1d	1534	lsm6dso_slv1_subadd_t slv1_subadd;
cparata	3:4274d9103f1d	1535	lsm6dso_slv1_config_t slv1_config;
cparata	3:4274d9103f1d	1536	lsm6dso_slv2_add_t slv2_add;
cparata	3:4274d9103f1d	1537	lsm6dso_slv2_subadd_t slv2_subadd;
cparata	3:4274d9103f1d	1538	lsm6dso_slv2_config_t slv2_config;
cparata	3:4274d9103f1d	1539	lsm6dso_slv3_add_t slv3_add;
cparata	3:4274d9103f1d	1540	lsm6dso_slv3_subadd_t slv3_subadd;
cparata	3:4274d9103f1d	1541	lsm6dso_slv3_config_t slv3_config;
cparata	3:4274d9103f1d	1542	lsm6dso_datawrite_src_mode_sub_slv0_t datawrite_src_mode_sub_slv0;
cparata	3:4274d9103f1d	1543	lsm6dso_status_master_t status_master;
cparata	3:4274d9103f1d	1544	bitwise_t bitwise;
cparata	3:4274d9103f1d	1545	uint8_t byte;
cparata	0:6d69e896ce38	1546	} lsm6dso_reg_t;
cparata	0:6d69e896ce38	1547
cparata	0:6d69e896ce38	1548	/**
cparata	0:6d69e896ce38	1549	* @}
cparata	0:6d69e896ce38	1550	*
cparata	0:6d69e896ce38	1551	*/
cparata	0:6d69e896ce38	1552
cparata	3:4274d9103f1d	1553	int32_t lsm6dso_read_reg(lsm6dso_ctx_t ctx, uint8_t reg, uint8_t data,
cparata	0:6d69e896ce38	1554	uint16_t len);
cparata	3:4274d9103f1d	1555	int32_t lsm6dso_write_reg(lsm6dso_ctx_t ctx, uint8_t reg, uint8_t data,
cparata	0:6d69e896ce38	1556	uint16_t len);
cparata	0:6d69e896ce38	1557
cparata	2:4d14e9edf37e	1558	extern float_t lsm6dso_from_fs2_to_mg(int16_t lsb);
cparata	2:4d14e9edf37e	1559	extern float_t lsm6dso_from_fs4_to_mg(int16_t lsb);
cparata	2:4d14e9edf37e	1560	extern float_t lsm6dso_from_fs8_to_mg(int16_t lsb);
cparata	2:4d14e9edf37e	1561	extern float_t lsm6dso_from_fs16_to_mg(int16_t lsb);
cparata	2:4d14e9edf37e	1562	extern float_t lsm6dso_from_fs125_to_mdps(int16_t lsb);
cparata	2:4d14e9edf37e	1563	extern float_t lsm6dso_from_fs500_to_mdps(int16_t lsb);
cparata	2:4d14e9edf37e	1564	extern float_t lsm6dso_from_fs250_to_mdps(int16_t lsb);
cparata	2:4d14e9edf37e	1565	extern float_t lsm6dso_from_fs1000_to_mdps(int16_t lsb);
cparata	2:4d14e9edf37e	1566	extern float_t lsm6dso_from_fs2000_to_mdps(int16_t lsb);
cparata	2:4d14e9edf37e	1567	extern float_t lsm6dso_from_lsb_to_celsius(int16_t lsb);
cparata	2:4d14e9edf37e	1568	extern float_t lsm6dso_from_lsb_to_nsec(int16_t lsb);
cparata	0:6d69e896ce38	1569
cparata	0:6d69e896ce38	1570	typedef enum {
cparata	3:4274d9103f1d	1571	LSM6DSO_2g = 0,
cparata	3:4274d9103f1d	1572	LSM6DSO_16g = 1, /* if XL_FS_MODE = ‘1’ -> LSM6DSO_2g */
cparata	3:4274d9103f1d	1573	LSM6DSO_4g = 2,
cparata	3:4274d9103f1d	1574	LSM6DSO_8g = 3,
cparata	0:6d69e896ce38	1575	} lsm6dso_fs_xl_t;
cparata	0:6d69e896ce38	1576	int32_t lsm6dso_xl_full_scale_set(lsm6dso_ctx_t *ctx, lsm6dso_fs_xl_t val);
cparata	0:6d69e896ce38	1577	int32_t lsm6dso_xl_full_scale_get(lsm6dso_ctx_t ctx, lsm6dso_fs_xl_t val);
cparata	0:6d69e896ce38	1578
cparata	0:6d69e896ce38	1579	typedef enum {
cparata	3:4274d9103f1d	1580	LSM6DSO_XL_ODR_OFF = 0,
cparata	3:4274d9103f1d	1581	LSM6DSO_XL_ODR_12Hz5 = 1,
cparata	3:4274d9103f1d	1582	LSM6DSO_XL_ODR_26Hz = 2,
cparata	3:4274d9103f1d	1583	LSM6DSO_XL_ODR_52Hz = 3,
cparata	3:4274d9103f1d	1584	LSM6DSO_XL_ODR_104Hz = 4,
cparata	3:4274d9103f1d	1585	LSM6DSO_XL_ODR_208Hz = 5,
cparata	3:4274d9103f1d	1586	LSM6DSO_XL_ODR_417Hz = 6,
cparata	3:4274d9103f1d	1587	LSM6DSO_XL_ODR_833Hz = 7,
cparata	3:4274d9103f1d	1588	LSM6DSO_XL_ODR_1667Hz = 8,
cparata	3:4274d9103f1d	1589	LSM6DSO_XL_ODR_3333Hz = 9,
cparata	3:4274d9103f1d	1590	LSM6DSO_XL_ODR_6667Hz = 10,
cparata	3:4274d9103f1d	1591	LSM6DSO_XL_ODR_6Hz5 = 11, /* (low power only) */
cparata	0:6d69e896ce38	1592	} lsm6dso_odr_xl_t;
cparata	0:6d69e896ce38	1593	int32_t lsm6dso_xl_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_xl_t val);
cparata	0:6d69e896ce38	1594	int32_t lsm6dso_xl_data_rate_get(lsm6dso_ctx_t ctx, lsm6dso_odr_xl_t val);
cparata	0:6d69e896ce38	1595
cparata	0:6d69e896ce38	1596	typedef enum {
cparata	3:4274d9103f1d	1597	LSM6DSO_250dps = 0,
cparata	3:4274d9103f1d	1598	LSM6DSO_125dps = 1,
cparata	3:4274d9103f1d	1599	LSM6DSO_500dps = 2,
cparata	3:4274d9103f1d	1600	LSM6DSO_1000dps = 4,
cparata	3:4274d9103f1d	1601	LSM6DSO_2000dps = 6,
cparata	0:6d69e896ce38	1602	} lsm6dso_fs_g_t;
cparata	0:6d69e896ce38	1603	int32_t lsm6dso_gy_full_scale_set(lsm6dso_ctx_t *ctx, lsm6dso_fs_g_t val);
cparata	0:6d69e896ce38	1604	int32_t lsm6dso_gy_full_scale_get(lsm6dso_ctx_t ctx, lsm6dso_fs_g_t val);
cparata	0:6d69e896ce38	1605
cparata	0:6d69e896ce38	1606	typedef enum {
cparata	3:4274d9103f1d	1607	LSM6DSO_GY_ODR_OFF = 0,
cparata	3:4274d9103f1d	1608	LSM6DSO_GY_ODR_12Hz5 = 1,
cparata	3:4274d9103f1d	1609	LSM6DSO_GY_ODR_26Hz = 2,
cparata	3:4274d9103f1d	1610	LSM6DSO_GY_ODR_52Hz = 3,
cparata	3:4274d9103f1d	1611	LSM6DSO_GY_ODR_104Hz = 4,
cparata	3:4274d9103f1d	1612	LSM6DSO_GY_ODR_208Hz = 5,
cparata	3:4274d9103f1d	1613	LSM6DSO_GY_ODR_417Hz = 6,
cparata	3:4274d9103f1d	1614	LSM6DSO_GY_ODR_833Hz = 7,
cparata	3:4274d9103f1d	1615	LSM6DSO_GY_ODR_1667Hz = 8,
cparata	3:4274d9103f1d	1616	LSM6DSO_GY_ODR_3333Hz = 9,
cparata	3:4274d9103f1d	1617	LSM6DSO_GY_ODR_6667Hz = 10,
cparata	0:6d69e896ce38	1618	} lsm6dso_odr_g_t;
cparata	0:6d69e896ce38	1619	int32_t lsm6dso_gy_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_odr_g_t val);
cparata	0:6d69e896ce38	1620	int32_t lsm6dso_gy_data_rate_get(lsm6dso_ctx_t ctx, lsm6dso_odr_g_t val);
cparata	0:6d69e896ce38	1621
cparata	0:6d69e896ce38	1622	int32_t lsm6dso_block_data_update_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1623	int32_t lsm6dso_block_data_update_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1624
cparata	0:6d69e896ce38	1625	typedef enum {
cparata	3:4274d9103f1d	1626	LSM6DSO_LSb_1mg = 0,
cparata	3:4274d9103f1d	1627	LSM6DSO_LSb_16mg = 1,
cparata	0:6d69e896ce38	1628	} lsm6dso_usr_off_w_t;
cparata	0:6d69e896ce38	1629	int32_t lsm6dso_xl_offset_weight_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1630	lsm6dso_usr_off_w_t val);
cparata	0:6d69e896ce38	1631	int32_t lsm6dso_xl_offset_weight_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1632	lsm6dso_usr_off_w_t *val);
cparata	0:6d69e896ce38	1633
cparata	0:6d69e896ce38	1634	typedef enum {
cparata	3:4274d9103f1d	1635	LSM6DSO_HIGH_PERFORMANCE_MD = 0,
cparata	3:4274d9103f1d	1636	LSM6DSO_LOW_NORMAL_POWER_MD = 1,
cparata	3:4274d9103f1d	1637	LSM6DSO_ULTRA_LOW_POWER_MD = 2,
cparata	0:6d69e896ce38	1638	} lsm6dso_xl_hm_mode_t;
cparata	0:6d69e896ce38	1639	int32_t lsm6dso_xl_power_mode_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1640	lsm6dso_xl_hm_mode_t val);
cparata	0:6d69e896ce38	1641	int32_t lsm6dso_xl_power_mode_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1642	lsm6dso_xl_hm_mode_t *val);
cparata	0:6d69e896ce38	1643
cparata	0:6d69e896ce38	1644	typedef enum {
cparata	3:4274d9103f1d	1645	LSM6DSO_GY_HIGH_PERFORMANCE = 0,
cparata	3:4274d9103f1d	1646	LSM6DSO_GY_NORMAL = 1,
cparata	0:6d69e896ce38	1647	} lsm6dso_g_hm_mode_t;
cparata	0:6d69e896ce38	1648	int32_t lsm6dso_gy_power_mode_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1649	lsm6dso_g_hm_mode_t val);
cparata	0:6d69e896ce38	1650	int32_t lsm6dso_gy_power_mode_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1651	lsm6dso_g_hm_mode_t *val);
cparata	0:6d69e896ce38	1652
cparata	0:6d69e896ce38	1653	typedef struct {
cparata	3:4274d9103f1d	1654	lsm6dso_all_int_src_t all_int_src;
cparata	3:4274d9103f1d	1655	lsm6dso_wake_up_src_t wake_up_src;
cparata	3:4274d9103f1d	1656	lsm6dso_tap_src_t tap_src;
cparata	3:4274d9103f1d	1657	lsm6dso_d6d_src_t d6d_src;
cparata	3:4274d9103f1d	1658	lsm6dso_status_reg_t status_reg;
cparata	3:4274d9103f1d	1659	lsm6dso_emb_func_status_t emb_func_status;
cparata	3:4274d9103f1d	1660	lsm6dso_fsm_status_a_t fsm_status_a;
cparata	3:4274d9103f1d	1661	lsm6dso_fsm_status_b_t fsm_status_b;
cparata	0:6d69e896ce38	1662	} lsm6dso_all_sources_t;
cparata	0:6d69e896ce38	1663	int32_t lsm6dso_all_sources_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1664	lsm6dso_all_sources_t *val);
cparata	0:6d69e896ce38	1665
cparata	0:6d69e896ce38	1666	int32_t lsm6dso_status_reg_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1667	lsm6dso_status_reg_t *val);
cparata	0:6d69e896ce38	1668
cparata	0:6d69e896ce38	1669	int32_t lsm6dso_xl_flag_data_ready_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1670
cparata	0:6d69e896ce38	1671	int32_t lsm6dso_gy_flag_data_ready_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1672
cparata	0:6d69e896ce38	1673	int32_t lsm6dso_temp_flag_data_ready_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1674
cparata	0:6d69e896ce38	1675	int32_t lsm6dso_xl_usr_offset_x_set(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1676	int32_t lsm6dso_xl_usr_offset_x_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1677
cparata	0:6d69e896ce38	1678	int32_t lsm6dso_xl_usr_offset_y_set(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1679	int32_t lsm6dso_xl_usr_offset_y_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1680
cparata	0:6d69e896ce38	1681	int32_t lsm6dso_xl_usr_offset_z_set(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1682	int32_t lsm6dso_xl_usr_offset_z_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1683
cparata	0:6d69e896ce38	1684	int32_t lsm6dso_xl_usr_offset_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1685	int32_t lsm6dso_xl_usr_offset_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1686
cparata	0:6d69e896ce38	1687	int32_t lsm6dso_timestamp_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1688	int32_t lsm6dso_timestamp_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1689
cparata	0:6d69e896ce38	1690	int32_t lsm6dso_timestamp_raw_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1691
cparata	0:6d69e896ce38	1692	typedef enum {
cparata	3:4274d9103f1d	1693	LSM6DSO_NO_ROUND = 0,
cparata	3:4274d9103f1d	1694	LSM6DSO_ROUND_XL = 1,
cparata	3:4274d9103f1d	1695	LSM6DSO_ROUND_GY = 2,
cparata	3:4274d9103f1d	1696	LSM6DSO_ROUND_GY_XL = 3,
cparata	0:6d69e896ce38	1697	} lsm6dso_rounding_t;
cparata	0:6d69e896ce38	1698	int32_t lsm6dso_rounding_mode_set(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	1699	lsm6dso_rounding_t val);
cparata	0:6d69e896ce38	1700	int32_t lsm6dso_rounding_mode_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	1701	lsm6dso_rounding_t *val);
cparata	0:6d69e896ce38	1702
cparata	0:6d69e896ce38	1703	int32_t lsm6dso_temperature_raw_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1704
cparata	0:6d69e896ce38	1705	int32_t lsm6dso_angular_rate_raw_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1706
cparata	0:6d69e896ce38	1707	int32_t lsm6dso_acceleration_raw_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1708
cparata	0:6d69e896ce38	1709	int32_t lsm6dso_fifo_out_raw_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1710
cparata	0:6d69e896ce38	1711	int32_t lsm6dso_number_of_steps_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1712
cparata	0:6d69e896ce38	1713	int32_t lsm6dso_steps_reset(lsm6dso_ctx_t *ctx);
cparata	0:6d69e896ce38	1714
cparata	0:6d69e896ce38	1715	int32_t lsm6dso_odr_cal_reg_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1716	int32_t lsm6dso_odr_cal_reg_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1717
cparata	0:6d69e896ce38	1718	typedef enum {
cparata	3:4274d9103f1d	1719	LSM6DSO_USER_BANK = 0,
cparata	3:4274d9103f1d	1720	LSM6DSO_SENSOR_HUB_BANK = 1,
cparata	3:4274d9103f1d	1721	LSM6DSO_EMBEDDED_FUNC_BANK = 2,
cparata	0:6d69e896ce38	1722	} lsm6dso_reg_access_t;
cparata	0:6d69e896ce38	1723	int32_t lsm6dso_mem_bank_set(lsm6dso_ctx_t *ctx, lsm6dso_reg_access_t val);
cparata	0:6d69e896ce38	1724	int32_t lsm6dso_mem_bank_get(lsm6dso_ctx_t ctx, lsm6dso_reg_access_t val);
cparata	0:6d69e896ce38	1725
cparata	0:6d69e896ce38	1726	int32_t lsm6dso_ln_pg_write_byte(lsm6dso_ctx_t *ctx, uint16_t address,
cparata	0:6d69e896ce38	1727	uint8_t *val);
cparata	0:6d69e896ce38	1728	int32_t lsm6dso_ln_pg_read_byte(lsm6dso_ctx_t *ctx, uint16_t address,
cparata	0:6d69e896ce38	1729	uint8_t *val);
cparata	0:6d69e896ce38	1730	int32_t lsm6dso_ln_pg_write(lsm6dso_ctx_t *ctx, uint16_t address,
cparata	0:6d69e896ce38	1731	uint8_t *buf, uint8_t len);
cparata	0:6d69e896ce38	1732	int32_t lsm6dso_ln_pg_read(lsm6dso_ctx_t *ctx, uint16_t address,
cparata	0:6d69e896ce38	1733	uint8_t *val);
cparata	0:6d69e896ce38	1734
cparata	0:6d69e896ce38	1735	typedef enum {
cparata	3:4274d9103f1d	1736	LSM6DSO_DRDY_LATCHED = 0,
cparata	3:4274d9103f1d	1737	LSM6DSO_DRDY_PULSED = 1,
cparata	0:6d69e896ce38	1738	} lsm6dso_dataready_pulsed_t;
cparata	0:6d69e896ce38	1739	int32_t lsm6dso_data_ready_mode_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1740	lsm6dso_dataready_pulsed_t val);
cparata	0:6d69e896ce38	1741	int32_t lsm6dso_data_ready_mode_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1742	lsm6dso_dataready_pulsed_t *val);
cparata	0:6d69e896ce38	1743
cparata	0:6d69e896ce38	1744	int32_t lsm6dso_device_id_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	1745
cparata	0:6d69e896ce38	1746	int32_t lsm6dso_reset_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1747	int32_t lsm6dso_reset_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1748
cparata	0:6d69e896ce38	1749	int32_t lsm6dso_auto_increment_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1750	int32_t lsm6dso_auto_increment_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1751
cparata	0:6d69e896ce38	1752	int32_t lsm6dso_boot_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1753	int32_t lsm6dso_boot_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1754
cparata	0:6d69e896ce38	1755	typedef enum {
cparata	3:4274d9103f1d	1756	LSM6DSO_XL_ST_DISABLE = 0,
cparata	3:4274d9103f1d	1757	LSM6DSO_XL_ST_POSITIVE = 1,
cparata	3:4274d9103f1d	1758	LSM6DSO_XL_ST_NEGATIVE = 2,
cparata	0:6d69e896ce38	1759	} lsm6dso_st_xl_t;
cparata	0:6d69e896ce38	1760	int32_t lsm6dso_xl_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_xl_t val);
cparata	0:6d69e896ce38	1761	int32_t lsm6dso_xl_self_test_get(lsm6dso_ctx_t ctx, lsm6dso_st_xl_t val);
cparata	0:6d69e896ce38	1762
cparata	0:6d69e896ce38	1763	typedef enum {
cparata	3:4274d9103f1d	1764	LSM6DSO_GY_ST_DISABLE = 0,
cparata	3:4274d9103f1d	1765	LSM6DSO_GY_ST_POSITIVE = 1,
cparata	3:4274d9103f1d	1766	LSM6DSO_GY_ST_NEGATIVE = 3,
cparata	0:6d69e896ce38	1767	} lsm6dso_st_g_t;
cparata	0:6d69e896ce38	1768	int32_t lsm6dso_gy_self_test_set(lsm6dso_ctx_t *ctx, lsm6dso_st_g_t val);
cparata	0:6d69e896ce38	1769	int32_t lsm6dso_gy_self_test_get(lsm6dso_ctx_t ctx, lsm6dso_st_g_t val);
cparata	0:6d69e896ce38	1770
cparata	0:6d69e896ce38	1771	int32_t lsm6dso_xl_filter_lp2_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1772	int32_t lsm6dso_xl_filter_lp2_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1773
cparata	0:6d69e896ce38	1774	int32_t lsm6dso_gy_filter_lp1_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1775	int32_t lsm6dso_gy_filter_lp1_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1776
cparata	0:6d69e896ce38	1777	int32_t lsm6dso_filter_settling_mask_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1778	uint8_t val);
cparata	0:6d69e896ce38	1779	int32_t lsm6dso_filter_settling_mask_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1780	uint8_t *val);
cparata	0:6d69e896ce38	1781
cparata	0:6d69e896ce38	1782	typedef enum {
cparata	3:4274d9103f1d	1783	LSM6DSO_ULTRA_LIGHT = 0,
cparata	3:4274d9103f1d	1784	LSM6DSO_VERY_LIGHT = 1,
cparata	3:4274d9103f1d	1785	LSM6DSO_LIGHT = 2,
cparata	3:4274d9103f1d	1786	LSM6DSO_MEDIUM = 3,
cparata	3:4274d9103f1d	1787	LSM6DSO_STRONG = 4, /* not available for data rate > 1k670Hz */
cparata	3:4274d9103f1d	1788	LSM6DSO_VERY_STRONG = 5, /* not available for data rate > 1k670Hz */
cparata	3:4274d9103f1d	1789	LSM6DSO_AGGRESSIVE = 6, /* not available for data rate > 1k670Hz */
cparata	3:4274d9103f1d	1790	LSM6DSO_XTREME = 7, /* not available for data rate > 1k670Hz */
cparata	0:6d69e896ce38	1791	} lsm6dso_ftype_t;
cparata	0:6d69e896ce38	1792	int32_t lsm6dso_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1793	lsm6dso_ftype_t val);
cparata	0:6d69e896ce38	1794	int32_t lsm6dso_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1795	lsm6dso_ftype_t *val);
cparata	0:6d69e896ce38	1796
cparata	0:6d69e896ce38	1797	int32_t lsm6dso_xl_lp2_on_6d_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1798	int32_t lsm6dso_xl_lp2_on_6d_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1799
cparata	0:6d69e896ce38	1800	typedef enum {
cparata	3:4274d9103f1d	1801	LSM6DSO_HP_PATH_DISABLE_ON_OUT = 0x00,
cparata	3:4274d9103f1d	1802	LSM6DSO_SLOPE_ODR_DIV_4 = 0x10,
cparata	3:4274d9103f1d	1803	LSM6DSO_HP_ODR_DIV_10 = 0x11,
cparata	3:4274d9103f1d	1804	LSM6DSO_HP_ODR_DIV_20 = 0x12,
cparata	3:4274d9103f1d	1805	LSM6DSO_HP_ODR_DIV_45 = 0x13,
cparata	3:4274d9103f1d	1806	LSM6DSO_HP_ODR_DIV_100 = 0x14,
cparata	3:4274d9103f1d	1807	LSM6DSO_HP_ODR_DIV_200 = 0x15,
cparata	3:4274d9103f1d	1808	LSM6DSO_HP_ODR_DIV_400 = 0x16,
cparata	3:4274d9103f1d	1809	LSM6DSO_HP_ODR_DIV_800 = 0x17,
cparata	3:4274d9103f1d	1810	LSM6DSO_HP_REF_MD_ODR_DIV_10 = 0x31,
cparata	3:4274d9103f1d	1811	LSM6DSO_HP_REF_MD_ODR_DIV_20 = 0x32,
cparata	3:4274d9103f1d	1812	LSM6DSO_HP_REF_MD_ODR_DIV_45 = 0x33,
cparata	3:4274d9103f1d	1813	LSM6DSO_HP_REF_MD_ODR_DIV_100 = 0x34,
cparata	3:4274d9103f1d	1814	LSM6DSO_HP_REF_MD_ODR_DIV_200 = 0x35,
cparata	3:4274d9103f1d	1815	LSM6DSO_HP_REF_MD_ODR_DIV_400 = 0x36,
cparata	3:4274d9103f1d	1816	LSM6DSO_HP_REF_MD_ODR_DIV_800 = 0x37,
cparata	3:4274d9103f1d	1817	LSM6DSO_LP_ODR_DIV_10 = 0x01,
cparata	3:4274d9103f1d	1818	LSM6DSO_LP_ODR_DIV_20 = 0x02,
cparata	3:4274d9103f1d	1819	LSM6DSO_LP_ODR_DIV_45 = 0x03,
cparata	3:4274d9103f1d	1820	LSM6DSO_LP_ODR_DIV_100 = 0x04,
cparata	3:4274d9103f1d	1821	LSM6DSO_LP_ODR_DIV_200 = 0x05,
cparata	3:4274d9103f1d	1822	LSM6DSO_LP_ODR_DIV_400 = 0x06,
cparata	3:4274d9103f1d	1823	LSM6DSO_LP_ODR_DIV_800 = 0x07,
cparata	0:6d69e896ce38	1824	} lsm6dso_hp_slope_xl_en_t;
cparata	0:6d69e896ce38	1825	int32_t lsm6dso_xl_hp_path_on_out_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1826	lsm6dso_hp_slope_xl_en_t val);
cparata	0:6d69e896ce38	1827	int32_t lsm6dso_xl_hp_path_on_out_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1828	lsm6dso_hp_slope_xl_en_t *val);
cparata	0:6d69e896ce38	1829
cparata	0:6d69e896ce38	1830	int32_t lsm6dso_xl_fast_settling_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1831	int32_t lsm6dso_xl_fast_settling_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1832
cparata	0:6d69e896ce38	1833	typedef enum {
cparata	3:4274d9103f1d	1834	LSM6DSO_USE_SLOPE = 0,
cparata	3:4274d9103f1d	1835	LSM6DSO_USE_HPF = 1,
cparata	0:6d69e896ce38	1836	} lsm6dso_slope_fds_t;
cparata	0:6d69e896ce38	1837	int32_t lsm6dso_xl_hp_path_internal_set(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	1838	lsm6dso_slope_fds_t val);
cparata	0:6d69e896ce38	1839	int32_t lsm6dso_xl_hp_path_internal_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	1840	lsm6dso_slope_fds_t *val);
cparata	0:6d69e896ce38	1841
cparata	0:6d69e896ce38	1842	typedef enum {
cparata	3:4274d9103f1d	1843	LSM6DSO_HP_FILTER_NONE = 0x00,
cparata	3:4274d9103f1d	1844	LSM6DSO_HP_FILTER_16mHz = 0x80,
cparata	3:4274d9103f1d	1845	LSM6DSO_HP_FILTER_65mHz = 0x81,
cparata	3:4274d9103f1d	1846	LSM6DSO_HP_FILTER_260mHz = 0x82,
cparata	3:4274d9103f1d	1847	LSM6DSO_HP_FILTER_1Hz04 = 0x83,
cparata	0:6d69e896ce38	1848	} lsm6dso_hpm_g_t;
cparata	0:6d69e896ce38	1849	int32_t lsm6dso_gy_hp_path_internal_set(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	1850	lsm6dso_hpm_g_t val);
cparata	0:6d69e896ce38	1851	int32_t lsm6dso_gy_hp_path_internal_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	1852	lsm6dso_hpm_g_t *val);
cparata	0:6d69e896ce38	1853
cparata	0:6d69e896ce38	1854	typedef enum {
cparata	3:4274d9103f1d	1855	LSM6DSO_AUX_PULL_UP_DISC = 0,
cparata	3:4274d9103f1d	1856	LSM6DSO_AUX_PULL_UP_CONNECT = 1,
cparata	0:6d69e896ce38	1857	} lsm6dso_ois_pu_dis_t;
cparata	0:6d69e896ce38	1858	int32_t lsm6dso_aux_sdo_ocs_mode_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1859	lsm6dso_ois_pu_dis_t val);
cparata	0:6d69e896ce38	1860	int32_t lsm6dso_aux_sdo_ocs_mode_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1861	lsm6dso_ois_pu_dis_t *val);
cparata	0:6d69e896ce38	1862
cparata	0:6d69e896ce38	1863	typedef enum {
cparata	3:4274d9103f1d	1864	LSM6DSO_AUX_ON = 1,
cparata	3:4274d9103f1d	1865	LSM6DSO_AUX_ON_BY_AUX_INTERFACE = 0,
cparata	0:6d69e896ce38	1866	} lsm6dso_ois_on_t;
cparata	0:6d69e896ce38	1867	int32_t lsm6dso_aux_pw_on_ctrl_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_on_t val);
cparata	0:6d69e896ce38	1868	int32_t lsm6dso_aux_pw_on_ctrl_get(lsm6dso_ctx_t ctx, lsm6dso_ois_on_t val);
cparata	0:6d69e896ce38	1869
cparata	0:6d69e896ce38	1870	typedef enum {
cparata	3:4274d9103f1d	1871	LSM6DSO_USE_SAME_XL_FS = 0,
cparata	3:4274d9103f1d	1872	LSM6DSO_USE_DIFFERENT_XL_FS = 1,
cparata	0:6d69e896ce38	1873	} lsm6dso_xl_fs_mode_t;
cparata	0:6d69e896ce38	1874	int32_t lsm6dso_aux_xl_fs_mode_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1875	lsm6dso_xl_fs_mode_t val);
cparata	0:6d69e896ce38	1876	int32_t lsm6dso_aux_xl_fs_mode_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1877	lsm6dso_xl_fs_mode_t *val);
cparata	0:6d69e896ce38	1878
cparata	0:6d69e896ce38	1879	int32_t lsm6dso_aux_status_reg_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1880	lsm6dso_status_spiaux_t *val);
cparata	0:6d69e896ce38	1881
cparata	0:6d69e896ce38	1882	int32_t lsm6dso_aux_xl_flag_data_ready_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1883
cparata	0:6d69e896ce38	1884	int32_t lsm6dso_aux_gy_flag_data_ready_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1885
cparata	0:6d69e896ce38	1886	int32_t lsm6dso_aux_gy_flag_settling_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1887
cparata	0:6d69e896ce38	1888	typedef enum {
cparata	3:4274d9103f1d	1889	LSM6DSO_AUX_XL_DISABLE = 0,
cparata	3:4274d9103f1d	1890	LSM6DSO_AUX_XL_POS = 1,
cparata	3:4274d9103f1d	1891	LSM6DSO_AUX_XL_NEG = 2,
cparata	0:6d69e896ce38	1892	} lsm6dso_st_xl_ois_t;
cparata	0:6d69e896ce38	1893	int32_t lsm6dso_aux_xl_self_test_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1894	lsm6dso_st_xl_ois_t val);
cparata	0:6d69e896ce38	1895	int32_t lsm6dso_aux_xl_self_test_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1896	lsm6dso_st_xl_ois_t *val);
cparata	0:6d69e896ce38	1897
cparata	0:6d69e896ce38	1898	typedef enum {
cparata	3:4274d9103f1d	1899	LSM6DSO_AUX_DEN_ACTIVE_LOW = 0,
cparata	3:4274d9103f1d	1900	LSM6DSO_AUX_DEN_ACTIVE_HIGH = 1,
cparata	0:6d69e896ce38	1901	} lsm6dso_den_lh_ois_t;
cparata	0:6d69e896ce38	1902	int32_t lsm6dso_aux_den_polarity_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1903	lsm6dso_den_lh_ois_t val);
cparata	0:6d69e896ce38	1904	int32_t lsm6dso_aux_den_polarity_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1905	lsm6dso_den_lh_ois_t *val);
cparata	0:6d69e896ce38	1906
cparata	0:6d69e896ce38	1907	typedef enum {
cparata	3:4274d9103f1d	1908	LSM6DSO_AUX_DEN_DISABLE = 0,
cparata	3:4274d9103f1d	1909	LSM6DSO_AUX_DEN_LEVEL_LATCH = 3,
cparata	3:4274d9103f1d	1910	LSM6DSO_AUX_DEN_LEVEL_TRIG = 2,
cparata	0:6d69e896ce38	1911	} lsm6dso_lvl2_ois_t;
cparata	0:6d69e896ce38	1912	int32_t lsm6dso_aux_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_lvl2_ois_t val);
cparata	0:6d69e896ce38	1913	int32_t lsm6dso_aux_den_mode_get(lsm6dso_ctx_t ctx, lsm6dso_lvl2_ois_t val);
cparata	0:6d69e896ce38	1914
cparata	0:6d69e896ce38	1915	int32_t lsm6dso_aux_drdy_on_int2_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	1916	int32_t lsm6dso_aux_drdy_on_int2_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	1917
cparata	0:6d69e896ce38	1918	typedef enum {
cparata	3:4274d9103f1d	1919	LSM6DSO_AUX_DISABLE = 0,
cparata	3:4274d9103f1d	1920	LSM6DSO_MODE_3_GY = 1,
cparata	3:4274d9103f1d	1921	LSM6DSO_MODE_4_GY_XL = 3,
cparata	0:6d69e896ce38	1922	} lsm6dso_ois_en_spi2_t;
cparata	0:6d69e896ce38	1923	int32_t lsm6dso_aux_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_ois_en_spi2_t val);
cparata	0:6d69e896ce38	1924	int32_t lsm6dso_aux_mode_get(lsm6dso_ctx_t ctx, lsm6dso_ois_en_spi2_t val);
cparata	0:6d69e896ce38	1925
cparata	0:6d69e896ce38	1926	typedef enum {
cparata	3:4274d9103f1d	1927	LSM6DSO_250dps_AUX = 0,
cparata	3:4274d9103f1d	1928	LSM6DSO_125dps_AUX = 1,
cparata	3:4274d9103f1d	1929	LSM6DSO_500dps_AUX = 2,
cparata	3:4274d9103f1d	1930	LSM6DSO_1000dps_AUX = 4,
cparata	3:4274d9103f1d	1931	LSM6DSO_2000dps_AUX = 6,
cparata	0:6d69e896ce38	1932	} lsm6dso_fs_g_ois_t;
cparata	0:6d69e896ce38	1933	int32_t lsm6dso_aux_gy_full_scale_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1934	lsm6dso_fs_g_ois_t val);
cparata	0:6d69e896ce38	1935	int32_t lsm6dso_aux_gy_full_scale_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1936	lsm6dso_fs_g_ois_t *val);
cparata	0:6d69e896ce38	1937
cparata	0:6d69e896ce38	1938	typedef enum {
cparata	3:4274d9103f1d	1939	LSM6DSO_AUX_SPI_4_WIRE = 0,
cparata	3:4274d9103f1d	1940	LSM6DSO_AUX_SPI_3_WIRE = 1,
cparata	0:6d69e896ce38	1941	} lsm6dso_sim_ois_t;
cparata	0:6d69e896ce38	1942	int32_t lsm6dso_aux_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_ois_t val);
cparata	0:6d69e896ce38	1943	int32_t lsm6dso_aux_spi_mode_get(lsm6dso_ctx_t ctx, lsm6dso_sim_ois_t val);
cparata	0:6d69e896ce38	1944
cparata	0:6d69e896ce38	1945	typedef enum {
cparata	3:4274d9103f1d	1946	LSM6DSO_351Hz39 = 0,
cparata	3:4274d9103f1d	1947	LSM6DSO_236Hz63 = 1,
cparata	3:4274d9103f1d	1948	LSM6DSO_172Hz70 = 2,
cparata	3:4274d9103f1d	1949	LSM6DSO_937Hz91 = 3,
cparata	0:6d69e896ce38	1950	} lsm6dso_ftype_ois_t;
cparata	0:6d69e896ce38	1951	int32_t lsm6dso_aux_gy_lp1_bandwidth_set(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	1952	lsm6dso_ftype_ois_t val);
cparata	0:6d69e896ce38	1953	int32_t lsm6dso_aux_gy_lp1_bandwidth_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	1954	lsm6dso_ftype_ois_t *val);
cparata	0:6d69e896ce38	1955
cparata	0:6d69e896ce38	1956	typedef enum {
cparata	3:4274d9103f1d	1957	LSM6DSO_AUX_HP_DISABLE = 0x00,
cparata	3:4274d9103f1d	1958	LSM6DSO_AUX_HP_Hz016 = 0x10,
cparata	3:4274d9103f1d	1959	LSM6DSO_AUX_HP_Hz065 = 0x11,
cparata	3:4274d9103f1d	1960	LSM6DSO_AUX_HP_Hz260 = 0x12,
cparata	3:4274d9103f1d	1961	LSM6DSO_AUX_HP_1Hz040 = 0x13,
cparata	0:6d69e896ce38	1962	} lsm6dso_hpm_ois_t;
cparata	0:6d69e896ce38	1963	int32_t lsm6dso_aux_gy_hp_bandwidth_set(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	1964	lsm6dso_hpm_ois_t val);
cparata	0:6d69e896ce38	1965	int32_t lsm6dso_aux_gy_hp_bandwidth_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	1966	lsm6dso_hpm_ois_t *val);
cparata	0:6d69e896ce38	1967
cparata	0:6d69e896ce38	1968	typedef enum {
cparata	3:4274d9103f1d	1969	LSM6DSO_ENABLE_CLAMP = 0,
cparata	3:4274d9103f1d	1970	LSM6DSO_DISABLE_CLAMP = 1,
cparata	0:6d69e896ce38	1971	} lsm6dso_st_ois_clampdis_t;
cparata	0:6d69e896ce38	1972	int32_t lsm6dso_aux_gy_clamp_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1973	lsm6dso_st_ois_clampdis_t val);
cparata	0:6d69e896ce38	1974	int32_t lsm6dso_aux_gy_clamp_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1975	lsm6dso_st_ois_clampdis_t *val);
cparata	0:6d69e896ce38	1976
cparata	0:6d69e896ce38	1977	typedef enum {
cparata	3:4274d9103f1d	1978	LSM6DSO_AUX_GY_DISABLE = 0,
cparata	3:4274d9103f1d	1979	LSM6DSO_AUX_GY_POS = 1,
cparata	3:4274d9103f1d	1980	LSM6DSO_AUX_GY_NEG = 3,
cparata	0:6d69e896ce38	1981	} lsm6dso_st_ois_t;
cparata	0:6d69e896ce38	1982	int32_t lsm6dso_aux_gy_self_test_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1983	lsm6dso_st_ois_t val);
cparata	0:6d69e896ce38	1984	int32_t lsm6dso_aux_gy_self_test_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1985	lsm6dso_st_ois_t *val);
cparata	0:6d69e896ce38	1986
cparata	0:6d69e896ce38	1987	typedef enum {
cparata	3:4274d9103f1d	1988	LSM6DSO_289Hz = 0,
cparata	3:4274d9103f1d	1989	LSM6DSO_258Hz = 1,
cparata	3:4274d9103f1d	1990	LSM6DSO_120Hz = 2,
cparata	3:4274d9103f1d	1991	LSM6DSO_65Hz2 = 3,
cparata	3:4274d9103f1d	1992	LSM6DSO_33Hz2 = 4,
cparata	3:4274d9103f1d	1993	LSM6DSO_16Hz6 = 5,
cparata	3:4274d9103f1d	1994	LSM6DSO_8Hz30 = 6,
cparata	3:4274d9103f1d	1995	LSM6DSO_4Hz15 = 7,
cparata	0:6d69e896ce38	1996	} lsm6dso_filter_xl_conf_ois_t;
cparata	0:6d69e896ce38	1997	int32_t lsm6dso_aux_xl_bandwidth_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	1998	lsm6dso_filter_xl_conf_ois_t val);
cparata	0:6d69e896ce38	1999	int32_t lsm6dso_aux_xl_bandwidth_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2000	lsm6dso_filter_xl_conf_ois_t *val);
cparata	0:6d69e896ce38	2001
cparata	0:6d69e896ce38	2002	typedef enum {
cparata	3:4274d9103f1d	2003	LSM6DSO_AUX_2g = 0,
cparata	3:4274d9103f1d	2004	LSM6DSO_AUX_16g = 1,
cparata	3:4274d9103f1d	2005	LSM6DSO_AUX_4g = 2,
cparata	3:4274d9103f1d	2006	LSM6DSO_AUX_8g = 3,
cparata	0:6d69e896ce38	2007	} lsm6dso_fs_xl_ois_t;
cparata	0:6d69e896ce38	2008	int32_t lsm6dso_aux_xl_full_scale_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2009	lsm6dso_fs_xl_ois_t val);
cparata	0:6d69e896ce38	2010	int32_t lsm6dso_aux_xl_full_scale_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2011	lsm6dso_fs_xl_ois_t *val);
cparata	0:6d69e896ce38	2012
cparata	0:6d69e896ce38	2013	typedef enum {
cparata	3:4274d9103f1d	2014	LSM6DSO_PULL_UP_DISC = 0,
cparata	3:4274d9103f1d	2015	LSM6DSO_PULL_UP_CONNECT = 1,
cparata	0:6d69e896ce38	2016	} lsm6dso_sdo_pu_en_t;
cparata	0:6d69e896ce38	2017	int32_t lsm6dso_sdo_sa0_mode_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2018	lsm6dso_sdo_pu_en_t val);
cparata	0:6d69e896ce38	2019	int32_t lsm6dso_sdo_sa0_mode_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2020	lsm6dso_sdo_pu_en_t *val);
cparata	0:6d69e896ce38	2021
cparata	0:6d69e896ce38	2022	typedef enum {
cparata	3:4274d9103f1d	2023	LSM6DSO_SPI_4_WIRE = 0,
cparata	3:4274d9103f1d	2024	LSM6DSO_SPI_3_WIRE = 1,
cparata	0:6d69e896ce38	2025	} lsm6dso_sim_t;
cparata	0:6d69e896ce38	2026	int32_t lsm6dso_spi_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_sim_t val);
cparata	0:6d69e896ce38	2027	int32_t lsm6dso_spi_mode_get(lsm6dso_ctx_t ctx, lsm6dso_sim_t val);
cparata	0:6d69e896ce38	2028
cparata	0:6d69e896ce38	2029	typedef enum {
cparata	3:4274d9103f1d	2030	LSM6DSO_I2C_ENABLE = 0,
cparata	3:4274d9103f1d	2031	LSM6DSO_I2C_DISABLE = 1,
cparata	0:6d69e896ce38	2032	} lsm6dso_i2c_disable_t;
cparata	0:6d69e896ce38	2033	int32_t lsm6dso_i2c_interface_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2034	lsm6dso_i2c_disable_t val);
cparata	0:6d69e896ce38	2035	int32_t lsm6dso_i2c_interface_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2036	lsm6dso_i2c_disable_t *val);
cparata	0:6d69e896ce38	2037
cparata	0:6d69e896ce38	2038	typedef enum {
cparata	3:4274d9103f1d	2039	LSM6DSO_I3C_DISABLE = 0x80,
cparata	3:4274d9103f1d	2040	LSM6DSO_I3C_ENABLE_T_50us = 0x00,
cparata	3:4274d9103f1d	2041	LSM6DSO_I3C_ENABLE_T_2us = 0x01,
cparata	3:4274d9103f1d	2042	LSM6DSO_I3C_ENABLE_T_1ms = 0x02,
cparata	3:4274d9103f1d	2043	LSM6DSO_I3C_ENABLE_T_25ms = 0x03,
cparata	0:6d69e896ce38	2044	} lsm6dso_i3c_disable_t;
cparata	0:6d69e896ce38	2045	int32_t lsm6dso_i3c_disable_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2046	lsm6dso_i3c_disable_t val);
cparata	0:6d69e896ce38	2047	int32_t lsm6dso_i3c_disable_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2048	lsm6dso_i3c_disable_t *val);
cparata	0:6d69e896ce38	2049
cparata	0:6d69e896ce38	2050	typedef enum {
cparata	3:4274d9103f1d	2051	LSM6DSO_PULL_DOWN_DISC = 0,
cparata	3:4274d9103f1d	2052	LSM6DSO_PULL_DOWN_CONNECT = 1,
cparata	0:6d69e896ce38	2053	} lsm6dso_int1_pd_en_t;
cparata	0:6d69e896ce38	2054	int32_t lsm6dso_int1_mode_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2055	lsm6dso_int1_pd_en_t val);
cparata	0:6d69e896ce38	2056	int32_t lsm6dso_int1_mode_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2057	lsm6dso_int1_pd_en_t *val);
cparata	0:6d69e896ce38	2058
cparata	0:6d69e896ce38	2059	typedef struct {
cparata	0:6d69e896ce38	2060	lsm6dso_int1_ctrl_t int1_ctrl;
cparata	0:6d69e896ce38	2061	lsm6dso_md1_cfg_t md1_cfg;
cparata	0:6d69e896ce38	2062	lsm6dso_emb_func_int1_t emb_func_int1;
cparata	0:6d69e896ce38	2063	lsm6dso_fsm_int1_a_t fsm_int1_a;
cparata	0:6d69e896ce38	2064	lsm6dso_fsm_int1_b_t fsm_int1_b;
cparata	0:6d69e896ce38	2065	} lsm6dso_pin_int1_route_t;
cparata	0:6d69e896ce38	2066	int32_t lsm6dso_pin_int1_route_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2067	lsm6dso_pin_int1_route_t *val);
cparata	0:6d69e896ce38	2068	int32_t lsm6dso_pin_int1_route_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2069	lsm6dso_pin_int1_route_t *val);
cparata	0:6d69e896ce38	2070
cparata	0:6d69e896ce38	2071	typedef struct {
cparata	3:4274d9103f1d	2072	lsm6dso_int2_ctrl_t int2_ctrl;
cparata	3:4274d9103f1d	2073	lsm6dso_md2_cfg_t md2_cfg;
cparata	3:4274d9103f1d	2074	lsm6dso_emb_func_int2_t emb_func_int2;
cparata	3:4274d9103f1d	2075	lsm6dso_fsm_int2_a_t fsm_int2_a;
cparata	3:4274d9103f1d	2076	lsm6dso_fsm_int2_b_t fsm_int2_b;
cparata	0:6d69e896ce38	2077	} lsm6dso_pin_int2_route_t;
cparata	0:6d69e896ce38	2078	int32_t lsm6dso_pin_int2_route_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2079	lsm6dso_pin_int2_route_t *val);
cparata	0:6d69e896ce38	2080	int32_t lsm6dso_pin_int2_route_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2081	lsm6dso_pin_int2_route_t *val);
cparata	0:6d69e896ce38	2082
cparata	0:6d69e896ce38	2083	typedef enum {
cparata	3:4274d9103f1d	2084	LSM6DSO_PUSH_PULL = 0,
cparata	3:4274d9103f1d	2085	LSM6DSO_OPEN_DRAIN = 1,
cparata	0:6d69e896ce38	2086	} lsm6dso_pp_od_t;
cparata	0:6d69e896ce38	2087	int32_t lsm6dso_pin_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_pp_od_t val);
cparata	0:6d69e896ce38	2088	int32_t lsm6dso_pin_mode_get(lsm6dso_ctx_t ctx, lsm6dso_pp_od_t val);
cparata	0:6d69e896ce38	2089
cparata	0:6d69e896ce38	2090	typedef enum {
cparata	3:4274d9103f1d	2091	LSM6DSO_ACTIVE_HIGH = 0,
cparata	3:4274d9103f1d	2092	LSM6DSO_ACTIVE_LOW = 1,
cparata	0:6d69e896ce38	2093	} lsm6dso_h_lactive_t;
cparata	0:6d69e896ce38	2094	int32_t lsm6dso_pin_polarity_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2095	lsm6dso_h_lactive_t val);
cparata	0:6d69e896ce38	2096	int32_t lsm6dso_pin_polarity_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2097	lsm6dso_h_lactive_t *val);
cparata	0:6d69e896ce38	2098
cparata	0:6d69e896ce38	2099	int32_t lsm6dso_all_on_int1_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2100	int32_t lsm6dso_all_on_int1_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2101
cparata	0:6d69e896ce38	2102	typedef enum {
cparata	3:4274d9103f1d	2103	LSM6DSO_ALL_INT_PULSED = 0,
cparata	3:4274d9103f1d	2104	LSM6DSO_BASE_LATCHED_EMB_PULSED = 1,
cparata	3:4274d9103f1d	2105	LSM6DSO_BASE_PULSED_EMB_LATCHED = 2,
cparata	3:4274d9103f1d	2106	LSM6DSO_ALL_INT_LATCHED = 3,
cparata	0:6d69e896ce38	2107	} lsm6dso_lir_t;
cparata	0:6d69e896ce38	2108	int32_t lsm6dso_int_notification_set(lsm6dso_ctx_t *ctx, lsm6dso_lir_t val);
cparata	0:6d69e896ce38	2109	int32_t lsm6dso_int_notification_get(lsm6dso_ctx_t ctx, lsm6dso_lir_t val);
cparata	0:6d69e896ce38	2110
cparata	0:6d69e896ce38	2111	typedef enum {
cparata	3:4274d9103f1d	2112	LSM6DSO_LSb_FS_DIV_64 = 0,
cparata	3:4274d9103f1d	2113	LSM6DSO_LSb_FS_DIV_256 = 1,
cparata	0:6d69e896ce38	2114	} lsm6dso_wake_ths_w_t;
cparata	0:6d69e896ce38	2115	int32_t lsm6dso_wkup_ths_weight_set(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2116	lsm6dso_wake_ths_w_t val);
cparata	0:6d69e896ce38	2117	int32_t lsm6dso_wkup_ths_weight_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2118	lsm6dso_wake_ths_w_t *val);
cparata	0:6d69e896ce38	2119
cparata	0:6d69e896ce38	2120	int32_t lsm6dso_wkup_threshold_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2121	int32_t lsm6dso_wkup_threshold_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2122
cparata	0:6d69e896ce38	2123	int32_t lsm6dso_xl_usr_offset_on_wkup_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2124	int32_t lsm6dso_xl_usr_offset_on_wkup_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2125
cparata	0:6d69e896ce38	2126	int32_t lsm6dso_wkup_dur_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2127	int32_t lsm6dso_wkup_dur_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2128
cparata	0:6d69e896ce38	2129	int32_t lsm6dso_gy_sleep_mode_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2130	int32_t lsm6dso_gy_sleep_mode_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2131
cparata	0:6d69e896ce38	2132	typedef enum {
cparata	3:4274d9103f1d	2133	LSM6DSO_DRIVE_SLEEP_CHG_EVENT = 0,
cparata	3:4274d9103f1d	2134	LSM6DSO_DRIVE_SLEEP_STATUS = 1,
cparata	0:6d69e896ce38	2135	} lsm6dso_sleep_status_on_int_t;
cparata	0:6d69e896ce38	2136	int32_t lsm6dso_act_pin_notification_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2137	lsm6dso_sleep_status_on_int_t val);
cparata	0:6d69e896ce38	2138	int32_t lsm6dso_act_pin_notification_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2139	lsm6dso_sleep_status_on_int_t *val);
cparata	0:6d69e896ce38	2140
cparata	0:6d69e896ce38	2141	typedef enum {
cparata	3:4274d9103f1d	2142	LSM6DSO_XL_AND_GY_NOT_AFFECTED = 0,
cparata	3:4274d9103f1d	2143	LSM6DSO_XL_12Hz5_GY_NOT_AFFECTED = 1,
cparata	3:4274d9103f1d	2144	LSM6DSO_XL_12Hz5_GY_SLEEP = 2,
cparata	3:4274d9103f1d	2145	LSM6DSO_XL_12Hz5_GY_PD = 3,
cparata	0:6d69e896ce38	2146	} lsm6dso_inact_en_t;
cparata	0:6d69e896ce38	2147	int32_t lsm6dso_act_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_inact_en_t val);
cparata	0:6d69e896ce38	2148	int32_t lsm6dso_act_mode_get(lsm6dso_ctx_t ctx, lsm6dso_inact_en_t val);
cparata	0:6d69e896ce38	2149
cparata	0:6d69e896ce38	2150	int32_t lsm6dso_act_sleep_dur_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2151	int32_t lsm6dso_act_sleep_dur_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2152
cparata	0:6d69e896ce38	2153	int32_t lsm6dso_tap_detection_on_z_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2154	int32_t lsm6dso_tap_detection_on_z_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2155
cparata	0:6d69e896ce38	2156	int32_t lsm6dso_tap_detection_on_y_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2157	int32_t lsm6dso_tap_detection_on_y_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2158
cparata	0:6d69e896ce38	2159	int32_t lsm6dso_tap_detection_on_x_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2160	int32_t lsm6dso_tap_detection_on_x_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2161
cparata	0:6d69e896ce38	2162	int32_t lsm6dso_tap_threshold_x_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2163	int32_t lsm6dso_tap_threshold_x_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2164
cparata	0:6d69e896ce38	2165	typedef enum {
cparata	3:4274d9103f1d	2166	LSM6DSO_XYZ = 0,
cparata	3:4274d9103f1d	2167	LSM6DSO_YXZ = 1,
cparata	3:4274d9103f1d	2168	LSM6DSO_XZY = 2,
cparata	3:4274d9103f1d	2169	LSM6DSO_ZYX = 3,
cparata	3:4274d9103f1d	2170	LSM6DSO_YZX = 5,
cparata	3:4274d9103f1d	2171	LSM6DSO_ZXY = 6,
cparata	0:6d69e896ce38	2172	} lsm6dso_tap_priority_t;
cparata	0:6d69e896ce38	2173	int32_t lsm6dso_tap_axis_priority_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2174	lsm6dso_tap_priority_t val);
cparata	0:6d69e896ce38	2175	int32_t lsm6dso_tap_axis_priority_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2176	lsm6dso_tap_priority_t *val);
cparata	0:6d69e896ce38	2177
cparata	0:6d69e896ce38	2178	int32_t lsm6dso_tap_threshold_y_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2179	int32_t lsm6dso_tap_threshold_y_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2180
cparata	0:6d69e896ce38	2181	int32_t lsm6dso_tap_threshold_z_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2182	int32_t lsm6dso_tap_threshold_z_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2183
cparata	0:6d69e896ce38	2184	int32_t lsm6dso_tap_shock_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2185	int32_t lsm6dso_tap_shock_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2186
cparata	0:6d69e896ce38	2187	int32_t lsm6dso_tap_quiet_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2188	int32_t lsm6dso_tap_quiet_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2189
cparata	0:6d69e896ce38	2190	int32_t lsm6dso_tap_dur_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2191	int32_t lsm6dso_tap_dur_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2192
cparata	0:6d69e896ce38	2193	typedef enum {
cparata	3:4274d9103f1d	2194	LSM6DSO_ONLY_SINGLE = 0,
cparata	3:4274d9103f1d	2195	LSM6DSO_BOTH_SINGLE_DOUBLE = 1,
cparata	0:6d69e896ce38	2196	} lsm6dso_single_double_tap_t;
cparata	0:6d69e896ce38	2197	int32_t lsm6dso_tap_mode_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2198	lsm6dso_single_double_tap_t val);
cparata	0:6d69e896ce38	2199	int32_t lsm6dso_tap_mode_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2200	lsm6dso_single_double_tap_t *val);
cparata	0:6d69e896ce38	2201
cparata	0:6d69e896ce38	2202	typedef enum {
cparata	3:4274d9103f1d	2203	LSM6DSO_DEG_80 = 0,
cparata	3:4274d9103f1d	2204	LSM6DSO_DEG_70 = 1,
cparata	3:4274d9103f1d	2205	LSM6DSO_DEG_60 = 2,
cparata	3:4274d9103f1d	2206	LSM6DSO_DEG_50 = 3,
cparata	0:6d69e896ce38	2207	} lsm6dso_sixd_ths_t;
cparata	0:6d69e896ce38	2208	int32_t lsm6dso_6d_threshold_set(lsm6dso_ctx_t *ctx, lsm6dso_sixd_ths_t val);
cparata	0:6d69e896ce38	2209	int32_t lsm6dso_6d_threshold_get(lsm6dso_ctx_t ctx, lsm6dso_sixd_ths_t val);
cparata	0:6d69e896ce38	2210
cparata	0:6d69e896ce38	2211	int32_t lsm6dso_4d_mode_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2212	int32_t lsm6dso_4d_mode_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2213
cparata	0:6d69e896ce38	2214	typedef enum {
cparata	3:4274d9103f1d	2215	LSM6DSO_FF_TSH_156mg = 0,
cparata	3:4274d9103f1d	2216	LSM6DSO_FF_TSH_219mg = 1,
cparata	3:4274d9103f1d	2217	LSM6DSO_FF_TSH_250mg = 2,
cparata	3:4274d9103f1d	2218	LSM6DSO_FF_TSH_312mg = 3,
cparata	3:4274d9103f1d	2219	LSM6DSO_FF_TSH_344mg = 4,
cparata	3:4274d9103f1d	2220	LSM6DSO_FF_TSH_406mg = 5,
cparata	3:4274d9103f1d	2221	LSM6DSO_FF_TSH_469mg = 6,
cparata	3:4274d9103f1d	2222	LSM6DSO_FF_TSH_500mg = 7,
cparata	0:6d69e896ce38	2223	} lsm6dso_ff_ths_t;
cparata	0:6d69e896ce38	2224	int32_t lsm6dso_ff_threshold_set(lsm6dso_ctx_t *ctx, lsm6dso_ff_ths_t val);
cparata	0:6d69e896ce38	2225	int32_t lsm6dso_ff_threshold_get(lsm6dso_ctx_t ctx, lsm6dso_ff_ths_t val);
cparata	0:6d69e896ce38	2226
cparata	0:6d69e896ce38	2227	int32_t lsm6dso_ff_dur_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2228	int32_t lsm6dso_ff_dur_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2229
cparata	0:6d69e896ce38	2230	int32_t lsm6dso_fifo_watermark_set(lsm6dso_ctx_t *ctx, uint16_t val);
cparata	0:6d69e896ce38	2231	int32_t lsm6dso_fifo_watermark_get(lsm6dso_ctx_t ctx, uint16_t val);
cparata	0:6d69e896ce38	2232
cparata	0:6d69e896ce38	2233	int32_t lsm6dso_compression_algo_init_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2234	int32_t lsm6dso_compression_algo_init_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2235
cparata	0:6d69e896ce38	2236	typedef enum {
cparata	3:4274d9103f1d	2237	LSM6DSO_CMP_DISABLE = 0x00,
cparata	3:4274d9103f1d	2238	LSM6DSO_CMP_ALWAYS = 0x04,
cparata	3:4274d9103f1d	2239	LSM6DSO_CMP_8_TO_1 = 0x05,
cparata	3:4274d9103f1d	2240	LSM6DSO_CMP_16_TO_1 = 0x06,
cparata	3:4274d9103f1d	2241	LSM6DSO_CMP_32_TO_1 = 0x07,
cparata	0:6d69e896ce38	2242	} lsm6dso_uncoptr_rate_t;
cparata	0:6d69e896ce38	2243	int32_t lsm6dso_compression_algo_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2244	lsm6dso_uncoptr_rate_t val);
cparata	0:6d69e896ce38	2245	int32_t lsm6dso_compression_algo_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2246	lsm6dso_uncoptr_rate_t *val);
cparata	0:6d69e896ce38	2247
cparata	0:6d69e896ce38	2248	int32_t lsm6dso_fifo_virtual_sens_odr_chg_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2249	uint8_t val);
cparata	0:6d69e896ce38	2250	int32_t lsm6dso_fifo_virtual_sens_odr_chg_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2251	uint8_t *val);
cparata	0:6d69e896ce38	2252
cparata	0:6d69e896ce38	2253	int32_t lsm6dso_compression_algo_real_time_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2254	uint8_t val);
cparata	0:6d69e896ce38	2255	int32_t lsm6dso_compression_algo_real_time_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2256	uint8_t *val);
cparata	0:6d69e896ce38	2257
cparata	0:6d69e896ce38	2258	int32_t lsm6dso_fifo_stop_on_wtm_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2259	int32_t lsm6dso_fifo_stop_on_wtm_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2260
cparata	0:6d69e896ce38	2261	typedef enum {
cparata	3:4274d9103f1d	2262	LSM6DSO_XL_NOT_BATCHED = 0,
cparata	3:4274d9103f1d	2263	LSM6DSO_XL_BATCHED_AT_12Hz5 = 1,
cparata	3:4274d9103f1d	2264	LSM6DSO_XL_BATCHED_AT_26Hz = 2,
cparata	3:4274d9103f1d	2265	LSM6DSO_XL_BATCHED_AT_52Hz = 3,
cparata	3:4274d9103f1d	2266	LSM6DSO_XL_BATCHED_AT_104Hz = 4,
cparata	3:4274d9103f1d	2267	LSM6DSO_XL_BATCHED_AT_208Hz = 5,
cparata	3:4274d9103f1d	2268	LSM6DSO_XL_BATCHED_AT_417Hz = 6,
cparata	3:4274d9103f1d	2269	LSM6DSO_XL_BATCHED_AT_833Hz = 7,
cparata	3:4274d9103f1d	2270	LSM6DSO_XL_BATCHED_AT_1667Hz = 8,
cparata	3:4274d9103f1d	2271	LSM6DSO_XL_BATCHED_AT_3333Hz = 9,
cparata	3:4274d9103f1d	2272	LSM6DSO_XL_BATCHED_AT_6667Hz = 10,
cparata	3:4274d9103f1d	2273	LSM6DSO_XL_BATCHED_AT_6Hz5 = 11,
cparata	0:6d69e896ce38	2274	} lsm6dso_bdr_xl_t;
cparata	0:6d69e896ce38	2275	int32_t lsm6dso_fifo_xl_batch_set(lsm6dso_ctx_t *ctx, lsm6dso_bdr_xl_t val);
cparata	0:6d69e896ce38	2276	int32_t lsm6dso_fifo_xl_batch_get(lsm6dso_ctx_t ctx, lsm6dso_bdr_xl_t val);
cparata	0:6d69e896ce38	2277
cparata	0:6d69e896ce38	2278	typedef enum {
cparata	3:4274d9103f1d	2279	LSM6DSO_GY_NOT_BATCHED = 0,
cparata	3:4274d9103f1d	2280	LSM6DSO_GY_BATCHED_AT_12Hz5 = 1,
cparata	3:4274d9103f1d	2281	LSM6DSO_GY_BATCHED_AT_26Hz = 2,
cparata	3:4274d9103f1d	2282	LSM6DSO_GY_BATCHED_AT_52Hz = 3,
cparata	3:4274d9103f1d	2283	LSM6DSO_GY_BATCHED_AT_104Hz = 4,
cparata	3:4274d9103f1d	2284	LSM6DSO_GY_BATCHED_AT_208Hz = 5,
cparata	3:4274d9103f1d	2285	LSM6DSO_GY_BATCHED_AT_417Hz = 6,
cparata	3:4274d9103f1d	2286	LSM6DSO_GY_BATCHED_AT_833Hz = 7,
cparata	3:4274d9103f1d	2287	LSM6DSO_GY_BATCHED_AT_1667Hz = 8,
cparata	3:4274d9103f1d	2288	LSM6DSO_GY_BATCHED_AT_3333Hz = 9,
cparata	3:4274d9103f1d	2289	LSM6DSO_GY_BATCHED_AT_6667Hz = 10,
cparata	3:4274d9103f1d	2290	LSM6DSO_GY_BATCHED_AT_6Hz5 = 11,
cparata	0:6d69e896ce38	2291	} lsm6dso_bdr_gy_t;
cparata	0:6d69e896ce38	2292	int32_t lsm6dso_fifo_gy_batch_set(lsm6dso_ctx_t *ctx, lsm6dso_bdr_gy_t val);
cparata	0:6d69e896ce38	2293	int32_t lsm6dso_fifo_gy_batch_get(lsm6dso_ctx_t ctx, lsm6dso_bdr_gy_t val);
cparata	0:6d69e896ce38	2294
cparata	0:6d69e896ce38	2295	typedef enum {
cparata	3:4274d9103f1d	2296	LSM6DSO_BYPASS_MODE = 0,
cparata	3:4274d9103f1d	2297	LSM6DSO_FIFO_MODE = 1,
cparata	3:4274d9103f1d	2298	LSM6DSO_STREAM_TO_FIFO_MODE = 3,
cparata	3:4274d9103f1d	2299	LSM6DSO_BYPASS_TO_STREAM_MODE = 4,
cparata	3:4274d9103f1d	2300	LSM6DSO_STREAM_MODE = 6,
cparata	3:4274d9103f1d	2301	LSM6DSO_BYPASS_TO_FIFO_MODE = 7,
cparata	0:6d69e896ce38	2302	} lsm6dso_fifo_mode_t;
cparata	0:6d69e896ce38	2303	int32_t lsm6dso_fifo_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_fifo_mode_t val);
cparata	0:6d69e896ce38	2304	int32_t lsm6dso_fifo_mode_get(lsm6dso_ctx_t ctx, lsm6dso_fifo_mode_t val);
cparata	0:6d69e896ce38	2305
cparata	0:6d69e896ce38	2306	typedef enum {
cparata	3:4274d9103f1d	2307	LSM6DSO_TEMP_NOT_BATCHED = 0,
cparata	3:4274d9103f1d	2308	LSM6DSO_TEMP_BATCHED_AT_1Hz6 = 1,
cparata	3:4274d9103f1d	2309	LSM6DSO_TEMP_BATCHED_AT_12Hz5 = 2,
cparata	3:4274d9103f1d	2310	LSM6DSO_TEMP_BATCHED_AT_52Hz = 3,
cparata	0:6d69e896ce38	2311	} lsm6dso_odr_t_batch_t;
cparata	0:6d69e896ce38	2312	int32_t lsm6dso_fifo_temp_batch_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2313	lsm6dso_odr_t_batch_t val);
cparata	0:6d69e896ce38	2314	int32_t lsm6dso_fifo_temp_batch_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2315	lsm6dso_odr_t_batch_t *val);
cparata	0:6d69e896ce38	2316
cparata	0:6d69e896ce38	2317	typedef enum {
cparata	3:4274d9103f1d	2318	LSM6DSO_NO_DECIMATION = 0,
cparata	3:4274d9103f1d	2319	LSM6DSO_DEC_1 = 1,
cparata	3:4274d9103f1d	2320	LSM6DSO_DEC_8 = 2,
cparata	3:4274d9103f1d	2321	LSM6DSO_DEC_32 = 3,
cparata	0:6d69e896ce38	2322	} lsm6dso_odr_ts_batch_t;
cparata	0:6d69e896ce38	2323	int32_t lsm6dso_fifo_timestamp_decimation_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2324	lsm6dso_odr_ts_batch_t val);
cparata	0:6d69e896ce38	2325	int32_t lsm6dso_fifo_timestamp_decimation_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2326	lsm6dso_odr_ts_batch_t *val);
cparata	0:6d69e896ce38	2327
cparata	0:6d69e896ce38	2328	typedef enum {
cparata	3:4274d9103f1d	2329	LSM6DSO_XL_BATCH_EVENT = 0,
cparata	3:4274d9103f1d	2330	LSM6DSO_GYRO_BATCH_EVENT = 1,
cparata	0:6d69e896ce38	2331	} lsm6dso_trig_counter_bdr_t;
cparata	0:6d69e896ce38	2332
cparata	0:6d69e896ce38	2333	typedef enum {
cparata	3:4274d9103f1d	2334	LSM6DSO_GYRO_NC_TAG = 1,
cparata	3:4274d9103f1d	2335	LSM6DSO_XL_NC_TAG,
cparata	3:4274d9103f1d	2336	LSM6DSO_TEMPERATURE_TAG,
cparata	3:4274d9103f1d	2337	LSM6DSO_TIMESTAMP_TAG,
cparata	3:4274d9103f1d	2338	LSM6DSO_CFG_CHANGE_TAG,
cparata	3:4274d9103f1d	2339	LSM6DSO_XL_NC_T_2_TAG,
cparata	3:4274d9103f1d	2340	LSM6DSO_XL_NC_T_1_TAG,
cparata	3:4274d9103f1d	2341	LSM6DSO_XL_2XC_TAG,
cparata	3:4274d9103f1d	2342	LSM6DSO_XL_3XC_TAG,
cparata	3:4274d9103f1d	2343	LSM6DSO_GYRO_NC_T_2_TAG,
cparata	3:4274d9103f1d	2344	LSM6DSO_GYRO_NC_T_1_TAG,
cparata	3:4274d9103f1d	2345	LSM6DSO_GYRO_2XC_TAG,
cparata	3:4274d9103f1d	2346	LSM6DSO_GYRO_3XC_TAG,
cparata	3:4274d9103f1d	2347	LSM6DSO_SENSORHUB_SLAVE0_TAG,
cparata	3:4274d9103f1d	2348	LSM6DSO_SENSORHUB_SLAVE1_TAG,
cparata	3:4274d9103f1d	2349	LSM6DSO_SENSORHUB_SLAVE2_TAG,
cparata	3:4274d9103f1d	2350	LSM6DSO_SENSORHUB_SLAVE3_TAG,
cparata	3:4274d9103f1d	2351	LSM6DSO_STEP_CPUNTER_TAG,
cparata	3:4274d9103f1d	2352	LSM6DSO_GAME_ROTATION_TAG,
cparata	3:4274d9103f1d	2353	LSM6DSO_GEOMAG_ROTATION_TAG,
cparata	3:4274d9103f1d	2354	LSM6DSO_ROTATION_TAG,
cparata	3:4274d9103f1d	2355	LSM6DSO_SENSORHUB_NACK_TAG = 0x19,
cparata	0:6d69e896ce38	2356	} lsm6dso_fifo_tag_t;
cparata	0:6d69e896ce38	2357	int32_t lsm6dso_fifo_cnt_event_batch_set(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2358	lsm6dso_trig_counter_bdr_t val);
cparata	0:6d69e896ce38	2359	int32_t lsm6dso_fifo_cnt_event_batch_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2360	lsm6dso_trig_counter_bdr_t *val);
cparata	0:6d69e896ce38	2361
cparata	0:6d69e896ce38	2362	int32_t lsm6dso_rst_batch_counter_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2363	int32_t lsm6dso_rst_batch_counter_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2364
cparata	0:6d69e896ce38	2365	int32_t lsm6dso_batch_counter_threshold_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2366	uint16_t val);
cparata	0:6d69e896ce38	2367	int32_t lsm6dso_batch_counter_threshold_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2368	uint16_t *val);
cparata	0:6d69e896ce38	2369
cparata	0:6d69e896ce38	2370	int32_t lsm6dso_fifo_data_level_get(lsm6dso_ctx_t ctx, uint16_t val);
cparata	0:6d69e896ce38	2371
cparata	0:6d69e896ce38	2372	int32_t lsm6dso_fifo_status_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2373	lsm6dso_fifo_status2_t *val);
cparata	0:6d69e896ce38	2374
cparata	0:6d69e896ce38	2375	int32_t lsm6dso_fifo_full_flag_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2376
cparata	0:6d69e896ce38	2377	int32_t lsm6dso_fifo_ovr_flag_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2378
cparata	0:6d69e896ce38	2379	int32_t lsm6dso_fifo_wtm_flag_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2380
cparata	0:6d69e896ce38	2381	int32_t lsm6dso_fifo_sensor_tag_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2382	lsm6dso_fifo_tag_t *val);
cparata	0:6d69e896ce38	2383
cparata	0:6d69e896ce38	2384	int32_t lsm6dso_fifo_pedo_batch_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2385	int32_t lsm6dso_fifo_pedo_batch_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2386
cparata	0:6d69e896ce38	2387	int32_t lsm6dso_sh_batch_slave_0_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2388	int32_t lsm6dso_sh_batch_slave_0_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2389
cparata	0:6d69e896ce38	2390	int32_t lsm6dso_sh_batch_slave_1_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2391	int32_t lsm6dso_sh_batch_slave_1_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2392
cparata	0:6d69e896ce38	2393	int32_t lsm6dso_sh_batch_slave_2_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2394	int32_t lsm6dso_sh_batch_slave_2_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2395
cparata	0:6d69e896ce38	2396	int32_t lsm6dso_sh_batch_slave_3_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2397	int32_t lsm6dso_sh_batch_slave_3_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2398
cparata	0:6d69e896ce38	2399	typedef enum {
cparata	3:4274d9103f1d	2400	LSM6DSO_DEN_DISABLE = 0,
cparata	3:4274d9103f1d	2401	LSM6DSO_LEVEL_FIFO = 6,
cparata	3:4274d9103f1d	2402	LSM6DSO_LEVEL_LETCHED = 3,
cparata	3:4274d9103f1d	2403	LSM6DSO_LEVEL_TRIGGER = 2,
cparata	3:4274d9103f1d	2404	LSM6DSO_EDGE_TRIGGER = 4,
cparata	0:6d69e896ce38	2405	} lsm6dso_den_mode_t;
cparata	0:6d69e896ce38	2406	int32_t lsm6dso_den_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_den_mode_t val);
cparata	0:6d69e896ce38	2407	int32_t lsm6dso_den_mode_get(lsm6dso_ctx_t ctx, lsm6dso_den_mode_t val);
cparata	0:6d69e896ce38	2408
cparata	0:6d69e896ce38	2409	typedef enum {
cparata	3:4274d9103f1d	2410	LSM6DSO_DEN_ACT_LOW = 0,
cparata	3:4274d9103f1d	2411	LSM6DSO_DEN_ACT_HIGH = 1,
cparata	0:6d69e896ce38	2412	} lsm6dso_den_lh_t;
cparata	0:6d69e896ce38	2413	int32_t lsm6dso_den_polarity_set(lsm6dso_ctx_t *ctx, lsm6dso_den_lh_t val);
cparata	0:6d69e896ce38	2414	int32_t lsm6dso_den_polarity_get(lsm6dso_ctx_t ctx, lsm6dso_den_lh_t val);
cparata	0:6d69e896ce38	2415
cparata	0:6d69e896ce38	2416	typedef enum {
cparata	3:4274d9103f1d	2417	LSM6DSO_STAMP_IN_GY_DATA = 0,
cparata	3:4274d9103f1d	2418	LSM6DSO_STAMP_IN_XL_DATA = 1,
cparata	3:4274d9103f1d	2419	LSM6DSO_STAMP_IN_GY_XL_DATA = 2,
cparata	0:6d69e896ce38	2420	} lsm6dso_den_xl_g_t;
cparata	0:6d69e896ce38	2421	int32_t lsm6dso_den_enable_set(lsm6dso_ctx_t *ctx, lsm6dso_den_xl_g_t val);
cparata	0:6d69e896ce38	2422	int32_t lsm6dso_den_enable_get(lsm6dso_ctx_t ctx, lsm6dso_den_xl_g_t val);
cparata	0:6d69e896ce38	2423
cparata	0:6d69e896ce38	2424	int32_t lsm6dso_den_mark_axis_x_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2425	int32_t lsm6dso_den_mark_axis_x_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2426
cparata	0:6d69e896ce38	2427	int32_t lsm6dso_den_mark_axis_y_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2428	int32_t lsm6dso_den_mark_axis_y_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2429
cparata	0:6d69e896ce38	2430	int32_t lsm6dso_den_mark_axis_z_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2431	int32_t lsm6dso_den_mark_axis_z_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2432
cparata	0:6d69e896ce38	2433	typedef enum {
cparata	3:4274d9103f1d	2434	LSM6DSO_PEDO_DISABLE = 0x00,
cparata	3:4274d9103f1d	2435	LSM6DSO_PEDO_BASE_MODE = 0x01,
cparata	3:4274d9103f1d	2436	LSM6DSO_PEDO_ADV_MODE = 0x03,
cparata	3:4274d9103f1d	2437	LSM6DSO_FALSE_STEP_REJ = 0x13,
cparata	3:4274d9103f1d	2438	LSM6DSO_FALSE_STEP_REJ_ADV_MODE = 0x33,
cparata	0:6d69e896ce38	2439	} lsm6dso_pedo_md_t;
cparata	0:6d69e896ce38	2440	int32_t lsm6dso_pedo_sens_set(lsm6dso_ctx_t *ctx, lsm6dso_pedo_md_t val);
cparata	0:6d69e896ce38	2441	int32_t lsm6dso_pedo_sens_get(lsm6dso_ctx_t ctx, lsm6dso_pedo_md_t val);
cparata	0:6d69e896ce38	2442
cparata	0:6d69e896ce38	2443	int32_t lsm6dso_pedo_step_detect_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2444
cparata	0:6d69e896ce38	2445	int32_t lsm6dso_pedo_debounce_steps_set(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2446	uint8_t *buff);
cparata	0:6d69e896ce38	2447	int32_t lsm6dso_pedo_debounce_steps_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2448	uint8_t *buff);
cparata	0:6d69e896ce38	2449
cparata	0:6d69e896ce38	2450	int32_t lsm6dso_pedo_steps_period_set(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	2451	int32_t lsm6dso_pedo_steps_period_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	2452
cparata	0:6d69e896ce38	2453	typedef enum {
cparata	3:4274d9103f1d	2454	LSM6DSO_EVERY_STEP = 0,
cparata	3:4274d9103f1d	2455	LSM6DSO_COUNT_OVERFLOW = 1,
cparata	0:6d69e896ce38	2456	} lsm6dso_carry_count_en_t;
cparata	0:6d69e896ce38	2457	int32_t lsm6dso_pedo_int_mode_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2458	lsm6dso_carry_count_en_t val);
cparata	0:6d69e896ce38	2459	int32_t lsm6dso_pedo_int_mode_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2460	lsm6dso_carry_count_en_t *val);
cparata	0:6d69e896ce38	2461
cparata	0:6d69e896ce38	2462	int32_t lsm6dso_motion_sens_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2463	int32_t lsm6dso_motion_sens_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2464
cparata	0:6d69e896ce38	2465	int32_t lsm6dso_motion_flag_data_ready_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2466	uint8_t *val);
cparata	0:6d69e896ce38	2467
cparata	0:6d69e896ce38	2468	int32_t lsm6dso_tilt_sens_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2469	int32_t lsm6dso_tilt_sens_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2470
cparata	0:6d69e896ce38	2471	int32_t lsm6dso_tilt_flag_data_ready_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2472	uint8_t *val);
cparata	0:6d69e896ce38	2473
cparata	0:6d69e896ce38	2474	int32_t lsm6dso_mag_sensitivity_set(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	2475	int32_t lsm6dso_mag_sensitivity_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	2476
cparata	0:6d69e896ce38	2477	int32_t lsm6dso_mag_offset_set(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	2478	int32_t lsm6dso_mag_offset_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	2479
cparata	0:6d69e896ce38	2480	int32_t lsm6dso_mag_soft_iron_set(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	2481	int32_t lsm6dso_mag_soft_iron_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	2482
cparata	0:6d69e896ce38	2483	typedef enum {
cparata	3:4274d9103f1d	2484	LSM6DSO_Z_EQ_Y = 0,
cparata	3:4274d9103f1d	2485	LSM6DSO_Z_EQ_MIN_Y = 1,
cparata	3:4274d9103f1d	2486	LSM6DSO_Z_EQ_X = 2,
cparata	3:4274d9103f1d	2487	LSM6DSO_Z_EQ_MIN_X = 3,
cparata	3:4274d9103f1d	2488	LSM6DSO_Z_EQ_MIN_Z = 4,
cparata	3:4274d9103f1d	2489	LSM6DSO_Z_EQ_Z = 5,
cparata	0:6d69e896ce38	2490	} lsm6dso_mag_z_axis_t;
cparata	0:6d69e896ce38	2491	int32_t lsm6dso_mag_z_orient_set(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2492	lsm6dso_mag_z_axis_t val);
cparata	0:6d69e896ce38	2493	int32_t lsm6dso_mag_z_orient_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2494	lsm6dso_mag_z_axis_t *val);
cparata	0:6d69e896ce38	2495
cparata	0:6d69e896ce38	2496	typedef enum {
cparata	3:4274d9103f1d	2497	LSM6DSO_Y_EQ_Y = 0,
cparata	3:4274d9103f1d	2498	LSM6DSO_Y_EQ_MIN_Y = 1,
cparata	3:4274d9103f1d	2499	LSM6DSO_Y_EQ_X = 2,
cparata	3:4274d9103f1d	2500	LSM6DSO_Y_EQ_MIN_X = 3,
cparata	3:4274d9103f1d	2501	LSM6DSO_Y_EQ_MIN_Z = 4,
cparata	3:4274d9103f1d	2502	LSM6DSO_Y_EQ_Z = 5,
cparata	0:6d69e896ce38	2503	} lsm6dso_mag_y_axis_t;
cparata	0:6d69e896ce38	2504	int32_t lsm6dso_mag_y_orient_set(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2505	lsm6dso_mag_y_axis_t val);
cparata	0:6d69e896ce38	2506	int32_t lsm6dso_mag_y_orient_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2507	lsm6dso_mag_y_axis_t *val);
cparata	0:6d69e896ce38	2508
cparata	0:6d69e896ce38	2509	typedef enum {
cparata	3:4274d9103f1d	2510	LSM6DSO_X_EQ_Y = 0,
cparata	3:4274d9103f1d	2511	LSM6DSO_X_EQ_MIN_Y = 1,
cparata	3:4274d9103f1d	2512	LSM6DSO_X_EQ_X = 2,
cparata	3:4274d9103f1d	2513	LSM6DSO_X_EQ_MIN_X = 3,
cparata	3:4274d9103f1d	2514	LSM6DSO_X_EQ_MIN_Z = 4,
cparata	3:4274d9103f1d	2515	LSM6DSO_X_EQ_Z = 5,
cparata	0:6d69e896ce38	2516	} lsm6dso_mag_x_axis_t;
cparata	0:6d69e896ce38	2517	int32_t lsm6dso_mag_x_orient_set(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2518	lsm6dso_mag_x_axis_t val);
cparata	0:6d69e896ce38	2519	int32_t lsm6dso_mag_x_orient_get(lsm6dso_ctx_t *ctx,
cparata	3:4274d9103f1d	2520	lsm6dso_mag_x_axis_t *val);
cparata	0:6d69e896ce38	2521
cparata	0:6d69e896ce38	2522	int32_t lsm6dso_long_cnt_flag_data_ready_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2523	uint8_t *val);
cparata	0:6d69e896ce38	2524
cparata	0:6d69e896ce38	2525	int32_t lsm6dso_emb_fsm_en_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2526	int32_t lsm6dso_emb_fsm_en_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2527
cparata	0:6d69e896ce38	2528	typedef struct {
cparata	0:6d69e896ce38	2529	lsm6dso_fsm_enable_a_t fsm_enable_a;
cparata	0:6d69e896ce38	2530	lsm6dso_fsm_enable_b_t fsm_enable_b;
cparata	0:6d69e896ce38	2531	} lsm6dso_emb_fsm_enable_t;
cparata	0:6d69e896ce38	2532	int32_t lsm6dso_fsm_enable_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2533	lsm6dso_emb_fsm_enable_t *val);
cparata	0:6d69e896ce38	2534	int32_t lsm6dso_fsm_enable_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2535	lsm6dso_emb_fsm_enable_t *val);
cparata	0:6d69e896ce38	2536
cparata	0:6d69e896ce38	2537	int32_t lsm6dso_long_cnt_set(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	2538	int32_t lsm6dso_long_cnt_get(lsm6dso_ctx_t ctx, uint8_t buff);
cparata	0:6d69e896ce38	2539
cparata	0:6d69e896ce38	2540	typedef enum {
cparata	3:4274d9103f1d	2541	LSM6DSO_LC_NORMAL = 0,
cparata	3:4274d9103f1d	2542	LSM6DSO_LC_CLEAR = 1,
cparata	3:4274d9103f1d	2543	LSM6DSO_LC_CLEAR_DONE = 2,
cparata	0:6d69e896ce38	2544	} lsm6dso_fsm_lc_clr_t;
cparata	0:6d69e896ce38	2545	int32_t lsm6dso_long_clr_set(lsm6dso_ctx_t *ctx, lsm6dso_fsm_lc_clr_t val);
cparata	0:6d69e896ce38	2546	int32_t lsm6dso_long_clr_get(lsm6dso_ctx_t ctx, lsm6dso_fsm_lc_clr_t val);
cparata	0:6d69e896ce38	2547
cparata	0:6d69e896ce38	2548	typedef struct {
cparata	0:6d69e896ce38	2549	lsm6dso_fsm_outs1_t fsm_outs1;
cparata	0:6d69e896ce38	2550	lsm6dso_fsm_outs2_t fsm_outs2;
cparata	0:6d69e896ce38	2551	lsm6dso_fsm_outs3_t fsm_outs3;
cparata	0:6d69e896ce38	2552	lsm6dso_fsm_outs4_t fsm_outs4;
cparata	0:6d69e896ce38	2553	lsm6dso_fsm_outs5_t fsm_outs5;
cparata	0:6d69e896ce38	2554	lsm6dso_fsm_outs6_t fsm_outs6;
cparata	0:6d69e896ce38	2555	lsm6dso_fsm_outs7_t fsm_outs7;
cparata	0:6d69e896ce38	2556	lsm6dso_fsm_outs8_t fsm_outs8;
cparata	2:4d14e9edf37e	2557	lsm6dso_fsm_outs9_t fsm_outs9;
cparata	2:4d14e9edf37e	2558	lsm6dso_fsm_outs10_t fsm_outs10;
cparata	2:4d14e9edf37e	2559	lsm6dso_fsm_outs11_t fsm_outs11;
cparata	2:4d14e9edf37e	2560	lsm6dso_fsm_outs12_t fsm_outs12;
cparata	2:4d14e9edf37e	2561	lsm6dso_fsm_outs13_t fsm_outs13;
cparata	2:4d14e9edf37e	2562	lsm6dso_fsm_outs14_t fsm_outs14;
cparata	2:4d14e9edf37e	2563	lsm6dso_fsm_outs15_t fsm_outs15;
cparata	2:4d14e9edf37e	2564	lsm6dso_fsm_outs16_t fsm_outs16;
cparata	0:6d69e896ce38	2565	} lsm6dso_fsm_out_t;
cparata	0:6d69e896ce38	2566	int32_t lsm6dso_fsm_out_get(lsm6dso_ctx_t ctx, lsm6dso_fsm_out_t val);
cparata	0:6d69e896ce38	2567
cparata	0:6d69e896ce38	2568	typedef enum {
cparata	3:4274d9103f1d	2569	LSM6DSO_ODR_FSM_12Hz5 = 0,
cparata	3:4274d9103f1d	2570	LSM6DSO_ODR_FSM_26Hz = 1,
cparata	3:4274d9103f1d	2571	LSM6DSO_ODR_FSM_52Hz = 2,
cparata	3:4274d9103f1d	2572	LSM6DSO_ODR_FSM_104Hz = 3,
cparata	0:6d69e896ce38	2573	} lsm6dso_fsm_odr_t;
cparata	0:6d69e896ce38	2574	int32_t lsm6dso_fsm_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_fsm_odr_t val);
cparata	0:6d69e896ce38	2575	int32_t lsm6dso_fsm_data_rate_get(lsm6dso_ctx_t ctx, lsm6dso_fsm_odr_t val);
cparata	0:6d69e896ce38	2576
cparata	0:6d69e896ce38	2577	int32_t lsm6dso_fsm_init_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2578	int32_t lsm6dso_fsm_init_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2579
cparata	2:4d14e9edf37e	2580	int32_t lsm6dso_long_cnt_int_value_set(lsm6dso_ctx_t *ctx, uint16_t val);
cparata	2:4d14e9edf37e	2581	int32_t lsm6dso_long_cnt_int_value_get(lsm6dso_ctx_t ctx, uint16_t val);
cparata	0:6d69e896ce38	2582
cparata	2:4d14e9edf37e	2583	int32_t lsm6dso_fsm_number_of_programs_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	2:4d14e9edf37e	2584	int32_t lsm6dso_fsm_number_of_programs_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2585
cparata	2:4d14e9edf37e	2586	int32_t lsm6dso_fsm_start_address_set(lsm6dso_ctx_t *ctx, uint16_t val);
cparata	2:4d14e9edf37e	2587	int32_t lsm6dso_fsm_start_address_get(lsm6dso_ctx_t ctx, uint16_t val);
cparata	2:4d14e9edf37e	2588
cparata	2:4d14e9edf37e	2589	int32_t lsm6dso_sh_read_data_raw_get(lsm6dso_ctx_t ctx, uint8_t val,
cparata	2:4d14e9edf37e	2590	uint8_t len);
cparata	0:6d69e896ce38	2591
cparata	0:6d69e896ce38	2592	typedef enum {
cparata	3:4274d9103f1d	2593	LSM6DSO_SLV_0 = 0,
cparata	3:4274d9103f1d	2594	LSM6DSO_SLV_0_1 = 1,
cparata	3:4274d9103f1d	2595	LSM6DSO_SLV_0_1_2 = 2,
cparata	3:4274d9103f1d	2596	LSM6DSO_SLV_0_1_2_3 = 3,
cparata	0:6d69e896ce38	2597	} lsm6dso_aux_sens_on_t;
cparata	0:6d69e896ce38	2598	int32_t lsm6dso_sh_slave_connected_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2599	lsm6dso_aux_sens_on_t val);
cparata	0:6d69e896ce38	2600	int32_t lsm6dso_sh_slave_connected_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2601	lsm6dso_aux_sens_on_t *val);
cparata	0:6d69e896ce38	2602
cparata	0:6d69e896ce38	2603	int32_t lsm6dso_sh_master_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2604	int32_t lsm6dso_sh_master_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2605
cparata	0:6d69e896ce38	2606	typedef enum {
cparata	3:4274d9103f1d	2607	LSM6DSO_EXT_PULL_UP = 0,
cparata	3:4274d9103f1d	2608	LSM6DSO_INTERNAL_PULL_UP = 1,
cparata	0:6d69e896ce38	2609	} lsm6dso_shub_pu_en_t;
cparata	0:6d69e896ce38	2610	int32_t lsm6dso_sh_pin_mode_set(lsm6dso_ctx_t *ctx, lsm6dso_shub_pu_en_t val);
cparata	0:6d69e896ce38	2611	int32_t lsm6dso_sh_pin_mode_get(lsm6dso_ctx_t ctx, lsm6dso_shub_pu_en_t val);
cparata	0:6d69e896ce38	2612
cparata	0:6d69e896ce38	2613	int32_t lsm6dso_sh_pass_through_set(lsm6dso_ctx_t *ctx, uint8_t val);
cparata	0:6d69e896ce38	2614	int32_t lsm6dso_sh_pass_through_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2615
cparata	0:6d69e896ce38	2616	typedef enum {
cparata	3:4274d9103f1d	2617	LSM6DSO_EXT_ON_INT2_PIN = 0,
cparata	3:4274d9103f1d	2618	LSM6DSO_XL_GY_DRDY = 1,
cparata	0:6d69e896ce38	2619	} lsm6dso_start_config_t;
cparata	0:6d69e896ce38	2620	int32_t lsm6dso_sh_syncro_mode_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2621	lsm6dso_start_config_t val);
cparata	0:6d69e896ce38	2622	int32_t lsm6dso_sh_syncro_mode_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2623	lsm6dso_start_config_t *val);
cparata	0:6d69e896ce38	2624
cparata	0:6d69e896ce38	2625	typedef enum {
cparata	3:4274d9103f1d	2626	LSM6DSO_EACH_SH_CYCLE = 0,
cparata	3:4274d9103f1d	2627	LSM6DSO_ONLY_FIRST_CYCLE = 1,
cparata	0:6d69e896ce38	2628	} lsm6dso_write_once_t;
cparata	0:6d69e896ce38	2629	int32_t lsm6dso_sh_write_mode_set(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2630	lsm6dso_write_once_t val);
cparata	0:6d69e896ce38	2631	int32_t lsm6dso_sh_write_mode_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2632	lsm6dso_write_once_t *val);
cparata	0:6d69e896ce38	2633
cparata	0:6d69e896ce38	2634	int32_t lsm6dso_sh_reset_set(lsm6dso_ctx_t *ctx);
cparata	0:6d69e896ce38	2635	int32_t lsm6dso_sh_reset_get(lsm6dso_ctx_t ctx, uint8_t val);
cparata	0:6d69e896ce38	2636
cparata	0:6d69e896ce38	2637	typedef enum {
cparata	3:4274d9103f1d	2638	LSM6DSO_SH_ODR_104Hz = 0,
cparata	3:4274d9103f1d	2639	LSM6DSO_SH_ODR_52Hz = 1,
cparata	3:4274d9103f1d	2640	LSM6DSO_SH_ODR_26Hz = 2,
cparata	3:4274d9103f1d	2641	LSM6DSO_SH_ODR_13Hz = 3,
cparata	0:6d69e896ce38	2642	} lsm6dso_shub_odr_t;
cparata	0:6d69e896ce38	2643	int32_t lsm6dso_sh_data_rate_set(lsm6dso_ctx_t *ctx, lsm6dso_shub_odr_t val);
cparata	0:6d69e896ce38	2644	int32_t lsm6dso_sh_data_rate_get(lsm6dso_ctx_t ctx, lsm6dso_shub_odr_t val);
cparata	0:6d69e896ce38	2645
cparata	3:4274d9103f1d	2646	typedef struct {
cparata	3:4274d9103f1d	2647	uint8_t slv0_add;
cparata	3:4274d9103f1d	2648	uint8_t slv0_subadd;
cparata	3:4274d9103f1d	2649	uint8_t slv0_data;
cparata	0:6d69e896ce38	2650	} lsm6dso_sh_cfg_write_t;
cparata	0:6d69e896ce38	2651	int32_t lsm6dso_sh_cfg_write(lsm6dso_ctx_t ctx, lsm6dso_sh_cfg_write_t val);
cparata	0:6d69e896ce38	2652
cparata	3:4274d9103f1d	2653	typedef struct {
cparata	3:4274d9103f1d	2654	uint8_t slv_add;
cparata	3:4274d9103f1d	2655	uint8_t slv_subadd;
cparata	3:4274d9103f1d	2656	uint8_t slv_len;
cparata	0:6d69e896ce38	2657	} lsm6dso_sh_cfg_read_t;
cparata	0:6d69e896ce38	2658	int32_t lsm6dso_sh_slv0_cfg_read(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2659	lsm6dso_sh_cfg_read_t *val);
cparata	0:6d69e896ce38	2660	int32_t lsm6dso_sh_slv1_cfg_read(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2661	lsm6dso_sh_cfg_read_t *val);
cparata	0:6d69e896ce38	2662	int32_t lsm6dso_sh_slv2_cfg_read(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2663	lsm6dso_sh_cfg_read_t *val);
cparata	0:6d69e896ce38	2664	int32_t lsm6dso_sh_slv3_cfg_read(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2665	lsm6dso_sh_cfg_read_t *val);
cparata	0:6d69e896ce38	2666
cparata	0:6d69e896ce38	2667	int32_t lsm6dso_sh_status_get(lsm6dso_ctx_t *ctx,
cparata	0:6d69e896ce38	2668	lsm6dso_status_master_t *val);
cparata	0:6d69e896ce38	2669
cparata	0:6d69e896ce38	2670	/**
cparata	0:6d69e896ce38	2671	* @}
cparata	0:6d69e896ce38	2672	*
cparata	0:6d69e896ce38	2673	*/
cparata	0:6d69e896ce38	2674
cparata	0:6d69e896ce38	2675	#ifdef __cplusplus
cparata	0:6d69e896ce38	2676	}
cparata	0:6d69e896ce38	2677	#endif
cparata	0:6d69e896ce38	2678
cparata	0:6d69e896ce38	2679	#endif /LSM6DSO_DRIVER_H /
cparata	0:6d69e896ce38	2680
cparata	0:6d69e896ce38	2681	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	07 Mar 2019
Imports:	15
Forks:	0
Commits:	7
Dependents:	2
Dependencies:	2
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The code in this repository is Apache licensed.

lsm6dso_reg.h@3:4274d9103f1d, 2019-07-24 (annotated)

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