Ultra-compact high-performance eCompass module: ultra-low power 3D accelerometer and 3D magnetometer.
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
Dependents: HelloWorld_ST_Sensors MOTENV_Mbed mbed-os-mqtt-client LSM303AGR_JS ... more
LSM303AGR_acc_driver.h@0:ec6e59cc6f40, 2017-09-04 (annotated)
- Committer:
- nikapov
- Date:
- Mon Sep 04 16:08:24 2017 +0000
- Revision:
- 0:ec6e59cc6f40
- Child:
- 2:e37be5550633
First version.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
nikapov | 0:ec6e59cc6f40 | 1 | /** |
nikapov | 0:ec6e59cc6f40 | 2 | ****************************************************************************** |
nikapov | 0:ec6e59cc6f40 | 3 | * @file LSM303AGR_acc_driver.h |
nikapov | 0:ec6e59cc6f40 | 4 | * @author MEMS Application Team |
nikapov | 0:ec6e59cc6f40 | 5 | * @version V1.1 |
nikapov | 0:ec6e59cc6f40 | 6 | * @date 24-February-2016 |
nikapov | 0:ec6e59cc6f40 | 7 | * @brief LSM303AGR Accelerometer header driver file |
nikapov | 0:ec6e59cc6f40 | 8 | ****************************************************************************** |
nikapov | 0:ec6e59cc6f40 | 9 | * @attention |
nikapov | 0:ec6e59cc6f40 | 10 | * |
nikapov | 0:ec6e59cc6f40 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
nikapov | 0:ec6e59cc6f40 | 12 | * |
nikapov | 0:ec6e59cc6f40 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
nikapov | 0:ec6e59cc6f40 | 14 | * are permitted provided that the following conditions are met: |
nikapov | 0:ec6e59cc6f40 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
nikapov | 0:ec6e59cc6f40 | 16 | * this list of conditions and the following disclaimer. |
nikapov | 0:ec6e59cc6f40 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
nikapov | 0:ec6e59cc6f40 | 18 | * this list of conditions and the following disclaimer in the documentation |
nikapov | 0:ec6e59cc6f40 | 19 | * and/or other materials provided with the distribution. |
nikapov | 0:ec6e59cc6f40 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
nikapov | 0:ec6e59cc6f40 | 21 | * may be used to endorse or promote products derived from this software |
nikapov | 0:ec6e59cc6f40 | 22 | * without specific prior written permission. |
nikapov | 0:ec6e59cc6f40 | 23 | * |
nikapov | 0:ec6e59cc6f40 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
nikapov | 0:ec6e59cc6f40 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
nikapov | 0:ec6e59cc6f40 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
nikapov | 0:ec6e59cc6f40 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
nikapov | 0:ec6e59cc6f40 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
nikapov | 0:ec6e59cc6f40 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
nikapov | 0:ec6e59cc6f40 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
nikapov | 0:ec6e59cc6f40 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
nikapov | 0:ec6e59cc6f40 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
nikapov | 0:ec6e59cc6f40 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
nikapov | 0:ec6e59cc6f40 | 34 | * |
nikapov | 0:ec6e59cc6f40 | 35 | ****************************************************************************** |
nikapov | 0:ec6e59cc6f40 | 36 | */ |
nikapov | 0:ec6e59cc6f40 | 37 | |
nikapov | 0:ec6e59cc6f40 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
nikapov | 0:ec6e59cc6f40 | 39 | #ifndef __LSM303AGR_ACC_DRIVER__H |
nikapov | 0:ec6e59cc6f40 | 40 | #define __LSM303AGR_ACC_DRIVER__H |
nikapov | 0:ec6e59cc6f40 | 41 | |
nikapov | 0:ec6e59cc6f40 | 42 | /* Includes ------------------------------------------------------------------*/ |
nikapov | 0:ec6e59cc6f40 | 43 | #include <stdint.h> |
nikapov | 0:ec6e59cc6f40 | 44 | |
nikapov | 0:ec6e59cc6f40 | 45 | /* Exported types ------------------------------------------------------------*/ |
nikapov | 0:ec6e59cc6f40 | 46 | |
nikapov | 0:ec6e59cc6f40 | 47 | #ifdef __cplusplus |
nikapov | 0:ec6e59cc6f40 | 48 | extern "C" { |
nikapov | 0:ec6e59cc6f40 | 49 | #endif |
nikapov | 0:ec6e59cc6f40 | 50 | |
nikapov | 0:ec6e59cc6f40 | 51 | //these could change accordingly with the architecture |
nikapov | 0:ec6e59cc6f40 | 52 | |
nikapov | 0:ec6e59cc6f40 | 53 | #ifndef __ARCHDEP__TYPES |
nikapov | 0:ec6e59cc6f40 | 54 | #define __ARCHDEP__TYPES |
nikapov | 0:ec6e59cc6f40 | 55 | |
nikapov | 0:ec6e59cc6f40 | 56 | typedef unsigned char u8_t; |
nikapov | 0:ec6e59cc6f40 | 57 | typedef unsigned short int u16_t; |
nikapov | 0:ec6e59cc6f40 | 58 | typedef unsigned int u32_t; |
nikapov | 0:ec6e59cc6f40 | 59 | typedef int i32_t; |
nikapov | 0:ec6e59cc6f40 | 60 | typedef short int i16_t; |
nikapov | 0:ec6e59cc6f40 | 61 | typedef signed char i8_t; |
nikapov | 0:ec6e59cc6f40 | 62 | |
nikapov | 0:ec6e59cc6f40 | 63 | #endif /*__ARCHDEP__TYPES*/ |
nikapov | 0:ec6e59cc6f40 | 64 | |
nikapov | 0:ec6e59cc6f40 | 65 | /* Exported common structure --------------------------------------------------------*/ |
nikapov | 0:ec6e59cc6f40 | 66 | |
nikapov | 0:ec6e59cc6f40 | 67 | #ifndef __SHARED__TYPES |
nikapov | 0:ec6e59cc6f40 | 68 | #define __SHARED__TYPES |
nikapov | 0:ec6e59cc6f40 | 69 | |
nikapov | 0:ec6e59cc6f40 | 70 | typedef union{ |
nikapov | 0:ec6e59cc6f40 | 71 | i16_t i16bit[3]; |
nikapov | 0:ec6e59cc6f40 | 72 | u8_t u8bit[6]; |
nikapov | 0:ec6e59cc6f40 | 73 | } Type3Axis16bit_U; |
nikapov | 0:ec6e59cc6f40 | 74 | |
nikapov | 0:ec6e59cc6f40 | 75 | typedef union{ |
nikapov | 0:ec6e59cc6f40 | 76 | i16_t i16bit; |
nikapov | 0:ec6e59cc6f40 | 77 | u8_t u8bit[2]; |
nikapov | 0:ec6e59cc6f40 | 78 | } Type1Axis16bit_U; |
nikapov | 0:ec6e59cc6f40 | 79 | |
nikapov | 0:ec6e59cc6f40 | 80 | typedef union{ |
nikapov | 0:ec6e59cc6f40 | 81 | i32_t i32bit; |
nikapov | 0:ec6e59cc6f40 | 82 | u8_t u8bit[4]; |
nikapov | 0:ec6e59cc6f40 | 83 | } Type1Axis32bit_U; |
nikapov | 0:ec6e59cc6f40 | 84 | |
nikapov | 0:ec6e59cc6f40 | 85 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 86 | MEMS_SUCCESS = 0x01, |
nikapov | 0:ec6e59cc6f40 | 87 | MEMS_ERROR = 0x00 |
nikapov | 0:ec6e59cc6f40 | 88 | } mems_status_t; |
nikapov | 0:ec6e59cc6f40 | 89 | |
nikapov | 0:ec6e59cc6f40 | 90 | #endif /*__SHARED__TYPES*/ |
nikapov | 0:ec6e59cc6f40 | 91 | |
nikapov | 0:ec6e59cc6f40 | 92 | /* Exported macro ------------------------------------------------------------*/ |
nikapov | 0:ec6e59cc6f40 | 93 | |
nikapov | 0:ec6e59cc6f40 | 94 | /* Exported constants --------------------------------------------------------*/ |
nikapov | 0:ec6e59cc6f40 | 95 | |
nikapov | 0:ec6e59cc6f40 | 96 | /************** I2C Address *****************/ |
nikapov | 0:ec6e59cc6f40 | 97 | |
nikapov | 0:ec6e59cc6f40 | 98 | #define LSM303AGR_ACC_I2C_ADDRESS 0x32 |
nikapov | 0:ec6e59cc6f40 | 99 | |
nikapov | 0:ec6e59cc6f40 | 100 | /************** Who am I *******************/ |
nikapov | 0:ec6e59cc6f40 | 101 | |
nikapov | 0:ec6e59cc6f40 | 102 | #define LSM303AGR_ACC_WHO_AM_I 0x33 |
nikapov | 0:ec6e59cc6f40 | 103 | |
nikapov | 0:ec6e59cc6f40 | 104 | /* Private Function Prototype -------------------------------------------------------*/ |
nikapov | 0:ec6e59cc6f40 | 105 | |
nikapov | 0:ec6e59cc6f40 | 106 | void LSM303AGR_ACC_SwapHighLowByte(u8_t *bufferToSwap, u8_t numberOfByte, u8_t dimension); |
nikapov | 0:ec6e59cc6f40 | 107 | |
nikapov | 0:ec6e59cc6f40 | 108 | /* Public Function Prototypes ------------------------------------------------*/ |
nikapov | 0:ec6e59cc6f40 | 109 | |
nikapov | 0:ec6e59cc6f40 | 110 | mems_status_t LSM303AGR_ACC_read_reg( void *handle, u8_t Reg, u8_t* Data ); |
nikapov | 0:ec6e59cc6f40 | 111 | mems_status_t LSM303AGR_ACC_write_reg( void *handle, u8_t Reg, u8_t Data ); |
nikapov | 0:ec6e59cc6f40 | 112 | |
nikapov | 0:ec6e59cc6f40 | 113 | |
nikapov | 0:ec6e59cc6f40 | 114 | /************** Device Register *******************/ |
nikapov | 0:ec6e59cc6f40 | 115 | #define LSM303AGR_ACC_STATUS_REG_AUX 0X07 |
nikapov | 0:ec6e59cc6f40 | 116 | #define LSM303AGR_ACC_OUT_ADC1_L 0X08 |
nikapov | 0:ec6e59cc6f40 | 117 | #define LSM303AGR_ACC_OUT_ADC1_H 0X09 |
nikapov | 0:ec6e59cc6f40 | 118 | #define LSM303AGR_ACC_OUT_ADC2_L 0X0A |
nikapov | 0:ec6e59cc6f40 | 119 | #define LSM303AGR_ACC_OUT_ADC2_H 0X0B |
nikapov | 0:ec6e59cc6f40 | 120 | #define LSM303AGR_ACC_OUT_ADC3_L 0X0C |
nikapov | 0:ec6e59cc6f40 | 121 | #define LSM303AGR_ACC_OUT_ADC3_H 0X0D |
nikapov | 0:ec6e59cc6f40 | 122 | #define LSM303AGR_ACC_INT_COUNTER_REG 0X0E |
nikapov | 0:ec6e59cc6f40 | 123 | #define LSM303AGR_ACC_WHO_AM_I_REG 0X0F |
nikapov | 0:ec6e59cc6f40 | 124 | #define LSM303AGR_ACC_TEMP_CFG_REG 0X1F |
nikapov | 0:ec6e59cc6f40 | 125 | #define LSM303AGR_ACC_CTRL_REG1 0X20 |
nikapov | 0:ec6e59cc6f40 | 126 | #define LSM303AGR_ACC_CTRL_REG2 0X21 |
nikapov | 0:ec6e59cc6f40 | 127 | #define LSM303AGR_ACC_CTRL_REG3 0X22 |
nikapov | 0:ec6e59cc6f40 | 128 | #define LSM303AGR_ACC_CTRL_REG4 0X23 |
nikapov | 0:ec6e59cc6f40 | 129 | #define LSM303AGR_ACC_CTRL_REG5 0X24 |
nikapov | 0:ec6e59cc6f40 | 130 | #define LSM303AGR_ACC_CTRL_REG6 0X25 |
nikapov | 0:ec6e59cc6f40 | 131 | #define LSM303AGR_ACC_REFERENCE 0X26 |
nikapov | 0:ec6e59cc6f40 | 132 | #define LSM303AGR_ACC_STATUS_REG2 0X27 |
nikapov | 0:ec6e59cc6f40 | 133 | #define LSM303AGR_ACC_OUT_X_L 0X28 |
nikapov | 0:ec6e59cc6f40 | 134 | #define LSM303AGR_ACC_OUT_X_H 0X29 |
nikapov | 0:ec6e59cc6f40 | 135 | #define LSM303AGR_ACC_OUT_Y_L 0X2A |
nikapov | 0:ec6e59cc6f40 | 136 | #define LSM303AGR_ACC_OUT_Y_H 0X2B |
nikapov | 0:ec6e59cc6f40 | 137 | #define LSM303AGR_ACC_OUT_Z_L 0X2C |
nikapov | 0:ec6e59cc6f40 | 138 | #define LSM303AGR_ACC_OUT_Z_H 0X2D |
nikapov | 0:ec6e59cc6f40 | 139 | #define LSM303AGR_ACC_FIFO_CTRL_REG 0X2E |
nikapov | 0:ec6e59cc6f40 | 140 | #define LSM303AGR_ACC_FIFO_SRC_REG 0X2F |
nikapov | 0:ec6e59cc6f40 | 141 | #define LSM303AGR_ACC_INT1_CFG 0X30 |
nikapov | 0:ec6e59cc6f40 | 142 | #define LSM303AGR_ACC_INT1_SOURCE 0X31 |
nikapov | 0:ec6e59cc6f40 | 143 | #define LSM303AGR_ACC_INT1_THS 0X32 |
nikapov | 0:ec6e59cc6f40 | 144 | #define LSM303AGR_ACC_INT1_DURATION 0X33 |
nikapov | 0:ec6e59cc6f40 | 145 | #define LSM303AGR_ACC_INT2_CFG 0X34 |
nikapov | 0:ec6e59cc6f40 | 146 | #define LSM303AGR_ACC_INT2_SOURCE 0X35 |
nikapov | 0:ec6e59cc6f40 | 147 | #define LSM303AGR_ACC_INT2_THS 0X36 |
nikapov | 0:ec6e59cc6f40 | 148 | #define LSM303AGR_ACC_INT2_DURATION 0X37 |
nikapov | 0:ec6e59cc6f40 | 149 | #define LSM303AGR_ACC_CLICK_CFG 0X38 |
nikapov | 0:ec6e59cc6f40 | 150 | #define LSM303AGR_ACC_CLICK_SRC 0X39 |
nikapov | 0:ec6e59cc6f40 | 151 | #define LSM303AGR_ACC_CLICK_THS 0X3A |
nikapov | 0:ec6e59cc6f40 | 152 | #define LSM303AGR_ACC_TIME_LIMIT 0X3B |
nikapov | 0:ec6e59cc6f40 | 153 | #define LSM303AGR_ACC_TIME_LATENCY 0X3C |
nikapov | 0:ec6e59cc6f40 | 154 | #define LSM303AGR_ACC_TIME_WINDOW 0X3D |
nikapov | 0:ec6e59cc6f40 | 155 | |
nikapov | 0:ec6e59cc6f40 | 156 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 157 | * Register : STATUS_REG_AUX |
nikapov | 0:ec6e59cc6f40 | 158 | * Address : 0X07 |
nikapov | 0:ec6e59cc6f40 | 159 | * Bit Group Name: 1DA |
nikapov | 0:ec6e59cc6f40 | 160 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 161 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 162 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 163 | LSM303AGR_ACC_1DA_NOT_AVAILABLE =0x00, |
nikapov | 0:ec6e59cc6f40 | 164 | LSM303AGR_ACC_1DA_AVAILABLE =0x01, |
nikapov | 0:ec6e59cc6f40 | 165 | } LSM303AGR_ACC_1DA_t; |
nikapov | 0:ec6e59cc6f40 | 166 | |
nikapov | 0:ec6e59cc6f40 | 167 | #define LSM303AGR_ACC_1DA_MASK 0x01 |
nikapov | 0:ec6e59cc6f40 | 168 | mems_status_t LSM303AGR_ACC_R_x_data_avail(void *handle, LSM303AGR_ACC_1DA_t *value); |
nikapov | 0:ec6e59cc6f40 | 169 | |
nikapov | 0:ec6e59cc6f40 | 170 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 171 | * Register : STATUS_REG_AUX |
nikapov | 0:ec6e59cc6f40 | 172 | * Address : 0X07 |
nikapov | 0:ec6e59cc6f40 | 173 | * Bit Group Name: 2DA_ |
nikapov | 0:ec6e59cc6f40 | 174 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 175 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 176 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 177 | LSM303AGR_ACC_2DA__NOT_AVAILABLE =0x00, |
nikapov | 0:ec6e59cc6f40 | 178 | LSM303AGR_ACC_2DA__AVAILABLE =0x02, |
nikapov | 0:ec6e59cc6f40 | 179 | } LSM303AGR_ACC_2DA__t; |
nikapov | 0:ec6e59cc6f40 | 180 | |
nikapov | 0:ec6e59cc6f40 | 181 | #define LSM303AGR_ACC_2DA__MASK 0x02 |
nikapov | 0:ec6e59cc6f40 | 182 | mems_status_t LSM303AGR_ACC_R_y_data_avail(void *handle, LSM303AGR_ACC_2DA__t *value); |
nikapov | 0:ec6e59cc6f40 | 183 | |
nikapov | 0:ec6e59cc6f40 | 184 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 185 | * Register : STATUS_REG_AUX |
nikapov | 0:ec6e59cc6f40 | 186 | * Address : 0X07 |
nikapov | 0:ec6e59cc6f40 | 187 | * Bit Group Name: 3DA_ |
nikapov | 0:ec6e59cc6f40 | 188 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 189 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 190 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 191 | LSM303AGR_ACC_3DA__NOT_AVAILABLE =0x00, |
nikapov | 0:ec6e59cc6f40 | 192 | LSM303AGR_ACC_3DA__AVAILABLE =0x04, |
nikapov | 0:ec6e59cc6f40 | 193 | } LSM303AGR_ACC_3DA__t; |
nikapov | 0:ec6e59cc6f40 | 194 | |
nikapov | 0:ec6e59cc6f40 | 195 | #define LSM303AGR_ACC_3DA__MASK 0x04 |
nikapov | 0:ec6e59cc6f40 | 196 | mems_status_t LSM303AGR_ACC_R_z_data_avail(void *handle, LSM303AGR_ACC_3DA__t *value); |
nikapov | 0:ec6e59cc6f40 | 197 | |
nikapov | 0:ec6e59cc6f40 | 198 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 199 | * Register : STATUS_REG_AUX |
nikapov | 0:ec6e59cc6f40 | 200 | * Address : 0X07 |
nikapov | 0:ec6e59cc6f40 | 201 | * Bit Group Name: 321DA_ |
nikapov | 0:ec6e59cc6f40 | 202 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 203 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 204 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 205 | LSM303AGR_ACC_321DA__NOT_AVAILABLE =0x00, |
nikapov | 0:ec6e59cc6f40 | 206 | LSM303AGR_ACC_321DA__AVAILABLE =0x08, |
nikapov | 0:ec6e59cc6f40 | 207 | } LSM303AGR_ACC_321DA__t; |
nikapov | 0:ec6e59cc6f40 | 208 | |
nikapov | 0:ec6e59cc6f40 | 209 | #define LSM303AGR_ACC_321DA__MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 210 | mems_status_t LSM303AGR_ACC_R_xyz_data_avail(void *handle, LSM303AGR_ACC_321DA__t *value); |
nikapov | 0:ec6e59cc6f40 | 211 | |
nikapov | 0:ec6e59cc6f40 | 212 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 213 | * Register : STATUS_REG_AUX |
nikapov | 0:ec6e59cc6f40 | 214 | * Address : 0X07 |
nikapov | 0:ec6e59cc6f40 | 215 | * Bit Group Name: 1OR_ |
nikapov | 0:ec6e59cc6f40 | 216 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 217 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 218 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 219 | LSM303AGR_ACC_1OR__NO_OVERRUN =0x00, |
nikapov | 0:ec6e59cc6f40 | 220 | LSM303AGR_ACC_1OR__OVERRUN =0x10, |
nikapov | 0:ec6e59cc6f40 | 221 | } LSM303AGR_ACC_1OR__t; |
nikapov | 0:ec6e59cc6f40 | 222 | |
nikapov | 0:ec6e59cc6f40 | 223 | #define LSM303AGR_ACC_1OR__MASK 0x10 |
nikapov | 0:ec6e59cc6f40 | 224 | mems_status_t LSM303AGR_ACC_R_DataXOverrun(void *handle, LSM303AGR_ACC_1OR__t *value); |
nikapov | 0:ec6e59cc6f40 | 225 | |
nikapov | 0:ec6e59cc6f40 | 226 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 227 | * Register : STATUS_REG_AUX |
nikapov | 0:ec6e59cc6f40 | 228 | * Address : 0X07 |
nikapov | 0:ec6e59cc6f40 | 229 | * Bit Group Name: 2OR_ |
nikapov | 0:ec6e59cc6f40 | 230 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 231 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 232 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 233 | LSM303AGR_ACC_2OR__NO_OVERRUN =0x00, |
nikapov | 0:ec6e59cc6f40 | 234 | LSM303AGR_ACC_2OR__OVERRUN =0x20, |
nikapov | 0:ec6e59cc6f40 | 235 | } LSM303AGR_ACC_2OR__t; |
nikapov | 0:ec6e59cc6f40 | 236 | |
nikapov | 0:ec6e59cc6f40 | 237 | #define LSM303AGR_ACC_2OR__MASK 0x20 |
nikapov | 0:ec6e59cc6f40 | 238 | mems_status_t LSM303AGR_ACC_R_DataYOverrun(void *handle, LSM303AGR_ACC_2OR__t *value); |
nikapov | 0:ec6e59cc6f40 | 239 | |
nikapov | 0:ec6e59cc6f40 | 240 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 241 | * Register : STATUS_REG_AUX |
nikapov | 0:ec6e59cc6f40 | 242 | * Address : 0X07 |
nikapov | 0:ec6e59cc6f40 | 243 | * Bit Group Name: 3OR_ |
nikapov | 0:ec6e59cc6f40 | 244 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 245 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 246 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 247 | LSM303AGR_ACC_3OR__NO_OVERRUN =0x00, |
nikapov | 0:ec6e59cc6f40 | 248 | LSM303AGR_ACC_3OR__OVERRUN =0x40, |
nikapov | 0:ec6e59cc6f40 | 249 | } LSM303AGR_ACC_3OR__t; |
nikapov | 0:ec6e59cc6f40 | 250 | |
nikapov | 0:ec6e59cc6f40 | 251 | #define LSM303AGR_ACC_3OR__MASK 0x40 |
nikapov | 0:ec6e59cc6f40 | 252 | mems_status_t LSM303AGR_ACC_R_DataZOverrun(void *handle, LSM303AGR_ACC_3OR__t *value); |
nikapov | 0:ec6e59cc6f40 | 253 | |
nikapov | 0:ec6e59cc6f40 | 254 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 255 | * Register : STATUS_REG_AUX |
nikapov | 0:ec6e59cc6f40 | 256 | * Address : 0X07 |
nikapov | 0:ec6e59cc6f40 | 257 | * Bit Group Name: 321OR_ |
nikapov | 0:ec6e59cc6f40 | 258 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 259 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 260 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 261 | LSM303AGR_ACC_321OR__NO_OVERRUN =0x00, |
nikapov | 0:ec6e59cc6f40 | 262 | LSM303AGR_ACC_321OR__OVERRUN =0x80, |
nikapov | 0:ec6e59cc6f40 | 263 | } LSM303AGR_ACC_321OR__t; |
nikapov | 0:ec6e59cc6f40 | 264 | |
nikapov | 0:ec6e59cc6f40 | 265 | #define LSM303AGR_ACC_321OR__MASK 0x80 |
nikapov | 0:ec6e59cc6f40 | 266 | mems_status_t LSM303AGR_ACC_R_DataXYZOverrun(void *handle, LSM303AGR_ACC_321OR__t *value); |
nikapov | 0:ec6e59cc6f40 | 267 | |
nikapov | 0:ec6e59cc6f40 | 268 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 269 | * Register : INT_COUNTER_REG |
nikapov | 0:ec6e59cc6f40 | 270 | * Address : 0X0E |
nikapov | 0:ec6e59cc6f40 | 271 | * Bit Group Name: IC |
nikapov | 0:ec6e59cc6f40 | 272 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 273 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 274 | #define LSM303AGR_ACC_IC_MASK 0xFF |
nikapov | 0:ec6e59cc6f40 | 275 | #define LSM303AGR_ACC_IC_POSITION 0 |
nikapov | 0:ec6e59cc6f40 | 276 | mems_status_t LSM303AGR_ACC_R_int_counter(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 277 | |
nikapov | 0:ec6e59cc6f40 | 278 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 279 | * Register : WHO_AM_I |
nikapov | 0:ec6e59cc6f40 | 280 | * Address : 0X0F |
nikapov | 0:ec6e59cc6f40 | 281 | * Bit Group Name: WHO_AM_I |
nikapov | 0:ec6e59cc6f40 | 282 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 283 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 284 | #define LSM303AGR_ACC_WHO_AM_I_MASK 0xFF |
nikapov | 0:ec6e59cc6f40 | 285 | #define LSM303AGR_ACC_WHO_AM_I_POSITION 0 |
nikapov | 0:ec6e59cc6f40 | 286 | mems_status_t LSM303AGR_ACC_R_WHO_AM_I(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 287 | |
nikapov | 0:ec6e59cc6f40 | 288 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 289 | * Register : TEMP_CFG_REG |
nikapov | 0:ec6e59cc6f40 | 290 | * Address : 0X1F |
nikapov | 0:ec6e59cc6f40 | 291 | * Bit Group Name: TEMP_EN |
nikapov | 0:ec6e59cc6f40 | 292 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 293 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 294 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 295 | LSM303AGR_ACC_TEMP_EN_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 296 | LSM303AGR_ACC_TEMP_EN_ENABLED =0x40, |
nikapov | 0:ec6e59cc6f40 | 297 | } LSM303AGR_ACC_TEMP_EN_t; |
nikapov | 0:ec6e59cc6f40 | 298 | |
nikapov | 0:ec6e59cc6f40 | 299 | #define LSM303AGR_ACC_TEMP_EN_MASK 0x40 |
nikapov | 0:ec6e59cc6f40 | 300 | mems_status_t LSM303AGR_ACC_W_TEMP_EN_bits(void *handle, LSM303AGR_ACC_TEMP_EN_t newValue); |
nikapov | 0:ec6e59cc6f40 | 301 | mems_status_t LSM303AGR_ACC_R_TEMP_EN_bits(void *handle, LSM303AGR_ACC_TEMP_EN_t *value); |
nikapov | 0:ec6e59cc6f40 | 302 | |
nikapov | 0:ec6e59cc6f40 | 303 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 304 | * Register : TEMP_CFG_REG |
nikapov | 0:ec6e59cc6f40 | 305 | * Address : 0X1F |
nikapov | 0:ec6e59cc6f40 | 306 | * Bit Group Name: ADC_PD |
nikapov | 0:ec6e59cc6f40 | 307 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 308 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 309 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 310 | LSM303AGR_ACC_ADC_PD_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 311 | LSM303AGR_ACC_ADC_PD_ENABLED =0x80, |
nikapov | 0:ec6e59cc6f40 | 312 | } LSM303AGR_ACC_ADC_PD_t; |
nikapov | 0:ec6e59cc6f40 | 313 | |
nikapov | 0:ec6e59cc6f40 | 314 | #define LSM303AGR_ACC_ADC_PD_MASK 0x80 |
nikapov | 0:ec6e59cc6f40 | 315 | mems_status_t LSM303AGR_ACC_W_ADC_PD(void *handle, LSM303AGR_ACC_ADC_PD_t newValue); |
nikapov | 0:ec6e59cc6f40 | 316 | mems_status_t LSM303AGR_ACC_R_ADC_PD(void *handle, LSM303AGR_ACC_ADC_PD_t *value); |
nikapov | 0:ec6e59cc6f40 | 317 | |
nikapov | 0:ec6e59cc6f40 | 318 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 319 | * Register : CTRL_REG1 |
nikapov | 0:ec6e59cc6f40 | 320 | * Address : 0X20 |
nikapov | 0:ec6e59cc6f40 | 321 | * Bit Group Name: XEN |
nikapov | 0:ec6e59cc6f40 | 322 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 323 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 324 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 325 | LSM303AGR_ACC_XEN_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 326 | LSM303AGR_ACC_XEN_ENABLED =0x01, |
nikapov | 0:ec6e59cc6f40 | 327 | } LSM303AGR_ACC_XEN_t; |
nikapov | 0:ec6e59cc6f40 | 328 | |
nikapov | 0:ec6e59cc6f40 | 329 | #define LSM303AGR_ACC_XEN_MASK 0x01 |
nikapov | 0:ec6e59cc6f40 | 330 | mems_status_t LSM303AGR_ACC_W_XEN(void *handle, LSM303AGR_ACC_XEN_t newValue); |
nikapov | 0:ec6e59cc6f40 | 331 | mems_status_t LSM303AGR_ACC_R_XEN(void *handle, LSM303AGR_ACC_XEN_t *value); |
nikapov | 0:ec6e59cc6f40 | 332 | |
nikapov | 0:ec6e59cc6f40 | 333 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 334 | * Register : CTRL_REG1 |
nikapov | 0:ec6e59cc6f40 | 335 | * Address : 0X20 |
nikapov | 0:ec6e59cc6f40 | 336 | * Bit Group Name: YEN |
nikapov | 0:ec6e59cc6f40 | 337 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 338 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 339 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 340 | LSM303AGR_ACC_YEN_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 341 | LSM303AGR_ACC_YEN_ENABLED =0x02, |
nikapov | 0:ec6e59cc6f40 | 342 | } LSM303AGR_ACC_YEN_t; |
nikapov | 0:ec6e59cc6f40 | 343 | |
nikapov | 0:ec6e59cc6f40 | 344 | #define LSM303AGR_ACC_YEN_MASK 0x02 |
nikapov | 0:ec6e59cc6f40 | 345 | mems_status_t LSM303AGR_ACC_W_YEN(void *handle, LSM303AGR_ACC_YEN_t newValue); |
nikapov | 0:ec6e59cc6f40 | 346 | mems_status_t LSM303AGR_ACC_R_YEN(void *handle, LSM303AGR_ACC_YEN_t *value); |
nikapov | 0:ec6e59cc6f40 | 347 | |
nikapov | 0:ec6e59cc6f40 | 348 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 349 | * Register : CTRL_REG1 |
nikapov | 0:ec6e59cc6f40 | 350 | * Address : 0X20 |
nikapov | 0:ec6e59cc6f40 | 351 | * Bit Group Name: ZEN |
nikapov | 0:ec6e59cc6f40 | 352 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 353 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 354 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 355 | LSM303AGR_ACC_ZEN_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 356 | LSM303AGR_ACC_ZEN_ENABLED =0x04, |
nikapov | 0:ec6e59cc6f40 | 357 | } LSM303AGR_ACC_ZEN_t; |
nikapov | 0:ec6e59cc6f40 | 358 | |
nikapov | 0:ec6e59cc6f40 | 359 | #define LSM303AGR_ACC_ZEN_MASK 0x04 |
nikapov | 0:ec6e59cc6f40 | 360 | mems_status_t LSM303AGR_ACC_W_ZEN(void *handle, LSM303AGR_ACC_ZEN_t newValue); |
nikapov | 0:ec6e59cc6f40 | 361 | mems_status_t LSM303AGR_ACC_R_ZEN(void *handle, LSM303AGR_ACC_ZEN_t *value); |
nikapov | 0:ec6e59cc6f40 | 362 | |
nikapov | 0:ec6e59cc6f40 | 363 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 364 | * Register : CTRL_REG1 |
nikapov | 0:ec6e59cc6f40 | 365 | * Address : 0X20 |
nikapov | 0:ec6e59cc6f40 | 366 | * Bit Group Name: LPEN |
nikapov | 0:ec6e59cc6f40 | 367 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 368 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 369 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 370 | LSM303AGR_ACC_LPEN_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 371 | LSM303AGR_ACC_LPEN_ENABLED =0x08, |
nikapov | 0:ec6e59cc6f40 | 372 | } LSM303AGR_ACC_LPEN_t; |
nikapov | 0:ec6e59cc6f40 | 373 | |
nikapov | 0:ec6e59cc6f40 | 374 | #define LSM303AGR_ACC_LPEN_MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 375 | mems_status_t LSM303AGR_ACC_W_LOWPWR_EN(void *handle, LSM303AGR_ACC_LPEN_t newValue); |
nikapov | 0:ec6e59cc6f40 | 376 | mems_status_t LSM303AGR_ACC_R_LOWPWR_EN(void *handle, LSM303AGR_ACC_LPEN_t *value); |
nikapov | 0:ec6e59cc6f40 | 377 | |
nikapov | 0:ec6e59cc6f40 | 378 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 379 | * Register : CTRL_REG1 |
nikapov | 0:ec6e59cc6f40 | 380 | * Address : 0X20 |
nikapov | 0:ec6e59cc6f40 | 381 | * Bit Group Name: ODR |
nikapov | 0:ec6e59cc6f40 | 382 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 383 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 384 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 385 | LSM303AGR_ACC_ODR_DO_PWR_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 386 | LSM303AGR_ACC_ODR_DO_1Hz =0x10, |
nikapov | 0:ec6e59cc6f40 | 387 | LSM303AGR_ACC_ODR_DO_10Hz =0x20, |
nikapov | 0:ec6e59cc6f40 | 388 | LSM303AGR_ACC_ODR_DO_25Hz =0x30, |
nikapov | 0:ec6e59cc6f40 | 389 | LSM303AGR_ACC_ODR_DO_50Hz =0x40, |
nikapov | 0:ec6e59cc6f40 | 390 | LSM303AGR_ACC_ODR_DO_100Hz =0x50, |
nikapov | 0:ec6e59cc6f40 | 391 | LSM303AGR_ACC_ODR_DO_200Hz =0x60, |
nikapov | 0:ec6e59cc6f40 | 392 | LSM303AGR_ACC_ODR_DO_400Hz =0x70, |
nikapov | 0:ec6e59cc6f40 | 393 | LSM303AGR_ACC_ODR_DO_1_6KHz =0x80, |
nikapov | 0:ec6e59cc6f40 | 394 | LSM303AGR_ACC_ODR_DO_1_25KHz =0x90, |
nikapov | 0:ec6e59cc6f40 | 395 | } LSM303AGR_ACC_ODR_t; |
nikapov | 0:ec6e59cc6f40 | 396 | |
nikapov | 0:ec6e59cc6f40 | 397 | #define LSM303AGR_ACC_ODR_MASK 0xF0 |
nikapov | 0:ec6e59cc6f40 | 398 | mems_status_t LSM303AGR_ACC_W_ODR(void *handle, LSM303AGR_ACC_ODR_t newValue); |
nikapov | 0:ec6e59cc6f40 | 399 | mems_status_t LSM303AGR_ACC_R_ODR(void *handle, LSM303AGR_ACC_ODR_t *value); |
nikapov | 0:ec6e59cc6f40 | 400 | |
nikapov | 0:ec6e59cc6f40 | 401 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 402 | * Register : CTRL_REG2 |
nikapov | 0:ec6e59cc6f40 | 403 | * Address : 0X21 |
nikapov | 0:ec6e59cc6f40 | 404 | * Bit Group Name: HPIS1 |
nikapov | 0:ec6e59cc6f40 | 405 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 406 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 407 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 408 | LSM303AGR_ACC_HPIS1_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 409 | LSM303AGR_ACC_HPIS1_ENABLED =0x01, |
nikapov | 0:ec6e59cc6f40 | 410 | } LSM303AGR_ACC_HPIS1_t; |
nikapov | 0:ec6e59cc6f40 | 411 | |
nikapov | 0:ec6e59cc6f40 | 412 | #define LSM303AGR_ACC_HPIS1_MASK 0x01 |
nikapov | 0:ec6e59cc6f40 | 413 | mems_status_t LSM303AGR_ACC_W_hpf_aoi_en_int1(void *handle, LSM303AGR_ACC_HPIS1_t newValue); |
nikapov | 0:ec6e59cc6f40 | 414 | mems_status_t LSM303AGR_ACC_R_hpf_aoi_en_int1(void *handle, LSM303AGR_ACC_HPIS1_t *value); |
nikapov | 0:ec6e59cc6f40 | 415 | |
nikapov | 0:ec6e59cc6f40 | 416 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 417 | * Register : CTRL_REG2 |
nikapov | 0:ec6e59cc6f40 | 418 | * Address : 0X21 |
nikapov | 0:ec6e59cc6f40 | 419 | * Bit Group Name: HPIS2 |
nikapov | 0:ec6e59cc6f40 | 420 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 421 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 422 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 423 | LSM303AGR_ACC_HPIS2_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 424 | LSM303AGR_ACC_HPIS2_ENABLED =0x02, |
nikapov | 0:ec6e59cc6f40 | 425 | } LSM303AGR_ACC_HPIS2_t; |
nikapov | 0:ec6e59cc6f40 | 426 | |
nikapov | 0:ec6e59cc6f40 | 427 | #define LSM303AGR_ACC_HPIS2_MASK 0x02 |
nikapov | 0:ec6e59cc6f40 | 428 | mems_status_t LSM303AGR_ACC_W_hpf_aoi_en_int2(void *handle, LSM303AGR_ACC_HPIS2_t newValue); |
nikapov | 0:ec6e59cc6f40 | 429 | mems_status_t LSM303AGR_ACC_R_hpf_aoi_en_int2(void *handle, LSM303AGR_ACC_HPIS2_t *value); |
nikapov | 0:ec6e59cc6f40 | 430 | |
nikapov | 0:ec6e59cc6f40 | 431 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 432 | * Register : CTRL_REG2 |
nikapov | 0:ec6e59cc6f40 | 433 | * Address : 0X21 |
nikapov | 0:ec6e59cc6f40 | 434 | * Bit Group Name: HPCLICK |
nikapov | 0:ec6e59cc6f40 | 435 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 436 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 437 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 438 | LSM303AGR_ACC_HPCLICK_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 439 | LSM303AGR_ACC_HPCLICK_ENABLED =0x04, |
nikapov | 0:ec6e59cc6f40 | 440 | } LSM303AGR_ACC_HPCLICK_t; |
nikapov | 0:ec6e59cc6f40 | 441 | |
nikapov | 0:ec6e59cc6f40 | 442 | #define LSM303AGR_ACC_HPCLICK_MASK 0x04 |
nikapov | 0:ec6e59cc6f40 | 443 | mems_status_t LSM303AGR_ACC_W_hpf_click_en(void *handle, LSM303AGR_ACC_HPCLICK_t newValue); |
nikapov | 0:ec6e59cc6f40 | 444 | mems_status_t LSM303AGR_ACC_R_hpf_click_en(void *handle, LSM303AGR_ACC_HPCLICK_t *value); |
nikapov | 0:ec6e59cc6f40 | 445 | |
nikapov | 0:ec6e59cc6f40 | 446 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 447 | * Register : CTRL_REG2 |
nikapov | 0:ec6e59cc6f40 | 448 | * Address : 0X21 |
nikapov | 0:ec6e59cc6f40 | 449 | * Bit Group Name: FDS |
nikapov | 0:ec6e59cc6f40 | 450 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 451 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 452 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 453 | LSM303AGR_ACC_FDS_BYPASSED =0x00, |
nikapov | 0:ec6e59cc6f40 | 454 | LSM303AGR_ACC_FDS_ENABLED =0x08, |
nikapov | 0:ec6e59cc6f40 | 455 | } LSM303AGR_ACC_FDS_t; |
nikapov | 0:ec6e59cc6f40 | 456 | |
nikapov | 0:ec6e59cc6f40 | 457 | #define LSM303AGR_ACC_FDS_MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 458 | mems_status_t LSM303AGR_ACC_W_Data_Filter(void *handle, LSM303AGR_ACC_FDS_t newValue); |
nikapov | 0:ec6e59cc6f40 | 459 | mems_status_t LSM303AGR_ACC_R_Data_Filter(void *handle, LSM303AGR_ACC_FDS_t *value); |
nikapov | 0:ec6e59cc6f40 | 460 | |
nikapov | 0:ec6e59cc6f40 | 461 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 462 | * Register : CTRL_REG2 |
nikapov | 0:ec6e59cc6f40 | 463 | * Address : 0X21 |
nikapov | 0:ec6e59cc6f40 | 464 | * Bit Group Name: HPCF |
nikapov | 0:ec6e59cc6f40 | 465 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 466 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 467 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 468 | LSM303AGR_ACC_HPCF_00 =0x00, |
nikapov | 0:ec6e59cc6f40 | 469 | LSM303AGR_ACC_HPCF_01 =0x10, |
nikapov | 0:ec6e59cc6f40 | 470 | LSM303AGR_ACC_HPCF_10 =0x20, |
nikapov | 0:ec6e59cc6f40 | 471 | LSM303AGR_ACC_HPCF_11 =0x30, |
nikapov | 0:ec6e59cc6f40 | 472 | } LSM303AGR_ACC_HPCF_t; |
nikapov | 0:ec6e59cc6f40 | 473 | |
nikapov | 0:ec6e59cc6f40 | 474 | #define LSM303AGR_ACC_HPCF_MASK 0x30 |
nikapov | 0:ec6e59cc6f40 | 475 | mems_status_t LSM303AGR_ACC_W_hpf_cutoff_freq(void *handle, LSM303AGR_ACC_HPCF_t newValue); |
nikapov | 0:ec6e59cc6f40 | 476 | mems_status_t LSM303AGR_ACC_R_hpf_cutoff_freq(void *handle, LSM303AGR_ACC_HPCF_t *value); |
nikapov | 0:ec6e59cc6f40 | 477 | |
nikapov | 0:ec6e59cc6f40 | 478 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 479 | * Register : CTRL_REG2 |
nikapov | 0:ec6e59cc6f40 | 480 | * Address : 0X21 |
nikapov | 0:ec6e59cc6f40 | 481 | * Bit Group Name: HPM |
nikapov | 0:ec6e59cc6f40 | 482 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 483 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 484 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 485 | LSM303AGR_ACC_HPM_NORMAL =0x00, |
nikapov | 0:ec6e59cc6f40 | 486 | LSM303AGR_ACC_HPM_REFERENCE_SIGNAL =0x40, |
nikapov | 0:ec6e59cc6f40 | 487 | LSM303AGR_ACC_HPM_NORMAL_2 =0x80, |
nikapov | 0:ec6e59cc6f40 | 488 | LSM303AGR_ACC_HPM_AUTORST_ON_INT =0xC0, |
nikapov | 0:ec6e59cc6f40 | 489 | } LSM303AGR_ACC_HPM_t; |
nikapov | 0:ec6e59cc6f40 | 490 | |
nikapov | 0:ec6e59cc6f40 | 491 | #define LSM303AGR_ACC_HPM_MASK 0xC0 |
nikapov | 0:ec6e59cc6f40 | 492 | mems_status_t LSM303AGR_ACC_W_hpf_mode(void *handle, LSM303AGR_ACC_HPM_t newValue); |
nikapov | 0:ec6e59cc6f40 | 493 | mems_status_t LSM303AGR_ACC_R_hpf_mode(void *handle, LSM303AGR_ACC_HPM_t *value); |
nikapov | 0:ec6e59cc6f40 | 494 | |
nikapov | 0:ec6e59cc6f40 | 495 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 496 | * Register : CTRL_REG3 |
nikapov | 0:ec6e59cc6f40 | 497 | * Address : 0X22 |
nikapov | 0:ec6e59cc6f40 | 498 | * Bit Group Name: I1_OVERRUN |
nikapov | 0:ec6e59cc6f40 | 499 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 500 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 501 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 502 | LSM303AGR_ACC_I1_OVERRUN_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 503 | LSM303AGR_ACC_I1_OVERRUN_ENABLED =0x02, |
nikapov | 0:ec6e59cc6f40 | 504 | } LSM303AGR_ACC_I1_OVERRUN_t; |
nikapov | 0:ec6e59cc6f40 | 505 | |
nikapov | 0:ec6e59cc6f40 | 506 | #define LSM303AGR_ACC_I1_OVERRUN_MASK 0x02 |
nikapov | 0:ec6e59cc6f40 | 507 | mems_status_t LSM303AGR_ACC_W_FIFO_Overrun_on_INT1(void *handle, LSM303AGR_ACC_I1_OVERRUN_t newValue); |
nikapov | 0:ec6e59cc6f40 | 508 | mems_status_t LSM303AGR_ACC_R_FIFO_Overrun_on_INT1(void *handle, LSM303AGR_ACC_I1_OVERRUN_t *value); |
nikapov | 0:ec6e59cc6f40 | 509 | |
nikapov | 0:ec6e59cc6f40 | 510 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 511 | * Register : CTRL_REG3 |
nikapov | 0:ec6e59cc6f40 | 512 | * Address : 0X22 |
nikapov | 0:ec6e59cc6f40 | 513 | * Bit Group Name: I1_WTM |
nikapov | 0:ec6e59cc6f40 | 514 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 515 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 516 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 517 | LSM303AGR_ACC_I1_WTM_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 518 | LSM303AGR_ACC_I1_WTM_ENABLED =0x04, |
nikapov | 0:ec6e59cc6f40 | 519 | } LSM303AGR_ACC_I1_WTM_t; |
nikapov | 0:ec6e59cc6f40 | 520 | |
nikapov | 0:ec6e59cc6f40 | 521 | #define LSM303AGR_ACC_I1_WTM_MASK 0x04 |
nikapov | 0:ec6e59cc6f40 | 522 | mems_status_t LSM303AGR_ACC_W_FIFO_Watermark_on_INT1(void *handle, LSM303AGR_ACC_I1_WTM_t newValue); |
nikapov | 0:ec6e59cc6f40 | 523 | mems_status_t LSM303AGR_ACC_R_FIFO_Watermark_on_INT1(void *handle, LSM303AGR_ACC_I1_WTM_t *value); |
nikapov | 0:ec6e59cc6f40 | 524 | |
nikapov | 0:ec6e59cc6f40 | 525 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 526 | * Register : CTRL_REG3 |
nikapov | 0:ec6e59cc6f40 | 527 | * Address : 0X22 |
nikapov | 0:ec6e59cc6f40 | 528 | * Bit Group Name: I1_DRDY2 |
nikapov | 0:ec6e59cc6f40 | 529 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 530 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 531 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 532 | LSM303AGR_ACC_I1_DRDY2_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 533 | LSM303AGR_ACC_I1_DRDY2_ENABLED =0x08, |
nikapov | 0:ec6e59cc6f40 | 534 | } LSM303AGR_ACC_I1_DRDY2_t; |
nikapov | 0:ec6e59cc6f40 | 535 | |
nikapov | 0:ec6e59cc6f40 | 536 | #define LSM303AGR_ACC_I1_DRDY2_MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 537 | mems_status_t LSM303AGR_ACC_W_FIFO_DRDY2_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY2_t newValue); |
nikapov | 0:ec6e59cc6f40 | 538 | mems_status_t LSM303AGR_ACC_R_FIFO_DRDY2_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY2_t *value); |
nikapov | 0:ec6e59cc6f40 | 539 | |
nikapov | 0:ec6e59cc6f40 | 540 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 541 | * Register : CTRL_REG3 |
nikapov | 0:ec6e59cc6f40 | 542 | * Address : 0X22 |
nikapov | 0:ec6e59cc6f40 | 543 | * Bit Group Name: I1_DRDY1 |
nikapov | 0:ec6e59cc6f40 | 544 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 545 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 546 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 547 | LSM303AGR_ACC_I1_DRDY1_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 548 | LSM303AGR_ACC_I1_DRDY1_ENABLED =0x10, |
nikapov | 0:ec6e59cc6f40 | 549 | } LSM303AGR_ACC_I1_DRDY1_t; |
nikapov | 0:ec6e59cc6f40 | 550 | |
nikapov | 0:ec6e59cc6f40 | 551 | #define LSM303AGR_ACC_I1_DRDY1_MASK 0x10 |
nikapov | 0:ec6e59cc6f40 | 552 | mems_status_t LSM303AGR_ACC_W_FIFO_DRDY1_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY1_t newValue); |
nikapov | 0:ec6e59cc6f40 | 553 | mems_status_t LSM303AGR_ACC_R_FIFO_DRDY1_on_INT1(void *handle, LSM303AGR_ACC_I1_DRDY1_t *value); |
nikapov | 0:ec6e59cc6f40 | 554 | |
nikapov | 0:ec6e59cc6f40 | 555 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 556 | * Register : CTRL_REG3 |
nikapov | 0:ec6e59cc6f40 | 557 | * Address : 0X22 |
nikapov | 0:ec6e59cc6f40 | 558 | * Bit Group Name: I1_AOI2 |
nikapov | 0:ec6e59cc6f40 | 559 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 560 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 561 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 562 | LSM303AGR_ACC_I1_AOI2_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 563 | LSM303AGR_ACC_I1_AOI2_ENABLED =0x20, |
nikapov | 0:ec6e59cc6f40 | 564 | } LSM303AGR_ACC_I1_AOI2_t; |
nikapov | 0:ec6e59cc6f40 | 565 | |
nikapov | 0:ec6e59cc6f40 | 566 | #define LSM303AGR_ACC_I1_AOI2_MASK 0x20 |
nikapov | 0:ec6e59cc6f40 | 567 | mems_status_t LSM303AGR_ACC_W_FIFO_AOL2_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI2_t newValue); |
nikapov | 0:ec6e59cc6f40 | 568 | mems_status_t LSM303AGR_ACC_R_FIFO_AOL2_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI2_t *value); |
nikapov | 0:ec6e59cc6f40 | 569 | |
nikapov | 0:ec6e59cc6f40 | 570 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 571 | * Register : CTRL_REG3 |
nikapov | 0:ec6e59cc6f40 | 572 | * Address : 0X22 |
nikapov | 0:ec6e59cc6f40 | 573 | * Bit Group Name: I1_AOI1 |
nikapov | 0:ec6e59cc6f40 | 574 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 575 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 576 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 577 | LSM303AGR_ACC_I1_AOI1_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 578 | LSM303AGR_ACC_I1_AOI1_ENABLED =0x40, |
nikapov | 0:ec6e59cc6f40 | 579 | } LSM303AGR_ACC_I1_AOI1_t; |
nikapov | 0:ec6e59cc6f40 | 580 | |
nikapov | 0:ec6e59cc6f40 | 581 | #define LSM303AGR_ACC_I1_AOI1_MASK 0x40 |
nikapov | 0:ec6e59cc6f40 | 582 | mems_status_t LSM303AGR_ACC_W_FIFO_AOL1_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI1_t newValue); |
nikapov | 0:ec6e59cc6f40 | 583 | mems_status_t LSM303AGR_ACC_R_FIFO_AOL1_on_INT1(void *handle, LSM303AGR_ACC_I1_AOI1_t *value); |
nikapov | 0:ec6e59cc6f40 | 584 | |
nikapov | 0:ec6e59cc6f40 | 585 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 586 | * Register : CTRL_REG3 |
nikapov | 0:ec6e59cc6f40 | 587 | * Address : 0X22 |
nikapov | 0:ec6e59cc6f40 | 588 | * Bit Group Name: I1_CLICK |
nikapov | 0:ec6e59cc6f40 | 589 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 590 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 591 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 592 | LSM303AGR_ACC_I1_CLICK_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 593 | LSM303AGR_ACC_I1_CLICK_ENABLED =0x80, |
nikapov | 0:ec6e59cc6f40 | 594 | } LSM303AGR_ACC_I1_CLICK_t; |
nikapov | 0:ec6e59cc6f40 | 595 | |
nikapov | 0:ec6e59cc6f40 | 596 | #define LSM303AGR_ACC_I1_CLICK_MASK 0x80 |
nikapov | 0:ec6e59cc6f40 | 597 | mems_status_t LSM303AGR_ACC_W_FIFO_Click_on_INT1(void *handle, LSM303AGR_ACC_I1_CLICK_t newValue); |
nikapov | 0:ec6e59cc6f40 | 598 | mems_status_t LSM303AGR_ACC_R_FIFO_Click_on_INT1(void *handle, LSM303AGR_ACC_I1_CLICK_t *value); |
nikapov | 0:ec6e59cc6f40 | 599 | |
nikapov | 0:ec6e59cc6f40 | 600 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 601 | * Register : CTRL_REG4 |
nikapov | 0:ec6e59cc6f40 | 602 | * Address : 0X23 |
nikapov | 0:ec6e59cc6f40 | 603 | * Bit Group Name: SIM |
nikapov | 0:ec6e59cc6f40 | 604 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 605 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 606 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 607 | LSM303AGR_ACC_SIM_4_WIRES =0x00, |
nikapov | 0:ec6e59cc6f40 | 608 | LSM303AGR_ACC_SIM_3_WIRES =0x01, |
nikapov | 0:ec6e59cc6f40 | 609 | } LSM303AGR_ACC_SIM_t; |
nikapov | 0:ec6e59cc6f40 | 610 | |
nikapov | 0:ec6e59cc6f40 | 611 | #define LSM303AGR_ACC_SIM_MASK 0x01 |
nikapov | 0:ec6e59cc6f40 | 612 | mems_status_t LSM303AGR_ACC_W_SPI_mode(void *handle, LSM303AGR_ACC_SIM_t newValue); |
nikapov | 0:ec6e59cc6f40 | 613 | mems_status_t LSM303AGR_ACC_R_SPI_mode(void *handle, LSM303AGR_ACC_SIM_t *value); |
nikapov | 0:ec6e59cc6f40 | 614 | |
nikapov | 0:ec6e59cc6f40 | 615 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 616 | * Register : CTRL_REG4 |
nikapov | 0:ec6e59cc6f40 | 617 | * Address : 0X23 |
nikapov | 0:ec6e59cc6f40 | 618 | * Bit Group Name: ST |
nikapov | 0:ec6e59cc6f40 | 619 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 620 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 621 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 622 | LSM303AGR_ACC_ST_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 623 | LSM303AGR_ACC_ST_SELF_TEST_0 =0x02, |
nikapov | 0:ec6e59cc6f40 | 624 | LSM303AGR_ACC_ST_SELF_TEST_1 =0x04, |
nikapov | 0:ec6e59cc6f40 | 625 | LSM303AGR_ACC_ST_NOT_APPLICABLE =0x06, |
nikapov | 0:ec6e59cc6f40 | 626 | } LSM303AGR_ACC_ST_t; |
nikapov | 0:ec6e59cc6f40 | 627 | |
nikapov | 0:ec6e59cc6f40 | 628 | #define LSM303AGR_ACC_ST_MASK 0x06 |
nikapov | 0:ec6e59cc6f40 | 629 | mems_status_t LSM303AGR_ACC_W_SelfTest(void *handle, LSM303AGR_ACC_ST_t newValue); |
nikapov | 0:ec6e59cc6f40 | 630 | mems_status_t LSM303AGR_ACC_R_SelfTest(void *handle, LSM303AGR_ACC_ST_t *value); |
nikapov | 0:ec6e59cc6f40 | 631 | |
nikapov | 0:ec6e59cc6f40 | 632 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 633 | * Register : CTRL_REG4 |
nikapov | 0:ec6e59cc6f40 | 634 | * Address : 0X23 |
nikapov | 0:ec6e59cc6f40 | 635 | * Bit Group Name: HR |
nikapov | 0:ec6e59cc6f40 | 636 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 637 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 638 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 639 | LSM303AGR_ACC_HR_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 640 | LSM303AGR_ACC_HR_ENABLED =0x08, |
nikapov | 0:ec6e59cc6f40 | 641 | } LSM303AGR_ACC_HR_t; |
nikapov | 0:ec6e59cc6f40 | 642 | |
nikapov | 0:ec6e59cc6f40 | 643 | #define LSM303AGR_ACC_HR_MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 644 | mems_status_t LSM303AGR_ACC_W_HiRes(void *handle, LSM303AGR_ACC_HR_t newValue); |
nikapov | 0:ec6e59cc6f40 | 645 | mems_status_t LSM303AGR_ACC_R_HiRes(void *handle, LSM303AGR_ACC_HR_t *value); |
nikapov | 0:ec6e59cc6f40 | 646 | |
nikapov | 0:ec6e59cc6f40 | 647 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 648 | * Register : CTRL_REG4 |
nikapov | 0:ec6e59cc6f40 | 649 | * Address : 0X23 |
nikapov | 0:ec6e59cc6f40 | 650 | * Bit Group Name: FS |
nikapov | 0:ec6e59cc6f40 | 651 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 652 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 653 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 654 | LSM303AGR_ACC_FS_2G =0x00, |
nikapov | 0:ec6e59cc6f40 | 655 | LSM303AGR_ACC_FS_4G =0x10, |
nikapov | 0:ec6e59cc6f40 | 656 | LSM303AGR_ACC_FS_8G =0x20, |
nikapov | 0:ec6e59cc6f40 | 657 | LSM303AGR_ACC_FS_16G =0x30, |
nikapov | 0:ec6e59cc6f40 | 658 | } LSM303AGR_ACC_FS_t; |
nikapov | 0:ec6e59cc6f40 | 659 | |
nikapov | 0:ec6e59cc6f40 | 660 | #define LSM303AGR_ACC_FS_MASK 0x30 |
nikapov | 0:ec6e59cc6f40 | 661 | mems_status_t LSM303AGR_ACC_W_FullScale(void *handle, LSM303AGR_ACC_FS_t newValue); |
nikapov | 0:ec6e59cc6f40 | 662 | mems_status_t LSM303AGR_ACC_R_FullScale(void *handle, LSM303AGR_ACC_FS_t *value); |
nikapov | 0:ec6e59cc6f40 | 663 | |
nikapov | 0:ec6e59cc6f40 | 664 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 665 | * Register : CTRL_REG4 |
nikapov | 0:ec6e59cc6f40 | 666 | * Address : 0X23 |
nikapov | 0:ec6e59cc6f40 | 667 | * Bit Group Name: BLE |
nikapov | 0:ec6e59cc6f40 | 668 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 669 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 670 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 671 | LSM303AGR_ACC_BLE_LITTLE_ENDIAN =0x00, |
nikapov | 0:ec6e59cc6f40 | 672 | LSM303AGR_ACC_BLE_BIG_ENDIAN =0x40, |
nikapov | 0:ec6e59cc6f40 | 673 | } LSM303AGR_ACC_BLE_t; |
nikapov | 0:ec6e59cc6f40 | 674 | |
nikapov | 0:ec6e59cc6f40 | 675 | #define LSM303AGR_ACC_BLE_MASK 0x40 |
nikapov | 0:ec6e59cc6f40 | 676 | mems_status_t LSM303AGR_ACC_W_LittleBigEndian(void *handle, LSM303AGR_ACC_BLE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 677 | mems_status_t LSM303AGR_ACC_R_LittleBigEndian(void *handle, LSM303AGR_ACC_BLE_t *value); |
nikapov | 0:ec6e59cc6f40 | 678 | |
nikapov | 0:ec6e59cc6f40 | 679 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 680 | * Register : CTRL_REG4 |
nikapov | 0:ec6e59cc6f40 | 681 | * Address : 0X23 |
nikapov | 0:ec6e59cc6f40 | 682 | * Bit Group Name: BDU |
nikapov | 0:ec6e59cc6f40 | 683 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 684 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 685 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 686 | LSM303AGR_ACC_BDU_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 687 | LSM303AGR_ACC_BDU_ENABLED =0x80, |
nikapov | 0:ec6e59cc6f40 | 688 | } LSM303AGR_ACC_BDU_t; |
nikapov | 0:ec6e59cc6f40 | 689 | |
nikapov | 0:ec6e59cc6f40 | 690 | #define LSM303AGR_ACC_BDU_MASK 0x80 |
nikapov | 0:ec6e59cc6f40 | 691 | mems_status_t LSM303AGR_ACC_W_BlockDataUpdate(void *handle, LSM303AGR_ACC_BDU_t newValue); |
nikapov | 0:ec6e59cc6f40 | 692 | mems_status_t LSM303AGR_ACC_R_BlockDataUpdate(void *handle, LSM303AGR_ACC_BDU_t *value); |
nikapov | 0:ec6e59cc6f40 | 693 | |
nikapov | 0:ec6e59cc6f40 | 694 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 695 | * Register : CTRL_REG5 |
nikapov | 0:ec6e59cc6f40 | 696 | * Address : 0X24 |
nikapov | 0:ec6e59cc6f40 | 697 | * Bit Group Name: D4D_INT2 |
nikapov | 0:ec6e59cc6f40 | 698 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 699 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 700 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 701 | LSM303AGR_ACC_D4D_INT2_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 702 | LSM303AGR_ACC_D4D_INT2_ENABLED =0x01, |
nikapov | 0:ec6e59cc6f40 | 703 | } LSM303AGR_ACC_D4D_INT2_t; |
nikapov | 0:ec6e59cc6f40 | 704 | |
nikapov | 0:ec6e59cc6f40 | 705 | #define LSM303AGR_ACC_D4D_INT2_MASK 0x01 |
nikapov | 0:ec6e59cc6f40 | 706 | mems_status_t LSM303AGR_ACC_W_4D_on_INT2(void *handle, LSM303AGR_ACC_D4D_INT2_t newValue); |
nikapov | 0:ec6e59cc6f40 | 707 | mems_status_t LSM303AGR_ACC_R_4D_on_INT2(void *handle, LSM303AGR_ACC_D4D_INT2_t *value); |
nikapov | 0:ec6e59cc6f40 | 708 | |
nikapov | 0:ec6e59cc6f40 | 709 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 710 | * Register : CTRL_REG5 |
nikapov | 0:ec6e59cc6f40 | 711 | * Address : 0X24 |
nikapov | 0:ec6e59cc6f40 | 712 | * Bit Group Name: LIR_INT2 |
nikapov | 0:ec6e59cc6f40 | 713 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 714 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 715 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 716 | LSM303AGR_ACC_LIR_INT2_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 717 | LSM303AGR_ACC_LIR_INT2_ENABLED =0x02, |
nikapov | 0:ec6e59cc6f40 | 718 | } LSM303AGR_ACC_LIR_INT2_t; |
nikapov | 0:ec6e59cc6f40 | 719 | |
nikapov | 0:ec6e59cc6f40 | 720 | #define LSM303AGR_ACC_LIR_INT2_MASK 0x02 |
nikapov | 0:ec6e59cc6f40 | 721 | mems_status_t LSM303AGR_ACC_W_LatchInterrupt_on_INT2(void *handle, LSM303AGR_ACC_LIR_INT2_t newValue); |
nikapov | 0:ec6e59cc6f40 | 722 | mems_status_t LSM303AGR_ACC_R_LatchInterrupt_on_INT2(void *handle, LSM303AGR_ACC_LIR_INT2_t *value); |
nikapov | 0:ec6e59cc6f40 | 723 | |
nikapov | 0:ec6e59cc6f40 | 724 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 725 | * Register : CTRL_REG5 |
nikapov | 0:ec6e59cc6f40 | 726 | * Address : 0X24 |
nikapov | 0:ec6e59cc6f40 | 727 | * Bit Group Name: D4D_INT1 |
nikapov | 0:ec6e59cc6f40 | 728 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 729 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 730 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 731 | LSM303AGR_ACC_D4D_INT1_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 732 | LSM303AGR_ACC_D4D_INT1_ENABLED =0x04, |
nikapov | 0:ec6e59cc6f40 | 733 | } LSM303AGR_ACC_D4D_INT1_t; |
nikapov | 0:ec6e59cc6f40 | 734 | |
nikapov | 0:ec6e59cc6f40 | 735 | #define LSM303AGR_ACC_D4D_INT1_MASK 0x04 |
nikapov | 0:ec6e59cc6f40 | 736 | mems_status_t LSM303AGR_ACC_W_4D_on_INT1(void *handle, LSM303AGR_ACC_D4D_INT1_t newValue); |
nikapov | 0:ec6e59cc6f40 | 737 | mems_status_t LSM303AGR_ACC_R_4D_on_INT1(void *handle, LSM303AGR_ACC_D4D_INT1_t *value); |
nikapov | 0:ec6e59cc6f40 | 738 | |
nikapov | 0:ec6e59cc6f40 | 739 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 740 | * Register : CTRL_REG5 |
nikapov | 0:ec6e59cc6f40 | 741 | * Address : 0X24 |
nikapov | 0:ec6e59cc6f40 | 742 | * Bit Group Name: LIR_INT1 |
nikapov | 0:ec6e59cc6f40 | 743 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 744 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 745 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 746 | LSM303AGR_ACC_LIR_INT1_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 747 | LSM303AGR_ACC_LIR_INT1_ENABLED =0x08, |
nikapov | 0:ec6e59cc6f40 | 748 | } LSM303AGR_ACC_LIR_INT1_t; |
nikapov | 0:ec6e59cc6f40 | 749 | |
nikapov | 0:ec6e59cc6f40 | 750 | #define LSM303AGR_ACC_LIR_INT1_MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 751 | mems_status_t LSM303AGR_ACC_W_LatchInterrupt_on_INT1(void *handle, LSM303AGR_ACC_LIR_INT1_t newValue); |
nikapov | 0:ec6e59cc6f40 | 752 | mems_status_t LSM303AGR_ACC_R_LatchInterrupt_on_INT1(void *handle, LSM303AGR_ACC_LIR_INT1_t *value); |
nikapov | 0:ec6e59cc6f40 | 753 | |
nikapov | 0:ec6e59cc6f40 | 754 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 755 | * Register : CTRL_REG5 |
nikapov | 0:ec6e59cc6f40 | 756 | * Address : 0X24 |
nikapov | 0:ec6e59cc6f40 | 757 | * Bit Group Name: FIFO_EN |
nikapov | 0:ec6e59cc6f40 | 758 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 759 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 760 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 761 | LSM303AGR_ACC_FIFO_EN_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 762 | LSM303AGR_ACC_FIFO_EN_ENABLED =0x40, |
nikapov | 0:ec6e59cc6f40 | 763 | } LSM303AGR_ACC_FIFO_EN_t; |
nikapov | 0:ec6e59cc6f40 | 764 | |
nikapov | 0:ec6e59cc6f40 | 765 | #define LSM303AGR_ACC_FIFO_EN_MASK 0x40 |
nikapov | 0:ec6e59cc6f40 | 766 | mems_status_t LSM303AGR_ACC_W_FIFO_EN(void *handle, LSM303AGR_ACC_FIFO_EN_t newValue); |
nikapov | 0:ec6e59cc6f40 | 767 | mems_status_t LSM303AGR_ACC_R_FIFO_EN(void *handle, LSM303AGR_ACC_FIFO_EN_t *value); |
nikapov | 0:ec6e59cc6f40 | 768 | |
nikapov | 0:ec6e59cc6f40 | 769 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 770 | * Register : CTRL_REG5 |
nikapov | 0:ec6e59cc6f40 | 771 | * Address : 0X24 |
nikapov | 0:ec6e59cc6f40 | 772 | * Bit Group Name: BOOT |
nikapov | 0:ec6e59cc6f40 | 773 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 774 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 775 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 776 | LSM303AGR_ACC_BOOT_NORMAL_MODE =0x00, |
nikapov | 0:ec6e59cc6f40 | 777 | LSM303AGR_ACC_BOOT_REBOOT =0x80, |
nikapov | 0:ec6e59cc6f40 | 778 | } LSM303AGR_ACC_BOOT_t; |
nikapov | 0:ec6e59cc6f40 | 779 | |
nikapov | 0:ec6e59cc6f40 | 780 | #define LSM303AGR_ACC_BOOT_MASK 0x80 |
nikapov | 0:ec6e59cc6f40 | 781 | mems_status_t LSM303AGR_ACC_W_RebootMemory(void *handle, LSM303AGR_ACC_BOOT_t newValue); |
nikapov | 0:ec6e59cc6f40 | 782 | mems_status_t LSM303AGR_ACC_R_RebootMemory(void *handle, LSM303AGR_ACC_BOOT_t *value); |
nikapov | 0:ec6e59cc6f40 | 783 | |
nikapov | 0:ec6e59cc6f40 | 784 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 785 | * Register : CTRL_REG6 |
nikapov | 0:ec6e59cc6f40 | 786 | * Address : 0X25 |
nikapov | 0:ec6e59cc6f40 | 787 | * Bit Group Name: H_LACTIVE |
nikapov | 0:ec6e59cc6f40 | 788 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 789 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 790 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 791 | LSM303AGR_ACC_H_LACTIVE_ACTIVE_HI =0x00, |
nikapov | 0:ec6e59cc6f40 | 792 | LSM303AGR_ACC_H_LACTIVE_ACTIVE_LO =0x02, |
nikapov | 0:ec6e59cc6f40 | 793 | } LSM303AGR_ACC_H_LACTIVE_t; |
nikapov | 0:ec6e59cc6f40 | 794 | |
nikapov | 0:ec6e59cc6f40 | 795 | #define LSM303AGR_ACC_H_LACTIVE_MASK 0x02 |
nikapov | 0:ec6e59cc6f40 | 796 | mems_status_t LSM303AGR_ACC_W_IntActive(void *handle, LSM303AGR_ACC_H_LACTIVE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 797 | mems_status_t LSM303AGR_ACC_R_IntActive(void *handle, LSM303AGR_ACC_H_LACTIVE_t *value); |
nikapov | 0:ec6e59cc6f40 | 798 | |
nikapov | 0:ec6e59cc6f40 | 799 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 800 | * Register : CTRL_REG6 |
nikapov | 0:ec6e59cc6f40 | 801 | * Address : 0X25 |
nikapov | 0:ec6e59cc6f40 | 802 | * Bit Group Name: P2_ACT |
nikapov | 0:ec6e59cc6f40 | 803 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 804 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 805 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 806 | LSM303AGR_ACC_P2_ACT_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 807 | LSM303AGR_ACC_P2_ACT_ENABLED =0x08, |
nikapov | 0:ec6e59cc6f40 | 808 | } LSM303AGR_ACC_P2_ACT_t; |
nikapov | 0:ec6e59cc6f40 | 809 | |
nikapov | 0:ec6e59cc6f40 | 810 | #define LSM303AGR_ACC_P2_ACT_MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 811 | mems_status_t LSM303AGR_ACC_W_P2_ACT(void *handle, LSM303AGR_ACC_P2_ACT_t newValue); |
nikapov | 0:ec6e59cc6f40 | 812 | mems_status_t LSM303AGR_ACC_R_P2_ACT(void *handle, LSM303AGR_ACC_P2_ACT_t *value); |
nikapov | 0:ec6e59cc6f40 | 813 | |
nikapov | 0:ec6e59cc6f40 | 814 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 815 | * Register : CTRL_REG6 |
nikapov | 0:ec6e59cc6f40 | 816 | * Address : 0X25 |
nikapov | 0:ec6e59cc6f40 | 817 | * Bit Group Name: BOOT_I1 |
nikapov | 0:ec6e59cc6f40 | 818 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 819 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 820 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 821 | LSM303AGR_ACC_BOOT_I1_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 822 | LSM303AGR_ACC_BOOT_I1_ENABLED =0x10, |
nikapov | 0:ec6e59cc6f40 | 823 | } LSM303AGR_ACC_BOOT_I1_t; |
nikapov | 0:ec6e59cc6f40 | 824 | |
nikapov | 0:ec6e59cc6f40 | 825 | #define LSM303AGR_ACC_BOOT_I1_MASK 0x10 |
nikapov | 0:ec6e59cc6f40 | 826 | mems_status_t LSM303AGR_ACC_W_Boot_on_INT2(void *handle, LSM303AGR_ACC_BOOT_I1_t newValue); |
nikapov | 0:ec6e59cc6f40 | 827 | mems_status_t LSM303AGR_ACC_R_Boot_on_INT2(void *handle, LSM303AGR_ACC_BOOT_I1_t *value); |
nikapov | 0:ec6e59cc6f40 | 828 | |
nikapov | 0:ec6e59cc6f40 | 829 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 830 | * Register : CTRL_REG6 |
nikapov | 0:ec6e59cc6f40 | 831 | * Address : 0X25 |
nikapov | 0:ec6e59cc6f40 | 832 | * Bit Group Name: I2_INT2 |
nikapov | 0:ec6e59cc6f40 | 833 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 834 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 835 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 836 | LSM303AGR_ACC_I2_INT2_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 837 | LSM303AGR_ACC_I2_INT2_ENABLED =0x20, |
nikapov | 0:ec6e59cc6f40 | 838 | } LSM303AGR_ACC_I2_INT2_t; |
nikapov | 0:ec6e59cc6f40 | 839 | |
nikapov | 0:ec6e59cc6f40 | 840 | #define LSM303AGR_ACC_I2_INT2_MASK 0x20 |
nikapov | 0:ec6e59cc6f40 | 841 | mems_status_t LSM303AGR_ACC_W_I2_on_INT2(void *handle, LSM303AGR_ACC_I2_INT2_t newValue); |
nikapov | 0:ec6e59cc6f40 | 842 | mems_status_t LSM303AGR_ACC_R_I2_on_INT2(void *handle, LSM303AGR_ACC_I2_INT2_t *value); |
nikapov | 0:ec6e59cc6f40 | 843 | |
nikapov | 0:ec6e59cc6f40 | 844 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 845 | * Register : CTRL_REG6 |
nikapov | 0:ec6e59cc6f40 | 846 | * Address : 0X25 |
nikapov | 0:ec6e59cc6f40 | 847 | * Bit Group Name: I2_INT1 |
nikapov | 0:ec6e59cc6f40 | 848 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 849 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 850 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 851 | LSM303AGR_ACC_I2_INT1_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 852 | LSM303AGR_ACC_I2_INT1_ENABLED =0x40, |
nikapov | 0:ec6e59cc6f40 | 853 | } LSM303AGR_ACC_I2_INT1_t; |
nikapov | 0:ec6e59cc6f40 | 854 | |
nikapov | 0:ec6e59cc6f40 | 855 | #define LSM303AGR_ACC_I2_INT1_MASK 0x40 |
nikapov | 0:ec6e59cc6f40 | 856 | mems_status_t LSM303AGR_ACC_W_I2_on_INT1(void *handle, LSM303AGR_ACC_I2_INT1_t newValue); |
nikapov | 0:ec6e59cc6f40 | 857 | mems_status_t LSM303AGR_ACC_R_I2_on_INT1(void *handle, LSM303AGR_ACC_I2_INT1_t *value); |
nikapov | 0:ec6e59cc6f40 | 858 | |
nikapov | 0:ec6e59cc6f40 | 859 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 860 | * Register : CTRL_REG6 |
nikapov | 0:ec6e59cc6f40 | 861 | * Address : 0X25 |
nikapov | 0:ec6e59cc6f40 | 862 | * Bit Group Name: I2_CLICKEN |
nikapov | 0:ec6e59cc6f40 | 863 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 864 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 865 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 866 | LSM303AGR_ACC_I2_CLICKEN_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 867 | LSM303AGR_ACC_I2_CLICKEN_ENABLED =0x80, |
nikapov | 0:ec6e59cc6f40 | 868 | } LSM303AGR_ACC_I2_CLICKEN_t; |
nikapov | 0:ec6e59cc6f40 | 869 | |
nikapov | 0:ec6e59cc6f40 | 870 | #define LSM303AGR_ACC_I2_CLICKEN_MASK 0x80 |
nikapov | 0:ec6e59cc6f40 | 871 | mems_status_t LSM303AGR_ACC_W_Click_on_INT2(void *handle, LSM303AGR_ACC_I2_CLICKEN_t newValue); |
nikapov | 0:ec6e59cc6f40 | 872 | mems_status_t LSM303AGR_ACC_R_Click_on_INT2(void *handle, LSM303AGR_ACC_I2_CLICKEN_t *value); |
nikapov | 0:ec6e59cc6f40 | 873 | |
nikapov | 0:ec6e59cc6f40 | 874 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 875 | * Register : REFERENCE |
nikapov | 0:ec6e59cc6f40 | 876 | * Address : 0X26 |
nikapov | 0:ec6e59cc6f40 | 877 | * Bit Group Name: REF |
nikapov | 0:ec6e59cc6f40 | 878 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 879 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 880 | #define LSM303AGR_ACC_REF_MASK 0xFF |
nikapov | 0:ec6e59cc6f40 | 881 | #define LSM303AGR_ACC_REF_POSITION 0 |
nikapov | 0:ec6e59cc6f40 | 882 | mems_status_t LSM303AGR_ACC_W_ReferenceVal(void *handle, u8_t newValue); |
nikapov | 0:ec6e59cc6f40 | 883 | mems_status_t LSM303AGR_ACC_R_ReferenceVal(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 884 | |
nikapov | 0:ec6e59cc6f40 | 885 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 886 | * Register : STATUS_REG2 |
nikapov | 0:ec6e59cc6f40 | 887 | * Address : 0X27 |
nikapov | 0:ec6e59cc6f40 | 888 | * Bit Group Name: XDA |
nikapov | 0:ec6e59cc6f40 | 889 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 890 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 891 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 892 | LSM303AGR_ACC_XDA_NOT_AVAILABLE =0x00, |
nikapov | 0:ec6e59cc6f40 | 893 | LSM303AGR_ACC_XDA_AVAILABLE =0x01, |
nikapov | 0:ec6e59cc6f40 | 894 | } LSM303AGR_ACC_XDA_t; |
nikapov | 0:ec6e59cc6f40 | 895 | |
nikapov | 0:ec6e59cc6f40 | 896 | #define LSM303AGR_ACC_XDA_MASK 0x01 |
nikapov | 0:ec6e59cc6f40 | 897 | mems_status_t LSM303AGR_ACC_R_XDataAvail(void *handle, LSM303AGR_ACC_XDA_t *value); |
nikapov | 0:ec6e59cc6f40 | 898 | |
nikapov | 0:ec6e59cc6f40 | 899 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 900 | * Register : STATUS_REG2 |
nikapov | 0:ec6e59cc6f40 | 901 | * Address : 0X27 |
nikapov | 0:ec6e59cc6f40 | 902 | * Bit Group Name: YDA |
nikapov | 0:ec6e59cc6f40 | 903 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 904 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 905 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 906 | LSM303AGR_ACC_YDA_NOT_AVAILABLE =0x00, |
nikapov | 0:ec6e59cc6f40 | 907 | LSM303AGR_ACC_YDA_AVAILABLE =0x02, |
nikapov | 0:ec6e59cc6f40 | 908 | } LSM303AGR_ACC_YDA_t; |
nikapov | 0:ec6e59cc6f40 | 909 | |
nikapov | 0:ec6e59cc6f40 | 910 | #define LSM303AGR_ACC_YDA_MASK 0x02 |
nikapov | 0:ec6e59cc6f40 | 911 | mems_status_t LSM303AGR_ACC_R_YDataAvail(void *handle, LSM303AGR_ACC_YDA_t *value); |
nikapov | 0:ec6e59cc6f40 | 912 | |
nikapov | 0:ec6e59cc6f40 | 913 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 914 | * Register : STATUS_REG2 |
nikapov | 0:ec6e59cc6f40 | 915 | * Address : 0X27 |
nikapov | 0:ec6e59cc6f40 | 916 | * Bit Group Name: ZDA |
nikapov | 0:ec6e59cc6f40 | 917 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 918 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 919 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 920 | LSM303AGR_ACC_ZDA_NOT_AVAILABLE =0x00, |
nikapov | 0:ec6e59cc6f40 | 921 | LSM303AGR_ACC_ZDA_AVAILABLE =0x04, |
nikapov | 0:ec6e59cc6f40 | 922 | } LSM303AGR_ACC_ZDA_t; |
nikapov | 0:ec6e59cc6f40 | 923 | |
nikapov | 0:ec6e59cc6f40 | 924 | #define LSM303AGR_ACC_ZDA_MASK 0x04 |
nikapov | 0:ec6e59cc6f40 | 925 | mems_status_t LSM303AGR_ACC_R_ZDataAvail(void *handle, LSM303AGR_ACC_ZDA_t *value); |
nikapov | 0:ec6e59cc6f40 | 926 | |
nikapov | 0:ec6e59cc6f40 | 927 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 928 | * Register : STATUS_REG2 |
nikapov | 0:ec6e59cc6f40 | 929 | * Address : 0X27 |
nikapov | 0:ec6e59cc6f40 | 930 | * Bit Group Name: ZYXDA |
nikapov | 0:ec6e59cc6f40 | 931 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 932 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 933 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 934 | LSM303AGR_ACC_ZYXDA_NOT_AVAILABLE =0x00, |
nikapov | 0:ec6e59cc6f40 | 935 | LSM303AGR_ACC_ZYXDA_AVAILABLE =0x08, |
nikapov | 0:ec6e59cc6f40 | 936 | } LSM303AGR_ACC_ZYXDA_t; |
nikapov | 0:ec6e59cc6f40 | 937 | |
nikapov | 0:ec6e59cc6f40 | 938 | #define LSM303AGR_ACC_ZYXDA_MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 939 | mems_status_t LSM303AGR_ACC_R_XYZDataAvail(void *handle, LSM303AGR_ACC_ZYXDA_t *value); |
nikapov | 0:ec6e59cc6f40 | 940 | |
nikapov | 0:ec6e59cc6f40 | 941 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 942 | * Register : STATUS_REG2 |
nikapov | 0:ec6e59cc6f40 | 943 | * Address : 0X27 |
nikapov | 0:ec6e59cc6f40 | 944 | * Bit Group Name: XOR |
nikapov | 0:ec6e59cc6f40 | 945 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 946 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 947 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 948 | LSM303AGR_ACC_XOR_NO_OVERRUN =0x00, |
nikapov | 0:ec6e59cc6f40 | 949 | LSM303AGR_ACC_XOR_OVERRUN =0x10, |
nikapov | 0:ec6e59cc6f40 | 950 | } LSM303AGR_ACC_XOR_t; |
nikapov | 0:ec6e59cc6f40 | 951 | |
nikapov | 0:ec6e59cc6f40 | 952 | #define LSM303AGR_ACC_XOR_MASK 0x10 |
nikapov | 0:ec6e59cc6f40 | 953 | mems_status_t LSM303AGR_ACC_R_XDataOverrun(void *handle, LSM303AGR_ACC_XOR_t *value); |
nikapov | 0:ec6e59cc6f40 | 954 | |
nikapov | 0:ec6e59cc6f40 | 955 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 956 | * Register : STATUS_REG2 |
nikapov | 0:ec6e59cc6f40 | 957 | * Address : 0X27 |
nikapov | 0:ec6e59cc6f40 | 958 | * Bit Group Name: YOR |
nikapov | 0:ec6e59cc6f40 | 959 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 960 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 961 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 962 | LSM303AGR_ACC_YOR_NO_OVERRUN =0x00, |
nikapov | 0:ec6e59cc6f40 | 963 | LSM303AGR_ACC_YOR_OVERRUN =0x20, |
nikapov | 0:ec6e59cc6f40 | 964 | } LSM303AGR_ACC_YOR_t; |
nikapov | 0:ec6e59cc6f40 | 965 | |
nikapov | 0:ec6e59cc6f40 | 966 | #define LSM303AGR_ACC_YOR_MASK 0x20 |
nikapov | 0:ec6e59cc6f40 | 967 | mems_status_t LSM303AGR_ACC_R_YDataOverrun(void *handle, LSM303AGR_ACC_YOR_t *value); |
nikapov | 0:ec6e59cc6f40 | 968 | |
nikapov | 0:ec6e59cc6f40 | 969 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 970 | * Register : STATUS_REG2 |
nikapov | 0:ec6e59cc6f40 | 971 | * Address : 0X27 |
nikapov | 0:ec6e59cc6f40 | 972 | * Bit Group Name: ZOR |
nikapov | 0:ec6e59cc6f40 | 973 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 974 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 975 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 976 | LSM303AGR_ACC_ZOR_NO_OVERRUN =0x00, |
nikapov | 0:ec6e59cc6f40 | 977 | LSM303AGR_ACC_ZOR_OVERRUN =0x40, |
nikapov | 0:ec6e59cc6f40 | 978 | } LSM303AGR_ACC_ZOR_t; |
nikapov | 0:ec6e59cc6f40 | 979 | |
nikapov | 0:ec6e59cc6f40 | 980 | #define LSM303AGR_ACC_ZOR_MASK 0x40 |
nikapov | 0:ec6e59cc6f40 | 981 | mems_status_t LSM303AGR_ACC_R_ZDataOverrun(void *handle, LSM303AGR_ACC_ZOR_t *value); |
nikapov | 0:ec6e59cc6f40 | 982 | |
nikapov | 0:ec6e59cc6f40 | 983 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 984 | * Register : STATUS_REG2 |
nikapov | 0:ec6e59cc6f40 | 985 | * Address : 0X27 |
nikapov | 0:ec6e59cc6f40 | 986 | * Bit Group Name: ZYXOR |
nikapov | 0:ec6e59cc6f40 | 987 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 988 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 989 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 990 | LSM303AGR_ACC_ZYXOR_NO_OVERRUN =0x00, |
nikapov | 0:ec6e59cc6f40 | 991 | LSM303AGR_ACC_ZYXOR_OVERRUN =0x80, |
nikapov | 0:ec6e59cc6f40 | 992 | } LSM303AGR_ACC_ZYXOR_t; |
nikapov | 0:ec6e59cc6f40 | 993 | |
nikapov | 0:ec6e59cc6f40 | 994 | #define LSM303AGR_ACC_ZYXOR_MASK 0x80 |
nikapov | 0:ec6e59cc6f40 | 995 | mems_status_t LSM303AGR_ACC_R_XYZDataOverrun(void *handle, LSM303AGR_ACC_ZYXOR_t *value); |
nikapov | 0:ec6e59cc6f40 | 996 | |
nikapov | 0:ec6e59cc6f40 | 997 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 998 | * Register : FIFO_CTRL_REG |
nikapov | 0:ec6e59cc6f40 | 999 | * Address : 0X2E |
nikapov | 0:ec6e59cc6f40 | 1000 | * Bit Group Name: FTH |
nikapov | 0:ec6e59cc6f40 | 1001 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1002 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1003 | #define LSM303AGR_ACC_FTH_MASK 0x1F |
nikapov | 0:ec6e59cc6f40 | 1004 | #define LSM303AGR_ACC_FTH_POSITION 0 |
nikapov | 0:ec6e59cc6f40 | 1005 | mems_status_t LSM303AGR_ACC_W_FifoThreshold(void *handle, u8_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1006 | mems_status_t LSM303AGR_ACC_R_FifoThreshold(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 1007 | |
nikapov | 0:ec6e59cc6f40 | 1008 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1009 | * Register : FIFO_CTRL_REG |
nikapov | 0:ec6e59cc6f40 | 1010 | * Address : 0X2E |
nikapov | 0:ec6e59cc6f40 | 1011 | * Bit Group Name: TR |
nikapov | 0:ec6e59cc6f40 | 1012 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1013 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1014 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1015 | LSM303AGR_ACC_TR_TRIGGER_ON_INT1 =0x00, |
nikapov | 0:ec6e59cc6f40 | 1016 | LSM303AGR_ACC_TR_TRIGGER_ON_INT2 =0x20, |
nikapov | 0:ec6e59cc6f40 | 1017 | } LSM303AGR_ACC_TR_t; |
nikapov | 0:ec6e59cc6f40 | 1018 | |
nikapov | 0:ec6e59cc6f40 | 1019 | #define LSM303AGR_ACC_TR_MASK 0x20 |
nikapov | 0:ec6e59cc6f40 | 1020 | mems_status_t LSM303AGR_ACC_W_TriggerSel(void *handle, LSM303AGR_ACC_TR_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1021 | mems_status_t LSM303AGR_ACC_R_TriggerSel(void *handle, LSM303AGR_ACC_TR_t *value); |
nikapov | 0:ec6e59cc6f40 | 1022 | |
nikapov | 0:ec6e59cc6f40 | 1023 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1024 | * Register : FIFO_CTRL_REG |
nikapov | 0:ec6e59cc6f40 | 1025 | * Address : 0X2E |
nikapov | 0:ec6e59cc6f40 | 1026 | * Bit Group Name: FM |
nikapov | 0:ec6e59cc6f40 | 1027 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1028 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1029 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1030 | LSM303AGR_ACC_FM_BYPASS =0x00, |
nikapov | 0:ec6e59cc6f40 | 1031 | LSM303AGR_ACC_FM_FIFO =0x40, |
nikapov | 0:ec6e59cc6f40 | 1032 | LSM303AGR_ACC_FM_STREAM =0x80, |
nikapov | 0:ec6e59cc6f40 | 1033 | LSM303AGR_ACC_FM_TRIGGER =0xC0, |
nikapov | 0:ec6e59cc6f40 | 1034 | } LSM303AGR_ACC_FM_t; |
nikapov | 0:ec6e59cc6f40 | 1035 | |
nikapov | 0:ec6e59cc6f40 | 1036 | #define LSM303AGR_ACC_FM_MASK 0xC0 |
nikapov | 0:ec6e59cc6f40 | 1037 | mems_status_t LSM303AGR_ACC_W_FifoMode(void *handle, LSM303AGR_ACC_FM_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1038 | mems_status_t LSM303AGR_ACC_R_FifoMode(void *handle, LSM303AGR_ACC_FM_t *value); |
nikapov | 0:ec6e59cc6f40 | 1039 | |
nikapov | 0:ec6e59cc6f40 | 1040 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1041 | * Register : FIFO_SRC_REG |
nikapov | 0:ec6e59cc6f40 | 1042 | * Address : 0X2F |
nikapov | 0:ec6e59cc6f40 | 1043 | * Bit Group Name: FSS |
nikapov | 0:ec6e59cc6f40 | 1044 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1045 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1046 | #define LSM303AGR_ACC_FSS_MASK 0x1F |
nikapov | 0:ec6e59cc6f40 | 1047 | #define LSM303AGR_ACC_FSS_POSITION 0 |
nikapov | 0:ec6e59cc6f40 | 1048 | mems_status_t LSM303AGR_ACC_R_FifoSamplesAvail(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 1049 | |
nikapov | 0:ec6e59cc6f40 | 1050 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1051 | * Register : FIFO_SRC_REG |
nikapov | 0:ec6e59cc6f40 | 1052 | * Address : 0X2F |
nikapov | 0:ec6e59cc6f40 | 1053 | * Bit Group Name: EMPTY |
nikapov | 0:ec6e59cc6f40 | 1054 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1055 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1056 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1057 | LSM303AGR_ACC_EMPTY_NOT_EMPTY =0x00, |
nikapov | 0:ec6e59cc6f40 | 1058 | LSM303AGR_ACC_EMPTY_EMPTY =0x20, |
nikapov | 0:ec6e59cc6f40 | 1059 | } LSM303AGR_ACC_EMPTY_t; |
nikapov | 0:ec6e59cc6f40 | 1060 | |
nikapov | 0:ec6e59cc6f40 | 1061 | #define LSM303AGR_ACC_EMPTY_MASK 0x20 |
nikapov | 0:ec6e59cc6f40 | 1062 | mems_status_t LSM303AGR_ACC_R_FifoEmpty(void *handle, LSM303AGR_ACC_EMPTY_t *value); |
nikapov | 0:ec6e59cc6f40 | 1063 | |
nikapov | 0:ec6e59cc6f40 | 1064 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1065 | * Register : FIFO_SRC_REG |
nikapov | 0:ec6e59cc6f40 | 1066 | * Address : 0X2F |
nikapov | 0:ec6e59cc6f40 | 1067 | * Bit Group Name: OVRN_FIFO |
nikapov | 0:ec6e59cc6f40 | 1068 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1069 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1070 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1071 | LSM303AGR_ACC_OVRN_FIFO_NO_OVERRUN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1072 | LSM303AGR_ACC_OVRN_FIFO_OVERRUN =0x40, |
nikapov | 0:ec6e59cc6f40 | 1073 | } LSM303AGR_ACC_OVRN_FIFO_t; |
nikapov | 0:ec6e59cc6f40 | 1074 | |
nikapov | 0:ec6e59cc6f40 | 1075 | #define LSM303AGR_ACC_OVRN_FIFO_MASK 0x40 |
nikapov | 0:ec6e59cc6f40 | 1076 | mems_status_t LSM303AGR_ACC_R_FifoOverrun(void *handle, LSM303AGR_ACC_OVRN_FIFO_t *value); |
nikapov | 0:ec6e59cc6f40 | 1077 | |
nikapov | 0:ec6e59cc6f40 | 1078 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1079 | * Register : FIFO_SRC_REG |
nikapov | 0:ec6e59cc6f40 | 1080 | * Address : 0X2F |
nikapov | 0:ec6e59cc6f40 | 1081 | * Bit Group Name: WTM |
nikapov | 0:ec6e59cc6f40 | 1082 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1083 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1084 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1085 | LSM303AGR_ACC_WTM_NORMAL =0x00, |
nikapov | 0:ec6e59cc6f40 | 1086 | LSM303AGR_ACC_WTM_OVERFLOW =0x80, |
nikapov | 0:ec6e59cc6f40 | 1087 | } LSM303AGR_ACC_WTM_t; |
nikapov | 0:ec6e59cc6f40 | 1088 | |
nikapov | 0:ec6e59cc6f40 | 1089 | #define LSM303AGR_ACC_WTM_MASK 0x80 |
nikapov | 0:ec6e59cc6f40 | 1090 | mems_status_t LSM303AGR_ACC_R_WatermarkLevel(void *handle, LSM303AGR_ACC_WTM_t *value); |
nikapov | 0:ec6e59cc6f40 | 1091 | |
nikapov | 0:ec6e59cc6f40 | 1092 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1093 | * Register : INT1_CFG/INT2_CFG |
nikapov | 0:ec6e59cc6f40 | 1094 | * Address : 0X30/0x34 |
nikapov | 0:ec6e59cc6f40 | 1095 | * Bit Group Name: XLIE |
nikapov | 0:ec6e59cc6f40 | 1096 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1097 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1098 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1099 | LSM303AGR_ACC_XLIE_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1100 | LSM303AGR_ACC_XLIE_ENABLED =0x01, |
nikapov | 0:ec6e59cc6f40 | 1101 | } LSM303AGR_ACC_XLIE_t; |
nikapov | 0:ec6e59cc6f40 | 1102 | |
nikapov | 0:ec6e59cc6f40 | 1103 | #define LSM303AGR_ACC_XLIE_MASK 0x01 |
nikapov | 0:ec6e59cc6f40 | 1104 | mems_status_t LSM303AGR_ACC_W_Int1EnXLo(void *handle, LSM303AGR_ACC_XLIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1105 | mems_status_t LSM303AGR_ACC_R_Int1EnXLo(void *handle, LSM303AGR_ACC_XLIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1106 | mems_status_t LSM303AGR_ACC_W_Int2EnXLo(void *handle, LSM303AGR_ACC_XLIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1107 | mems_status_t LSM303AGR_ACC_R_Int2EnXLo(void *handle, LSM303AGR_ACC_XLIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1108 | |
nikapov | 0:ec6e59cc6f40 | 1109 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1110 | * Register : INT1_CFG/INT2_CFG |
nikapov | 0:ec6e59cc6f40 | 1111 | * Address : 0X30/0x34 |
nikapov | 0:ec6e59cc6f40 | 1112 | * Bit Group Name: XHIE |
nikapov | 0:ec6e59cc6f40 | 1113 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1114 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1115 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1116 | LSM303AGR_ACC_XHIE_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1117 | LSM303AGR_ACC_XHIE_ENABLED =0x02, |
nikapov | 0:ec6e59cc6f40 | 1118 | } LSM303AGR_ACC_XHIE_t; |
nikapov | 0:ec6e59cc6f40 | 1119 | |
nikapov | 0:ec6e59cc6f40 | 1120 | #define LSM303AGR_ACC_XHIE_MASK 0x02 |
nikapov | 0:ec6e59cc6f40 | 1121 | mems_status_t LSM303AGR_ACC_W_Int1EnXHi(void *handle, LSM303AGR_ACC_XHIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1122 | mems_status_t LSM303AGR_ACC_R_Int1EnXHi(void *handle, LSM303AGR_ACC_XHIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1123 | mems_status_t LSM303AGR_ACC_W_Int2EnXHi(void *handle, LSM303AGR_ACC_XHIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1124 | mems_status_t LSM303AGR_ACC_R_Int2EnXHi(void *handle, LSM303AGR_ACC_XHIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1125 | |
nikapov | 0:ec6e59cc6f40 | 1126 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1127 | * Register : INT1_CFG/INT2_CFG |
nikapov | 0:ec6e59cc6f40 | 1128 | * Address : 0X30/0x34 |
nikapov | 0:ec6e59cc6f40 | 1129 | * Bit Group Name: YLIE |
nikapov | 0:ec6e59cc6f40 | 1130 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1131 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1132 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1133 | LSM303AGR_ACC_YLIE_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1134 | LSM303AGR_ACC_YLIE_ENABLED =0x04, |
nikapov | 0:ec6e59cc6f40 | 1135 | } LSM303AGR_ACC_YLIE_t; |
nikapov | 0:ec6e59cc6f40 | 1136 | |
nikapov | 0:ec6e59cc6f40 | 1137 | #define LSM303AGR_ACC_YLIE_MASK 0x04 |
nikapov | 0:ec6e59cc6f40 | 1138 | mems_status_t LSM303AGR_ACC_W_Int1EnYLo(void *handle, LSM303AGR_ACC_YLIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1139 | mems_status_t LSM303AGR_ACC_R_Int1EnYLo(void *handle, LSM303AGR_ACC_YLIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1140 | mems_status_t LSM303AGR_ACC_W_Int2EnYLo(void *handle, LSM303AGR_ACC_YLIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1141 | mems_status_t LSM303AGR_ACC_R_Int2EnYLo(void *handle, LSM303AGR_ACC_YLIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1142 | |
nikapov | 0:ec6e59cc6f40 | 1143 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1144 | * Register : INT1_CFG/INT2_CFG |
nikapov | 0:ec6e59cc6f40 | 1145 | * Address : 0X30/0x34 |
nikapov | 0:ec6e59cc6f40 | 1146 | * Bit Group Name: YHIE |
nikapov | 0:ec6e59cc6f40 | 1147 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1148 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1149 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1150 | LSM303AGR_ACC_YHIE_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1151 | LSM303AGR_ACC_YHIE_ENABLED =0x08, |
nikapov | 0:ec6e59cc6f40 | 1152 | } LSM303AGR_ACC_YHIE_t; |
nikapov | 0:ec6e59cc6f40 | 1153 | |
nikapov | 0:ec6e59cc6f40 | 1154 | #define LSM303AGR_ACC_YHIE_MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 1155 | mems_status_t LSM303AGR_ACC_W_Int1EnYHi(void *handle, LSM303AGR_ACC_YHIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1156 | mems_status_t LSM303AGR_ACC_R_Int1EnYHi(void *handle, LSM303AGR_ACC_YHIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1157 | mems_status_t LSM303AGR_ACC_W_Int2EnYHi(void *handle, LSM303AGR_ACC_YHIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1158 | mems_status_t LSM303AGR_ACC_R_Int2EnYHi(void *handle, LSM303AGR_ACC_YHIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1159 | |
nikapov | 0:ec6e59cc6f40 | 1160 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1161 | * Register : INT1_CFG/INT2_CFG |
nikapov | 0:ec6e59cc6f40 | 1162 | * Address : 0X30/0x34 |
nikapov | 0:ec6e59cc6f40 | 1163 | * Bit Group Name: ZLIE |
nikapov | 0:ec6e59cc6f40 | 1164 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1165 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1166 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1167 | LSM303AGR_ACC_ZLIE_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1168 | LSM303AGR_ACC_ZLIE_ENABLED =0x10, |
nikapov | 0:ec6e59cc6f40 | 1169 | } LSM303AGR_ACC_ZLIE_t; |
nikapov | 0:ec6e59cc6f40 | 1170 | |
nikapov | 0:ec6e59cc6f40 | 1171 | #define LSM303AGR_ACC_ZLIE_MASK 0x10 |
nikapov | 0:ec6e59cc6f40 | 1172 | mems_status_t LSM303AGR_ACC_W_Int1EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1173 | mems_status_t LSM303AGR_ACC_R_Int1EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1174 | mems_status_t LSM303AGR_ACC_W_Int2EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1175 | mems_status_t LSM303AGR_ACC_R_Int2EnZLo(void *handle, LSM303AGR_ACC_ZLIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1176 | |
nikapov | 0:ec6e59cc6f40 | 1177 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1178 | * Register : INT1_CFG/INT2_CFG |
nikapov | 0:ec6e59cc6f40 | 1179 | * Address : 0X30/0x34 |
nikapov | 0:ec6e59cc6f40 | 1180 | * Bit Group Name: ZHIE |
nikapov | 0:ec6e59cc6f40 | 1181 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1182 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1183 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1184 | LSM303AGR_ACC_ZHIE_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1185 | LSM303AGR_ACC_ZHIE_ENABLED =0x20, |
nikapov | 0:ec6e59cc6f40 | 1186 | } LSM303AGR_ACC_ZHIE_t; |
nikapov | 0:ec6e59cc6f40 | 1187 | |
nikapov | 0:ec6e59cc6f40 | 1188 | #define LSM303AGR_ACC_ZHIE_MASK 0x20 |
nikapov | 0:ec6e59cc6f40 | 1189 | mems_status_t LSM303AGR_ACC_W_Int1EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1190 | mems_status_t LSM303AGR_ACC_R_Int1EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1191 | mems_status_t LSM303AGR_ACC_W_Int2EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1192 | mems_status_t LSM303AGR_ACC_R_Int2EnZHi(void *handle, LSM303AGR_ACC_ZHIE_t *value); |
nikapov | 0:ec6e59cc6f40 | 1193 | |
nikapov | 0:ec6e59cc6f40 | 1194 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1195 | * Register : INT1_CFG/INT2_CFG |
nikapov | 0:ec6e59cc6f40 | 1196 | * Address : 0X30/0x34 |
nikapov | 0:ec6e59cc6f40 | 1197 | * Bit Group Name: 6D |
nikapov | 0:ec6e59cc6f40 | 1198 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1199 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1200 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1201 | LSM303AGR_ACC_6D_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1202 | LSM303AGR_ACC_6D_ENABLED =0x40, |
nikapov | 0:ec6e59cc6f40 | 1203 | } LSM303AGR_ACC_6D_t; |
nikapov | 0:ec6e59cc6f40 | 1204 | |
nikapov | 0:ec6e59cc6f40 | 1205 | #define LSM303AGR_ACC_6D_MASK 0x40 |
nikapov | 0:ec6e59cc6f40 | 1206 | mems_status_t LSM303AGR_ACC_W_Int1_6D(void *handle, LSM303AGR_ACC_6D_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1207 | mems_status_t LSM303AGR_ACC_R_Int1_6D(void *handle, LSM303AGR_ACC_6D_t *value); |
nikapov | 0:ec6e59cc6f40 | 1208 | mems_status_t LSM303AGR_ACC_W_Int2_6D(void *handle, LSM303AGR_ACC_6D_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1209 | mems_status_t LSM303AGR_ACC_R_Int2_6D(void *handle, LSM303AGR_ACC_6D_t *value); |
nikapov | 0:ec6e59cc6f40 | 1210 | |
nikapov | 0:ec6e59cc6f40 | 1211 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1212 | * Register : INT1_CFG/INT2_CFG |
nikapov | 0:ec6e59cc6f40 | 1213 | * Address : 0X30/0x34 |
nikapov | 0:ec6e59cc6f40 | 1214 | * Bit Group Name: AOI |
nikapov | 0:ec6e59cc6f40 | 1215 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1216 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1217 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1218 | LSM303AGR_ACC_AOI_OR =0x00, |
nikapov | 0:ec6e59cc6f40 | 1219 | LSM303AGR_ACC_AOI_AND =0x80, |
nikapov | 0:ec6e59cc6f40 | 1220 | } LSM303AGR_ACC_AOI_t; |
nikapov | 0:ec6e59cc6f40 | 1221 | |
nikapov | 0:ec6e59cc6f40 | 1222 | #define LSM303AGR_ACC_AOI_MASK 0x80 |
nikapov | 0:ec6e59cc6f40 | 1223 | mems_status_t LSM303AGR_ACC_W_Int1_AOI(void *handle, LSM303AGR_ACC_AOI_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1224 | mems_status_t LSM303AGR_ACC_R_Int1_AOI(void *handle, LSM303AGR_ACC_AOI_t *value); |
nikapov | 0:ec6e59cc6f40 | 1225 | mems_status_t LSM303AGR_ACC_W_Int2_AOI(void *handle, LSM303AGR_ACC_AOI_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1226 | mems_status_t LSM303AGR_ACC_R_Int2_AOI(void *handle, LSM303AGR_ACC_AOI_t *value); |
nikapov | 0:ec6e59cc6f40 | 1227 | |
nikapov | 0:ec6e59cc6f40 | 1228 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1229 | * Register : INT1_SOURCE/INT2_SOURCE |
nikapov | 0:ec6e59cc6f40 | 1230 | * Address : 0X31/0x35 |
nikapov | 0:ec6e59cc6f40 | 1231 | * Bit Group Name: XL |
nikapov | 0:ec6e59cc6f40 | 1232 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1233 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1234 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1235 | LSM303AGR_ACC_XL_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1236 | LSM303AGR_ACC_XL_UP =0x01, |
nikapov | 0:ec6e59cc6f40 | 1237 | } LSM303AGR_ACC_XL_t; |
nikapov | 0:ec6e59cc6f40 | 1238 | |
nikapov | 0:ec6e59cc6f40 | 1239 | #define LSM303AGR_ACC_XL_MASK 0x01 |
nikapov | 0:ec6e59cc6f40 | 1240 | mems_status_t LSM303AGR_ACC_R_Int1_Xlo(void *handle, LSM303AGR_ACC_XL_t *value); |
nikapov | 0:ec6e59cc6f40 | 1241 | mems_status_t LSM303AGR_ACC_R_Int2_Xlo(void *handle, LSM303AGR_ACC_XL_t *value); |
nikapov | 0:ec6e59cc6f40 | 1242 | |
nikapov | 0:ec6e59cc6f40 | 1243 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1244 | * Register : INT1_SOURCE/INT2_SOURCE |
nikapov | 0:ec6e59cc6f40 | 1245 | * Address : 0X31/0x35 |
nikapov | 0:ec6e59cc6f40 | 1246 | * Bit Group Name: XH |
nikapov | 0:ec6e59cc6f40 | 1247 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1248 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1249 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1250 | LSM303AGR_ACC_XH_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1251 | LSM303AGR_ACC_XH_UP =0x02, |
nikapov | 0:ec6e59cc6f40 | 1252 | } LSM303AGR_ACC_XH_t; |
nikapov | 0:ec6e59cc6f40 | 1253 | |
nikapov | 0:ec6e59cc6f40 | 1254 | #define LSM303AGR_ACC_XH_MASK 0x02 |
nikapov | 0:ec6e59cc6f40 | 1255 | mems_status_t LSM303AGR_ACC_R_Int1_XHi(void *handle, LSM303AGR_ACC_XH_t *value); |
nikapov | 0:ec6e59cc6f40 | 1256 | mems_status_t LSM303AGR_ACC_R_Int2_XHi(void *handle, LSM303AGR_ACC_XH_t *value); |
nikapov | 0:ec6e59cc6f40 | 1257 | |
nikapov | 0:ec6e59cc6f40 | 1258 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1259 | * Register : INT1_SOURCE/INT2_SOURCE |
nikapov | 0:ec6e59cc6f40 | 1260 | * Address : 0X31/0x35 |
nikapov | 0:ec6e59cc6f40 | 1261 | * Bit Group Name: YL |
nikapov | 0:ec6e59cc6f40 | 1262 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1263 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1264 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1265 | LSM303AGR_ACC_YL_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1266 | LSM303AGR_ACC_YL_UP =0x04, |
nikapov | 0:ec6e59cc6f40 | 1267 | } LSM303AGR_ACC_YL_t; |
nikapov | 0:ec6e59cc6f40 | 1268 | |
nikapov | 0:ec6e59cc6f40 | 1269 | #define LSM303AGR_ACC_YL_MASK 0x04 |
nikapov | 0:ec6e59cc6f40 | 1270 | mems_status_t LSM303AGR_ACC_R_Int1_YLo(void *handle, LSM303AGR_ACC_YL_t *value); |
nikapov | 0:ec6e59cc6f40 | 1271 | mems_status_t LSM303AGR_ACC_R_Int2_YLo(void *handle, LSM303AGR_ACC_YL_t *value); |
nikapov | 0:ec6e59cc6f40 | 1272 | |
nikapov | 0:ec6e59cc6f40 | 1273 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1274 | * Register : INT1_SOURCE/INT2_SOURCE |
nikapov | 0:ec6e59cc6f40 | 1275 | * Address : 0X31/0x35 |
nikapov | 0:ec6e59cc6f40 | 1276 | * Bit Group Name: YH |
nikapov | 0:ec6e59cc6f40 | 1277 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1278 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1279 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1280 | LSM303AGR_ACC_YH_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1281 | LSM303AGR_ACC_YH_UP =0x08, |
nikapov | 0:ec6e59cc6f40 | 1282 | } LSM303AGR_ACC_YH_t; |
nikapov | 0:ec6e59cc6f40 | 1283 | |
nikapov | 0:ec6e59cc6f40 | 1284 | #define LSM303AGR_ACC_YH_MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 1285 | mems_status_t LSM303AGR_ACC_R_Int1_YHi(void *handle, LSM303AGR_ACC_YH_t *value); |
nikapov | 0:ec6e59cc6f40 | 1286 | mems_status_t LSM303AGR_ACC_R_Int2_YHi(void *handle, LSM303AGR_ACC_YH_t *value); |
nikapov | 0:ec6e59cc6f40 | 1287 | |
nikapov | 0:ec6e59cc6f40 | 1288 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1289 | * Register : INT1_SOURCE/INT2_SOURCE |
nikapov | 0:ec6e59cc6f40 | 1290 | * Address : 0X31/0x35 |
nikapov | 0:ec6e59cc6f40 | 1291 | * Bit Group Name: ZL |
nikapov | 0:ec6e59cc6f40 | 1292 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1293 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1294 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1295 | LSM303AGR_ACC_ZL_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1296 | LSM303AGR_ACC_ZL_UP =0x10, |
nikapov | 0:ec6e59cc6f40 | 1297 | } LSM303AGR_ACC_ZL_t; |
nikapov | 0:ec6e59cc6f40 | 1298 | |
nikapov | 0:ec6e59cc6f40 | 1299 | #define LSM303AGR_ACC_ZL_MASK 0x10 |
nikapov | 0:ec6e59cc6f40 | 1300 | mems_status_t LSM303AGR_ACC_R_Int1_Zlo(void *handle, LSM303AGR_ACC_ZL_t *value); |
nikapov | 0:ec6e59cc6f40 | 1301 | mems_status_t LSM303AGR_ACC_R_Int2_Zlo(void *handle, LSM303AGR_ACC_ZL_t *value); |
nikapov | 0:ec6e59cc6f40 | 1302 | |
nikapov | 0:ec6e59cc6f40 | 1303 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1304 | * Register : INT1_SOURCE/INT2_SOURCE |
nikapov | 0:ec6e59cc6f40 | 1305 | * Address : 0X31/0x35 |
nikapov | 0:ec6e59cc6f40 | 1306 | * Bit Group Name: ZH |
nikapov | 0:ec6e59cc6f40 | 1307 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1308 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1309 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1310 | LSM303AGR_ACC_ZH_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1311 | LSM303AGR_ACC_ZH_UP =0x20, |
nikapov | 0:ec6e59cc6f40 | 1312 | } LSM303AGR_ACC_ZH_t; |
nikapov | 0:ec6e59cc6f40 | 1313 | |
nikapov | 0:ec6e59cc6f40 | 1314 | #define LSM303AGR_ACC_ZH_MASK 0x20 |
nikapov | 0:ec6e59cc6f40 | 1315 | mems_status_t LSM303AGR_ACC_R_Int1_ZHi(void *handle, LSM303AGR_ACC_ZH_t *value); |
nikapov | 0:ec6e59cc6f40 | 1316 | mems_status_t LSM303AGR_ACC_R_Int2_ZHi(void *handle, LSM303AGR_ACC_ZH_t *value); |
nikapov | 0:ec6e59cc6f40 | 1317 | |
nikapov | 0:ec6e59cc6f40 | 1318 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1319 | * Register : INT1_SOURCE/INT2_SOURCE |
nikapov | 0:ec6e59cc6f40 | 1320 | * Address : 0X31/0x35 |
nikapov | 0:ec6e59cc6f40 | 1321 | * Bit Group Name: IA |
nikapov | 0:ec6e59cc6f40 | 1322 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1323 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1324 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1325 | LSM303AGR_ACC_IA_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1326 | LSM303AGR_ACC_IA_UP =0x40, |
nikapov | 0:ec6e59cc6f40 | 1327 | } LSM303AGR_ACC_IA_t; |
nikapov | 0:ec6e59cc6f40 | 1328 | |
nikapov | 0:ec6e59cc6f40 | 1329 | #define LSM303AGR_ACC_IA_MASK 0x40 |
nikapov | 0:ec6e59cc6f40 | 1330 | mems_status_t LSM303AGR_ACC_R_Int1_IA(void *handle, LSM303AGR_ACC_IA_t *value); |
nikapov | 0:ec6e59cc6f40 | 1331 | mems_status_t LSM303AGR_ACC_R_Int2_IA(void *handle, LSM303AGR_ACC_IA_t *value); |
nikapov | 0:ec6e59cc6f40 | 1332 | |
nikapov | 0:ec6e59cc6f40 | 1333 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1334 | * Register : INT1_THS/INT2_THS |
nikapov | 0:ec6e59cc6f40 | 1335 | * Address : 0X32/0x36 |
nikapov | 0:ec6e59cc6f40 | 1336 | * Bit Group Name: THS |
nikapov | 0:ec6e59cc6f40 | 1337 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1338 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1339 | #define LSM303AGR_ACC_THS_MASK 0x7F |
nikapov | 0:ec6e59cc6f40 | 1340 | #define LSM303AGR_ACC_THS_POSITION 0 |
nikapov | 0:ec6e59cc6f40 | 1341 | mems_status_t LSM303AGR_ACC_W_Int1_Threshold(void *handle, u8_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1342 | mems_status_t LSM303AGR_ACC_R_Int1_Threshold(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 1343 | mems_status_t LSM303AGR_ACC_W_Int2_Threshold(void *handle, u8_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1344 | mems_status_t LSM303AGR_ACC_R_Int2_Threshold(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 1345 | |
nikapov | 0:ec6e59cc6f40 | 1346 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1347 | * Register : INT1_DURATION/INT2_DURATION |
nikapov | 0:ec6e59cc6f40 | 1348 | * Address : 0X33/0x37 |
nikapov | 0:ec6e59cc6f40 | 1349 | * Bit Group Name: D |
nikapov | 0:ec6e59cc6f40 | 1350 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1351 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1352 | #define LSM303AGR_ACC_D_MASK 0x7F |
nikapov | 0:ec6e59cc6f40 | 1353 | #define LSM303AGR_ACC_D_POSITION 0 |
nikapov | 0:ec6e59cc6f40 | 1354 | mems_status_t LSM303AGR_ACC_W_Int1_Duration(void *handle, u8_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1355 | mems_status_t LSM303AGR_ACC_R_Int1_Duration(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 1356 | mems_status_t LSM303AGR_ACC_W_Int2_Duration(void *handle, u8_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1357 | mems_status_t LSM303AGR_ACC_R_Int2_Duration(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 1358 | |
nikapov | 0:ec6e59cc6f40 | 1359 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1360 | * Register : CLICK_CFG |
nikapov | 0:ec6e59cc6f40 | 1361 | * Address : 0X38 |
nikapov | 0:ec6e59cc6f40 | 1362 | * Bit Group Name: XS |
nikapov | 0:ec6e59cc6f40 | 1363 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1364 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1365 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1366 | LSM303AGR_ACC_XS_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1367 | LSM303AGR_ACC_XS_ENABLED =0x01, |
nikapov | 0:ec6e59cc6f40 | 1368 | } LSM303AGR_ACC_XS_t; |
nikapov | 0:ec6e59cc6f40 | 1369 | |
nikapov | 0:ec6e59cc6f40 | 1370 | #define LSM303AGR_ACC_XS_MASK 0x01 |
nikapov | 0:ec6e59cc6f40 | 1371 | mems_status_t LSM303AGR_ACC_W_XSingle(void *handle, LSM303AGR_ACC_XS_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1372 | mems_status_t LSM303AGR_ACC_R_XSingle(void *handle, LSM303AGR_ACC_XS_t *value); |
nikapov | 0:ec6e59cc6f40 | 1373 | |
nikapov | 0:ec6e59cc6f40 | 1374 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1375 | * Register : CLICK_CFG |
nikapov | 0:ec6e59cc6f40 | 1376 | * Address : 0X38 |
nikapov | 0:ec6e59cc6f40 | 1377 | * Bit Group Name: XD |
nikapov | 0:ec6e59cc6f40 | 1378 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1379 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1380 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1381 | LSM303AGR_ACC_XD_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1382 | LSM303AGR_ACC_XD_ENABLED =0x02, |
nikapov | 0:ec6e59cc6f40 | 1383 | } LSM303AGR_ACC_XD_t; |
nikapov | 0:ec6e59cc6f40 | 1384 | |
nikapov | 0:ec6e59cc6f40 | 1385 | #define LSM303AGR_ACC_XD_MASK 0x02 |
nikapov | 0:ec6e59cc6f40 | 1386 | mems_status_t LSM303AGR_ACC_W_XDouble(void *handle, LSM303AGR_ACC_XD_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1387 | mems_status_t LSM303AGR_ACC_R_XDouble(void *handle, LSM303AGR_ACC_XD_t *value); |
nikapov | 0:ec6e59cc6f40 | 1388 | |
nikapov | 0:ec6e59cc6f40 | 1389 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1390 | * Register : CLICK_CFG |
nikapov | 0:ec6e59cc6f40 | 1391 | * Address : 0X38 |
nikapov | 0:ec6e59cc6f40 | 1392 | * Bit Group Name: YS |
nikapov | 0:ec6e59cc6f40 | 1393 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1394 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1395 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1396 | LSM303AGR_ACC_YS_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1397 | LSM303AGR_ACC_YS_ENABLED =0x04, |
nikapov | 0:ec6e59cc6f40 | 1398 | } LSM303AGR_ACC_YS_t; |
nikapov | 0:ec6e59cc6f40 | 1399 | |
nikapov | 0:ec6e59cc6f40 | 1400 | #define LSM303AGR_ACC_YS_MASK 0x04 |
nikapov | 0:ec6e59cc6f40 | 1401 | mems_status_t LSM303AGR_ACC_W_YSingle(void *handle, LSM303AGR_ACC_YS_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1402 | mems_status_t LSM303AGR_ACC_R_YSingle(void *handle, LSM303AGR_ACC_YS_t *value); |
nikapov | 0:ec6e59cc6f40 | 1403 | |
nikapov | 0:ec6e59cc6f40 | 1404 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1405 | * Register : CLICK_CFG |
nikapov | 0:ec6e59cc6f40 | 1406 | * Address : 0X38 |
nikapov | 0:ec6e59cc6f40 | 1407 | * Bit Group Name: YD |
nikapov | 0:ec6e59cc6f40 | 1408 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1409 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1410 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1411 | LSM303AGR_ACC_YD_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1412 | LSM303AGR_ACC_YD_ENABLED =0x08, |
nikapov | 0:ec6e59cc6f40 | 1413 | } LSM303AGR_ACC_YD_t; |
nikapov | 0:ec6e59cc6f40 | 1414 | |
nikapov | 0:ec6e59cc6f40 | 1415 | #define LSM303AGR_ACC_YD_MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 1416 | mems_status_t LSM303AGR_ACC_W_YDouble(void *handle, LSM303AGR_ACC_YD_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1417 | mems_status_t LSM303AGR_ACC_R_YDouble(void *handle, LSM303AGR_ACC_YD_t *value); |
nikapov | 0:ec6e59cc6f40 | 1418 | |
nikapov | 0:ec6e59cc6f40 | 1419 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1420 | * Register : CLICK_CFG |
nikapov | 0:ec6e59cc6f40 | 1421 | * Address : 0X38 |
nikapov | 0:ec6e59cc6f40 | 1422 | * Bit Group Name: ZS |
nikapov | 0:ec6e59cc6f40 | 1423 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1424 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1425 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1426 | LSM303AGR_ACC_ZS_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1427 | LSM303AGR_ACC_ZS_ENABLED =0x10, |
nikapov | 0:ec6e59cc6f40 | 1428 | } LSM303AGR_ACC_ZS_t; |
nikapov | 0:ec6e59cc6f40 | 1429 | |
nikapov | 0:ec6e59cc6f40 | 1430 | #define LSM303AGR_ACC_ZS_MASK 0x10 |
nikapov | 0:ec6e59cc6f40 | 1431 | mems_status_t LSM303AGR_ACC_W_ZSingle(void *handle, LSM303AGR_ACC_ZS_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1432 | mems_status_t LSM303AGR_ACC_R_ZSingle(void *handle, LSM303AGR_ACC_ZS_t *value); |
nikapov | 0:ec6e59cc6f40 | 1433 | |
nikapov | 0:ec6e59cc6f40 | 1434 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1435 | * Register : CLICK_CFG |
nikapov | 0:ec6e59cc6f40 | 1436 | * Address : 0X38 |
nikapov | 0:ec6e59cc6f40 | 1437 | * Bit Group Name: ZD |
nikapov | 0:ec6e59cc6f40 | 1438 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1439 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1440 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1441 | LSM303AGR_ACC_ZD_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1442 | LSM303AGR_ACC_ZD_ENABLED =0x20, |
nikapov | 0:ec6e59cc6f40 | 1443 | } LSM303AGR_ACC_ZD_t; |
nikapov | 0:ec6e59cc6f40 | 1444 | |
nikapov | 0:ec6e59cc6f40 | 1445 | #define LSM303AGR_ACC_ZD_MASK 0x20 |
nikapov | 0:ec6e59cc6f40 | 1446 | mems_status_t LSM303AGR_ACC_W_ZDouble(void *handle, LSM303AGR_ACC_ZD_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1447 | mems_status_t LSM303AGR_ACC_R_ZDouble(void *handle, LSM303AGR_ACC_ZD_t *value); |
nikapov | 0:ec6e59cc6f40 | 1448 | |
nikapov | 0:ec6e59cc6f40 | 1449 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1450 | * Register : CLICK_SRC |
nikapov | 0:ec6e59cc6f40 | 1451 | * Address : 0X39 |
nikapov | 0:ec6e59cc6f40 | 1452 | * Bit Group Name: X |
nikapov | 0:ec6e59cc6f40 | 1453 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1454 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1455 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1456 | LSM303AGR_ACC_X_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1457 | LSM303AGR_ACC_X_UP =0x01, |
nikapov | 0:ec6e59cc6f40 | 1458 | } LSM303AGR_ACC_X_t; |
nikapov | 0:ec6e59cc6f40 | 1459 | |
nikapov | 0:ec6e59cc6f40 | 1460 | #define LSM303AGR_ACC_X_MASK 0x01 |
nikapov | 0:ec6e59cc6f40 | 1461 | mems_status_t LSM303AGR_ACC_R_ClickX(void *handle, LSM303AGR_ACC_X_t *value); |
nikapov | 0:ec6e59cc6f40 | 1462 | |
nikapov | 0:ec6e59cc6f40 | 1463 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1464 | * Register : CLICK_SRC |
nikapov | 0:ec6e59cc6f40 | 1465 | * Address : 0X39 |
nikapov | 0:ec6e59cc6f40 | 1466 | * Bit Group Name: Y |
nikapov | 0:ec6e59cc6f40 | 1467 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1468 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1469 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1470 | LSM303AGR_ACC_Y_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1471 | LSM303AGR_ACC_Y_UP =0x02, |
nikapov | 0:ec6e59cc6f40 | 1472 | } LSM303AGR_ACC_Y_t; |
nikapov | 0:ec6e59cc6f40 | 1473 | |
nikapov | 0:ec6e59cc6f40 | 1474 | #define LSM303AGR_ACC_Y_MASK 0x02 |
nikapov | 0:ec6e59cc6f40 | 1475 | mems_status_t LSM303AGR_ACC_R_ClickY(void *handle, LSM303AGR_ACC_Y_t *value); |
nikapov | 0:ec6e59cc6f40 | 1476 | |
nikapov | 0:ec6e59cc6f40 | 1477 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1478 | * Register : CLICK_SRC |
nikapov | 0:ec6e59cc6f40 | 1479 | * Address : 0X39 |
nikapov | 0:ec6e59cc6f40 | 1480 | * Bit Group Name: Z |
nikapov | 0:ec6e59cc6f40 | 1481 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1482 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1483 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1484 | LSM303AGR_ACC_Z_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1485 | LSM303AGR_ACC_Z_UP =0x04, |
nikapov | 0:ec6e59cc6f40 | 1486 | } LSM303AGR_ACC_Z_t; |
nikapov | 0:ec6e59cc6f40 | 1487 | |
nikapov | 0:ec6e59cc6f40 | 1488 | #define LSM303AGR_ACC_Z_MASK 0x04 |
nikapov | 0:ec6e59cc6f40 | 1489 | mems_status_t LSM303AGR_ACC_R_ClickZ(void *handle, LSM303AGR_ACC_Z_t *value); |
nikapov | 0:ec6e59cc6f40 | 1490 | |
nikapov | 0:ec6e59cc6f40 | 1491 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1492 | * Register : CLICK_SRC |
nikapov | 0:ec6e59cc6f40 | 1493 | * Address : 0X39 |
nikapov | 0:ec6e59cc6f40 | 1494 | * Bit Group Name: SIGN |
nikapov | 0:ec6e59cc6f40 | 1495 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1496 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1497 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1498 | LSM303AGR_ACC_SIGN_POSITIVE =0x00, |
nikapov | 0:ec6e59cc6f40 | 1499 | LSM303AGR_ACC_SIGN_NEGATIVE =0x08, |
nikapov | 0:ec6e59cc6f40 | 1500 | } LSM303AGR_ACC_SIGN_t; |
nikapov | 0:ec6e59cc6f40 | 1501 | |
nikapov | 0:ec6e59cc6f40 | 1502 | #define LSM303AGR_ACC_SIGN_MASK 0x08 |
nikapov | 0:ec6e59cc6f40 | 1503 | mems_status_t LSM303AGR_ACC_R_ClickSign(void *handle, LSM303AGR_ACC_SIGN_t *value); |
nikapov | 0:ec6e59cc6f40 | 1504 | |
nikapov | 0:ec6e59cc6f40 | 1505 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1506 | * Register : CLICK_SRC |
nikapov | 0:ec6e59cc6f40 | 1507 | * Address : 0X39 |
nikapov | 0:ec6e59cc6f40 | 1508 | * Bit Group Name: SCLICK |
nikapov | 0:ec6e59cc6f40 | 1509 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1510 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1511 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1512 | LSM303AGR_ACC_SCLICK_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1513 | LSM303AGR_ACC_SCLICK_ENABLED =0x10, |
nikapov | 0:ec6e59cc6f40 | 1514 | } LSM303AGR_ACC_SCLICK_t; |
nikapov | 0:ec6e59cc6f40 | 1515 | |
nikapov | 0:ec6e59cc6f40 | 1516 | #define LSM303AGR_ACC_SCLICK_MASK 0x10 |
nikapov | 0:ec6e59cc6f40 | 1517 | mems_status_t LSM303AGR_ACC_R_SingleCLICK(void *handle, LSM303AGR_ACC_SCLICK_t *value); |
nikapov | 0:ec6e59cc6f40 | 1518 | |
nikapov | 0:ec6e59cc6f40 | 1519 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1520 | * Register : CLICK_SRC |
nikapov | 0:ec6e59cc6f40 | 1521 | * Address : 0X39 |
nikapov | 0:ec6e59cc6f40 | 1522 | * Bit Group Name: DCLICK |
nikapov | 0:ec6e59cc6f40 | 1523 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1524 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1525 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1526 | LSM303AGR_ACC_DCLICK_DISABLED =0x00, |
nikapov | 0:ec6e59cc6f40 | 1527 | LSM303AGR_ACC_DCLICK_ENABLED =0x20, |
nikapov | 0:ec6e59cc6f40 | 1528 | } LSM303AGR_ACC_DCLICK_t; |
nikapov | 0:ec6e59cc6f40 | 1529 | |
nikapov | 0:ec6e59cc6f40 | 1530 | #define LSM303AGR_ACC_DCLICK_MASK 0x20 |
nikapov | 0:ec6e59cc6f40 | 1531 | mems_status_t LSM303AGR_ACC_R_DoubleCLICK(void *handle, LSM303AGR_ACC_DCLICK_t *value); |
nikapov | 0:ec6e59cc6f40 | 1532 | |
nikapov | 0:ec6e59cc6f40 | 1533 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1534 | * Register : CLICK_SRC |
nikapov | 0:ec6e59cc6f40 | 1535 | * Address : 0X39 |
nikapov | 0:ec6e59cc6f40 | 1536 | * Bit Group Name: IA |
nikapov | 0:ec6e59cc6f40 | 1537 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1538 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1539 | typedef enum { |
nikapov | 0:ec6e59cc6f40 | 1540 | LSM303AGR_ACC_CLICK_IA_DOWN =0x00, |
nikapov | 0:ec6e59cc6f40 | 1541 | LSM303AGR_ACC_CLICK_IA_UP =0x40, |
nikapov | 0:ec6e59cc6f40 | 1542 | } LSM303AGR_ACC_CLICK_IA_t; |
nikapov | 0:ec6e59cc6f40 | 1543 | |
nikapov | 0:ec6e59cc6f40 | 1544 | #define LSM303AGR_ACC_IA_MASK 0x40 |
nikapov | 0:ec6e59cc6f40 | 1545 | mems_status_t LSM303AGR_ACC_R_CLICK_IA(void *handle, LSM303AGR_ACC_CLICK_IA_t *value); |
nikapov | 0:ec6e59cc6f40 | 1546 | |
nikapov | 0:ec6e59cc6f40 | 1547 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1548 | * Register : CLICK_THS |
nikapov | 0:ec6e59cc6f40 | 1549 | * Address : 0X3A |
nikapov | 0:ec6e59cc6f40 | 1550 | * Bit Group Name: THS |
nikapov | 0:ec6e59cc6f40 | 1551 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1552 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1553 | #define LSM303AGR_ACC_THS_MASK 0x7F |
nikapov | 0:ec6e59cc6f40 | 1554 | #define LSM303AGR_ACC_THS_POSITION 0 |
nikapov | 0:ec6e59cc6f40 | 1555 | mems_status_t LSM303AGR_ACC_W_ClickThreshold(void *handle, u8_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1556 | mems_status_t LSM303AGR_ACC_R_ClickThreshold(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 1557 | |
nikapov | 0:ec6e59cc6f40 | 1558 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1559 | * Register : TIME_LIMIT |
nikapov | 0:ec6e59cc6f40 | 1560 | * Address : 0X3B |
nikapov | 0:ec6e59cc6f40 | 1561 | * Bit Group Name: TLI |
nikapov | 0:ec6e59cc6f40 | 1562 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1563 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1564 | #define LSM303AGR_ACC_TLI_MASK 0x7F |
nikapov | 0:ec6e59cc6f40 | 1565 | #define LSM303AGR_ACC_TLI_POSITION 0 |
nikapov | 0:ec6e59cc6f40 | 1566 | mems_status_t LSM303AGR_ACC_W_ClickTimeLimit(void *handle, u8_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1567 | mems_status_t LSM303AGR_ACC_R_ClickTimeLimit(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 1568 | |
nikapov | 0:ec6e59cc6f40 | 1569 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1570 | * Register : TIME_LATENCY |
nikapov | 0:ec6e59cc6f40 | 1571 | * Address : 0X3C |
nikapov | 0:ec6e59cc6f40 | 1572 | * Bit Group Name: TLA |
nikapov | 0:ec6e59cc6f40 | 1573 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1574 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1575 | #define LSM303AGR_ACC_TLA_MASK 0xFF |
nikapov | 0:ec6e59cc6f40 | 1576 | #define LSM303AGR_ACC_TLA_POSITION 0 |
nikapov | 0:ec6e59cc6f40 | 1577 | mems_status_t LSM303AGR_ACC_W_ClickTimeLatency(void *handle, u8_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1578 | mems_status_t LSM303AGR_ACC_R_ClickTimeLatency(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 1579 | |
nikapov | 0:ec6e59cc6f40 | 1580 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1581 | * Register : TIME_WINDOW |
nikapov | 0:ec6e59cc6f40 | 1582 | * Address : 0X3D |
nikapov | 0:ec6e59cc6f40 | 1583 | * Bit Group Name: TW |
nikapov | 0:ec6e59cc6f40 | 1584 | * Permission : RW |
nikapov | 0:ec6e59cc6f40 | 1585 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1586 | #define LSM303AGR_ACC_TW_MASK 0xFF |
nikapov | 0:ec6e59cc6f40 | 1587 | #define LSM303AGR_ACC_TW_POSITION 0 |
nikapov | 0:ec6e59cc6f40 | 1588 | mems_status_t LSM303AGR_ACC_W_ClickTimeWindow(void *handle, u8_t newValue); |
nikapov | 0:ec6e59cc6f40 | 1589 | mems_status_t LSM303AGR_ACC_R_ClickTimeWindow(void *handle, u8_t *value); |
nikapov | 0:ec6e59cc6f40 | 1590 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1591 | * Register : <REGISTER_L> - <REGISTER_H> |
nikapov | 0:ec6e59cc6f40 | 1592 | * Output Type : Voltage_ADC |
nikapov | 0:ec6e59cc6f40 | 1593 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1594 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1595 | mems_status_t LSM303AGR_ACC_Get_Voltage_ADC(void *handle, u8_t *buff); |
nikapov | 0:ec6e59cc6f40 | 1596 | /******************************************************************************* |
nikapov | 0:ec6e59cc6f40 | 1597 | * Register : <REGISTER_L> - <REGISTER_H> |
nikapov | 0:ec6e59cc6f40 | 1598 | * Output Type : Acceleration |
nikapov | 0:ec6e59cc6f40 | 1599 | * Permission : RO |
nikapov | 0:ec6e59cc6f40 | 1600 | *******************************************************************************/ |
nikapov | 0:ec6e59cc6f40 | 1601 | mems_status_t LSM303AGR_ACC_Get_Raw_Acceleration(void *handle, u8_t *buff); |
nikapov | 0:ec6e59cc6f40 | 1602 | mems_status_t LSM303AGR_ACC_Get_Acceleration(void *handle, int *buff); |
nikapov | 0:ec6e59cc6f40 | 1603 | |
nikapov | 0:ec6e59cc6f40 | 1604 | #ifdef __cplusplus |
nikapov | 0:ec6e59cc6f40 | 1605 | } |
nikapov | 0:ec6e59cc6f40 | 1606 | #endif |
nikapov | 0:ec6e59cc6f40 | 1607 | |
nikapov | 0:ec6e59cc6f40 | 1608 | #endif |