NXP
The MCR20A Wireless UART application functions as an wireless UART bridge between two (one-to-one) or several (one to many) boards. The application can be used with both a TERM, or with software that is capable of opening a serial port and writing to or reading from it. The characters sent or received are not necessarily ASCII printable characters.
Dependencies: fsl_phy_mcr20a fsl_smac mbed-rtos mbed
Fork of
mcr20_wireless_uart
by 
Freescale
By default, the application uses broadcast addresses for OTA communication. This way, the application can be directly downloaded and run without any user intervention. The following use case assumes no changes have been done to the project.
- Two (or more) MCR20A platforms (plugged into the FRDM-K64F Freescale Freedom Development platform) have to be connected to the PC using the mini/micro-USB cables.
- The code must be downloaded on the platforms via CMSIS-DAP (or other means).
- After that, two or more TERM applications must be opened, and the serial ports must be configured with the same baud rate as the one in the project (default baud rate is 115200). Other necessary serial configurations are 8 bit, no parity, and 1 stop bit.
- To start the setup, each platform must be reset, and one of the (user) push buttons found on the MCR20A platform must be pressed. The user can press any of the non-reset buttons on the FRDM-K64F Freescale Freedom Development platform as well. *This initiates the state machine of the application so user can start.
Documentation
SMAC Demo Applications User Guide
Revision 15:990a8b5664e1, committed 2015-03-15
- Comitter:
- FSL\B36402
- Date:
- Sun Mar 15 00:56:28 2015 -0500
- Parent:
- 14:a1b249761bcc
- Child:
- 16:549f2f246ece
- Commit message:
- Integrated PHY version from the official K64F+MCR20A package
Changed in this revision
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/ASP.c Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,946 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file ASP.c
+* This is the source file for the ASP module.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+
+#include "Phy.h"
+#include "PhyInterface.h"
+#include "MpmInterface.h"
+#include "AspInterface.h"
+
+#if 0
+#include "MemManager.h"
+#include "FunctionLib.h"
+#include "Panic.h"
+#endif
+
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+
+#if gFsciIncluded_c
+#include "FsciInterface.h"
+#include "FsciCommands.h"
+#include "FsciCommunication.h"
+#endif
+
+#if gAspCapability_d
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+#define mFAD_THR_ResetValue 0x82
+#define mANT_AGC_CTRL_ResetValue 0x40
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+//MCR20 DTS modes
+enum {
+ gDtsNormal_c,
+ gDtsTxOne_c,
+ gDtsTxZero_c,
+ gDtsTx2Mhz_c,
+ gDtsTx200Khz_c,
+ gDtsTx1MbpsPRBS9_c,
+ gDtsTxExternalSrc_c,
+ gDtsTxRandomSeq_c
+};
+
+/************************************************************************************
+*************************************************************************************
+* Private functions prototype
+*************************************************************************************
+************************************************************************************/
+phyStatus_t AspSetDtsMode( uint8_t mode );
+phyStatus_t AspEnableBER( void );
+void AspDisableBER( void );
+
+#if gFsciIncluded_c
+static void fsciAspReqHandler(void *pData, void* param, uint32_t interfaceId);
+static void AspSapMonitor(void *pData, void* param, uint32_t interfaceId);
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+//2405 2410 2415 2420 2425 2430 2435 2440 2445 2450 2455 2460 2465 2470 2475 2480
+static const uint16_t asp_pll_frac[16] = {0x2400, 0x4C00, 0x7400, 0x9C00, 0xC400, 0xEC00, 0x1400, 0x3C00, 0x6400, 0x8C00, 0xB400, 0xDC00, 0x0400, 0x2C00, 0x5400, 0x7C00};
+
+#if gFsciIncluded_c
+static uint8_t mAspFsciBinding[gPhyInstancesCnt_c];
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief Initialize the ASP module
+*
+* \param[in] phyInstance The instance of the PHY
+* \param[in] interfaceId The Serial Manager interface used
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 0
+void ASP_Init( instanceId_t phyInstance, uint8_t interfaceId )
+{
+#if gFsciIncluded_c
+ if( phyInstance < gPhyInstancesCnt_c )
+ {
+ mAspFsciBinding[phyInstance] = interfaceId;
+ FSCI_RegisterOpGroup( gFSCI_AppAspOpcodeGroup_c, gFsciMonitorMode_c, fsciAspReqHandler, NULL, gAspInterfaceId);
+ FSCI_RegisterOpGroup( gFSCI_AspSapId_c, gFsciMonitorMode_c, AspSapMonitor, NULL, gAspInterfaceId);
+ }
+#endif
+}
+
+/*! *********************************************************************************
+* \brief ASP SAP handler.
+*
+* \param[in] pMsg Pointer to the request message
+* \param[in] instanceId The instance of the PHY
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 1
+AspStatus_t APP_ASP_SapHandler(AppToAspMessage_t *pMsg, instanceId_t instanceId)
+{
+ AspStatus_t status = gAspSuccess_c;
+#if gFsciIncluded_c
+ FSCI_Monitor( gFSCI_AspSapId_c,
+ pMsg,
+ NULL,
+ gAspInterfaceId );
+#endif
+ switch( pMsg->msgType )
+ {
+ case aspMsgTypeGetTimeReq_c:
+ Asp_GetTimeReq((uint32_t*)&pMsg->msgData.aspGetTimeReq.time);
+ break;
+ case aspMsgTypeXcvrWriteReq_c:
+ status = Asp_XcvrWriteReq( pMsg->msgData.aspXcvrData.mode,
+ pMsg->msgData.aspXcvrData.addr,
+ pMsg->msgData.aspXcvrData.len,
+ pMsg->msgData.aspXcvrData.data);
+ break;
+ case aspMsgTypeXcvrReadReq_c:
+ status = Asp_XcvrReadReq( pMsg->msgData.aspXcvrData.mode,
+ pMsg->msgData.aspXcvrData.addr,
+ pMsg->msgData.aspXcvrData.len,
+ pMsg->msgData.aspXcvrData.data);
+ break;
+ case aspMsgTypeSetFADState_c:
+ status = Asp_SetFADState(pMsg->msgData.aspFADState);
+ break;
+ case aspMsgTypeSetFADThreshold_c:
+ status = Asp_SetFADThreshold(pMsg->msgData.aspFADThreshold);
+ break;
+ case aspMsgTypeSetANTXState_c:
+ status = Asp_SetANTXState(pMsg->msgData.aspANTXState);
+ break;
+ case aspMsgTypeGetANTXState_c:
+ *((uint8_t*)&status) = Asp_GetANTXState();
+ break;
+ case aspMsgTypeSetPowerLevel_c:
+ status = Asp_SetPowerLevel(pMsg->msgData.aspSetPowerLevelReq.powerLevel);
+ break;
+ case aspMsgTypeGetPowerLevel_c:
+ *((uint8_t*)&status) = Asp_GetPowerLevel(); //remove compiler warning
+ break;
+ case aspMsgTypeTelecSetFreq_c:
+ status = ASP_TelecSetFreq(pMsg->msgData.aspTelecsetFreq.channel);
+ break;
+ case aspMsgTypeTelecSendRawData_c:
+ status = ASP_TelecSendRawData((uint8_t*)&pMsg->msgData.aspTelecSendRawData);
+ break;
+ case aspMsgTypeTelecTest_c:
+ status = ASP_TelecTest(pMsg->msgData.aspTelecTest.mode);
+ break;
+ case aspMsgTypeSetLQIMode_c:
+ status = Asp_SetLQIMode(pMsg->msgData.aspLQIMode);
+ break;
+ case aspMsgTypeGetRSSILevel_c:
+ *((uint8_t*)&status) = Asp_GetRSSILevel(); //remove compiler warning
+ break;
+#if gMpmIncluded_d
+ case aspMsgTypeSetMpmConfig_c:
+ MPM_SetConfig(&pMsg->msgData.MpmConfig);
+ break;
+ case aspMsgTypeGetMpmConfig_c:
+ MPM_GetConfig(&pMsg->msgData.MpmConfig);
+ break;
+#endif
+ default:
+ status = gAspInvalidRequest_c;// OR gAspInvalidParameter_c
+ break;
+ }
+#if gFsciIncluded_c
+ FSCI_Monitor( gFSCI_AspSapId_c,
+ pMsg,
+ (void*)&status,
+ gAspInterfaceId );
+#endif
+ return status;
+}
+
+/*! *********************************************************************************
+* \brief Returns the current PHY time
+*
+* \param[in] time location where the PHY time will be stored
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 2
+void Asp_GetTimeReq(uint32_t *time)
+{
+ PhyTimeReadClock( time );
+}
+
+/*! *********************************************************************************
+* \brief Write XCVR registers
+*
+* \param[in] mode Direct/Indirect access
+* \param[in] addr XCVR address
+* \param[in] len number of bytes to write
+* \param[in] pData data o be written
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 3
+AspStatus_t Asp_XcvrWriteReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData)
+{
+ if (mode)
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t)addr, pData, len);
+ else
+ MCR20Drv_DirectAccessSPIMultiByteWrite((uint8_t)addr, pData, len);
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Read XCVR registers
+*
+* \param[in] mode Direct/Indirect access
+* \param[in] addr XCVR address
+* \param[in] len number of bytes to read
+* \param[in] pData location where data will be stored
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 4
+AspStatus_t Asp_XcvrReadReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData)
+{
+ if (mode)
+ MCR20Drv_IndirectAccessSPIMultiByteRead((uint8_t)addr, pData, len);
+ else
+ MCR20Drv_DirectAccessSPIMultiByteRead((uint8_t)addr, pData, len);
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set Tx output power level
+*
+* \param[in] powerLevel The new power level: 0x03-0x1F (see documentation for details)
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 5
+AspStatus_t Asp_SetPowerLevel( uint8_t powerLevel )
+{
+ if(powerLevel > gAspPowerLevel_16dBm)
+ return gAspInvalidParameter_c;
+
+ {
+ uint8_t res;
+
+ res = PhyPlmeSetPwrLevelRequest(powerLevel);
+
+ if( res == gPhySuccess_c )
+ {
+ return gAspSuccess_c;
+ }
+ else
+ {
+ return gAspDenied_c;
+ }
+ }
+}
+
+/*! *********************************************************************************
+* \brief Read the current Tx power level
+*
+* \return power level
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 6
+uint8_t Asp_GetPowerLevel()
+{
+ return MCR20Drv_DirectAccessSPIRead(PA_PWR);
+}
+
+/*! *********************************************************************************
+* \brief Set the state of Active Promiscuous functionality
+*
+* \param[in] state new state
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 7
+AspStatus_t Asp_SetActivePromState(bool_t state)
+{
+ PhySetActivePromiscuous(state);
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set the state of Fast Antenna Diversity functionality
+*
+* \param[in] state new state
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 8
+AspStatus_t Asp_SetFADState(bool_t state)
+{
+ if( gPhySuccess_c != PhyPlmeSetFADStateRequest(state) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set the Fast Antenna Diversity threshold
+*
+* \param[in] threshold
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 9
+AspStatus_t Asp_SetFADThreshold(uint8_t threshold)
+{
+ if( gPhySuccess_c != PhyPlmeSetFADThresholdRequest(threshold) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX functionality
+*
+* \param[in] state
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 10
+AspStatus_t Asp_SetANTXState(bool_t state)
+{
+ if( gPhySuccess_c != PhyPlmeSetANTXStateRequest(state) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Get the ANTX functionality
+*
+* \return current state
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 11
+uint8_t Asp_GetANTXState(void)
+{
+ return PhyPlmeGetANTXStateRequest();
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX pad state
+*
+* \param[in] antAB_on
+* \param[in] rxtxSwitch_on
+*
+* \return status
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 12
+uint8_t Asp_SetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on)
+{
+ return PhyPlmeSetANTPadStateRequest(antAB_on, rxtxSwitch_on);
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX pad strength
+*
+* \param[in] hiStrength
+*
+* \return status
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 13
+uint8_t Asp_SetANTPadStrengthRequest(bool_t hiStrength)
+{
+ return PhyPlmeSetANTPadStrengthRequest(hiStrength);
+}
+
+/*! *********************************************************************************
+* \brief Set the ANTX inverted pads
+*
+* \param[in] invAntA invert Ant_A pad
+* \param[in] invAntB invert Ant_B pad
+* \param[in] invTx invert Tx pad
+* \param[in] invRx invert Rx pad
+*
+* \return status
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 14
+uint8_t Asp_SetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx)
+{
+ return PhyPlmeSetANTPadInvertedRequest(invAntA, invAntB, invTx, invRx);
+}
+
+/*! *********************************************************************************
+* \brief Set the LQI mode
+*
+* \param[in] mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 15
+AspStatus_t Asp_SetLQIMode(bool_t mode)
+{
+ if( gPhySuccess_c != PhyPlmeSetLQIModeRequest(mode) )
+ {
+ return gAspDenied_c;
+ }
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Get the last RSSI level
+*
+* \return RSSI
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 16
+uint8_t Asp_GetRSSILevel(void)
+{
+ return PhyPlmeGetRSSILevelRequest();
+}
+
+/*! *********************************************************************************
+* \brief Set current channel
+*
+* \param[in] channel channel number (11-26)
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 17
+AspStatus_t ASP_TelecSetFreq(uint8_t channel)
+{
+ PhyPlmeForceTrxOffRequest();
+ if( gPhySuccess_c != PhyPlmeSetCurrentChannelRequest(channel,0) )
+ {
+ return gAspInvalidParameter_c;
+ }
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Send a raw data frame OTA
+*
+* \param[in] dataPtr raw data
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 18
+AspStatus_t ASP_TelecSendRawData(uint8_t* dataPtr)
+{
+ uint8_t phyReg;
+
+ dataPtr[0] += 2; /* Add FCS length to PSDU Length*/
+
+ // Validate the length
+ if(dataPtr[0] > gMaxPHYPacketSize_c)
+ return gAspTooLong_c;
+
+ //Force Idle
+ PhyPlmeForceTrxOffRequest();
+ AspSetDtsMode(gDtsNormal_c);
+ AspDisableBER();
+ // Load the TX PB: load the PSDU Lenght byte but not the FCS bytes
+ MCR20Drv_PB_SPIBurstWrite(dataPtr, dataPtr[0] + 1 - 2);
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Set Telec test mode
+*
+* \param[in] mode Telec test mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 19
+AspStatus_t ASP_TelecTest(uint8_t mode)
+{
+ uint8_t phyReg;
+ static uint8_t aTxContModPattern[2];
+ uint8_t channel;
+ static bool_t fracSet = FALSE;
+
+ // Get current channel number
+ channel = PhyPlmeGetCurrentChannelRequest(0);
+
+ if( fracSet )
+ {
+ ASP_TelecSetFreq(channel);
+ fracSet = FALSE;
+ }
+
+ switch( mode )
+ {
+ case gTestForceIdle_c: //ForceIdle();
+ PhyPlmeForceTrxOffRequest();
+
+ AspSetDtsMode(gDtsNormal_c);
+ AspDisableBER();
+ break;
+
+ case gTestPulseTxPrbs9_c: // Continuously transmit a PRBS9 pattern.
+ // PLME_PRBS9_Load (); // Load the TX RAM
+ AspSetDtsMode(gDtsTxRandomSeq_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Start Tx packet mode with no interrupt on end
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousRx_c: // Sets the device into continuous RX mode
+ AspSetDtsMode(gDtsNormal_c);
+ //Enable continuous RX mode
+ AspEnableBER();
+ // Set length of data in DUAL_PAN_DWELL register
+ MCR20Drv_IndirectAccessSPIWrite(DUAL_PAN_DWELL, 127);
+ // Start Rx packet mode with no interrupt on end
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gRX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxMod_c: // Sets the device to continuously transmit a 10101010 pattern
+ AspSetDtsMode(gDtsNormal_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ //Prepare TX operation
+ aTxContModPattern[0] = 1;
+ aTxContModPattern[1] = 0xAA;
+ // Load the TX PB
+ MCR20Drv_PB_SPIBurstWrite(aTxContModPattern, aTxContModPattern[0] + 1);
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxNoMod_c: // Sets the device to continuously transmit an unmodulated CW
+ //Enable unmodulated TX
+ AspSetDtsMode(gDtsTxOne_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PLL_FRAC0_LSB, (uint8_t *) &asp_pll_frac[channel - 11], 2);
+ fracSet = TRUE;
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTx2Mhz_c:
+ AspSetDtsMode(gDtsTx2Mhz_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTx200Khz_c:
+ AspSetDtsMode(gDtsTx200Khz_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTx1MbpsPRBS9_c:
+ AspSetDtsMode(gDtsTx1MbpsPRBS9_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxExternalSrc_c:
+ AspSetDtsMode(gDtsTxExternalSrc_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxNoModZero_c:
+ //Enable unmodulated TX
+ AspSetDtsMode(gDtsTxZero_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+
+ case gTestContinuousTxNoModOne_c:
+ //Enable unmodulated TX
+ AspSetDtsMode(gDtsTxOne_c);
+ //Enable continuous TX mode
+ AspEnableBER();
+ // Program a Tx sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= gTX_c;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+ break;
+ }
+
+ return gAspSuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Return the instance of the PHY associated with the FSCI interface
+*
+* \param[in] interfaceId FSCI interface
+*
+* \return insance
+*
+********************************************************************************** */
+#if gFsciIncluded_c
+#undef mFuncId_c
+#define mFuncId_c 20
+static uint32_t getPhyInstance( uint32_t interfaceId )
+{
+ uint32_t i;
+
+ for( i=0; i<gPhyInstancesCnt_c; i++ )
+ if( mAspFsciBinding[i] == interfaceId )
+ return i;
+
+ return 0;
+}
+
+/*! *********************************************************************************
+* \brief Handle ASP requests received from FSCI
+*
+* \param[in] pData monitored message
+* \param[in] param
+* \param[in] interfaceId FSCI interface
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 21
+static void fsciAspReqHandler(void *pData, void* param, uint32_t interfaceId)
+{
+ clientPacket_t *pClientPacket = ((clientPacket_t*)pData);
+ uint8_t *pMsg = pClientPacket->structured.payload;
+
+ pMsg -= sizeof(AppAspMsgType_t);
+ ((AppToAspMessage_t*)pMsg)->msgType = (AppAspMsgType_t)pClientPacket->structured.header.opCode;
+
+ APP_ASP_SapHandler( (AppToAspMessage_t*)pMsg, getPhyInstance( interfaceId ) );
+ //MEM_BufferFree(pData);
+ free(pData);
+}
+
+/*! *********************************************************************************
+* \brief Monitor the ASP Requests and Responses
+*
+* \param[in] pData monitored message
+* \param[in] param
+* \param[in] interfaceId FSCI interface
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+#undef mFuncId_c
+#define mFuncId_c 22
+static void AspSapMonitor(void *pData, void* param, uint32_t interfaceId)
+{
+ //clientPacket_t *pFsciPacket = MEM_BufferAlloc( sizeof(clientPacket_t) );
+ clientPacket_t *pFsciPacket = (clientPacket_t *)malloc( sizeof(clientPacket_t) );
+ AppToAspMessage_t *pReq = (AppToAspMessage_t*)pData;
+ uint8_t *p;
+
+ if( NULL == pFsciPacket )
+ {
+ FSCI_Error( gFsciOutOfMessages_c, interfaceId );
+ return;
+ }
+
+ p = pFsciPacket->structured.payload;
+
+ if( NULL == param ) // Requests
+ {
+ pFsciPacket->structured.header.opGroup = gFSCI_AppAspOpcodeGroup_c;
+ pFsciPacket->structured.header.opCode = pReq->msgType;
+
+ switch( pReq->msgType )
+ {
+ case aspMsgTypeGetTimeReq_c:
+ break;
+ case aspMsgTypeXcvrWriteReq_c:
+ case aspMsgTypeXcvrReadReq_c:
+ *p++ = pReq->msgData.aspXcvrData.mode;
+ *((uint16_t*)p) = pReq->msgData.aspXcvrData.addr;
+ p += sizeof(uint16_t);
+ *p++ = pReq->msgData.aspXcvrData.len;
+ if( pReq->msgType == aspMsgTypeXcvrWriteReq_c )
+ {
+ FLib_MemCpy( p, pReq->msgData.aspXcvrData.data,
+ pReq->msgData.aspXcvrData.len );
+ p += pReq->msgData.aspXcvrData.len;
+ }
+ break;
+ case aspMsgTypeSetFADState_c:
+ FLib_MemCpy( p, &pReq->msgData.aspFADState, sizeof(pReq->msgData.aspFADState) );
+ p += sizeof(pReq->msgData.aspFADState);
+ break;
+ case aspMsgTypeSetFADThreshold_c:
+ FLib_MemCpy( p, &pReq->msgData.aspFADThreshold, sizeof(pReq->msgData.aspFADThreshold) );
+ p += sizeof(pReq->msgData.aspFADThreshold);
+ break;
+ case aspMsgTypeSetANTXState_c:
+ FLib_MemCpy( p, &pReq->msgData.aspANTXState, sizeof(pReq->msgData.aspANTXState) );
+ p += sizeof(pReq->msgData.aspANTXState);
+ break;
+ case aspMsgTypeGetANTXState_c:
+ /* Nothing to do here */
+ break;
+
+ case aspMsgTypeSetPowerLevel_c:
+ FLib_MemCpy( p, &pReq->msgData.aspSetPowerLevelReq, sizeof(pReq->msgData.aspSetPowerLevelReq) );
+ p += sizeof(pReq->msgData.aspSetPowerLevelReq);
+ break;
+ case aspMsgTypeGetPowerLevel_c:
+ /* Nothing to do here */
+ break;
+ case aspMsgTypeTelecSetFreq_c:
+ FLib_MemCpy( p, &pReq->msgData.aspTelecsetFreq, sizeof(pReq->msgData.aspTelecsetFreq) );
+ p += sizeof(pReq->msgData.aspTelecsetFreq);
+ break;
+ case aspMsgTypeTelecSendRawData_c:
+ FLib_MemCpy( p, &pReq->msgData.aspTelecSendRawData, sizeof(pReq->msgData.aspTelecSendRawData) );
+ p += sizeof(pReq->msgData.aspTelecSendRawData);
+ break;
+ case aspMsgTypeTelecTest_c:
+ FLib_MemCpy( p, &pReq->msgData.aspTelecTest, sizeof(pReq->msgData.aspTelecTest) );
+ p += sizeof(pReq->msgData.aspTelecTest);
+ break;
+ case aspMsgTypeSetLQIMode_c:
+ FLib_MemCpy(p, &pReq->msgData.aspLQIMode, sizeof(pReq->msgData.aspLQIMode) );
+ p += sizeof(pReq->msgData.aspLQIMode);
+ break;
+ case aspMsgTypeGetRSSILevel_c:
+ /* Nothing to do here */
+ break;
+ }
+ }
+ else // Confirms / Indications
+ {
+ pFsciPacket->structured.header.opGroup = gFSCI_AspAppOpcodeGroup_c;
+ pFsciPacket->structured.header.opCode = pReq->msgType;
+
+ *p++ = *((uint8_t*)param);/* copy status */
+
+ switch( pReq->msgType )
+ {
+ case aspMsgTypeGetTimeReq_c:
+ FLib_MemCpy( p, &pReq->msgData.aspGetTimeReq.time , sizeof(aspEventReq_t) );
+ p += sizeof(aspEventReq_t);
+ break;
+ case aspMsgTypeGetMpmConfig_c:
+ FLib_MemCpy( p, &pReq->msgData.MpmConfig , sizeof(mpmConfig_t) );
+ p += sizeof(mpmConfig_t);
+ break;
+ case aspMsgTypeXcvrReadReq_c:
+ *p++ = pReq->msgData.aspXcvrData.len; /* copy length */
+ FLib_MemCpy( p, pReq->msgData.aspXcvrData.data, pReq->msgData.aspXcvrData.len );
+ p += pReq->msgData.aspXcvrData.len;
+ break;
+ }
+
+ }
+
+ /* Send data over the serial interface */
+ pFsciPacket->structured.header.len = (fsciLen_t)(p - pFsciPacket->structured.payload);
+
+ if ( pFsciPacket->structured.header.len )
+ FSCI_transmitFormatedPacket( pFsciPacket, interfaceId );
+ else
+ //MEM_BufferFree( pFsciPacket );
+ free(pFsciPacket);
+}
+
+#endif /* gFsciIncluded_c */
+
+
+ /*! *********************************************************************************
+* \brief Set the Tx data source selector
+*
+* \param[in] mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+phyStatus_t AspSetDtsMode(uint8_t mode)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(TX_MODE_CTRL);
+ phyReg &= ~cTX_MODE_CTRL_DTS_MASK; // Clear DTS_MODE
+ phyReg |= mode; // Set new DTS_MODE
+ MCR20Drv_IndirectAccessSPIWrite(TX_MODE_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Enable XCVR test mode
+*
+* \return AspStatus_t
+*
+********************************************************************************** */
+phyStatus_t AspEnableBER()
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(DTM_CTRL1);
+ phyReg |= cDTM_CTRL1_DTM_EN;
+ MCR20Drv_IndirectAccessSPIWrite(DTM_CTRL1, phyReg);
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(TESTMODE_CTRL);
+ phyReg |= cTEST_MODE_CTRL_CONTINUOUS_EN | cTEST_MODE_CTRL_IDEAL_PFC_EN;
+ MCR20Drv_IndirectAccessSPIWrite(TESTMODE_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief Disable XCVR test mode
+*
+********************************************************************************** */
+void AspDisableBER()
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(DTM_CTRL1);
+ phyReg &= ~cDTM_CTRL1_DTM_EN;
+ MCR20Drv_IndirectAccessSPIWrite(DTM_CTRL1, phyReg);
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(TESTMODE_CTRL);
+ phyReg &= ~(cTEST_MODE_CTRL_CONTINUOUS_EN | cTEST_MODE_CTRL_IDEAL_PFC_EN);
+ MCR20Drv_IndirectAccessSPIWrite(TESTMODE_CTRL, phyReg);
+}
+
+
+#endif /* gAspCapability_d */
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/AspInterface.h Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,358 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file ASP.h
+* This is a header file for the ASP module.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __ASP_H__
+#define __ASP_H__
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+#include "PhyInterface.h"
+#include "MpmInterface.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+/* Enable/Disable the ASP module */
+#ifndef gAspCapability_d
+#ifndef gPHY_802_15_4g_d
+#define gAspCapability_d (1)
+#else
+#define gAspCapability_d (0)
+#endif // gPHY_802_15_4g_d
+#endif // gAspCapability_d
+
+#define gAspInterfaceId (0)
+
+/* Allowed ASP Power Levels */
+#define gAspPowerLevel_m40dBm_c (uint8_t)gAspPowerLevel_m40dBm
+#define gAspPowerLevel_m38dBm_c (uint8_t)gAspPowerLevel_m38dBm
+#define gAspPowerLevel_m36dBm_c (uint8_t)gAspPowerLevel_m36dBm
+#define gAspPowerLevel_m34dBm_c (uint8_t)gAspPowerLevel_m34dBm
+#define gAspPowerLevel_m32dBm_c (uint8_t)gAspPowerLevel_m32dBm
+#define gAspPowerLevel_m30dBm_c (uint8_t)gAspPowerLevel_m30dBm
+#define gAspPowerLevel_m28dBm_c (uint8_t)gAspPowerLevel_m28dBm
+#define gAspPowerLevel_m26dBm_c (uint8_t)gAspPowerLevel_m26dBm
+#define gAspPowerLevel_m24dBm_c (uint8_t)gAspPowerLevel_m24dBm
+#define gAspPowerLevel_m22dBm_c (uint8_t)gAspPowerLevel_m22dBm
+#define gAspPowerLevel_m20dBm_c (uint8_t)gAspPowerLevel_m20dBm
+#define gAspPowerLevel_m18dBm_c (uint8_t)gAspPowerLevel_m18dBm
+#define gAspPowerLevel_m16dBm_c (uint8_t)gAspPowerLevel_m16dBm
+#define gAspPowerLevel_m14dBm_c (uint8_t)gAspPowerLevel_m14dBm
+#define gAspPowerLevel_m12dBm_c (uint8_t)gAspPowerLevel_m12dBm
+#define gAspPowerLevel_m10dBm_c (uint8_t)gAspPowerLevel_m10dBm
+#define gAspPowerLevel_m8dBm_c (uint8_t)gAspPowerLevel_m8dBm
+#define gAspPowerLevel_m6dBm_c (uint8_t)gAspPowerLevel_m6dBm
+#define gAspPowerLevel_m4dBm_c (uint8_t)gAspPowerLevel_m4dBm
+#define gAspPowerLevel_m2dBm_c (uint8_t)gAspPowerLevel_m2dBm
+#define gAspPowerLevel_0dBm_c (uint8_t)gAspPowerLevel_0dBm
+#define gAspPowerLevel_2dBm_c (uint8_t)gAspPowerLevel_2dBm
+#define gAspPowerLevel_4dBm_c (uint8_t)gAspPowerLevel_4dBm
+#define gAspPowerLevel_6dBm_c (uint8_t)gAspPowerLevel_6dBm
+#define gAspPowerLevel_8dBm_c (uint8_t)gAspPowerLevel_8dBm
+#define gAspPowerLevel_10dBm_c (uint8_t)gAspPowerLevel_10dBm
+#define gAspPowerLevel_12dBm_c (uint8_t)gAspPowerLevel_12dBm
+#define gAspPowerLevel_14dBm_c (uint8_t)gAspPowerLevel_14dBm
+#define gAspPowerLevel_16dBm_c (uint8_t)gAspPowerLevel_16dBm
+
+/* OpGroup codes used with FSCI */
+#define gFSCI_AspAppOpcodeGroup_c 0x94 /* ASP_APP_SapHandler */
+#define gFSCI_AppAspOpcodeGroup_c 0x95 /* APP_ASP_SapHandler */
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+/* ASP status messages */
+typedef enum{
+ gAspSuccess_c = 0x00,
+ gAspInvalidRequest_c = 0xC2,
+ gAspDenied_c = 0xE2,
+ gAspTooLong_c = 0xE5,
+ gAspInvalidParameter_c = 0xE8
+}AspStatus_t;
+
+/* Supported Power Levels */
+enum {
+ gAspPowerLevel_m40dBm = 0x03,
+ gAspPowerLevel_m38dBm = 0x04,
+ gAspPowerLevel_m36dBm = 0x05,
+ gAspPowerLevel_m34dBm = 0x06,
+ gAspPowerLevel_m32dBm = 0x07,
+ gAspPowerLevel_m30dBm = 0x08,
+ gAspPowerLevel_m28dBm = 0x09,
+ gAspPowerLevel_m26dBm = 0x0A,
+ gAspPowerLevel_m24dBm = 0x0B,
+ gAspPowerLevel_m22dBm = 0x0C,
+ gAspPowerLevel_m20dBm = 0x0D,
+ gAspPowerLevel_m18dBm = 0x0E,
+ gAspPowerLevel_m16dBm = 0x0F,
+ gAspPowerLevel_m14dBm = 0x10,
+ gAspPowerLevel_m12dBm = 0x11,
+ gAspPowerLevel_m10dBm = 0x12,
+ gAspPowerLevel_m8dBm = 0x13,
+ gAspPowerLevel_m6dBm = 0x14,
+ gAspPowerLevel_m4dBm = 0x15,
+ gAspPowerLevel_m2dBm = 0x16,
+ gAspPowerLevel_0dBm = 0x17,
+ gAspPowerLevel_2dBm = 0x18,
+ gAspPowerLevel_4dBm = 0x19,
+ gAspPowerLevel_6dBm = 0x1A,
+ gAspPowerLevel_8dBm = 0x1B,
+ gAspPowerLevel_10dBm = 0x1C,
+ gAspPowerLevel_12dBm = 0x1D,
+ gAspPowerLevel_14dBm = 0x1E,
+ gAspPowerLevel_16dBm = 0x1F
+};
+
+/* Radio test modes */
+enum {
+ gTestForceIdle_c = 0,
+ gTestPulseTxPrbs9_c = 1,
+ gTestContinuousRx_c = 2,
+ gTestContinuousTxMod_c = 3,
+ gTestContinuousTxNoMod_c = 4,
+ gTestContinuousTx2Mhz_c = 5,
+ gTestContinuousTx200Khz_c = 6,
+ gTestContinuousTx1MbpsPRBS9_c = 7,
+ gTestContinuousTxExternalSrc_c = 8,
+ gTestContinuousTxNoModZero_c = 9,
+ gTestContinuousTxNoModOne_c = 10
+};
+
+/* This enum matches with the FSCI OpCode used by ASP*/
+typedef enum {
+ aspMsgTypeGetTimeReq_c = 0x00,
+ aspMsgTypeGetInactiveTimeReq_c = 0x01,
+ aspMsgTypeGetMacStateReq_c = 0x02,
+ aspMsgTypeDozeReq_c = 0x03,
+ aspMsgTypeAutoDozeReq_c = 0x04,
+ aspMsgTypeAcomaReq_c = 0x05,
+ aspMsgTypeHibernateReq_c = 0x06,
+ aspMsgTypeWakeReq_c = 0x07,
+ aspMsgTypeEventReq_c = 0x08,
+ aspMsgTypeClkoReq_c = 0x09,
+ aspMsgTypeTrimReq_c = 0x0A,
+ aspMsgTypeDdrReq_c = 0x0B,
+ aspMsgTypePortReq_c = 0x0C,
+ aspMsgTypeSetMinDozeTimeReq_c = 0x0D,
+ aspMsgTypeSetNotifyReq_c = 0x0E,
+ aspMsgTypeSetPowerLevel_c = 0x0F,
+ aspMsgTypeGetPowerLevel_c = 0x1F,
+ aspMsgTypeTelecTest_c = 0x10,
+ aspMsgTypeTelecSetFreq_c = 0x11,
+ aspMsgTypeGetInactiveTimeCnf_c = 0x12,
+ aspMsgTypeGetMacStateCnf_c = 0x13,
+ aspMsgTypeDozeCnf_c = 0x14,
+ aspMsgTypeAutoDozeCnf_c = 0x15,
+ aspMsgTypeTelecSendRawData_c = 0x16,
+ aspMsgTypeSetFADState_c = 0x17,
+ aspMsgTypeSetFADThreshold_c = 0x18,
+ aspMsgTypeGetFADThreshold_c = 0x19,
+ aspMsgTypeGetFADState_c = 0x1A,
+ aspMsgTypeSetActivePromState_c = 0x1B,
+ aspMsgTypeXcvrWriteReq_c = 0x1C,
+ aspMsgTypeXcvrReadReq_c = 0x1D,
+ aspMsgTypeSetANTXState_c = 0x20,
+ aspMsgTypeGetANTXState_c = 0x21,
+ aspMsgTypeSetLQIMode_c = 0x22,
+ aspMsgTypeGetRSSILevel_c = 0x23,
+ aspMsgTypeSetMpmConfig_c = 0x24,
+ aspMsgTypeGetMpmConfig_c = 0x25
+}AppAspMsgType_t;
+
+typedef PACKED_STRUCT aspEventReq_tag
+{ /* AspEvent.Request */
+ uint32_t eventTime;
+} aspEventReq_t;
+
+typedef PACKED_STRUCT aspGetTimeReq_tag
+{ /* AspGetTime.Request */
+ uint32_t time;
+} aspGetTimeReq_t;
+
+typedef PACKED_STRUCT aspSetNotifyReq_tag
+{ /* AspSetNotify.Request */
+ uint8_t notifications;
+} aspSetNotifyReq_t;
+
+
+typedef PACKED_STRUCT aspSetPowerLevelReq_tag
+{ /* AspSetPowerLevel.Request */
+ uint8_t powerLevel;
+} aspSetPowerLevelReq_t;
+
+
+typedef PACKED_STRUCT aspGetPowerLevelReq_tag
+{ /* AspGetPowerLevel.Request */
+ uint8_t powerLevel;
+} aspGetPowerLevelReq_t;
+
+
+typedef PACKED_STRUCT aspTelecTest_tag
+{ /* AspTelecTest.Request */
+ uint8_t mode;
+} aspTelecTest_t;
+
+
+typedef PACKED_STRUCT aspTelecsetFreq_tag
+{ /* AspTelecSetFreq.Request */
+ uint8_t channel;
+} aspTelecsetFreq_t;
+
+
+typedef PACKED_STRUCT aspTelecSendRawData_tag
+{ /* AspTelecSendRawData.Request */
+ uint8_t length;
+ uint8_t* dataPtr;
+} aspTelecSendRawData_t;
+
+ /* AspSetFADThreshold.Request */
+typedef uint8_t aspFADThreshold_t;
+ /* AspSetLQIMode.Request */
+typedef uint8_t aspLQIMode_t;
+
+typedef PACKED_STRUCT aspXcvrReq_tag
+{ /* AspXcvrWrite.Request / AspXcvrRead.Request */
+ uint8_t mode;
+ uint16_t addr;
+ uint8_t len;
+ uint8_t data[4]; /* more than 4 bytes can be read/written */
+} aspXcvrReq_t;
+
+
+typedef PACKED_STRUCT AppToAspMessage_tag
+{
+ AppAspMsgType_t msgType;
+ PACKED_UNION
+ {
+ aspEventReq_t aspEventReq;
+ aspGetTimeReq_t aspGetTimeReq;
+ aspSetPowerLevelReq_t aspSetPowerLevelReq;
+ aspGetPowerLevelReq_t aspGetPowerLevelReq;
+ aspTelecTest_t aspTelecTest;
+ aspTelecsetFreq_t aspTelecsetFreq;
+ aspTelecSendRawData_t aspTelecSendRawData;
+ aspFADThreshold_t aspFADThreshold;
+ bool_t aspFADState;
+ bool_t aspANTXState;
+ aspLQIMode_t aspLQIMode;
+ bool_t aspActivePromState;
+ aspXcvrReq_t aspXcvrData;
+ mpmConfig_t MpmConfig;
+ }msgData;
+} AppToAspMessage_t;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+#if gAspCapability_d
+
+void ASP_Init( instanceId_t phyInstance, uint8_t interfaceId );
+
+AspStatus_t APP_ASP_SapHandler(AppToAspMessage_t *pMsg, instanceId_t instanceId);
+
+void Asp_GetTimeReq(uint32_t *time);
+
+AspStatus_t Asp_XcvrWriteReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData);
+AspStatus_t Asp_XcvrReadReq (uint8_t mode, uint16_t addr, uint8_t len, uint8_t* pData);
+
+AspStatus_t Asp_SetPowerLevel(uint8_t powerLevel);
+uint8_t Asp_GetPowerLevel(void);
+
+AspStatus_t Asp_SetActivePromState(bool_t state);
+
+AspStatus_t Asp_SetFADState(bool_t state);
+AspStatus_t Asp_SetFADThreshold(uint8_t thresholdFAD);
+
+AspStatus_t Asp_SetANTXState(bool_t state);
+uint8_t Asp_GetANTXState(void);
+uint8_t Asp_SetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on);
+uint8_t Asp_SetANTPadStrengthRequest(bool_t hiStrength);
+uint8_t Asp_SetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx);
+
+AspStatus_t Asp_SetLQIMode(bool_t mode);
+uint8_t Asp_GetRSSILevel(void);
+
+AspStatus_t ASP_TelecSetFreq (uint8_t channel);
+AspStatus_t ASP_TelecSendRawData(uint8_t* dataPtr);
+AspStatus_t ASP_TelecTest (uint8_t mode);
+
+#else /* gAspCapability_d */
+
+#define ASP_Init(phyInstance,interfaceId)
+#define Asp_GetTimeReq(time)
+
+#define APP_ASP_SapHandler(pMsg) (gAspDenied_c)
+#define Asp_XcvrWriteReq(mode, addr, len, pData) (gAspDenied_c)
+#define Asp_XcvrReadReq(mode, addr, len, pData) (gAspDenied_c)
+#define Asp_SetPowerLevel(powerLevel) (gAspDenied_c)
+#define Asp_SetActivePromState(state) (gAspDenied_c)
+#define Asp_SetFADState(state) (gAspDenied_c)
+#define Asp_SetFADThreshold(thresholdFAD) (gAspDenied_c)
+#define Asp_SetANTXState(state) (gAspDenied_c)
+#define Asp_SetLQIMode(mode) (gAspDenied_c)
+#define ASP_TelecSetFreq(channel) (gAspDenied_c)
+#define ASP_TelecSendRawData(dataPtr) (gAspDenied_c)
+#define ASP_TelecTest(mode) (gAspDenied_c)
+
+#define Asp_GetPowerLevel() (0)
+#define Asp_GetANTXState() (0)
+#define Asp_GetRSSILevel() (0)
+#endif /* gAspCapability_d */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__ASP_H__ */
\ No newline at end of file
--- a/RF_Drivers_Freescale/EmbeddedTypes.h Sun Mar 08 04:19:44 2015 +0000 +++ b/RF_Drivers_Freescale/EmbeddedTypes.h Sun Mar 15 00:56:28 2015 -0500 @@ -100,4 +100,3 @@ #endif /* _EMBEDDEDTYPES_H_ */ -
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/MCR20Drv/MCR20Drv.c Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,736 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MCR20Drv.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/*****************************************************************************
+* INCLUDED HEADERS *
+*---------------------------------------------------------------------------*
+* Add to this section all the headers that this module needs to include. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+
+#include "XcvrSpi.h"
+#include "arm_hal_interrupt.h"
+
+/*****************************************************************************
+* PRIVATE VARIABLES *
+*---------------------------------------------------------------------------*
+* Add to this section all the variables and constants that have local *
+* (file) scope. *
+* Each of this declarations shall be preceded by the 'static' keyword. *
+* These variables / constants cannot be accessed outside this module. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+static uint32_t mPhyIrqDisableCnt = 1;
+
+/*****************************************************************************
+* PUBLIC VARIABLES *
+*---------------------------------------------------------------------------*
+* Add to this section all the variables and constants that have global *
+* (project) scope. *
+* These variables / constants can be accessed outside this module. *
+* These variables / constants shall be preceded by the 'extern' keyword in *
+* the interface header. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*****************************************************************************
+* PRIVATE FUNCTIONS PROTOTYPES *
+*---------------------------------------------------------------------------*
+* Add to this section all the functions prototypes that have local (file) *
+* scope. *
+* These functions cannot be accessed outside this module. *
+* These declarations shall be preceded by the 'static' keyword. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*****************************************************************************
+* PRIVATE FUNCTIONS *
+*---------------------------------------------------------------------------*
+* Add to this section all the functions that have local (file) scope. *
+* These functions cannot be accessed outside this module. *
+* These definitions shall be preceded by the 'static' keyword. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+
+/*****************************************************************************
+* PUBLIC FUNCTIONS *
+*---------------------------------------------------------------------------*
+* Add to this section all the functions that have global (project) scope. *
+* These functions can be accessed outside this module. *
+* These functions shall have their declarations (prototypes) within the *
+* interface header file and shall be preceded by the 'extern' keyword. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_Init
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_Init
+(
+void
+)
+{
+ spi_master_init(gXcvrSpiInstance_c);
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrDeassertCS_d();
+ MCR20Drv_RST_B_Deassert();
+ //MCR20Drv_RESET();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_DirectAccessSPIWrite
+(
+uint8_t address,
+uint8_t value
+)
+{
+ uint16_t txData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (address & TransceiverSPI_DirectRegisterAddressMask);
+ txData |= value << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t *)&txData, NULL, sizeof(txData));
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIMultiByteWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_DirectAccessSPIMultiByteWrite
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask);
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_PB_SPIByteWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_PB_SPIByteWrite
+(
+uint8_t address,
+uint8_t value
+)
+{
+ uint32_t txData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_WriteSelect |
+ TransceiverSPI_PacketBuffAccessSelect |
+ TransceiverSPI_PacketBuffByteModeSelect;
+ txData |= (address) << 8;
+ txData |= (value) << 16;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_PB_SPIBurstWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_PB_SPIBurstWrite
+(
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_WriteSelect |
+ TransceiverSPI_PacketBuffAccessSelect |
+ TransceiverSPI_PacketBuffBurstModeSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, 1);
+ spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+
+uint8_t MCR20Drv_DirectAccessSPIRead
+(
+uint8_t address
+)
+{
+ uint8_t txData;
+ uint8_t rxData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (address & TransceiverSPI_DirectRegisterAddressMask) |
+ TransceiverSPI_ReadSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData));
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return rxData;
+
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_DirectAccessSPIMultyByteRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint8_t MCR20Drv_DirectAccessSPIMultiByteRead
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+ uint8_t phyIRQSTS1;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return 0;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask) |
+ TransceiverSPI_ReadSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return phyIRQSTS1;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_PB_SPIBurstRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint8_t MCR20Drv_PB_SPIBurstRead
+(
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint8_t txData;
+ uint8_t phyIRQSTS1;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return 0;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_ReadSelect |
+ TransceiverSPI_PacketBuffAccessSelect |
+ TransceiverSPI_PacketBuffBurstModeSelect;
+
+ spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return phyIRQSTS1;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IndirectAccessSPIWrite
+(
+uint8_t address,
+uint8_t value
+)
+{
+ uint32_t txData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_IARIndexReg;
+ txData |= (address) << 8;
+ txData |= (value) << 16;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIMultiByteWrite
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IndirectAccessSPIMultiByteWrite
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint16_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_IARIndexReg;
+ txData |= (startAddress) << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)byteArray, NULL, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint8_t MCR20Drv_IndirectAccessSPIRead
+(
+uint8_t address
+)
+{
+ uint16_t txData;
+ uint8_t rxData;
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect;
+ txData |= (address) << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData));
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+
+ return rxData;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IndirectAccessSPIMultiByteRead
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IndirectAccessSPIMultiByteRead
+(
+uint8_t startAddress,
+uint8_t * byteArray,
+uint8_t numOfBytes
+)
+{
+ uint16_t txData;
+
+ if( (numOfBytes == 0) || (byteArray == NULL) )
+ {
+ return;
+ }
+
+ ProtectFromMCR20Interrupt();
+
+ spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
+
+ gXcvrAssertCS_d();
+
+ txData = (TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect);
+ txData |= (startAddress) << 8;
+
+ spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
+ spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
+
+ gXcvrDeassertCS_d();
+ UnprotectFromMCR20Interrupt();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_PortConfig
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_PortConfig
+(
+void
+)
+{
+#if 0
+ PORT_HAL_SetMuxMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
+ GPIO_EXTRACT_PIN(kGpioXcvrIrqPin),
+ kPortMuxAsGpio);
+ GPIO_DRV_InputPinInit(&mXcvrIrqPinCfg);
+#endif
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IsIrqPending
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint32_t MCR20Drv_IsIrqPending
+(
+void
+)
+{
+ if( !RF_isIRQ_Pending() )
+ {
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_Disable
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_Disable
+(
+void
+)
+{
+ arm_enter_critical();
+
+ if( mPhyIrqDisableCnt == 0 )
+ {
+ RF_IRQ_Disable();
+ }
+
+ mPhyIrqDisableCnt++;
+
+ arm_exit_critical();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_Enable
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_Enable
+(
+void
+)
+{
+ arm_enter_critical();
+
+ if( mPhyIrqDisableCnt )
+ {
+ mPhyIrqDisableCnt--;
+
+ if( mPhyIrqDisableCnt == 0 )
+ {
+ RF_IRQ_Enable();
+ }
+ }
+
+ arm_exit_critical();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_IsEnabled
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+uint32_t MCR20Drv_IRQ_IsEnabled
+(
+void
+)
+{
+
+#if 0
+ port_interrupt_config_t mode;
+
+ mode = PORT_HAL_GetPinIntMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
+ GPIO_EXTRACT_PIN(kGpioXcvrIrqPin));
+ return (mode != kPortIntDisabled);
+#endif
+ return 0;
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_IRQ_Clear
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_IRQ_Clear
+(
+void
+)
+{
+ //GPIO_DRV_ClearPinIntFlag(kGpioXcvrIrqPin);
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_RST_Assert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_RST_B_Assert
+(
+void
+)
+{
+ RF_RST_Set(0);
+ //GPIO_DRV_ClearPinOutput(kGpioXcvrResetPin);
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_RST_Deassert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_RST_B_Deassert
+(
+void
+)
+{
+ RF_RST_Set(1);
+ //GPIO_DRV_SetPinOutput(kGpioXcvrResetPin);
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_SoftRST_Assert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_SoftRST_Assert
+(
+void
+)
+{
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80));
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_SoftRST_Deassert
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_SoftRST_Deassert
+(
+void
+)
+{
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00));
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_Soft_RESET
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_Soft_RESET
+(
+void
+)
+{
+ //assert SOG_RST
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80));
+
+ //deassert SOG_RST
+ MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00));
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_RESET
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_RESET
+(
+void
+)
+{
+ volatile uint32_t delay = 1000;
+ //assert RST_B
+ MCR20Drv_RST_B_Assert();
+
+ // TODO
+ while(delay--);
+
+ //deassert RST_B
+ MCR20Drv_RST_B_Deassert();
+}
+
+/*---------------------------------------------------------------------------
+* Name: MCR20Drv_Set_CLK_OUT_Freq
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void MCR20Drv_Set_CLK_OUT_Freq
+(
+uint8_t freqDiv
+)
+{
+ uint8_t clkOutCtrlReg = (freqDiv & cCLK_OUT_DIV_Mask) | cCLK_OUT_EN | cCLK_OUT_EXTEND;
+
+ if(freqDiv == gCLK_OUT_FREQ_DISABLE)
+ {
+ clkOutCtrlReg = (cCLK_OUT_EXTEND | gCLK_OUT_FREQ_4_MHz); //reset value with clock out disabled
+ }
+
+ MCR20Drv_DirectAccessSPIWrite((uint8_t) CLK_OUT_CTRL, clkOutCtrlReg);
+}
--- a/RF_Drivers_Freescale/MCR20Drv/MCR20Drv.h Sun Mar 08 04:19:44 2015 +0000
+++ b/RF_Drivers_Freescale/MCR20Drv/MCR20Drv.h Sun Mar 15 00:56:28 2015 -0500
@@ -33,9 +33,6 @@
#ifndef __MCR20_DRV_H__
#define __MCR20_DRV_H__
-#ifdef __cplusplus
-extern "C" {
-#endif
/*****************************************************************************
* INCLUDED HEADERS *
@@ -46,8 +43,7 @@
*---------------------------------------------------------------------------*
*****************************************************************************/
-//#include "EmbeddedTypes.h"
-#include <stdint.h>
+#include "EmbeddedTypes.h"
/*****************************************************************************
* PRIVATE MACROS *
@@ -406,8 +402,4 @@
#define ProtectFromMCR20Interrupt() MCR20Drv_IRQ_Disable()
#define UnprotectFromMCR20Interrupt() MCR20Drv_IRQ_Enable()
-#ifdef __cplusplus
-}
-#endif
-
#endif /* __MCR20_DRV_H__ */
--- a/RF_Drivers_Freescale/MCR20Drv/MCR20Drv_c.txt Sun Mar 08 04:19:44 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,801 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file MCR20Drv.c
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-
-/*****************************************************************************
-* INCLUDED HEADERS *
-*---------------------------------------------------------------------------*
-* Add to this section all the headers that this module needs to include. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-#include "MCR20Drv.h"
-#include "MCR20Reg.h"
-
-#include "EmbeddedTypes.h"
-
-#include <string.h>
-
-#include "low_level_RF.h"
-#include "arm_hal_interrupt.h"
-
-//#include "arm_hal_phy.h"
-//#include "driverRFPhy.h"
-//#include "driverAtmelRFInterface.h"
-//#include "low_level_RF.h"
-
-//#include "SPI.h"
-//#include "fsl_gpio_driver.h"
-//#include "fsl_os_abstraction.h"
-
-/*****************************************************************************
-* PRIVATE VARIABLES *
-*---------------------------------------------------------------------------*
-* Add to this section all the variables and constants that have local *
-* (file) scope. *
-* Each of this declarations shall be preceded by the 'static' keyword. *
-* These variables / constants cannot be accessed outside this module. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-uint8_t gXcvrSpiInstance_c = 0;
-
-static uint32_t mPhyIrqDisableCnt = 1;
-
-void spi_master_init(uint32_t instance)
-{
-}
-
-void spi_master_configure_speed(uint32_t instance, uint32_t freq)
-{
- spi_speed(freq);
-}
-
-void gXcvrAssertCS_d(void) {
- RF_CS_Set(0);
-}
-
-void gXcvrDeassertCS_d(void) {
- RF_CS_Set(1);
-}
-
-#if 0
-/* GPIO configuration */
-const gpio_output_pin_user_config_t mXcvrSpiCsCfg = {
- .pinName = kGpioXcvrSpiCsPin,
- .config.outputLogic = 1,
- .config.slewRate = kPortFastSlewRate,
- #if FSL_FEATURE_PORT_HAS_OPEN_DRAIN
- .config.isOpenDrainEnabled = false,
- #endif
- .config.driveStrength = kPortLowDriveStrength,
-};
-
-const gpio_input_pin_user_config_t mXcvrIrqPinCfg = {
- .pinName = kGpioXcvrIrqPin,
- .config.isPullEnable = false,
- .config.pullSelect = kPortPullDown,
- .config.isPassiveFilterEnabled = false,
- .config.interrupt = kPortIntDisabled
-};
-#endif
-
-/*****************************************************************************
-* PUBLIC VARIABLES *
-*---------------------------------------------------------------------------*
-* Add to this section all the variables and constants that have global *
-* (project) scope. *
-* These variables / constants can be accessed outside this module. *
-* These variables / constants shall be preceded by the 'extern' keyword in *
-* the interface header. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-/*****************************************************************************
-* PRIVATE FUNCTIONS PROTOTYPES *
-*---------------------------------------------------------------------------*
-* Add to this section all the functions prototypes that have local (file) *
-* scope. *
-* These functions cannot be accessed outside this module. *
-* These declarations shall be preceded by the 'static' keyword. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-/*****************************************************************************
-* PRIVATE FUNCTIONS *
-*---------------------------------------------------------------------------*
-* Add to this section all the functions that have local (file) scope. *
-* These functions cannot be accessed outside this module. *
-* These definitions shall be preceded by the 'static' keyword. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-
-/*****************************************************************************
-* PUBLIC FUNCTIONS *
-*---------------------------------------------------------------------------*
-* Add to this section all the functions that have global (project) scope. *
-* These functions can be accessed outside this module. *
-* These functions shall have their declarations (prototypes) within the *
-* interface header file and shall be preceded by the 'extern' keyword. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_Init
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_Init
-(
-void
-)
-{
-#if 0
- spi_master_init(gXcvrSpiInstance_c);
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- /* Override SPI CS pin function. Set pin as GPIO */
- PORT_HAL_SetMuxMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrSpiCsPin)],
- GPIO_EXTRACT_PIN(kGpioXcvrSpiCsPin),
- kPortMuxAsGpio);
- GPIO_DRV_OutputPinInit(&mXcvrSpiCsCfg);
- gXcvrDeassertCS_d();
-#endif
-
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_DirectAccessSPIWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_DirectAccessSPIWrite
-(
-uint8_t address,
-uint8_t value
-)
-{
- uint16_t txData;
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = (address & TransceiverSPI_DirectRegisterAddressMask);
- txData |= value << 8;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t *)&txData, NULL, sizeof(txData));
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_DirectAccessSPIMultiByteWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_DirectAccessSPIMultiByteWrite
-(
-uint8_t startAddress,
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint8_t txData;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask);
-
- spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_PB_SPIByteWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_PB_SPIByteWrite
-(
-uint8_t address,
-uint8_t value
-)
-{
- uint32_t txData;
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_WriteSelect |
- TransceiverSPI_PacketBuffAccessSelect |
- TransceiverSPI_PacketBuffByteModeSelect;
- txData |= (address) << 8;
- txData |= (value) << 16;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_PB_SPIBurstWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_PB_SPIBurstWrite
-(
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint8_t txData;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_WriteSelect |
- TransceiverSPI_PacketBuffAccessSelect |
- TransceiverSPI_PacketBuffBurstModeSelect;
-
- spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, 1);
- spi_master_transfer(gXcvrSpiInstance_c, byteArray, NULL, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_DirectAccessSPIRead
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-
-uint8_t MCR20Drv_DirectAccessSPIRead
-(
-uint8_t address
-)
-{
- uint8_t txData;
- uint8_t rxData;
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- gXcvrAssertCS_d();
-
- txData = (address & TransceiverSPI_DirectRegisterAddressMask) |
- TransceiverSPI_ReadSelect;
-
- spi_master_transfer(gXcvrSpiInstance_c, &txData, NULL, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData));
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-
- return rxData;
-
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_DirectAccessSPIMultyByteRead
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-uint8_t MCR20Drv_DirectAccessSPIMultiByteRead
-(
-uint8_t startAddress,
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint8_t txData;
- uint8_t phyIRQSTS1;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return 0;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- gXcvrAssertCS_d();
-
- txData = (startAddress & TransceiverSPI_DirectRegisterAddressMask) |
- TransceiverSPI_ReadSelect;
-
- spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-
- return phyIRQSTS1;
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_PB_SPIBurstRead
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-uint8_t MCR20Drv_PB_SPIBurstRead
-(
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint8_t txData;
- uint8_t phyIRQSTS1;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return 0;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_ReadSelect |
- TransceiverSPI_PacketBuffAccessSelect |
- TransceiverSPI_PacketBuffBurstModeSelect;
-
- spi_master_transfer(gXcvrSpiInstance_c, &txData, &phyIRQSTS1, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-
- return phyIRQSTS1;
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IndirectAccessSPIWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IndirectAccessSPIWrite
-(
-uint8_t address,
-uint8_t value
-)
-{
- uint32_t txData;
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_IARIndexReg;
- txData |= (address) << 8;
- txData |= (value) << 16;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, 3);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IndirectAccessSPIMultiByteWrite
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IndirectAccessSPIMultiByteWrite
-(
-uint8_t startAddress,
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint16_t txData;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 16000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_IARIndexReg;
- txData |= (startAddress) << 8;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)byteArray, NULL, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IndirectAccessSPIRead
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-uint8_t MCR20Drv_IndirectAccessSPIRead
-(
-uint8_t address
-)
-{
- uint16_t txData;
- uint8_t rxData;
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- gXcvrAssertCS_d();
-
- txData = TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect;
- txData |= (address) << 8;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, NULL, &rxData, sizeof(rxData));
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-
- return rxData;
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IndirectAccessSPIMultiByteRead
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IndirectAccessSPIMultiByteRead
-(
-uint8_t startAddress,
-uint8_t * byteArray,
-uint8_t numOfBytes
-)
-{
- uint16_t txData;
-
- if( (numOfBytes == 0) || (byteArray == NULL) )
- {
- return;
- }
-
- ProtectFromMCR20Interrupt();
-
- spi_master_configure_speed(gXcvrSpiInstance_c, 8000000);
-
- gXcvrAssertCS_d();
-
- txData = (TransceiverSPI_IARIndexReg | TransceiverSPI_ReadSelect);
- txData |= (startAddress) << 8;
-
- spi_master_transfer(gXcvrSpiInstance_c, (uint8_t*)&txData, NULL, sizeof(txData));
- spi_master_transfer(gXcvrSpiInstance_c, NULL, byteArray, numOfBytes);
-
- gXcvrDeassertCS_d();
- UnprotectFromMCR20Interrupt();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IRQ_PortConfig
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IRQ_PortConfig
-(
-void
-)
-{
-#if 0
- PORT_HAL_SetMuxMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
- GPIO_EXTRACT_PIN(kGpioXcvrIrqPin),
- kPortMuxAsGpio);
- GPIO_DRV_InputPinInit(&mXcvrIrqPinCfg);
-#endif
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IsIrqPending
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-uint32_t MCR20Drv_IsIrqPending
-(
-void
-)
-{
-#if 0
- if( GPIO_DRV_ReadPinInput(kGpioXcvrIrqPin) )
- {
- return FALSE;
- }
- return TRUE;
-#endif
- return TRUE;
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IRQ_Disable
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IRQ_Disable // TODO
-(
-void
-)
-{
- arm_enter_critical();
-
- if( mPhyIrqDisableCnt == 0 )
- {
-// PORT_HAL_SetPinIntMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
-// GPIO_EXTRACT_PIN(kGpioXcvrIrqPin),
-// kPortIntDisabled);
- }
-
- mPhyIrqDisableCnt++;
-
- arm_exit_critical();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IRQ_Enable
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IRQ_Enable // TODO
-(
-void
-)
-{
- arm_enter_critical();
-
- if( mPhyIrqDisableCnt )
- {
- mPhyIrqDisableCnt--;
-
- if( mPhyIrqDisableCnt == 0 )
- {
-// PORT_HAL_SetPinIntMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
-// GPIO_EXTRACT_PIN(kGpioXcvrIrqPin),
-// kPortIntLogicZero);
- }
- }
-
- arm_exit_critical();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IRQ_IsEnabled
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-uint32_t MCR20Drv_IRQ_IsEnabled
-(
-void
-)
-{
-#if 0
- port_interrupt_config_t mode;
-
- mode = PORT_HAL_GetPinIntMode(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)],
- GPIO_EXTRACT_PIN(kGpioXcvrIrqPin));
- return (mode != kPortIntDisabled);
-#endif
- return 0;
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_IRQ_Clear
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_IRQ_Clear
-(
-void
-)
-{
- // GPIO_DRV_ClearPinIntFlag(kGpioXcvrIrqPin);
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_RST_Assert
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_RST_B_Assert
-(
-void
-)
-{
- //GPIO_DRV_ClearPinOutput(kGpioXcvrResetPin);
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_RST_Deassert
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_RST_B_Deassert
-(
-void
-)
-{
- //GPIO_DRV_SetPinOutput(kGpioXcvrResetPin);
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_SoftRST_Assert
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_SoftRST_Assert
-(
-void
-)
-{
- MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80));
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_SoftRST_Deassert
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_SoftRST_Deassert
-(
-void
-)
-{
- MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00));
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_Soft_RESET
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_Soft_RESET
-(
-void
-)
-{
- //assert SOG_RST
- MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x80));
-
- //deassert SOG_RST
- MCR20Drv_IndirectAccessSPIWrite(SOFT_RESET, (0x00));
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_RESET
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_RESET
-(
-void
-)
-{
- volatile uint32_t delay = 1000;
- //assert RST_B
- MCR20Drv_RST_B_Assert();
-
- // TODO
- while(delay--);
-
- //deassert RST_B
- MCR20Drv_RST_B_Deassert();
-}
-
-/*---------------------------------------------------------------------------
-* Name: MCR20Drv_Set_CLK_OUT_Freq
-* Description: -
-* Parameters: -
-* Return: -
-*---------------------------------------------------------------------------*/
-void MCR20Drv_Set_CLK_OUT_Freq
-(
-uint8_t freqDiv
-)
-{
- uint8_t clkOutCtrlReg = (freqDiv & cCLK_OUT_DIV_Mask) | cCLK_OUT_EN | cCLK_OUT_EXTEND;
-
- if(freqDiv == gCLK_OUT_FREQ_DISABLE)
- {
- clkOutCtrlReg = (cCLK_OUT_EXTEND | gCLK_OUT_FREQ_4_MHz); //reset value with clock out disabled
- }
-
- MCR20Drv_DirectAccessSPIWrite((uint8_t) CLK_OUT_CTRL, clkOutCtrlReg);
-}
-
-
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/MCR20Drv/XcvrSpi.cpp Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,172 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file XcvrSpi.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/*****************************************************************************
+* INCLUDED HEADERS *
+*---------------------------------------------------------------------------*
+* Add to this section all the headers that this module needs to include. *
+* Note that it is not a good practice to include header files into header *
+* files, so use this section only if there is no other better solution. *
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+#include "mbed.h"
+#include "EmbeddedTypes.h"
+
+#if defined(TARGET_K64F)
+ SPI spi(PTD2, PTD3, PTD1);
+#elif defined(TARGET_NUCLEO_F401RE)
+ SPI spi(SPI_MOSI, SPI_MISO, SPI_SCK);
+#else
+ "SPI not defined for this platform"
+#endif
+
+DigitalOut RF_CS(D10);
+DigitalOut RF_RST(D5);
+DigitalOut RF_SLP_TR(D7); // Not used in FSL
+InterruptIn RF_IRQ (D2); // FSL //(D9); // Atmel Radio
+DigitalIn RF_IRQ_PIN (D2);
+
+extern "C" void PHY_InterruptHandler(void);
+
+extern "C" void RF_IRQ_Init(void) {
+ RF_IRQ.disable_irq();
+ RF_IRQ.mode(PullDown);
+ RF_IRQ.rise(&PHY_InterruptHandler);
+}
+
+extern "C" void RF_IRQ_Enable(void) {
+ RF_IRQ.enable_irq();
+}
+extern "C" void RF_IRQ_Disable(void) {
+ RF_IRQ.disable_irq();
+}
+
+extern "C" bool_t RF_isIRQ_Pending(void) {
+#if 0
+ int state = RF_IRQ_PIN.read();
+
+ if (1 == state)
+ {
+ return 0;
+ }
+ else
+ {
+ return 1;
+ }
+#endif
+ return RF_IRQ_PIN.read();
+}
+
+extern "C" void RF_RST_Set(int state) {
+ RF_RST = state;
+}
+
+extern "C" void RF_SLP_TR_Set(int state) {
+ RF_SLP_TR = state;
+}
+
+extern "C" void RF_CS_while_active(void) {
+
+ while(!RF_CS);
+}
+
+/*****************************************************************************
+* PRIVATE MACROS *
+*---------------------------------------------------------------------------*
+* Add to this section all the access macros, registers mappings, bit access *
+* macros, masks, flags etc ...
+*---------------------------------------------------------------------------*
+*****************************************************************************/
+
+/*****************************************************************************/
+/*****************************************************************************/
+extern "C" void spi_master_init(uint32_t instance)
+{
+
+}
+
+/*****************************************************************************/
+/*****************************************************************************/
+extern "C" void spi_master_configure_speed(uint32_t instance, uint32_t freq)
+{
+ //spi.frequency(8000000);
+ spi.frequency(freq);
+}
+
+/*****************************************************************************/
+/*****************************************************************************/
+extern "C" void spi_master_transfer(uint32_t instance,
+ uint8_t * sendBuffer,
+ uint8_t * receiveBuffer,
+ size_t transferByteCount)
+{
+ volatile uint8_t dummy;
+
+ if( !transferByteCount )
+ return;
+
+ if( !sendBuffer && !receiveBuffer )
+ return;
+
+ while( transferByteCount-- )
+ {
+ if( sendBuffer )
+ {
+ dummy = *sendBuffer;
+ sendBuffer++;
+ }
+ else
+ {
+ dummy = 0xFF;
+ }
+
+ dummy = spi.write(dummy);
+
+ if( receiveBuffer )
+ {
+ *receiveBuffer = dummy;
+ receiveBuffer++;
+ }
+ }
+}
+
+extern "C" void gXcvrAssertCS_d(void)
+{
+ RF_CS = 0;
+}
+
+extern "C" void gXcvrDeassertCS_d(void)
+{
+ RF_CS = 1;
+}
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/RF_Drivers_Freescale/MCR20Drv/XcvrSpi.h Sun Mar 15 00:56:28 2015 -0500 @@ -0,0 +1,88 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file XcvrSpi.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef __XCVR_SPI_H__ +#define __XCVR_SPI_H__ + + +/***************************************************************************** + * INCLUDED HEADERS * + *---------------------------------------------------------------------------* + * Add to this section all the headers that this module needs to include. * + * Note that it is not a good practice to include header files into header * + * files, so use this section only if there is no other better solution. * + *---------------------------------------------------------------------------* + *****************************************************************************/ + +#include "EmbeddedTypes.h" +//#include "board.h" + + +/***************************************************************************** + * PUBLIC MACROS * + *---------------------------------------------------------------------------* + * Add to this section all the access macros, registers mappings, bit access * + * macros, masks, flags etc ... + *---------------------------------------------------------------------------* + *****************************************************************************/ +//#define gXcvrAssertCS_d() GPIO_DRV_ClearPinOutput(kGpioXcvrSpiCsPin) +//#define gXcvrDeassertCS_d() GPIO_DRV_SetPinOutput(kGpioXcvrSpiCsPin) + +#define gXcvrSpiInstance_c 0 + +/***************************************************************************** + * PUBLIC FUNCTIONS * + *---------------------------------------------------------------------------* + * Add to this section all the global functions prototype preceded (as a * + * good practice) by the keyword 'extern' * + *---------------------------------------------------------------------------* + *****************************************************************************/ +void RF_RST_Set(int state); +void RF_SLP_TR_Set(int state); +void RF_CS_while_active(void); +void RF_CS_Set(int state); +void RF_IRQ_Init(void); +void RF_IRQ_Disable(void); +void RF_IRQ_Enable(void); +bool_t RF_isIRQ_Pending(void); + +void gXcvrAssertCS_d(void); +void gXcvrDeassertCS_d(void); + +void spi_master_init(uint32_t instance); +void spi_master_configure_speed(uint32_t instance, uint32_t freq); +void spi_master_transfer(uint32_t instance, + uint8_t * sendBuffer, + uint8_t * receiveBuffer, + uint32_t transferByteCount); + +#endif /* __XCVR_SPI_H__ */
--- a/RF_Drivers_Freescale/MCR20Drv/low_level_RF_cpp.txt Sun Mar 08 04:19:44 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,148 +0,0 @@
-/* this file needs customization
- according the target hardware
-*/
-
-
-#include "mbed.h"
-
-extern "C" void rf_if_interrupt_handler(void);
-
-#if defined(TARGET_K64F)
-SPI spi(PTD2, PTD3, PTD1);
-#elif defined(TARGET_NUCLEO_F401RE)
-SPI spi(SPI_MOSI, SPI_MISO, SPI_SCK);
-#else
- "SPI not defined for this platform"
-#endif
-
-DigitalOut RF_CS(D10);
-DigitalOut RF_RST(D5);
-DigitalOut RF_SLP_TR(D7); // Not used in FSL
-InterruptIn RF_IRQ (D2); // FSL //(D9); // Atmel Radio
-
-
-extern "C" void RF_IRQ_Init(void) {
-
- RF_IRQ.rise(&rf_if_interrupt_handler);
-}
-
-extern "C" void RF_RST_Set(int state) {
- RF_RST = state;
-}
-
-extern "C" void RF_SLP_TR_Set(int state) {
- RF_SLP_TR = state;
-}
-
-extern "C" void RF_CS_while_active(void) {
-
- while(!RF_CS);
-}
-
-
-extern "C" int spi_read(char addr) {
-
- // Select the device by seting chip select low
- RF_CS = 0;
- // Write the reg. address
- spi.write(addr);
- // write a dummy value to read the reg. value
- int val = spi.write(0x00);
- // Deselect the device
- RF_CS = 1;
- return val;
-}
-
-extern "C" void spi_write(char addr, char val) {
-
- // Select the device by seting chip select low
- RF_CS = 0;
- // Write the reg. address
- spi.write(addr);
- // write the value to the addresses register
- spi.write(val);
- // Deselect the device
- RF_CS = 1;
-}
-
-extern "C" void spi_master_transfer(uint32_t instance,
- uint8_t * sendBuffer,
- uint8_t * receiveBuffer,
- size_t transferByteCount)
-{
-
- volatile uint8_t dummy;
-/*
-#if BOARD_USE_DSPI
- uint32_t baseAddr = g_dspiBaseAddr[instance];
-#else
- uint32_t baseAddr = g_spiBaseAddr[instance];
-#endif
-*/
-
- if( !transferByteCount )
- return;
-
- if( !sendBuffer && !receiveBuffer )
- return;
-/*
-#if BOARD_USE_DSPI
- DSPI_HAL_SetFlushFifoCmd(baseAddr, true, true);
-#endif
-*/
-
- while( transferByteCount-- )
- {
- if( sendBuffer )
- {
- dummy = *sendBuffer;
- sendBuffer++;
- }
- else
- {
- dummy = 0xFF;
- }
-
- /*
-#if BOARD_USE_DSPI
- DSPI_HAL_WriteDataMastermodeBlocking(baseAddr, &mSpiCommand, dummy);
- dummy = DSPI_HAL_ReadData(baseAddr);
-#else
- #if FSL_FEATURE_SPI_16BIT_TRANSFERS
- SPI_HAL_WriteDataBlocking(baseAddr, kSpi8BitMode, 0, dummy);
- while(!SPI_HAL_IsReadBuffFullPending(baseAddr));
- dummy = SPI_HAL_ReadDataLow(baseAddr);
- #else
- SPI_HAL_WriteDataBlocking(baseAddr, dummy);
- dummy = SPI_HAL_ReadData(baseAddr);
- #endif
-#endif
-*/
-
- dummy = spi.write(dummy);
- // write a dummy value to read the reg. value
- //dummy = spi.write(0x00); //???
-
- if( receiveBuffer )
- {
- *receiveBuffer = dummy;
- receiveBuffer++;
- }
- }
-
-}
-
-extern "C" void RF_CS_Set(int state) {
- RF_CS = state;
-}
-
-extern "C" void spi_speed(uint32_t freq) {
- spi.frequency(freq);
-}
-
-extern "C" int spi_exchange(char value) {
-
- // write the value
- int val = spi.write(value);
- return val;
-}
--- a/RF_Drivers_Freescale/MCR20Drv/low_level_RF_h.txt Sun Mar 08 04:19:44 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,32 +0,0 @@
-#ifndef LOW_LEVEL_RF_H
-#define LOW_LEVEL_RF_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-#include "string.h"
-//#include "EmbeddedTypes.h"
-
-void spi_write(char addr, char val);
-int spi_read(char addr);
-int spi_exchange(char data);
-
-void RF_RST_Set(int state);
-void RF_SLP_TR_Set(int state);
-void RF_CS_while_active(void);
-void RF_CS_Set(int state);
-void RF_IRQ_Init(void);
-void spi_speed(uint32_t freq);
-
-void spi_master_transfer(uint32_t instance,
- uint8_t * sendBuffer,
- uint8_t * receiveBuffer,
- size_t transferByteCount);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // LOW_LEVEL_RF_H
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/MPM.c Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,554 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MPM.c
+* This is the source file for the Multiple PAN Manager.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+#include "MpmInterface.h"
+#include "Phy.h"
+
+//#include "FunctionLib.h"
+//#include "MemManager.h"
+//#include "Panic.h"
+
+
+#if gMpmIncluded_d
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+uint8_t mRegisteredPANs;
+bool_t mMpmExclusiveAccess;
+panInfo_t mPanInfo[gMpmMaxPANs_c];
+panInfo_t *pActivePANs[gMpmPhyPanRegSets_c];
+
+/************************************************************************************
+*************************************************************************************
+* Private functions prototypes
+*************************************************************************************
+************************************************************************************/
+static void MPM_SetPanSettingsInPhy( uint8_t panIndex );
+static uint8_t MPM_AllocateResource( bool_t force, uint8_t panIdx );
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief This function determines the instance of the MAC associated with a PHY regSet
+*
+* \param[in] regSet The PHY registry set
+*
+* \return The instance of the MAC associated with a PHY registry set.
+*
+********************************************************************************** */
+uint32_t MPM_GetMacInstanceFromRegSet(uint32_t regSet)
+{
+ if( pActivePANs[regSet] )
+ return pActivePANs[regSet]->macInstance;
+
+ return 0;
+}
+
+/*! *********************************************************************************
+* \brief This function determines the PHY regSet for the specified panIndex
+*
+* \param[in] panIdx The index in mPanInfo[] table
+*
+* \return The PHY registry set.
+*
+********************************************************************************** */
+uint32_t MPM_GetRegSet( uint8_t panIdx )
+{
+ return mPanInfo[panIdx].phyRegSet;
+}
+
+/*! *********************************************************************************
+* \brief This function determines the PHY regSet for the specified panIndex
+*
+* \param[in] pibId The id of the PHY PIB
+* \param[in] pValue The value of the PHY PIB
+* \param[in] panIdx The index in mPanInfo[] table
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+phyStatus_t MPM_SetPIB(phyPibId_t pibId, void* pValue, uint8_t panIdx)
+{
+ switch(pibId)
+ {
+#if gMpmUseDifferentTxPwrLevel_c
+ case gPhyPibTransmitPower_c:
+ if( (*(uint8_t*)pValue < 3) || (*(uint8_t*)pValue > 31) )
+ {
+ return gPhyInvalidParameter_c;
+ }
+ mPanInfo[panIdx].pwrLevel = *(uint8_t*)pValue;
+ break;
+#endif
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ case gPhyPibCurrentChannel_c:
+ if( (*(uint8_t*)pValue < 11) || (*(uint8_t*)pValue > 26) )
+ {
+ return gPhyInvalidParameter_c;
+ }
+ mPanInfo[panIdx].channel = *(uint8_t*)pValue;
+ break;
+ case gPhyPibLongAddress_c:
+ mPanInfo[panIdx].longAddr = *(uint64_t*)pValue;
+ break;
+ case gPhyPibShortAddress_c:
+ mPanInfo[panIdx].shortAddr = *(uint16_t*)pValue;
+ break;
+ case gPhyPibPanId_c:
+ mPanInfo[panIdx].panId = *(uint16_t*)pValue;
+ break;
+ case gPhyPibPanCoordinator_c:
+ if( *(bool_t*)pValue )
+ mPanInfo[panIdx].flags |= gMpmFlagPanCoord_c;
+ else
+ mPanInfo[panIdx].flags &= ~gMpmFlagPanCoord_c;
+ break;
+#endif
+ case gPhyPibRxOnWhenIdle:
+ if( *(bool_t*)pValue )
+ mPanInfo[panIdx].flags |= gMpmFlagRxOnWhenIdle_c;
+ else
+ mPanInfo[panIdx].flags &= ~gMpmFlagRxOnWhenIdle_c;
+ break;
+ case gPhyPibPromiscuousMode_c:
+ if( *(bool_t*)pValue )
+ mPanInfo[panIdx].flags |= gMpmFlagPromiscuous_c;
+ else
+ mPanInfo[panIdx].flags &= ~gMpmFlagPromiscuous_c;
+ break;
+ default:
+ return gPhyUnsupportedAttribute_c;
+ }
+
+ return gPhySuccess_c;
+}
+
+phyStatus_t MPM_GetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx)
+{
+ switch(pibId)
+ {
+#if gMpmUseDifferentTxPwrLevel_c
+ case gPhyPibTransmitPower_c:
+ *(uint8_t*)pValue = mPanInfo[panIdx].pwrLevel;
+ break;
+#endif
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ case gPhyPibCurrentChannel_c:
+ *(uint8_t*)pValue = mPanInfo[panIdx].channel;
+ break;
+ case gPhyPibLongAddress_c:
+ *(uint64_t*)pValue = mPanInfo[panIdx].longAddr;
+ break;
+ case gPhyPibShortAddress_c:
+ *(uint16_t*)pValue = mPanInfo[panIdx].shortAddr;
+ break;
+ case gPhyPibPanId_c:
+ *(uint16_t*)pValue = mPanInfo[panIdx].panId;
+ break;
+ case gPhyPibPanCoordinator_c:
+ *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagPanCoord_c);
+ break;
+#endif
+ case gPhyPibRxOnWhenIdle:
+ *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagRxOnWhenIdle_c);
+ break;
+ case gPhyPibPromiscuousMode_c:
+ *(uint8_t*)pValue = !!(mPanInfo[panIdx].flags & gMpmFlagPromiscuous_c);
+ break;
+ default:
+ return gPhyUnsupportedAttribute_c;
+ }
+
+ return gPhySuccess_c;
+}
+
+
+/*! *********************************************************************************
+* \brief This function initializes the MPM module.
+*
+* \param[in] None.
+*
+* \return None
+*
+********************************************************************************** */
+void MPM_Init( void )
+{
+ uint32_t i;
+
+ mRegisteredPANs = 0;
+ mMpmExclusiveAccess = FALSE;
+ FLib_MemSet( mPanInfo, 0x00, sizeof(mPanInfo) );
+ FLib_MemSet( pActivePANs, 0x00, sizeof(pActivePANs) );
+
+ for(i=0; i<gMpmMaxPANs_c; i++)
+ mPanInfo[i].phyRegSet = gMpmInvalidRegSet_c;
+
+ PhyPpSetDualPanDwell( ((mDefaultDualPanDwellPrescaller_c << mDualPanDwellPrescallerShift_c) & mDualPanDwellPrescallerMask_c) |
+ ((mDefaultDualPanDwellTime_c << mDualPanDwellTimeShift_c ) & mDualPanDwellTimeMask_c) );
+}
+
+/*! *********************************************************************************
+* \brief This function prepare the Radio for a TX/CCA/ED operation
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The status of the Operation
+*
+********************************************************************************** */
+phyStatus_t MPM_PrepareForTx( instanceId_t macInstance )
+{
+ uint8_t panIdx = MPM_GetPanIndex(macInstance);
+
+ if( TRUE == mMpmExclusiveAccess && mPanInfo[panIdx].locked <= 0 )
+ return gPhyChannelBusy_c;
+
+ /* Allocate HW Resources if necessary */
+ if( mPanInfo[panIdx].phyRegSet == gMpmInvalidRegSet_c )
+ {
+ if( gMpmInvalidRegSet_c == MPM_AllocateResource( TRUE, panIdx ) )
+ return gPhyChannelBusy_c;
+
+ MPM_SetPanSettingsInPhy( panIdx );
+ }
+
+ /* Disable DualPan Auto Mode, and select the Active PAN */
+ PhyPpSetDualPanAuto( FALSE );
+ PhyPpSetDualPanActiveNwk( mPanInfo[panIdx].phyRegSet );
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function checks if a PAN has the RxOnWhenIdle PIB set.
+* If an Rx needs to be started, it makes the propper settings in PHY.
+*
+* \param[in] None.
+*
+* \return phyStatus
+*
+********************************************************************************** */
+phyStatus_t MPM_PrepareForRx( instanceId_t macInstance )
+{
+ uint32_t i, count = 0;
+ uint32_t activePan;
+
+ if( gInvalidInstanceId_c != macInstance ) //Rx
+ {
+ i = MPM_GetPanIndex(macInstance);
+
+ if( !mMpmExclusiveAccess || mPanInfo[i].locked )
+ {
+ /* Allocate HW Resources if necessary */
+ if( mPanInfo[i].phyRegSet == gMpmInvalidRegSet_c )
+ {
+ if( gMpmInvalidRegSet_c == MPM_AllocateResource( TRUE, i ) )
+ return gPhyChannelBusy_c;
+
+ MPM_SetPanSettingsInPhy( i );
+ }
+
+ count++;
+ activePan = mPanInfo[i].phyRegSet;
+ }
+ }
+ else //RxOnWhenIdle
+ {
+ for( i=0; i<gMpmPhyPanRegSets_c; i++)
+ {
+ if( (NULL != pActivePANs[i]) &&
+ (pActivePANs[i]->flags & gMpmFlagRxOnWhenIdle_c) &&
+ ( !mMpmExclusiveAccess || pActivePANs[i]->locked ) )
+ {
+ activePan = i;
+ count++;
+ }
+ }
+ }
+
+ if( !count )
+ return gPhyChannelBusy_c;
+
+ /* Set the Active PAN and DualPan Auto mode if needed*/
+ PhyPpSetDualPanActiveNwk( activePan );
+ PhyPpSetDualPanAuto( count > 1 );
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function returns the PAN index for a MAC instance
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The PAN index or -1 if it was not found
+*
+********************************************************************************** */
+int32_t MPM_GetPanIndex( instanceId_t macInstance )
+{
+ uint32_t i;
+
+ /* Get PAN Index for the macInstance */
+ for( i=0; i<mRegisteredPANs; i++ )
+ {
+ if( mPanInfo[i].macInstance == macInstance )
+ return i;
+ }
+
+ /* The instance of the MAC is not registered!
+ * Register the current MAC instance if there is enough space.
+ */
+ if( mRegisteredPANs < gMpmMaxPANs_c )
+ {
+ mPanInfo[mRegisteredPANs].macInstance = macInstance;
+
+ /* Try to allocate HW resource */
+ mPanInfo[mRegisteredPANs].phyRegSet = MPM_AllocateResource( FALSE, i );
+ mRegisteredPANs++;
+ }
+ else
+ {
+ i = -1;
+ }
+
+ return i;
+}
+
+
+/*! *********************************************************************************
+* \brief This function configures the MPM module
+*
+* \param[in] pCfg pointer to a configuration structure
+*
+* \remarks
+* The Dual PAN dwell time prescaller values: 0-3
+* The Dual PAN dwell time values 0-63.
+* The (dwellTime+1) represents multiples of the prescaller time base.
+*
+********************************************************************************** */
+void MPM_SetConfig( mpmConfig_t *pCfg )
+{
+ PhyPpSetDualPanAuto ( FALSE );
+ PhyPpSetDualPanDwell( pCfg->dwellTime );
+ MPM_AllocateResource( TRUE, MPM_GetPanIndex(pCfg->activeMAC) );
+ PhyPpSetDualPanAuto ( pCfg->autoMode );
+ if( PhyIsIdleRx(0) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Radio_Phy_TimeRxTimeoutIndication(0);
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function returns the MPM configuration
+*
+* \param[in] pCfg pointer to a configuration structure
+*
+* \return None.
+*
+********************************************************************************** */
+void MPM_GetConfig( mpmConfig_t *pCfg )
+{
+ pCfg->dwellTime = PhyPpGetDualPanDwell();
+ pCfg->activeMAC = MPM_GetMacInstanceFromRegSet( PhyPpGetDualPanActiveNwk() );
+ pCfg->autoMode = PhyPpGetDualPanAuto();
+}
+#endif /* #if gMpmIncluded_d */
+
+/*! *********************************************************************************
+* \brief This function Acquires a PAN for exclusive access.
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The status of the operation
+*
+********************************************************************************** */
+phyStatus_t MPM_AcquirePAN( instanceId_t macInstance )
+{
+#if gMpmIncluded_d
+ int32_t panIndex = MPM_GetPanIndex(macInstance);
+
+ /* Check if another PAN is acquired */
+ if( TRUE == mMpmExclusiveAccess &&
+ mPanInfo[panIndex].locked <= 0 )
+ {
+ return gPhyBusy_c;
+ }
+
+ if( mPanInfo[panIndex].locked == 0 )
+ {
+ mMpmExclusiveAccess = TRUE;
+ if( PhyIsIdleRx(0) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Radio_Phy_TimeRxTimeoutIndication(0);
+ }
+ }
+
+ mPanInfo[panIndex].locked++;
+#endif
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function Releases a PAN that was Acquired
+*
+* \param[in] macInstance The instance of the MAC
+*
+* \return The status of the operation
+*
+********************************************************************************** */
+phyStatus_t MPM_ReleasePAN( instanceId_t macInstance )
+{
+#if gMpmIncluded_d
+ uint8_t panIndex = MPM_GetPanIndex(macInstance);
+
+ mPanInfo[panIndex].locked--;
+ if( mPanInfo[panIndex].locked == 0 )
+ {
+ mMpmExclusiveAccess = FALSE;
+ if( PhyIsIdleRx(0) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Radio_Phy_TimeRxTimeoutIndication(0);
+ }
+ }
+#endif
+ return gPhySuccess_c;
+}
+
+/************************************************************************************
+*************************************************************************************
+* Private functions
+*************************************************************************************
+************************************************************************************/
+#if gMpmIncluded_d
+/*! *********************************************************************************
+* \brief This function alocates a registry set to a PAN.
+*
+* \param[in] force If this parameter is TRUE, then another PAN can be preempted.
+* \param[in] panIdx The index into the MPM database
+*
+* \return The register set allocated for the specified PAN.
+*
+********************************************************************************** */
+static uint8_t MPM_AllocateResource( bool_t force, uint8_t panIdx )
+{
+ uint32_t i, regSet = gMpmInvalidRegSet_c;
+
+ if( mPanInfo[panIdx].phyRegSet != gMpmInvalidRegSet_c )
+ return mPanInfo[panIdx].phyRegSet;
+
+ for( i=0; i<gMpmPhyPanRegSets_c; i++ )
+ {
+ if( NULL == pActivePANs[i] )
+ {
+ regSet = i;
+ break;
+ }
+ else if( (force) &&
+ (pActivePANs[i]->flags == 0) &&
+ (pActivePANs[i]->locked <= 0) )
+ {
+ regSet = i;
+ }
+ }
+
+ if( regSet != gMpmInvalidRegSet_c )
+ {
+ if( NULL != pActivePANs[regSet] )
+ {
+ pActivePANs[regSet]->phyRegSet = gMpmInvalidRegSet_c;
+ }
+
+ pActivePANs[regSet] = &mPanInfo[panIdx];
+ pActivePANs[regSet]->phyRegSet = regSet;
+ }
+
+ return regSet;
+}
+
+/*! *********************************************************************************
+* \brief This function will store PAN settings in PHY.
+*
+* \param[in] panIdx The index into the MPM database
+*
+* \return None.
+*
+* \remarks Function assumes that the PAN is active!
+*
+********************************************************************************** */
+static void MPM_SetPanSettingsInPhy( uint8_t panIndex )
+{
+ panInfo_t *pPAN = &mPanInfo[panIndex];
+
+#if gMpmUseDifferentTxPwrLevel_c
+ PhyPlmeSetPIBRequest(gPhyPibTransmitPower_c, pPAN->pwrLevel, pPAN->phyRegSet, 0 );
+#endif
+
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ PhyPlmeSetPIBRequest(gPhyPibPromiscuousMode_c, !!(pPAN->flags & gMpmFlagPromiscuous_c), pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibRxOnWhenIdle, !!(pPAN->flags & gMpmFlagRxOnWhenIdle_c), pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibPanCoordinator_c, !!(pPAN->flags & gMpmFlagPanCoord_c), pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibPanId_c, pPAN->panId, pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibShortAddress_c, pPAN->shortAddr, pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibLongAddress_c, pPAN->longAddr, pPAN->phyRegSet, 0 );
+ PhyPlmeSetPIBRequest(gPhyPibCurrentChannel_c, pPAN->channel, pPAN->phyRegSet, 0 );
+#else
+ (void)pPAN;
+#endif
+}
+#endif /* gMpmIncluded_d */
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/MpmInterface.h Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,194 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file MpmInterface.h
+* This is a header file for the Multiple PAN Manager.
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __MPM_H__
+#define __MPM_H__
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+#include "PhyInterface.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/* The maximun number of MAC instances that can be registered.
+ * If set to 0, the MPM is disabled!
+ */
+#if !defined(gMpmMaxPANs_c)
+#define gMpmMaxPANs_c 1
+#endif
+
+#define gMpmIncluded_d (gMpmMaxPANs_c > 1)
+
+#define gMpmPhyPanRegSets_c (2)
+#define gMpmUseDifferentTxPwrLevel_c (0)
+#define gMpmAcquireIsBlocking_d (0)
+#define gMpmInvalidRegSet_c (gMpmPhyPanRegSets_c)
+
+/* Dual Pan Dwell settings
+ +-----------------+---------------------+
+ | PRESCALER | RANGE |
+ | bits [1:0] | bits [7:2] |
+ +------+----------+---------------------+
+ |value | timebase | min - max |
+ +------+----------+---------------------+
+ | 00 | 0.5 ms | 0.5 - 32 ms |
+ | 01 | 2.5 ms | 2.5 - 160 ms |
+ | 10 | 10 ms | 10 - 640 ms |
+ | 11 | 50 ms | 50 - 3.2 seconds |
+ +------+----------+---------------------+
+*/
+
+ /* Dwell Time prescaller (0 to 3) */
+ #define mDefaultDualPanDwellPrescaller_c (0x00) // 0,5 ms
+ #define mDualPanDwellPrescallerMask_c (0x03)
+ #define mDualPanDwellPrescallerShift_c (0)
+
+ /* Dwell Time value (0 to 63) */
+ #define mDefaultDualPanDwellTime_c (0x06)
+ #define mDualPanDwellTimeMask_c (0xFC)
+ #define mDualPanDwellTimeShift_c (2)
+
+
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ #error The number of PANs exceeds the number of HW registry sets! This feature is not supported yet.
+#endif
+
+/* MPM flags */
+#define gMpmFlagPanCoord_c (1 << 0)
+#define gMpmFlagPromiscuous_c (1 << 1)
+#define gMpmFlagRxOnWhenIdle_c (1 << 2)
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+
+typedef PACKED_STRUCT mpmConfig_tag{
+ bool_t autoMode;
+ uint8_t dwellTime;
+ uint8_t activeMAC;
+}mpmConfig_t;
+
+typedef union panFlags_tag{
+ uint16_t all;
+ struct{
+ uint16_t panCoordinator: 1;
+ uint16_t promiscuous: 1;
+ uint16_t rxOnWhenIdle: 1;
+ uint16_t reserved: 13;
+ };
+}panFlags_t;
+
+typedef struct panInfo_tag{
+ uint8_t flags;
+ uint8_t macInstance;
+ uint8_t phyRegSet;
+ int8_t locked;
+#if (gMpmMaxPANs_c > gMpmPhyPanRegSets_c)
+ uint64_t longAddr;
+ uint16_t shortAddr;
+ uint16_t panId;
+ uint8_t channel;
+#endif
+#if gMpmUseDifferentTxPwrLevel_c
+ uint8_t pwrLevel;
+#endif
+}panInfo_t;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+#if gMpmIncluded_d
+
+void MPM_Init( void );
+void MPM_SetConfig( mpmConfig_t *pCfg );
+void MPM_GetConfig( mpmConfig_t *pCfg );
+
+int32_t MPM_GetPanIndex( instanceId_t macInstance );
+uint32_t MPM_GetRegSet(uint8_t panIdx);
+uint32_t MPM_GetMacInstanceFromRegSet(uint32_t regSet);
+#define MPM_isPanActive( panIdx ) (MPM_GetRegSet(panIdx) != gMpmInvalidRegSet_c)
+
+phyStatus_t MPM_PrepareForTx( instanceId_t macInstance );
+phyStatus_t MPM_PrepareForRx( instanceId_t macInstance );
+phyStatus_t MPM_GetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx);
+phyStatus_t MPM_SetPIB(phyPibId_t pibId, void *pValue, uint8_t panIdx);
+
+#else /* #if gMpmIncluded_d */
+
+#define MPM_Init()
+#define MPM_SetConfig( prescaller, dwellTime )
+
+#define MPM_GetPanIndex( macInstance ) 0
+#define MPM_GetRegSet( panIdx ) 0
+#define MPM_GetMacInstanceFromRegSet( regSet ) 0
+#define MPM_isPanActive( panIdx ) 1
+
+#define MPM_PrepareForTx( macInstance ) gPhySuccess_c
+#define MPM_PrepareForRx( macInstance ) gPhySuccess_c
+#define MPM_GetPIB( pibId, pibValue, panIdx ) gPhySuccess_c
+#define MPM_SetPIB( pibId, pibValue, panIdx ) gPhySuccess_c
+
+#endif /* #if gMpmIncluded_d */
+
+phyStatus_t MPM_AcquirePAN( instanceId_t macInstance );
+phyStatus_t MPM_ReleasePAN( instanceId_t macInstance );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__MPM_H__ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/Phy.h Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,1110 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file Phy.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef __PHY_H__
+#define __PHY_H__
+
+
+/*****************************************************************************
+ * INCLUDED HEADERS *
+ *---------------------------------------------------------------------------*
+ * Add to this section all the headers that this module needs to include. *
+ * Note that it is not a good practice to include header files into header *
+ * files, so use this section only if there is no other better solution. *
+ *---------------------------------------------------------------------------*
+ *****************************************************************************/
+
+#include "EmbeddedTypes.h"
+#include "PhyInterface.h"
+//#include "fsl_os_abstraction.h"
+
+/*****************************************************************************
+ * PUBLIC MACROS, DEFINITIONS *
+ *---------------------------------------------------------------------------*
+ * Add to this section all the access macros, registers mappings, bit access *
+ * macros, masks, flags etc ...
+ *---------------------------------------------------------------------------*
+ *****************************************************************************/
+
+ #ifdef __cplusplus
+ extern "C" {
+#endif
+
+#ifdef _DEBUG
+#ifdef gPHY_802_15_4g_d
+#define MAC_PHY_DEBUG
+#endif
+#endif
+
+#ifndef gSnifferCRCEnabled_d
+#define gSnifferCRCEnabled_d (0)
+#endif
+
+#ifndef gUseStandaloneCCABeforeTx_d
+#define gUseStandaloneCCABeforeTx_d (1)
+#endif
+
+#ifndef gUsePBTransferThereshold_d
+#define gUsePBTransferThereshold_d (0)
+#endif
+
+#ifndef gPhyRxRetryInterval_c
+#define gPhyRxRetryInterval_c (100) /* [symbols] */
+#endif
+
+// PHY states
+enum {
+ gIdle_c,
+ gRX_c,
+ gTX_c,
+ gCCA_c,
+ gTR_c,
+ gCCCA_c,
+#ifdef gPHY_802_15_4g_d
+ gED_c
+#endif // gPHY_802_15_4g_d
+};
+
+// PHY channel state
+enum {
+ gChannelIdle_c,
+ gChannelBusy_c
+};
+
+// PANCORDNTR bit in PP
+enum {
+ gMacRole_DeviceOrCoord_c,
+ gMacRole_PanCoord_c
+};
+
+// Cca types
+enum {
+ gCcaED_c, // energy detect - CCA bit not active, not to be used for T and CCCA sequences
+ gCcaCCA_MODE1_c, // energy detect - CCA bit ACTIVE
+ gCcaCCA_MODE2_c, // 802.15.4 compliant signal detect - CCA bit ACTIVE
+ gCcaCCA_MODE3_c, //
+ gInvalidCcaType_c // illegal type
+};
+
+enum {
+ gNormalCca_c,
+ gContinuousCca_c
+};
+
+
+/*****************************************************************************
+* Public type definitions *
+*****************************************************************************/
+typedef struct Phy_PhyLocalStruct_tag
+{
+ PD_MAC_SapHandler_t PD_MAC_SapHandler;
+ PLME_MAC_SapHandler_t PLME_MAC_SapHandler;
+// event_t phyTaskEventId;
+// msgQueue_t macPhyInputQueue;
+ phyMessageHeader_t * pMsgIn;
+ uint32_t maxFrameWaitTime;
+ volatile phyTxParams_t txParams;
+ union{
+ volatile phyRxParams_t rxParams;
+ volatile phyChannelParams_t channelParams;
+ };
+#ifdef gPHY_802_15_4g_d
+ volatile phyFlags_t flags;
+ phyTime_t startTime;
+ uint16_t phyUnavailableQueuePos;
+ uint16_t phyIndirectQueue[gPhyIndirectQueueSize_c];
+ uint16_t fcs;
+ uint8_t macPanID[2];
+ uint8_t macShortAddress[2];
+ uint8_t macLongAddress[8];
+#else
+ volatile uint8_t flags;
+#endif // gPHY_802_15_4g_d
+ uint8_t currentMacInstance;
+}Phy_PhyLocalStruct_t;
+
+
+/*****************************************************************************
+* Public macros *
+*****************************************************************************/
+
+#define PhyGetSeqState() PhyPpGetState()
+#define PhyPlmeForceTrxOffRequest() PhyAbort()
+
+
+/*****************************************************************************
+* Public prototypes *
+*****************************************************************************/
+
+// PHY Packet Processor
+
+/*---------------------------------------------------------------------------
+ * Name: PhyHwInit
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyHwInit
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPromiscuous
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetPromiscuous
+(
+ bool_t mode
+);
+
+/*---------------------------------------------------------------------------
+* Name: PhySetActivePromState()
+* Description: -
+* Parameters: -
+* Return: -
+*---------------------------------------------------------------------------*/
+void PhySetActivePromiscuous
+(
+bool_t state
+);
+
+/*---------------------------------------------------------------------------
+* Name: PhyGetActivePromiscuous()
+* Description: -
+* Parameters: -
+* Return: - TRUE/FALSE
+*---------------------------------------------------------------------------*/
+bool_t PhyGetActivePromiscuous
+(
+void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPanId
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetPanId
+(
+ uint8_t *pPanId,
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetShortAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetShortAddr
+(
+ uint8_t *pShortAddr,
+ uint8_t pan
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetLongAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetLongAddr
+(
+ uint8_t *pLongAddr,
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetMacRole
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetMacRole
+(
+ bool_t macRole,
+ uint8_t pan
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsTxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsTxAckDataPending
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsRxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsRxAckDataPending
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetFpManually
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetFpManually
+(
+ bool_t FP
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsPollIndication
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsPollIndication
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetSAMState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetSAMState
+(
+ bool_t state
+);
+
+/*---------------------------------------------------------------------------
+ * Name: Phy_IndirectQueueChecksum
+ * Description: Function called to compute the checksum for a 16bit or 64bit address
+ * in the same way as the transceiver
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+#ifdef gPHY_802_15_4g_d
+uint16_t Phy_IndirectQueueChecksum
+(
+ bool_t addrType,
+ uint64_t address,
+ uint16_t panId
+);
+#endif // gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_IndirectQueueInsert
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_IndirectQueueInsert
+(
+ uint8_t index,
+ uint16_t checkSum,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_RemoveFromIndirect
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_RemoveFromIndirect
+(
+ uint8_t index,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetState
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhySetState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+#ifdef gPHY_802_15_4g_d
+void PhySetState
+(
+ uint8_t phyState
+);
+#endif //gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyAbort
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyAbort
+(
+ void
+);
+
+// PHY PLME & DATA primitives
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPdDataRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPdDataRequest
+(
+ pdDataReq_t *pTxPacket,
+ volatile phyRxParams_t *pRxParams,
+ volatile phyTxParams_t *pTxParams
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeRxRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeRxRequest
+(
+ phySlottedMode_t phyRxMode,
+ phyRxParams_t * pRxParams
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeCcaEdRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeCcaEdRequest
+(
+ phyCCAType_t ccaParam,
+ phyContCCAMode_t cccaMode
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetCurrentChannelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetCurrentChannelRequest
+(
+ uint8_t channel,
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetCurrentChannelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetCurrentChannelRequest
+(
+ uint8_t pan
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetPwrLevelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetPwrLevelRequest
+(
+ uint8_t pwrStep
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetPwrLevelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetPwrLevelRequest
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetPwrState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetPwrState
+(
+ uint8_t state
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetPIBRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeSetPIBRequest
+(
+ phyPibId_t pibId,
+ uint64_t pibValue,
+ uint8_t phyRegistrySet,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetPIBRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPlmeGetPIBRequest
+(
+ phyPibId_t pibId,
+ uint64_t * pibValue,
+ uint8_t phyRegistrySet,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetCcaThreshold
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+
+phyStatus_t PhyPpSetCcaThreshold
+(
+ uint8_t ccaThreshold
+);
+
+// PHY Time
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetEventTrigger
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetEventTrigger
+(
+ phyTime_t startTime
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetEventTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetEventTimeout
+(
+ phyTime_t *pEndTime
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeGetEventTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint32_t PhyTimeGetEventTimeout( void );
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeReadClock
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeReadClock
+(
+ phyTime_t *pRetClk
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableEventTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableEventTimeout
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableEventTrigger
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableEventTrigger
+(
+ void
+);
+
+
+#ifdef gPHY_802_15_4g_d
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableRxTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableRxTimeout
+(
+ void
+);
+#endif // gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetWakeUpTime
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetWakeUpTime
+(
+ uint32_t *pWakeUpTime
+);
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeInitEventTimer
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeInitEventTimer
+(
+ uint32_t *pAbsTime
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeIsWakeUpTimeExpired
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyTimeIsWakeUpTimeExpired
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeSetWaitTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeSetWaitTimeout
+(
+ phyTime_t *pWaitTimeout
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyTimeDisableWaitTimeout
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyTimeDisableWaitTimeout
+(
+ void
+);
+
+// PHY ISR
+
+/*---------------------------------------------------------------------------
+ * Name: PHY_InstallIsr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PHY_InstallIsr
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PHY_InterruptHandler
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PHY_InterruptHandler
+(
+ void
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrPassRxParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrPassRxParams
+(
+ volatile phyRxParams_t * pRxParam
+);
+
+#ifdef gPHY_802_15_4g_d
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrPassRxParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPassTxParams
+(
+ pdDataReq_t *pTxParam
+);
+#endif // gPHY_802_15_4g_d
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrPassTaskParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrPassTaskParams
+(
+ instanceId_t instanceId
+);
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrTimeoutCleanup
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrTimeoutCleanup
+(
+ void
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyIsrSeqCleanup
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyIsrSeqCleanup
+(
+ void
+);
+
+/*****************************************************************************
+* PhyGetRandomNo function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyGetRandomNo
+(
+ uint32_t *pRandomNo
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanAuto function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanAuto
+(
+ bool_t mode
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanAuto function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+bool_t PhyPpGetDualPanAuto
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanDwell function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanDwell
+(
+ uint8_t
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanDwell function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+uint8_t PhyPpGetDualPanDwell
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanRemain function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The remaining time until a channel switch will occure
+*****************************************************************************/
+uint8_t PhyPpGetDualPanRemain
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanSamLvl function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanSamLvl
+(
+ uint8_t
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanSamLvl function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The level at which the HW queue is split for the two PANs
+*****************************************************************************/
+uint8_t PhyPpGetDualPanSamLvl
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpSetDualPanSamLvl function
+*
+* Interface assumptions:
+*
+* Return Value:
+* None
+*****************************************************************************/
+void PhyPpSetDualPanActiveNwk
+(
+ uint8_t
+);
+
+/*****************************************************************************
+* PhyPpGetDualPanActiveNwk function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The current NWK on which the PHY is operating
+*****************************************************************************/
+uint8_t PhyPpGetDualPanActiveNwk
+(
+ void
+);
+
+/*****************************************************************************
+* PhyPpGetPanOfRxPacket function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The PAN on which the packet was received (can be receiced on both PANs)
+*****************************************************************************/
+uint8_t PhyPpGetPanOfRxPacket
+(
+ void
+);
+
+#ifdef gPHY_802_15_4g_d
+/*---------------------------------------------------------------------------
+ * Name: PhyPpPassTaskParams()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpPassTaskParams
+(
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetCSLRxEnabled()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetCSLRxEnabled
+(
+ bool_t cslRx,
+ instanceId_t instanceId
+);
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPib_SetCSLTxEnabled()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetCSLTxEnabled
+(
+ bool_t cslTx,
+ instanceId_t instanceId
+);
+#endif // gPHY_802_15_4g_d
+
+/*****************************************************************************
+* PhyGetLastRxLqiValue function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The LQI value for the last received packet
+*****************************************************************************/
+uint8_t PhyGetLastRxLqiValue(void);
+
+/*****************************************************************************
+* PhyGetLastRxRssiValue function
+*
+* Interface assumptions:
+*
+* Return Value:
+* The RSSI value for the last received packet
+*****************************************************************************/
+uint8_t PhyGetLastRxRssiValue(void);
+
+/*****************************************************************************
+* PhyPlmeSetFADStateRequest function
+*
+* Interface assumptions: state
+*
+* Return Value: gPhySuccess
+*
+* Description: Enable the FAD function (FAD_EN bit)
+*****************************************************************************/
+uint8_t PhyPlmeSetFADStateRequest(bool_t state);
+
+/*****************************************************************************
+* PhyPlmeSetFADThresholdRequest function
+*
+* Interface assumptions: FADThreshold
+*
+* Return Value: gPhySuccess
+*
+* Description: Correlator threshold at which the FAD will select the antenna
+*****************************************************************************/
+uint8_t PhyPlmeSetFADThresholdRequest(uint8_t FADThreshold);
+
+uint8_t PhyPlmeSetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on);
+uint8_t PhyPlmeSetANTPadStrengthRequest(bool_t hiStrength);
+uint8_t PhyPlmeSetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx);
+
+/*****************************************************************************
+* PhyPlmeSetANTXStateRequest function
+*
+* Interface assumptions: state
+*
+* Return Value: gPhySuccess
+*
+* Description: ANTX_IN - FAD Antenna start when FAD_EN = 1 or antenna selected
+* when FAD_EN=0
+*****************************************************************************/
+uint8_t PhyPlmeSetANTXStateRequest(bool_t state);
+
+/*****************************************************************************
+* PhyPlmeGetANTXStateRequest function
+*
+* Interface assumptions: none
+*
+* Return Value: Chosen antenna by the FAD (FAD_EN = 1) or copy of ANTX_IN
+*
+* Description: Antenna selected in FAD of non-FAD mode
+*****************************************************************************/
+uint8_t PhyPlmeGetANTXStateRequest(void);
+
+/*****************************************************************************
+* PhyPlmeSetLQIModeRequest function
+*
+* Interface assumptions: none
+*
+* Return Value: gPhySuccess
+*
+* Description: Choose LQI Mode: 1 - LQI Based on RSSI,
+* 0 - LQI Based on Correlation Peaks
+*****************************************************************************/
+uint8_t PhyPlmeSetLQIModeRequest(uint8_t lqiMode);
+
+/*****************************************************************************
+* PhyPlmeGetRSSILevelRequest function
+*
+* Interface assumptions: none
+*
+* Return Value: RSSI level
+*
+* Description: Returns the RSSI level value, refreshed every 125us
+*****************************************************************************/
+uint8_t PhyPlmeGetRSSILevelRequest(void);
+
+#ifdef gPHY_802_15_4g_d
+/*****************************************************************************
+* PhyPlmeDataPassTaskParams function
+*
+* Interface assumptions: none
+*
+* Return Value:
+*
+* Description:
+*****************************************************************************/
+void PhyPlmeDataPassTaskParams(instanceId_t instanceId);
+#endif // gPHY_802_15_4g_d
+
+/*****************************************************************************
+* PhySetRxOnWhenIdle function
+*
+* Interface assumptions: none
+*
+* Return Value: None.
+*
+* Description: Informs the PHY if it should start an RX when entering IDLE or not
+*****************************************************************************/
+void PhyPlmeSetRxOnWhenIdle( bool_t state, instanceId_t instanceId );
+
+/*****************************************************************************
+* PhyPlmeSetFrameWaitTime function
+*
+* Interface assumptions: none
+*
+* Return Value: None.
+*
+* Description: Set the amount of time in symbols to wait for an data frame
+* after receiving an ACK with FP=1
+*****************************************************************************/
+void PhyPlmeSetFrameWaitTime( uint32_t time, instanceId_t instanceId );
+
+/*****************************************************************************
+* Phy_SetSequenceTiming function
+*
+* Interface assumptions: none
+*
+* Return Value: None.
+*
+* Description:
+*
+*****************************************************************************/
+#ifndef gPHY_802_15_4g_d
+void Phy_SetSequenceTiming(phyTime_t startTime, uint32_t seqDuration);
+#else
+void Phy_SetSequenceTiming(phyTime_t startTime, uint32_t seqDuration, uint8_t nextState, instanceId_t instanceId);
+void Phy_SetRxTiming(uint32_t seqDuration, uint8_t nextState, instanceId_t instanceId);
+#endif // gPHY_802_15_4g_d
+
+uint8_t Phy_GetEnergyLevel(uint8_t energyLeveldB);
+
+// RADIO EVENTS
+
+void Radio_Phy_PdDataConfirm(instanceId_t instanceId, bool_t framePending);
+
+void Radio_Phy_TimeWaitTimeoutIndication(instanceId_t instanceId);
+
+void Radio_Phy_TimeRxTimeoutIndication(instanceId_t instanceId);
+
+void Radio_Phy_PdDataIndication(instanceId_t instanceId);
+
+void Radio_Phy_TimeStartEventIndication(instanceId_t instanceId);
+
+void Radio_Phy_PlmeCcaConfirm(phyStatus_t phyChannelStatus, instanceId_t instanceId);
+
+void Radio_Phy_PlmeEdConfirm(uint8_t energyLeveldB, instanceId_t instanceId);
+
+void Radio_Phy_PlmeSyncLossIndication(instanceId_t instanceId);
+
+void Radio_Phy_PlmeRxSfdDetect(instanceId_t instanceId, uint32_t param);
+
+void Radio_Phy_PlmeFilterFailRx(instanceId_t instanceId);
+
+#ifdef gPHY_802_15_4g_d
+void Radio_Phy_WaitTurnaround(instanceId_t instanceId);
+void Radio_Phy_WaitTurnaroundComplete(instanceId_t instanceId);
+#endif
+
+void Radio_Phy_UnexpectedTransceiverReset(instanceId_t instanceId);
+
+void Radio_Phy_DummyEvent(instanceId_t instanceId);
+
+bool_t PhyIsIdleRx( instanceId_t instanceId );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PHY_H__ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/RF_Drivers_Freescale/PhyConfig.h Sun Mar 15 00:56:28 2015 -0500 @@ -0,0 +1,64 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file PhyConfig.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _PHY_CONFIG_H_ +#define _PHY_CONFIG_H_ + +#ifndef gAspCapability_d +#define gAspCapability_d 1 +#endif + +#ifndef gMaxPhyTimers_c +#define gMaxPhyTimers_c 10 +#endif + +#ifndef gMpmMaxPANs_c +#define gMpmMaxPANs_c 1 +#endif + +#ifndef gPhyInstancesCnt_c +#define gPhyInstancesCnt_c 1 +#endif + +#ifndef gPhyTaskStackSize_c +#define gPhyTaskStackSize_c 600 +#endif + +#ifndef gPhyTaskPriority_c +#define gPhyTaskPriority_c OSA_PRIORITY_REAL_TIME +#endif + +#ifndef gAfcEnabled_d +#define gAfcEnabled_d 0 +#endif + +#endif //_PHY_CONFIG_H_
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/PhyISR.c Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,565 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyISR.c
+* PHY ISR Functions
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+//#include "board.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "Phy.h"
+#include "PhyInterface.h"
+//#include "Gpio_IrqAdapter.h"
+
+//#include "fsl_os_abstraction.h"
+
+#include "XcvrSpi.h"
+
+/************************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+************************************************************************************/
+#if defined(MCU_MKL46Z4)
+ #define MCR20_Irq_Priority (0xC0)
+#else
+ #define MCR20_Irq_Priority (0x80)
+#endif
+
+#define PHY_IRQSTS1_INDEX_c 0x00
+#define PHY_IRQSTS2_INDEX_c 0x01
+#define PHY_IRQSTS3_INDEX_c 0x02
+#define PHY_CTRL1_INDEX_c 0x03
+#define PHY_CTRL2_INDEX_c 0x04
+#define PHY_CTRL3_INDEX_c 0x05
+#define PHY_RX_FRM_LEN_INDEX_c 0x06
+#define PHY_CTRL4_INDEX_c 0x07
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+extern Phy_PhyLocalStruct_t phyLocal[];
+static volatile phyRxParams_t * mpRxParams = NULL;
+static uint32_t mPhyTaskInstance;
+uint8_t mStatusAndControlRegs[8];
+uint8_t mPhyLastRxLQI = 0;
+uint8_t mPhyLastRxRSSI = 0;
+
+void (*gpfPhyPreprocessData)(uint8_t *pData) = NULL;
+
+#if gUsePBTransferThereshold_d
+static uint8_t mPhyWatermarkLevel;
+#define mPhyGetPBTransferThreshold(len) ((len) - 2)
+//#define mPhyGetPBTransferThreshold(len) ((len)*93/100)
+//#define mPhyGetPBTransferThreshold(len) (((len) < 20) ? ((len) - 2) : ((len) * 93 / 100))
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief Sets the current PHY instance waiting for an IRQ
+*
+* \param[in] instanceId instance of the PHY
+*
+********************************************************************************** */
+void PhyIsrPassTaskParams
+(
+ instanceId_t instanceId
+)
+{
+ mPhyTaskInstance = instanceId;
+}
+
+/*! *********************************************************************************
+* \brief Sets the location of the Rx parameters
+*
+* \param[in] pRxParam pointer to Rx parameters
+*
+********************************************************************************** */
+void PhyIsrPassRxParams
+(
+ volatile phyRxParams_t * pRxParam
+)
+{
+ mpRxParams = pRxParam;
+}
+
+/*! *********************************************************************************
+* \brief Clear and mask PHY IRQ, set sequence to Idle
+*
+********************************************************************************** */
+void PhyIsrSeqCleanup
+(
+ void
+)
+{
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= 0xF0;
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= (uint8_t) ~( cIRQSTS3_TMR3MSK ); // unmask TMR3 interrupt
+ mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_XCVSEQ );
+ mStatusAndControlRegs[PHY_CTRL2_INDEX_c] |= (uint8_t) ( cPHY_CTRL2_CCAMSK | \
+ cPHY_CTRL2_RXMSK | \
+ cPHY_CTRL2_TXMSK | \
+ cPHY_CTRL2_SEQMSK );
+
+ // clear transceiver interrupts, mask SEQ, RX, TX and CCA interrupts and set the PHY sequencer back to IDLE
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 5);
+}
+
+/*! *********************************************************************************
+* \brief Clear and mask PHY IRQ, disable timeout, set sequence to Idle
+*
+********************************************************************************** */
+void PhyIsrTimeoutCleanup
+(
+ void
+)
+{
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] &= 0xF0;
+ mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] |= (uint8_t) ( cIRQSTS3_TMR3MSK | \
+ cIRQSTS3_TMR3IRQ); // mask and clear TMR3 interrupt
+ mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_XCVSEQ );
+ mStatusAndControlRegs[PHY_CTRL2_INDEX_c] |= (uint8_t) ( cPHY_CTRL2_CCAMSK | \
+ cPHY_CTRL2_RXMSK | \
+ cPHY_CTRL2_TXMSK | \
+ cPHY_CTRL2_SEQMSK );
+
+ // disable TMR3 comparator and timeout
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR3CMP_EN );
+ mStatusAndControlRegs[PHY_CTRL4_INDEX_c] &= (uint8_t) ~( cPHY_CTRL4_TC3TMOUT );
+
+ // clear transceiver interrupts, mask mask SEQ, RX, TX, TMR3 and CCA interrupts interrupts and set the PHY sequencer back to IDLE
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 8);
+}
+
+/*! *********************************************************************************
+* \brief Scales energy level to 0-255
+*
+* \param[in] energyLevel the energ level reported by HW
+*
+* \return uint8_t the energy level scaled in 0x00-0xFF
+*
+********************************************************************************** */
+uint8_t Phy_GetEnergyLevel
+(
+uint8_t energyLevel /* db */
+)
+{
+ if(energyLevel >= 90)
+ {
+ /* ED value is below minimum. Return 0x00. */
+ energyLevel = 0x00;
+ }
+ else if(energyLevel <= 26)
+ {
+ /* ED value is above maximum. Return 0xFF. */
+ energyLevel = 0xFF;
+ }
+ else
+ {
+ /* Energy level (-90 dBm to -26 dBm ) --> varies form 0 to 64 */
+ energyLevel = (90 - energyLevel);
+ /* Rescale the energy level values to the 0x00-0xff range (0 to 64 translates in 0 to 255) */
+ /* energyLevel * 3.9844 ~= 4 */
+ /* Multiply with 4=2^2 by shifting left.
+ The multiplication will not overflow beacause energyLevel has values between 0 and 63 */
+ energyLevel <<= 2;
+ }
+
+ return energyLevel;
+}
+
+/*! *********************************************************************************
+* \brief Scales LQI to 0-255
+*
+* \param[in] hwLqi the LQI reported by HW
+*
+* \return uint8_t the LQI scaled in 0x00-0xFF
+*
+********************************************************************************** */
+static uint8_t Phy_LqiConvert
+(
+uint8_t hwLqi
+)
+{
+ uint32_t tmpLQI;
+
+ /* LQI Saturation Level */
+ if (hwLqi >= 230)
+ {
+ return 0xFF;
+ }
+ else if (hwLqi <= 9)
+ {
+ return 0;
+ }
+ else
+ {
+ /* Rescale the LQI values from min to saturation to the 0x00 - 0xFF range */
+ /* The LQI value mst be multiplied by ~1.1087 */
+ /* tmpLQI = hwLqi * 7123 ~= hwLqi * 65536 * 0.1087 = hwLqi * 2^16 * 0.1087*/
+ tmpLQI = ((uint32_t)hwLqi * (uint32_t)7123 );
+ /* tmpLQI = (tmpLQI / 2^16) + hwLqi */
+ tmpLQI = (uint32_t)(tmpLQI >> 16) + (uint32_t)hwLqi;
+
+ return (uint8_t)tmpLQI;
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function returns the LQI for the las received packet
+*
+* \return uint8_t LQI value
+*
+********************************************************************************** */
+uint8_t PhyGetLastRxLqiValue(void)
+{
+ return mPhyLastRxLQI;
+}
+
+/*! *********************************************************************************
+* \brief This function returns the RSSI for the las received packet
+*
+* \return uint8_t RSSI value
+*
+********************************************************************************** */
+uint8_t PhyGetLastRxRssiValue(void)
+{
+ return mPhyLastRxRSSI;
+}
+
+/*! *********************************************************************************
+* \brief PHY ISR
+*
+********************************************************************************** */
+void PHY_InterruptHandler(void)
+{
+ uint8_t xcvseqCopy;
+
+ /* The ISR may be called even if another PORTx pin has changed */
+ //if( !PORT_HAL_IsPinIntPending(g_portBaseAddr[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)], GPIO_EXTRACT_PIN(kGpioXcvrIrqPin)) )
+ if( !RF_isIRQ_Pending() )
+ {
+ return;
+ }
+
+ /* Disable and clear transceiver(IRQ_B) interrupt */
+ MCR20Drv_IRQ_Disable();
+ MCR20Drv_IRQ_Clear();
+
+ /* Read transceiver interrupt status and control registers */
+ mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] =
+ MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &mStatusAndControlRegs[1], 7);
+ xcvseqCopy = mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_XCVSEQ;
+ /* clear transceiver interrupts */
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 3);
+
+ if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_WAKE_IRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL3_INDEX_c] & cPHY_CTRL3_WAKE_MSK) )
+ {
+#ifdef MAC_PHY_DEBUG
+ Radio_Phy_UnexpectedTransceiverReset(mPhyTaskInstance);
+#endif
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ /* Flter Fail IRQ */
+ if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_FILTERFAIL_IRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_FILTERFAIL_MSK) )
+ {
+#if gUsePBTransferThereshold_d
+ /* Reset the RX_WTR_MARK level since packet was dropped. */
+ mPhyWatermarkLevel = 0;
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
+#endif
+ Radio_Phy_PlmeFilterFailRx(mPhyTaskInstance);
+ }
+ /* Rx Watermark IRQ */
+ else if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RXWTRMRKIRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_RX_WMRK_MSK) )
+ {
+#if gUsePBTransferThereshold_d
+ if( 0 == mPhyWatermarkLevel )
+ {
+ /* Check if this is a standalone RX because we could end up here during a TR sequence also. */
+ if( xcvseqCopy == gRX_c )
+ {
+ /* Set the thereshold packet length at which to start the PB Burst Read.*/
+ mPhyWatermarkLevel = mPhyGetPBTransferThreshold( mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c] );
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
+ }
+#endif
+ Radio_Phy_PlmeRxSfdDetect(mPhyTaskInstance, mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]);
+#if gUsePBTransferThereshold_d
+ }
+ else
+ {
+ /* Reset RX_WTR_MARK here, because if the FCS fails, no other IRQ will arrive
+ * and the RX will restart automatically. */
+ mPhyWatermarkLevel = 0;
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, mPhyWatermarkLevel);
+
+ if( mpRxParams )
+ {
+ // Read data from PB
+ MCR20Drv_PB_SPIBurstRead(mpRxParams->pRxData->msgData.dataInd.pPsdu, (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c] - 2));
+ if( gpfPhyPreprocessData )
+ gpfPhyPreprocessData(mpRxParams->pRxData->msgData.dataInd.pPsdu);
+ }
+ }
+#endif
+ }
+
+ /* Timer 1 Compare Match */
+ if( (mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR1IRQ) &&
+ !(mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR1MSK))
+ {
+ // disable TMR1 comparator
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR1CMP_EN);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+
+ Radio_Phy_TimeWaitTimeoutIndication(mPhyTaskInstance);
+ }
+
+ /* Sequencer interrupt, the autosequence has completed */
+ if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_SEQIRQ) &&
+ !(mStatusAndControlRegs[PHY_CTRL2_INDEX_c] & cPHY_CTRL2_SEQMSK) )
+ {
+ // PLL unlock, the autosequence has been aborted due to PLL unlock
+ if( mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_PLL_UNLOCK_IRQ )
+ {
+ PhyIsrSeqCleanup();
+ Radio_Phy_PlmeSyncLossIndication(mPhyTaskInstance);
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ // TMR3 timeout, the autosequence has been aborted due to TMR3 timeout
+ if( (mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR3IRQ) &&
+ !(mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RXIRQ) &&
+ (gTX_c != xcvseqCopy) )
+ {
+ PhyIsrTimeoutCleanup();
+
+ Radio_Phy_TimeRxTimeoutIndication(mPhyTaskInstance);
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ PhyIsrSeqCleanup();
+
+ switch(xcvseqCopy)
+ {
+ case gTX_c:
+ if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA) &&
+ (mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_CCABFRTX) )
+ {
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
+ }
+ else
+ {
+ Radio_Phy_PdDataConfirm(mPhyTaskInstance, FALSE);
+ }
+ break;
+
+ case gTR_c:
+ if( (mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA) &&
+ (mStatusAndControlRegs[PHY_CTRL1_INDEX_c] & cPHY_CTRL1_CCABFRTX) )
+ {
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
+ }
+ else
+ {
+ if(NULL != mpRxParams)
+ {
+ // reports value of 0x00 for -105 dBm of received input power and 0xFF for 0 dBm of received input power
+ mPhyLastRxRSSI = MCR20Drv_DirectAccessSPIRead((uint8_t) LQI_VALUE);
+ mpRxParams->linkQuality = Phy_LqiConvert(mPhyLastRxRSSI);
+ mPhyLastRxLQI = mpRxParams->linkQuality;
+ MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) TIMESTAMP_LSB, (uint8_t *)&mpRxParams->timeStamp, 3);
+ mpRxParams->psduLength = (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]); //Including FCS (2 bytes)
+ }
+ if( (mStatusAndControlRegs[PHY_IRQSTS1_INDEX_c] & cIRQSTS1_RX_FRM_PEND) == cIRQSTS1_RX_FRM_PEND )
+ {
+ Radio_Phy_PdDataConfirm(mPhyTaskInstance, TRUE);
+ }
+ else
+ {
+ Radio_Phy_PdDataConfirm(mPhyTaskInstance, FALSE);
+ }
+ }
+ break;
+
+ case gRX_c:
+ if( NULL != mpRxParams )
+ {
+ // reports value of 0x00 for -105 dBm of received input power and 0xFF for 0 dBm of received input power
+ mPhyLastRxRSSI = MCR20Drv_DirectAccessSPIRead((uint8_t) LQI_VALUE);
+ mpRxParams->linkQuality = Phy_LqiConvert(mPhyLastRxRSSI);
+ mPhyLastRxLQI = mpRxParams->linkQuality;
+ MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) TIMESTAMP_LSB, (uint8_t *)&mpRxParams->timeStamp, 3);
+ mpRxParams->psduLength = (uint8_t)(mStatusAndControlRegs[PHY_RX_FRM_LEN_INDEX_c]); //Including FCS (2 bytes)
+ }
+ Radio_Phy_PdDataIndication(mPhyTaskInstance);
+ break;
+
+ case gCCA_c:
+ if( (mStatusAndControlRegs[PHY_CTRL4_INDEX_c] & (cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c)) == (gCcaED_c << cPHY_CTRL4_CCATYPE_Shift_c) )
+ {
+ // Ed
+ Radio_Phy_PlmeEdConfirm(MCR20Drv_DirectAccessSPIRead((uint8_t) CCA1_ED_FNL), mPhyTaskInstance);
+ }
+ else
+ {
+ // CCA
+ if( mStatusAndControlRegs[PHY_IRQSTS2_INDEX_c] & cIRQSTS2_CCA )
+ {
+#if (gUseStandaloneCCABeforeTx_d == 1)
+ phyLocal[mPhyTaskInstance].txParams.numOfCca = 0;
+#endif
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelBusy_c, mPhyTaskInstance);
+ }
+ else
+ {
+#if (gUseStandaloneCCABeforeTx_d == 1)
+ if( phyLocal[mPhyTaskInstance].txParams.numOfCca > 0 )
+ {
+ mStatusAndControlRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+
+ if( --phyLocal[mPhyTaskInstance].txParams.numOfCca == 0 )
+ {
+ // perform TxRxAck sequence if required by phyTxMode
+ if( gPhyRxAckRqd_c == phyLocal[mPhyTaskInstance].txParams.ackRequired )
+ {
+ mStatusAndControlRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_RXACKRQD);
+ mStatusAndControlRegs[PHY_CTRL1] |= gTR_c;
+ }
+ else
+ {
+ mStatusAndControlRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_RXACKRQD);
+ mStatusAndControlRegs[PHY_CTRL1] |= gTX_c;
+ }
+ }
+ else
+ {
+ mStatusAndControlRegs[PHY_CTRL1] |= gCCA_c;
+ }
+
+ mStatusAndControlRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+ // start the sequence immediately
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PHY_CTRL1,
+ &mStatusAndControlRegs[PHY_CTRL1],
+ 2);
+ }
+ else
+#endif
+ {
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelIdle_c, mPhyTaskInstance);
+ }
+ }
+ }
+ break;
+
+ case gCCCA_c:
+ Radio_Phy_PlmeCcaConfirm(gPhyChannelIdle_c, mPhyTaskInstance);
+ break;
+
+ default:
+ Radio_Phy_PlmeSyncLossIndication(mPhyTaskInstance);
+ break;
+ }
+ }
+ // timers interrupt
+ else
+ {
+ if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR2IRQ )
+ {
+ // disable TMR2 comparator and time triggered action
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR2CMP_EN);
+ mStatusAndControlRegs[PHY_CTRL1_INDEX_c] &= (uint8_t) ~( cPHY_CTRL1_TMRTRIGEN);
+
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, mStatusAndControlRegs[PHY_CTRL1_INDEX_c]);
+
+ Radio_Phy_TimeStartEventIndication(mPhyTaskInstance);
+ }
+
+ if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR3IRQ )
+ {
+ /* disable TMR3 comparator and timeout */
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR3CMP_EN);
+ mStatusAndControlRegs[PHY_CTRL4_INDEX_c] &= (uint8_t) ~( cPHY_CTRL4_TC3TMOUT);
+
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, mStatusAndControlRegs[PHY_CTRL4_INDEX_c]);
+
+ /* Ensure that we're not issuing TimeoutIndication while the Automated sequence is still in progress */
+ /* TMR3 can expire during R-T turnaround for example, case in which the sequence is not interrupted */
+ if( gIdle_c == xcvseqCopy )
+ {
+ Radio_Phy_TimeRxTimeoutIndication(mPhyTaskInstance);
+ }
+ }
+
+ /* Timer 4 Compare Match */
+ if( mStatusAndControlRegs[PHY_IRQSTS3_INDEX_c] & cIRQSTS3_TMR4IRQ )
+ {
+ /* disable TMR4 comparator */
+ mStatusAndControlRegs[PHY_CTRL3_INDEX_c] &= (uint8_t) ~( cPHY_CTRL3_TMR4CMP_EN);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, mStatusAndControlRegs[PHY_CTRL3_INDEX_c]);
+ }
+ }
+
+ MCR20Drv_IRQ_Enable();
+}
+
+/*! *********************************************************************************
+* \brief This function installs the PHY ISR
+*
+********************************************************************************** */
+void PHY_InstallIsr( void )
+{
+ /*Initialise RF interrupt pin*/
+ RF_IRQ_Init();
+
+ //GpioInstallIsr(PHY_InterruptHandler, gGpioIsrPrioHigh_c, MCR20_Irq_Priority, kGpioXcvrIrqPin);
+}
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/PhyInterface.h Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,352 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyInterface.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _PHY_INTERFACE_H
+#define _PHY_INTERFACE_H
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "PhyTypes.h"
+//#include "Messaging.h"
+#include "PhyConfig.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/* Constants */
+#ifndef gMaxPhyTimers_c
+#define gMaxPhyTimers_c (5)
+#endif
+
+#ifdef gPHY_802_15_4g_d
+#define gPhySeqStartAsap_c (0xFFFFFFFFFFFFFFFF)
+#else
+#define gPhySeqStartAsap_c (0xFFFFFFFF)
+#endif
+
+/* XCVR active/idle power modes */
+#define gPhyDefaultActivePwrMode_c gPhyPwrAutodoze_c /* Do not change! */
+#define gPhyDefaultIdlePwrMode_c gPhyPwrAutodoze_c
+
+/************************************************************************************
+*************************************************************************************
+* Public prototypes
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+
+typedef enum
+{
+#include "PhyMessages.h"
+}phyMessageId_t;
+
+typedef enum{
+ gPhyPwrIdle_c,
+ gPhyPwrAutodoze_c,
+ gPhyPwrDoze_c,
+ gPhyPwrHibernate_c,
+ gPhyPwrReset_c
+}phyPwrMode_t;
+
+typedef struct pdDataReq_tag
+{
+ phyTime_t startTime; // absolute
+ uint32_t txDuration; // relative
+ phySlottedMode_t slottedTx;
+ phyCCAType_t CCABeforeTx;
+ phyAckRequired_t ackRequired;
+ uint8_t psduLength;
+#ifdef gPHY_802_15_4g_d
+ phyPHR_t phyHeader;
+ uint8_t macDataIndex;
+ uint8_t fillFifoBlockLength;
+#endif // gPHY_802_15_4g_d
+ uint8_t * pPsdu;
+} pdDataReq_t;
+
+typedef struct pdDataCnf_tag
+{
+ phyStatus_t status;
+} pdDataCnf_t;
+
+typedef struct pdDataInd_tag
+{
+ phyTimeTimestamp_t timeStamp;
+ uint8_t ppduLinkQuality;
+ uint8_t psduLength;
+ uint8_t * pPsdu;
+#ifdef gPHY_802_15_4g_d
+ uint32_t crcValue;
+ bool_t crcValid;
+#endif
+} pdDataInd_t;
+
+typedef struct pdIndQueueInsertReq_tag
+{
+ uint8_t index;
+ uint16_t checksum;
+} pdIndQueueInsertReq_t;
+
+typedef struct pdIndQueueInsertCnf_tag
+{
+ phyStatus_t status;
+} pdIndQueueInsertCnf_t;
+
+typedef struct pdIndQueueRemoveReq_tag
+{
+ uint8_t index;
+} pdIndQueueRemoveReq_t;
+
+typedef struct plmeEdReq_tag
+{
+ phyTime_t startTime; // absolute
+} plmeEdReq_t;
+
+typedef struct plmeCcaReq_tag
+{
+ phyCCAType_t ccaType;
+ phyContCCAMode_t contCcaMode;
+} plmeCcaReq_t;
+
+typedef struct plmeCcaCnf_tag
+{
+ phyStatus_t status;
+} plmeCcaCnf_t;
+
+typedef struct plmeEdCnf_tag
+{
+ phyStatus_t status;
+ uint8_t energyLevel;
+ uint8_t energyLeveldB;
+} plmeEdCnf_t;
+
+typedef struct plmeSetTRxStateReq_tag
+{
+ phyState_t state;
+ phySlottedMode_t slottedMode;
+ phyTime_t startTime; // absolute
+ uint32_t rxDuration; // relative
+} plmeSetTRxStateReq_t;
+
+typedef struct phyTimeEvent_tag
+{
+ phyTimeTimestamp_t timestamp; // absolute
+ phyTimeCallback_t callback;
+ uint32_t parameter;
+}phyTimeEvent_t;
+
+typedef struct plmeSetTRxStateCnf_tag
+{
+ phyStatus_t status;
+} plmeSetTRxStateCnf_t;
+
+typedef struct plmeSetReq_tag
+{
+ phyPibId_t PibAttribute;
+ uint64_t PibAttributeValue;
+} plmeSetReq_t;
+
+typedef struct plmeSetCnf_tag
+{
+ phyStatus_t status;
+ phyPibId_t PibAttribute;
+} plmeSetCnf_t;
+
+typedef struct plmeGetReq_tag
+{
+ phyPibId_t PibAttribute;
+ uint64_t * pPibAttributeValue;
+} plmeGetReq_t;
+
+typedef struct plmeGetCnf_tag
+{
+ phyStatus_t status;
+ phyPibId_t PibAttribute;
+ uint64_t PibAttributeValue;
+} plmeGetCnf_t;
+
+typedef struct macToPlmeMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ plmeEdReq_t edReq;
+ plmeCcaReq_t ccaReq;
+ plmeSetTRxStateReq_t setTRxStateReq;
+ plmeSetReq_t setReq;
+ plmeGetReq_t getReq;
+ }msgData;
+} macToPlmeMessage_t;
+
+typedef struct macToPdDataMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ pdDataReq_t dataReq;
+ pdIndQueueInsertReq_t indQueueInsertReq;
+ pdIndQueueRemoveReq_t indQueueRemoveReq;
+ }msgData;
+} macToPdDataMessage_t;
+
+typedef struct plmeToMacMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ plmeCcaCnf_t ccaCnf;
+ plmeEdCnf_t edCnf;
+ plmeSetTRxStateCnf_t setTRxStateCnf;
+ plmeSetCnf_t setCnf;
+ plmeGetCnf_t getCnf;
+ }msgData;
+} plmeToMacMessage_t;
+
+typedef struct pdDataToMacMessage_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+ union
+ {
+ pdDataCnf_t dataCnf;
+ pdDataInd_t dataInd;
+ pdIndQueueInsertCnf_t indQueueInsertCnf;
+ }msgData;
+} pdDataToMacMessage_t;
+
+typedef struct phyMessageHeader_tag
+{
+ phyMessageId_t msgType;
+ uint8_t macInstance;
+} phyMessageHeader_t;
+
+typedef struct phyRxParams_tag {
+ phyTime_t timeStamp;
+ uint8_t psduLength;
+ uint8_t linkQuality;
+#ifdef gPHY_802_15_4g_d
+ uint8_t headerLength;
+ uint8_t macDataIndex;
+ uint8_t unfillFifoBlockLength;
+ phyPHR_t phyHeader;
+#else
+ phySlottedMode_t phyRxMode;
+ pdDataToMacMessage_t *pRxData;
+#endif // gPHY_802_15_4g_d
+} phyRxParams_t;
+
+typedef struct phyChannelParams_tag {
+ union{
+ phyStatus_t channelStatus;
+ uint8_t energyLeveldB;
+ };
+#ifdef gPHY_802_15_4g_d
+ uint8_t ccaThreshold;
+ uint8_t ccaParam;
+#endif // gPHY_802_15_4g_d
+} phyChannelParams_t;
+
+typedef struct phyTxParams_tag {
+ uint8_t numOfCca;
+ phyAckRequired_t ackRequired;
+} phyTxParams_t;
+
+typedef phyStatus_t ( * PD_MAC_SapHandler_t)(pdDataToMacMessage_t * pMsg, instanceId_t instanceId);
+
+typedef phyStatus_t ( * PLME_MAC_SapHandler_t)(plmeToMacMessage_t * pMsg, instanceId_t instanceId);
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+extern const uint8_t gPhyIndirectQueueSize_c;
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+void Phy_Init( void );
+
+instanceId_t BindToPHY( instanceId_t macInstance );
+
+// SAPs
+void Phy_RegisterSapHandlers(PD_MAC_SapHandler_t pPD_MAC_SapHandler, PLME_MAC_SapHandler_t pPLME_MAC_SapHandler, instanceId_t instanceId);
+
+phyStatus_t MAC_PD_SapHandler(macToPdDataMessage_t * pMsg, instanceId_t phyInstance);
+
+phyStatus_t MAC_PLME_SapHandler(macToPlmeMessage_t * pMsg, instanceId_t phyInstance);
+
+// PHY Time
+void PhyTime_Maintenance ( void );
+
+void PhyTime_RunCallback ( void );
+
+void PhyTime_ISR ( void );
+
+phyTimeStatus_t PhyTime_TimerInit ( void (*cb)(void) );
+
+phyTimeTimestamp_t PhyTime_GetTimestamp ( void );
+
+phyTimeTimerId_t PhyTime_ScheduleEvent( phyTimeEvent_t *pEvent );
+
+phyTimeStatus_t PhyTime_CancelEvent ( phyTimeTimerId_t timerId );
+
+phyTimeStatus_t PhyTime_CancelEventsWithParam ( uint32_t param );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _PHY_INTERFACE_H */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/RF_Drivers_Freescale/PhyMessages.h Sun Mar 15 00:56:28 2015 -0500 @@ -0,0 +1,106 @@ +/*! +* Copyright (c) 2015, Freescale Semiconductor, Inc. +* All rights reserved. +* +* \file PhyMessages.h +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* o Redistributions of source code must retain the above copyright notice, this list +* of conditions and the following disclaimer. +* +* o Redistributions in binary form must reproduce the above copyright notice, this +* list of conditions and the following disclaimer in the documentation and/or +* other materials provided with the distribution. +* +* o Neither the name of Freescale Semiconductor, Inc. nor the names of its +* contributors may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _PHY_MESSAGES_H +#define _PHY_MESSAGES_H + + +/************************************************************************************ +************************************************************************************* +* Include +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public macros +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public prototypes +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public type definitions +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public memory declarations +************************************************************************************* +************************************************************************************/ + +/************************************************************************************ +************************************************************************************* +* Public functions +************************************************************************************* +************************************************************************************/ + +/* 802.15.4-2006 standard PHY PD and PLME API messages */ + gPdDataReq_c, + gPdDataCnf_c, + gPdDataInd_c, + + gPdIndQueueInsertReq_c, + gPdIndQueueInsertCnf_c, + gPdIndQueueRemoveReq_c, + + gPlmeCcaReq_c, + gPlmeCcaCnf_c, + + gPlmeEdReq_c, + gPlmeEdCnf_c, + + gPlmeSetTRxStateReq_c, + gPlmeSetTRxStateCnf_c, + + gPlmeSetReq_c, + gPlmeSetCnf_c, + + gPlmeGetReq_c, + gPlmeGetCnf_c, + + gPlmeTimeoutInd_c, + + gPlme_StartEventInd_c, + gPlme_SyncLossInd_c, + gPlme_RxSfdDetectInd_c, + gPlme_FilterFailInd_c, + gPlme_UnexpectedRadioResetInd_c, + + +#endif /* _PHY_MESSAGES_H */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/PhyPacketProcessor.c Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,1135 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyPacketProcessor.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+//#include "board.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "MCR20Overwrites.h"
+
+#include "Phy.h"
+#include "MpmInterface.h"
+
+//#include "fsl_os_abstraction.h"
+//#include "fsl_gpio_driver.h"
+
+//extern const IRQn_Type g_portIrqId[HW_PORT_INSTANCE_COUNT];
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+// Address mode indentifiers. Used for both network and MAC interfaces
+#define gPhyAddrModeNoAddr_c (0)
+#define gPhyAddrModeInvalid_c (1)
+#define gPhyAddrMode16BitAddr_c (2)
+#define gPhyAddrMode64BitAddr_c (3)
+
+#define PHY_MIN_RNG_DELAY 4
+
+/************************************************************************************
+*************************************************************************************
+* Private variables
+*************************************************************************************
+************************************************************************************/
+
+const uint8_t gPhyIdlePwrState = gPhyDefaultIdlePwrMode_c;
+const uint8_t gPhyActivePwrState = gPhyDefaultActivePwrMode_c;
+
+const uint8_t gPhyIndirectQueueSize_c = 12;
+static uint8_t mPhyCurrentSamLvl = 12;
+static uint8_t mPhyPwrState = gPhyPwrIdle_c;
+
+/************************************************************************************
+*************************************************************************************
+* Public Functions
+*************************************************************************************
+************************************************************************************/
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyGetRandomNo
+ * Description: - This function should be called only when the Radio is idle.
+ * The function may take a long time to run!
+ * It is recomended to use this function only to initializa a seed at startup!
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+
+void PhyGetRandomNo(uint32_t *pRandomNo)
+{
+ uint8_t i = 4, prevRN=0;
+ uint8_t* ptr = (uint8_t *)pRandomNo;
+ uint32_t startTime, endTime;
+ uint8_t phyReg;
+
+ MCR20Drv_IRQ_Disable();
+
+ if( PhyPpGetState() )
+ {
+ *pRandomNo = 0;
+ MCR20Drv_IRQ_Enable();
+ return;
+ }
+
+ while (i--)
+ {
+ PhyTimeReadClock(&startTime);
+
+ // Program a new sequence
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ MCR20Drv_DirectAccessSPIWrite( PHY_CTRL1, phyReg | gRX_c);
+
+ // wait a variable number of symbols */
+ do
+ PhyTimeReadClock(&endTime);
+ while( ((endTime - startTime) & 0x00FFFFFF) < (PHY_MIN_RNG_DELAY + (prevRN>>5)));
+
+ // Abort the sequence
+ PhyAbort();
+
+ // Read new 8 bit random number
+ prevRN = MCR20Drv_IndirectAccessSPIRead((uint8_t)_RNG);
+ *ptr++ = prevRN;
+ }
+
+ MCR20Drv_IRQ_Enable();
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanAuto
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanAuto
+(
+ bool_t mode
+)
+{
+ uint8_t phyReg, phyReg2;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ if( mode )
+ {
+ phyReg2 = phyReg | (cDUAL_PAN_CTRL_DUAL_PAN_AUTO);
+ }
+ else
+ {
+ phyReg2 = phyReg & (~cDUAL_PAN_CTRL_DUAL_PAN_AUTO);
+ }
+
+ /* Write the new value only if it has changed */
+ if (phyReg2 != phyReg)
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg2);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanAuto
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpGetDualPanAuto
+(
+ void
+)
+{
+ uint8_t phyReg = MCR20Drv_IndirectAccessSPIRead(DUAL_PAN_CTRL);
+ return (phyReg & cDUAL_PAN_CTRL_DUAL_PAN_AUTO) == cDUAL_PAN_CTRL_DUAL_PAN_AUTO;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanDwell
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanDwell // TODO: check seq state and return phyStatus_t
+(
+ uint8_t dwell
+)
+{
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_DWELL, dwell);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanDwell
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanDwell
+(
+ void
+)
+{
+ return MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_DWELL);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanRemain
+ * Description: -
+ * Parameters: -
+ * Return: - the remaining Dwell time
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanRemain()
+{
+ return (MCR20Drv_IndirectAccessSPIRead(DUAL_PAN_STS) & cDUAL_PAN_STS_DUAL_PAN_REMAIN);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanSamLvl
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanSamLvl // TODO: check seq state and return phyStatus_t
+(
+ uint8_t level
+)
+{
+ uint8_t phyReg;
+#ifdef PHY_PARAMETERS_VALIDATION
+ if( level > gPhyIndirectQueueSize_c )
+ return;
+#endif
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ phyReg &= ~cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_MSK; // clear current lvl
+ phyReg |= level << cDUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_Shift_c; // set new lvl
+
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg);
+ mPhyCurrentSamLvl = level;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanSamLvl
+ * Description: -
+ * Parameters: -
+ * Return:
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanSamLvl()
+{
+ return mPhyCurrentSamLvl;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetDualPanActiveNwk
+ * Description: - Select Active PAN
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetDualPanActiveNwk // TODO: check seq state and return phyStatus_t
+(
+ uint8_t nwk
+)
+{
+ uint8_t phyReg, phyReg2;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ if( 0 == nwk )
+ {
+ phyReg2 = phyReg & (~cDUAL_PAN_CTRL_ACTIVE_NETWORK);
+ }
+ else
+ {
+ phyReg2 = phyReg | cDUAL_PAN_CTRL_ACTIVE_NETWORK;
+ }
+
+ /* Write the new value only if it has changed */
+ if( phyReg2 != phyReg )
+ {
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg2);
+ }
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanActiveNwk
+ * Description: -
+ * Parameters: -
+ * Return: - the Active PAN
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetDualPanActiveNwk(void)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t)DUAL_PAN_CTRL );
+
+ return (phyReg & cDUAL_PAN_CTRL_CURRENT_NETWORK) > 0;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetDualPanNwkOfRxPacket
+ * Description: -
+ * Parameters: -
+ * Return: - the Active PAN
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetPanOfRxPacket(void)
+{
+ uint8_t phyReg;
+ uint8_t PanBitMask = 0;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_STS);
+
+ if( phyReg & cDUAL_PAN_STS_RECD_ON_PAN0 )
+ PanBitMask |= (1<<0);
+
+ if( phyReg & cDUAL_PAN_STS_RECD_ON_PAN1 )
+ PanBitMask |= (1<<1);
+
+ return PanBitMask;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPromiscuous
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetPromiscuous
+(
+ bool_t mode
+)
+{
+ uint8_t rxFrameFltReg, phyCtrl4Reg;
+
+ rxFrameFltReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) RX_FRAME_FILTER);
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
+
+ if( mode )
+ {
+ /* FRM_VER[1:0] = b00. 00: Any FrameVersion accepted (0,1,2 & 3) */
+ /* All frame types accepted*/
+ phyCtrl4Reg |= cPHY_CTRL4_PROMISCUOUS;
+ rxFrameFltReg &= ~(cRX_FRAME_FLT_FRM_VER);
+ rxFrameFltReg |= (cRX_FRAME_FLT_ACK_FT | cRX_FRAME_FLT_NS_FT);
+ }
+ else
+ {
+ phyCtrl4Reg &= ~cPHY_CTRL4_PROMISCUOUS;
+ /* FRM_VER[1:0] = b11. Accept FrameVersion 0 and 1 packets, reject all others */
+ /* Beacon, Data and MAC command frame types accepted */
+ rxFrameFltReg &= ~(cRX_FRAME_FLT_FRM_VER);
+ rxFrameFltReg |= (0x03 << cRX_FRAME_FLT_FRM_VER_Shift_c);
+ rxFrameFltReg &= ~(cRX_FRAME_FLT_ACK_FT | cRX_FRAME_FLT_NS_FT);
+ }
+
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) RX_FRAME_FILTER, rxFrameFltReg);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhySetActivePromiscuous()
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhySetActivePromiscuous(bool_t state)
+{
+ uint8_t phyCtrl4Reg;
+ uint8_t phyFrameFilterReg;
+// bool_t currentState;
+
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
+ phyFrameFilterReg = MCR20Drv_IndirectAccessSPIRead(RX_FRAME_FILTER);
+
+// currentState = (phyFrameFilterReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS) ? TRUE : FALSE;
+//
+// if( state == currentState )
+// return;
+
+ /* if Prom is set */
+ if( state )
+ {
+ if( phyCtrl4Reg & cPHY_CTRL4_PROMISCUOUS )
+ {
+ /* Disable Promiscuous mode */
+ phyCtrl4Reg &= ~(cPHY_CTRL4_PROMISCUOUS);
+
+ /* Enable Active Promiscuous mode */
+ phyFrameFilterReg |= cRX_FRAME_FLT_ACTIVE_PROMISCUOUS;
+ }
+ }
+ else
+ {
+ if( phyFrameFilterReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS )
+ {
+ /* Disable Active Promiscuous mode */
+ phyFrameFilterReg &= ~(cRX_FRAME_FLT_ACTIVE_PROMISCUOUS);
+
+ /* Enable Promiscuous mode */
+ phyCtrl4Reg |= cPHY_CTRL4_PROMISCUOUS;
+ }
+ }
+
+ MCR20Drv_DirectAccessSPIWrite((uint8_t) PHY_CTRL4, phyCtrl4Reg);
+ MCR20Drv_IndirectAccessSPIWrite(RX_FRAME_FILTER, phyFrameFilterReg);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyGetActivePromiscuous()
+ * Description: - returns the state of ActivePromiscuous feature (Enabled/Disabled)
+ * Parameters: -
+ * Return: - TRUE/FALSE
+ *---------------------------------------------------------------------------*/
+bool_t PhyGetActivePromiscuous( void )
+{
+ uint8_t phyReg = MCR20Drv_IndirectAccessSPIRead(RX_FRAME_FILTER);
+
+ if( phyReg & cRX_FRAME_FLT_ACTIVE_PROMISCUOUS )
+ return TRUE;
+
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetPanId
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetPanId
+(
+ uint8_t *pPanId,
+ uint8_t pan
+)
+{
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pPanId)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( 0 == pan )
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACPANID0_LSB, pPanId, 2);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACPANID1_LSB, pPanId, 2);
+
+ return gPhySuccess_c;
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetShortAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetShortAddr
+(
+ uint8_t *pShortAddr,
+ uint8_t pan
+)
+{
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pShortAddr)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( pan == 0 )
+ {
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACSHORTADDRS0_LSB, pShortAddr, 2);
+ }
+ else
+ {
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACSHORTADDRS1_LSB, pShortAddr, 2);
+ }
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetLongAddr
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetLongAddr
+(
+ uint8_t *pLongAddr,
+ uint8_t pan
+)
+{
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pLongAddr)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( 0 == pan )
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACLONGADDRS0_0, pLongAddr, 8);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteWrite((uint8_t) MACLONGADDRS1_0, pLongAddr, 8);
+
+ return gPhySuccess_c;
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetMacRole
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetMacRole
+(
+ bool_t macRole,
+ uint8_t pan
+)
+{
+ uint8_t phyReg;
+
+ if( 0 == pan )
+ {
+ phyReg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL4);
+
+ if(gMacRole_PanCoord_c == macRole)
+ {
+ phyReg |= cPHY_CTRL4_PANCORDNTR0;
+ }
+ else
+ {
+ phyReg &= ~cPHY_CTRL4_PANCORDNTR0;
+ }
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
+ }
+ else
+ {
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+
+ if(gMacRole_PanCoord_c == macRole)
+ {
+ phyReg |= cDUAL_PAN_CTRL_PANCORDNTR1;
+ }
+ else
+ {
+ phyReg &= ~cDUAL_PAN_CTRL_PANCORDNTR1;
+ }
+ MCR20Drv_IndirectAccessSPIWrite( (uint8_t) DUAL_PAN_CTRL, phyReg);
+ }
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsTxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsTxAckDataPending
+(
+void
+)
+{
+ uint8_t srcCtrlReg;
+
+ srcCtrlReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
+ if( srcCtrlReg & cSRC_CTRL_SRCADDR_EN )
+ {
+ uint8_t irqsts2Reg;
+
+ irqsts2Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS2);
+
+ if(irqsts2Reg & cIRQSTS2_SRCADDR)
+ return TRUE;
+ else
+ return FALSE;
+ }
+ else
+ {
+ return ((srcCtrlReg & cSRC_CTRL_ACK_FRM_PND) == cSRC_CTRL_ACK_FRM_PND);
+ }
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsRxAckDataPending
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsRxAckDataPending
+(
+ void
+)
+{
+ uint8_t irqsts1Reg;
+ irqsts1Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS1);
+ if(irqsts1Reg & cIRQSTS1_RX_FRM_PEND)
+ {
+ return TRUE;
+ }
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetFpManually
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetFpManually
+(
+ bool_t FP
+)
+{
+ uint8_t phyReg;
+ /* Disable the Source Address Matching feature and set FP manually */
+ phyReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
+ phyReg &= ~(cSRC_CTRL_SRCADDR_EN);
+ if(FP)
+ phyReg |= cSRC_CTRL_ACK_FRM_PND;
+ else
+ phyReg &= ~(cSRC_CTRL_ACK_FRM_PND);
+ MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, phyReg);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpIsPollIndication
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+bool_t PhyPpIsPollIndication
+(
+ void
+)
+{
+ uint8_t irqsts2Reg;
+ irqsts2Reg = MCR20Drv_DirectAccessSPIRead((uint8_t) IRQSTS2);
+ if(irqsts2Reg & cIRQSTS2_PI)
+ {
+ return TRUE;
+ }
+ return FALSE;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetCcaThreshold
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPpSetCcaThreshold(uint8_t ccaThreshold)
+{
+ MCR20Drv_IndirectAccessSPIWrite((uint8_t) CCA1_THRESH, (uint8_t) ccaThreshold);
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpSetSAMState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+void PhyPpSetSAMState
+(
+ bool_t state
+)
+{
+ uint8_t phyReg, newPhyReg;
+ /* Disable/Enables the Source Address Matching feature */
+ phyReg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
+ if( state )
+ newPhyReg = phyReg | cSRC_CTRL_SRCADDR_EN;
+ else
+ newPhyReg = phyReg & ~(cSRC_CTRL_SRCADDR_EN);
+
+ if( newPhyReg != phyReg )
+ MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, newPhyReg);
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetFADStateRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetFADStateRequest(bool_t state)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
+ state ? (phyReg |= cANT_AGC_CTRL_FAD_EN_Mask_c) : (phyReg &= (~((uint8_t)cANT_AGC_CTRL_FAD_EN_Mask_c)));
+ MCR20Drv_IndirectAccessSPIWrite(ANT_AGC_CTRL, phyReg);
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_PAD_CTRL);
+ state ? (phyReg |= 0x02) : (phyReg &= ~cANT_PAD_CTRL_ANTX_EN);
+ MCR20Drv_IndirectAccessSPIWrite(ANT_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetFADThresholdRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetFADThresholdRequest(uint8_t FADThreshold)
+{
+ MCR20Drv_IndirectAccessSPIWrite(FAD_THR, FADThreshold);
+ return gPhySuccess_c;
+}
+
+uint8_t PhyPlmeSetANTPadStateRequest(bool_t antAB_on, bool_t rxtxSwitch_on)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_PAD_CTRL);
+ antAB_on ? (phyReg |= 0x02) : (phyReg &= ~0x02);
+ rxtxSwitch_on ? (phyReg |= 0x01) : (phyReg &= ~0x01);
+ MCR20Drv_IndirectAccessSPIWrite(ANT_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+uint8_t PhyPlmeSetANTPadStrengthRequest(bool_t hiStrength)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(MISC_PAD_CTRL);
+ hiStrength ? (phyReg |= cMISC_PAD_CTRL_ANTX_CURR) : (phyReg &= ~cMISC_PAD_CTRL_ANTX_CURR);
+ MCR20Drv_IndirectAccessSPIWrite(MISC_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+uint8_t PhyPlmeSetANTPadInvertedRequest(bool_t invAntA, bool_t invAntB, bool_t invTx, bool_t invRx)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(MISC_PAD_CTRL);
+ invAntA ? (phyReg |= 0x10) : (phyReg &= ~0x10);
+ invAntB ? (phyReg |= 0x20) : (phyReg &= ~0x20);
+ invTx ? (phyReg |= 0x40) : (phyReg &= ~0x40);
+ invRx ? (phyReg |= 0x80) : (phyReg &= ~0x80);
+ MCR20Drv_IndirectAccessSPIWrite(MISC_PAD_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetANTXStateRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetANTXStateRequest(bool_t state)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
+ state ? (phyReg |= cANT_AGC_CTRL_ANTX_Mask_c) : (phyReg &= (~((uint8_t)cANT_AGC_CTRL_ANTX_Mask_c)));
+ MCR20Drv_IndirectAccessSPIWrite(ANT_AGC_CTRL, phyReg);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetANTXStateRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetANTXStateRequest(void)
+{
+ uint8_t phyReg;
+
+ phyReg = MCR20Drv_IndirectAccessSPIRead(ANT_AGC_CTRL);
+
+ return ((phyReg & cANT_AGC_CTRL_ANTX_Mask_c) == cANT_AGC_CTRL_ANTX_Mask_c);
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_IndirectQueueInsert
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_IndirectQueueInsert // TODO: to validate add to indirect queue parameters
+(
+ uint8_t index,
+ uint16_t checkSum,
+ instanceId_t instanceId
+)
+{
+ uint16_t srcAddressCheckSum = checkSum;
+ uint8_t srcCtrlReg;
+
+ if( index >= gPhyIndirectQueueSize_c )
+ return gPhyInvalidParameter_c;
+
+ srcCtrlReg = (uint8_t) ( (index & cSRC_CTRL_INDEX) << cSRC_CTRL_INDEX_Shift_c );
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) SRC_ADDRS_SUM_LSB, (uint8_t *) &srcAddressCheckSum, 2);
+
+ srcCtrlReg |= ( cSRC_CTRL_SRCADDR_EN | cSRC_CTRL_INDEX_EN );
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
+
+ return gPhySuccess_c;
+
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPp_RemoveFromIndirect
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+phyStatus_t PhyPp_RemoveFromIndirect
+(
+ uint8_t index,
+ instanceId_t instanceId
+)
+{
+ uint8_t srcCtrlReg;
+
+ if( index >= gPhyIndirectQueueSize_c )
+ return gPhyInvalidParameter_c;
+
+ srcCtrlReg = (uint8_t)( ( (index & cSRC_CTRL_INDEX) << cSRC_CTRL_INDEX_Shift_c )
+ |( cSRC_CTRL_SRCADDR_EN )
+ |( cSRC_CTRL_INDEX_DISABLE) );
+
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) SRC_CTRL, srcCtrlReg);
+
+ return gPhySuccess_c;
+}
+
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPpGetState
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPpGetState
+(
+ void
+)
+{
+ return (uint8_t)( MCR20Drv_DirectAccessSPIRead( (uint8_t) PHY_CTRL1) & cPHY_CTRL1_XCVSEQ );
+}
+
+/*! *********************************************************************************
+* \brief Aborts the current sequence and force the radio to IDLE
+*
+********************************************************************************** */
+void PhyAbort(void)
+{
+ uint8_t phyRegs[8];
+ volatile uint8_t currentTime = 0;
+
+ ProtectFromMCR20Interrupt();
+
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 7);
+
+ // Disable timer trigger (for scheduled XCVSEQ)
+ if( phyRegs[PHY_CTRL1] & cPHY_CTRL1_TMRTRIGEN )
+ {
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_TMRTRIGEN );
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ // give the FSM enough time to start if it was triggered
+ currentTime = (uint8_t) ( MCR20Drv_DirectAccessSPIRead(EVENT_TMR_LSB) + 2 );
+ while(MCR20Drv_DirectAccessSPIRead(EVENT_TMR_LSB) != (uint8_t) (currentTime));
+
+ phyRegs[PHY_CTRL1] = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ }
+
+ if( (phyRegs[PHY_CTRL1] & cPHY_CTRL1_XCVSEQ) != gIdle_c )
+ {
+ // Abort current SEQ
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ // wait for Sequence Idle (if not already)
+ while ((MCR20Drv_DirectAccessSPIRead(SEQ_STATE) & 0x1F) != 0);
+ }
+
+ // mask SEQ interrupt
+ phyRegs[PHY_CTRL2] |= (uint8_t) (cPHY_CTRL2_SEQMSK);
+ // stop timers
+ phyRegs[PHY_CTRL3] &= (uint8_t) ~(cPHY_CTRL3_TMR2CMP_EN | cPHY_CTRL3_TMR3CMP_EN);
+ phyRegs[PHY_CTRL4] &= (uint8_t) ~(cPHY_CTRL4_TC3TMOUT);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PHY_CTRL2, &phyRegs[PHY_CTRL2], 4);
+
+ // clear all PP IRQ bits to avoid unexpected interrupts
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+
+ PhyIsrPassRxParams(NULL);
+
+ UnprotectFromMCR20Interrupt();
+}
+
+
+/*! *********************************************************************************
+* \brief Initialize the 802.15.4 Radio registers
+*
+********************************************************************************** */
+
+void PhyHwInit( void )
+{
+ uint8_t index;
+ uint8_t phyReg;
+
+ /* Initialize the transceiver SPI driver */
+ MCR20Drv_Init();
+ /* Configure the transceiver IRQ_B port */
+ MCR20Drv_IRQ_PortConfig();
+ /* Initialize the SPI driver and install PHY ISR */
+ PHY_InstallIsr();
+
+ //Disable Tristate on COCO MISO for SPI reads
+ MCR20Drv_IndirectAccessSPIWrite((uint8_t) MISC_PAD_CTRL, (uint8_t) 0x02);
+
+ // PHY_CTRL4 unmask global TRX interrupts, enable 16 bit mode for TC2 - TC2 prime EN
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, (uint8_t) (cPHY_CTRL4_TC2PRIME_EN | \
+ (gCcaCCA_MODE1_c << cPHY_CTRL4_CCATYPE_Shift_c)));
+
+ // clear all PP IRQ bits to avoid unexpected interrupts immediately after init, disable all timer interrupts
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS1, (uint8_t) (cIRQSTS1_PLL_UNLOCK_IRQ | \
+ cIRQSTS1_FILTERFAIL_IRQ | \
+ cIRQSTS1_RXWTRMRKIRQ | \
+ cIRQSTS1_CCAIRQ | \
+ cIRQSTS1_RXIRQ | \
+ cIRQSTS1_TXIRQ | \
+ cIRQSTS1_SEQIRQ));
+
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS2, (uint8_t) (cIRQSTS2_ASM_IRQ | \
+ cIRQSTS2_PB_ERR_IRQ | \
+ cIRQSTS2_WAKE_IRQ));
+
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS3, (uint8_t) (cIRQSTS3_TMR4MSK | \
+ cIRQSTS3_TMR3MSK | \
+ cIRQSTS3_TMR2MSK | \
+ cIRQSTS3_TMR1MSK | \
+ cIRQSTS3_TMR4IRQ | \
+ cIRQSTS3_TMR3IRQ | \
+ cIRQSTS3_TMR2IRQ | \
+ cIRQSTS3_TMR1IRQ));
+
+ // PHY_CTRL1 default HW settings + AUTOACK enabled
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, (uint8_t) (cPHY_CTRL1_AUTOACK));
+
+ // PHY_CTRL2 : disable all interrupts
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL2, (uint8_t) (cPHY_CTRL2_CRC_MSK | \
+ cPHY_CTRL2_PLL_UNLOCK_MSK | \
+ cPHY_CTRL2_FILTERFAIL_MSK | \
+ cPHY_CTRL2_RX_WMRK_MSK | \
+ cPHY_CTRL2_CCAMSK | \
+ cPHY_CTRL2_RXMSK | \
+ cPHY_CTRL2_TXMSK | \
+ cPHY_CTRL2_SEQMSK));
+
+ // PHY_CTRL3 : disable all timers and remaining interrupts
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL3, (uint8_t) (cPHY_CTRL3_ASM_MSK | \
+ cPHY_CTRL3_PB_ERR_MSK | \
+ cPHY_CTRL3_WAKE_MSK));
+ // SRC_CTRL
+ MCR20Drv_DirectAccessSPIWrite(SRC_CTRL, (uint8_t) (cSRC_CTRL_ACK_FRM_PND | \
+ (cSRC_CTRL_INDEX << cSRC_CTRL_INDEX_Shift_c)));
+ // RX_FRAME_FILTER
+ // FRM_VER[1:0] = b11. Accept FrameVersion 0 and 1 packets, reject all others
+ MCR20Drv_IndirectAccessSPIWrite(RX_FRAME_FILTER, (uint8_t)(cRX_FRAME_FLT_FRM_VER | \
+ cRX_FRAME_FLT_BEACON_FT | \
+ cRX_FRAME_FLT_DATA_FT | \
+ cRX_FRAME_FLT_CMD_FT ));
+ // Direct register overwrites
+ for (index = 0; index < sizeof(overwrites_direct)/sizeof(overwrites_t); index++)
+ MCR20Drv_DirectAccessSPIWrite(overwrites_direct[index].address, overwrites_direct[index].data);
+
+ // Indirect register overwrites
+ for (index = 0; index < sizeof(overwrites_indirect)/sizeof(overwrites_t); index++)
+ MCR20Drv_IndirectAccessSPIWrite(overwrites_indirect[index].address, overwrites_indirect[index].data);
+
+ // Clear HW indirect queue
+ for( index = 0; index < gPhyIndirectQueueSize_c; index++ )
+ PhyPp_RemoveFromIndirect( index, 0 );
+
+ PhyPlmeSetCurrentChannelRequest(0x0B, 0); //2405 MHz
+#if gMpmIncluded_d
+ PhyPlmeSetCurrentChannelRequest(0x0B, 1); //2405 MHz
+
+ // Split the HW Indirect hash table in two
+ PhyPpSetDualPanSamLvl( gPhyIndirectQueueSize_c/2 );
+#else
+ // Assign HW Indirect hash table to PAN0
+ PhyPpSetDualPanSamLvl( gPhyIndirectQueueSize_c );
+#endif
+
+ // set the power level to 0dBm
+ PhyPlmeSetPwrLevelRequest(0x17);
+ // set CCA threshold to -75 dBm
+ PhyPpSetCcaThreshold(0x4B);
+ // Set prescaller to obtain 1 symbol (16us) timebase
+ MCR20Drv_IndirectAccessSPIWrite(TMR_PRESCALE, 0x05);
+ // write default Rx watermark level
+ MCR20Drv_IndirectAccessSPIWrite(RX_WTR_MARK, 0);
+
+ //Enable the RxWatermark IRQ and FilterFail IRQ
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL2);
+ //phyReg &= (uint8_t)~(cPHY_CTRL2_FILTERFAIL_MSK);
+ phyReg &= (uint8_t)~(cPHY_CTRL2_RX_WMRK_MSK);
+ MCR20Drv_DirectAccessSPIWrite(PHY_CTRL2, phyReg);
+
+ /* enable autodoze mode. */
+ phyReg = MCR20Drv_DirectAccessSPIRead( (uint8_t) PWR_MODES);
+ phyReg |= (uint8_t) cPWR_MODES_AUTODOZE;
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PWR_MODES, phyReg);
+ MCR20Drv_Set_CLK_OUT_Freq(gMCR20_ClkOutFreq_d);
+
+ // Clear IRQn Pending Status
+ MCR20Drv_IRQ_Clear();
+ //NVIC_ClearPendingIRQ(g_portIrqId[GPIO_EXTRACT_PORT(kGpioXcvrIrqPin)]);
+ /* enable the transceiver IRQ_B interrupt request */
+ MCR20Drv_IRQ_Enable();
+}
+
+/*! *********************************************************************************
+* \brief Change the XCVR power state
+*
+* \param[in] state the new XCVR power state
+*
+* \return phyStatus_t
+*
+* \pre Before entering hibernate/reset states, the MCG clock source must be changed
+* to use an input other than the one generated by the XCVR!
+*
+* \post When XCVR is in hibernate, indirect registers cannot be accessed in burst mode
+* When XCVR is in reset, all registers are inaccessible!
+*
+* \remarks Putting the XCVR into hibernate/reset will stop the generated clock signal!
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetPwrState( uint8_t state )
+{
+ uint8_t phyPWR, xtalState;
+
+ /* Parameter validation */
+ if( state > gPhyPwrReset_c )
+ return gPhyInvalidParameter_c;
+
+ /* Check if the new power state = old power state */
+ if( state == mPhyPwrState )
+ return gPhyBusy_c;
+
+ /* Check if the XCVR is in reset power mode */
+ if( mPhyPwrState == gPhyPwrReset_c )
+ {
+ MCR20Drv_RST_B_Deassert();
+ /* Wait for transceiver to deassert IRQ pin */
+ while( MCR20Drv_IsIrqPending() );
+ /* Wait for transceiver wakeup from POR iterrupt */
+ while( !MCR20Drv_IsIrqPending() );
+ /* After reset, the radio is in Idle state */
+ mPhyPwrState = gPhyPwrIdle_c;
+ /* Restore default radio settings */
+ PhyHwInit();
+ }
+
+ if( state != gPhyPwrReset_c )
+ {
+ phyPWR = MCR20Drv_DirectAccessSPIRead( PWR_MODES );
+ xtalState = phyPWR & cPWR_MODES_XTALEN;
+ }
+
+ switch( state )
+ {
+ case gPhyPwrIdle_c:
+ phyPWR &= ~(cPWR_MODES_AUTODOZE);
+ phyPWR |= (cPWR_MODES_XTALEN | cPWR_MODES_PMC_MODE);
+ break;
+
+ case gPhyPwrAutodoze_c:
+ phyPWR |= (cPWR_MODES_XTALEN | cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
+ break;
+
+ case gPhyPwrDoze_c:
+ phyPWR &= ~(cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
+ phyPWR |= cPWR_MODES_XTALEN;
+ break;
+
+ case gPhyPwrHibernate_c:
+ phyPWR &= ~(cPWR_MODES_XTALEN | cPWR_MODES_AUTODOZE | cPWR_MODES_PMC_MODE);
+ break;
+
+ case gPhyPwrReset_c:
+ MCR20Drv_IRQ_Disable();
+ mPhyPwrState = gPhyPwrReset_c;
+ MCR20Drv_RST_B_Assert();
+ return gPhySuccess_c;
+ }
+
+ mPhyPwrState = state;
+ MCR20Drv_DirectAccessSPIWrite( PWR_MODES, phyPWR );
+
+ if( !xtalState && (phyPWR & cPWR_MODES_XTALEN))
+ {
+ /* wait for crystal oscillator to complet its warmup */
+ while( ( MCR20Drv_DirectAccessSPIRead(PWR_MODES) & cPWR_MODES_XTAL_READY ) != cPWR_MODES_XTAL_READY);
+ /* wait for radio wakeup from hibernate interrupt */
+ while( ( MCR20Drv_DirectAccessSPIRead(IRQSTS2) & (cIRQSTS2_WAKE_IRQ | cIRQSTS2_TMRSTATUS) ) != (cIRQSTS2_WAKE_IRQ | cIRQSTS2_TMRSTATUS) );
+
+ MCR20Drv_DirectAccessSPIWrite(IRQSTS2, cIRQSTS2_WAKE_IRQ);
+ }
+
+ return gPhySuccess_c;
+}
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/PhyPlmeData.c Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,676 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyPlmeData.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+#include "EmbeddedTypes.h"
+
+//#include "fsl_os_abstraction.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "Phy.h"
+#include "PhyTypes.h"
+#include "PhyInterface.h"
+
+
+
+/************************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+************************************************************************************/
+#define PHY_PARAMETERS_VALIDATION 1
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+ //2405 2410 2415 2420 2425 2430 2435 2440 2445 2450 2455 2460 2465 2470 2475 2480
+static const uint8_t pll_int[16] = {0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0D, 0x0D};
+static const uint16_t pll_frac[16] = {0x2800, 0x5000, 0x7800, 0xA000, 0xC800, 0xF000, 0x1800, 0x4000, 0x6800, 0x9000, 0xB800, 0xE000, 0x0800, 0x3000, 0x5800, 0x8000};
+
+extern Phy_PhyLocalStruct_t phyLocal[];
+static uint8_t gPhyCurrentChannelPAN0 = 0x0B;
+static uint8_t gPhyCurrentChannelPAN1 = 0x0B;
+
+
+/************************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+************************************************************************************/
+static void PhyRxRetry( uint32_t param );
+
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief This function will start a TX sequence. The packet will be sent OTA
+*
+* \param[in] pTxPacket pointer to the TX packet structure
+* \param[in] pRxParams pointer to RX parameters
+* \param[in] pTxParams pointer to TX parameters
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPdDataRequest( pdDataReq_t *pTxPacket,
+ volatile phyRxParams_t *pRxParams,
+ volatile phyTxParams_t *pTxParams )
+{
+ uint8_t phyRegs[5], phyCtrl4Reg;
+ uint8_t *pTmpPsdu, *tmp;
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ // null pointer
+ if(NULL == pTxPacket)
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ // if CCA required ...
+ if( (pTxPacket->CCABeforeTx == gPhyCCAMode3_c) || (pTxPacket->CCABeforeTx == gPhyEnergyDetectMode_c))
+ { // ... cannot perform other types than MODE1 and MODE2
+ return gPhyInvalidParameter_c;
+ }
+
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( gIdle_c != PhyPpGetState() )
+ {
+ return gPhyBusy_c;
+ }
+
+ // load data into PB
+ tmp = pTxPacket->pPsdu;
+
+ pTmpPsdu = (uint8_t *) ((&pTxPacket->pPsdu[0])-1);
+ *pTmpPsdu = pTxPacket->psduLength + 2; /* including 2 bytes of FCS */
+ MCR20Drv_PB_SPIBurstWrite( pTmpPsdu, (uint8_t) (pTxPacket->psduLength + 1)); /* including psduLength */
+
+ pTxPacket->pPsdu = tmp;
+
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
+
+ // perform CCA before TX if required
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_CCABFRTX);
+ phyCtrl4Reg &= (uint8_t) ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
+
+ if( pTxPacket->CCABeforeTx != gPhyNoCCABeforeTx_c )
+ {
+#if (gUseStandaloneCCABeforeTx_d == 0)
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_CCABFRTX);
+#endif
+ phyCtrl4Reg |= (uint8_t) ((cPHY_CTRL4_CCATYPE & pTxPacket->CCABeforeTx) << (cPHY_CTRL4_CCATYPE_Shift_c));
+ }
+
+ // slotted operation
+ if( pTxPacket->slottedTx == gPhySlottedMode_c )
+ {
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_SLOTTED);
+ }
+ else
+ {
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_SLOTTED);
+ }
+
+ // perform TxRxAck sequence if required by phyTxMode
+ if(pTxPacket->ackRequired == gPhyRxAckRqd_c)
+ {
+ PhyIsrPassRxParams(pRxParams);
+
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_RXACKRQD);
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gTR_c;
+ }
+ else
+ {
+ PhyIsrPassRxParams(NULL);
+
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_RXACKRQD);
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gTX_c;
+ }
+
+#if gUseStandaloneCCABeforeTx_d
+ if( pTxPacket->CCABeforeTx != gPhyNoCCABeforeTx_c )
+ {
+ // start the CCA or ED sequence (this depends on CcaType used)
+ // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
+ if( pTxPacket->slottedTx == gPhySlottedMode_c )
+ pTxParams->numOfCca = 2;
+ else
+ pTxParams->numOfCca = 1;
+ pTxParams->ackRequired = pTxPacket->ackRequired;
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gCCA_c;
+ // at the end of the scheduled sequence, an interrupt will occur:
+ // CCA , SEQ or TMR3
+ }
+ else
+ {
+ pTxParams->numOfCca = 0;
+ }
+#endif
+
+ phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+
+ // ensure that no spurious interrupts are raised
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
+
+ // start the TX or TRX sequence
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will start a RX sequence
+*
+* \param[in] phyRxMode slotted/unslotted
+* \param[in] pRxParams pointer to RX parameters
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeRxRequest( phySlottedMode_t phyRxMode, phyRxParams_t * pRxParams )
+{
+ uint8_t phyRegs[5];
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pRxParams)
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( gIdle_c != PhyPpGetState() )
+ {
+ return gPhyBusy_c;
+ }
+
+ pRxParams->phyRxMode = phyRxMode;
+
+ if( NULL == pRxParams->pRxData )
+ {
+ //pRxParams->pRxData = MEM_BufferAlloc(sizeof(pdDataToMacMessage_t) + gMaxPHYPacketSize_c);
+ pRxParams->pRxData = (pdDataToMacMessage_t *) malloc(sizeof(pdDataToMacMessage_t) + gMaxPHYPacketSize_c);
+ }
+
+ if( NULL == pRxParams->pRxData )
+ {
+ phyTimeEvent_t event = {
+ .timestamp = PhyTime_GetTimestamp() + gPhyRxRetryInterval_c,
+ .parameter = (uint32_t)pRxParams,
+ .callback = PhyRxRetry,
+ };
+
+ PhyTime_ScheduleEvent( &event );
+ return gPhyTRxOff_c;
+ }
+
+ PhyIsrPassRxParams(pRxParams);
+
+ pRxParams->pRxData->msgData.dataInd.pPsdu =
+ (uint8_t*)&pRxParams->pRxData->msgData.dataInd.pPsdu +
+ sizeof(pRxParams->pRxData->msgData.dataInd.pPsdu);
+
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
+
+ // slotted operation
+ if(gPhySlottedMode_c == phyRxMode)
+ {
+ phyRegs[PHY_CTRL1] |= (uint8_t) (cPHY_CTRL1_SLOTTED);
+ }
+ else
+ {
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_SLOTTED);
+ }
+
+ // program the RX sequence
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gRX_c;
+
+ phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+
+ // ensure that no spurious interrupts are raised
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
+
+ // start the RX sequence
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will start a CCA / CCCA sequence
+*
+* \param[in] ccaParam the type of CCA
+* \param[in] cccaMode continuous or single CCA
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeCcaEdRequest( phyCCAType_t ccaParam, phyContCCAMode_t cccaMode )
+{
+ uint8_t phyRegs[5];
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ // illegal CCA type
+ if( (ccaParam != gPhyCCAMode1_c) && (ccaParam != gPhyCCAMode2_c) && (ccaParam != gPhyCCAMode3_c) && (ccaParam != gPhyEnergyDetectMode_c))
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ // cannot perform Continuous CCA using ED type
+ if( (ccaParam == gPhyEnergyDetectMode_c) && (cccaMode == gPhyContCcaEnabled) )
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( gIdle_c != PhyPpGetState() )
+ {
+ return gPhyBusy_c;
+ }
+
+ // write in PHY CTRL4 the desired type of CCA
+ phyRegs[0] = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyRegs[0] &= (uint8_t) ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
+ phyRegs[0] |= (uint8_t) ((cPHY_CTRL4_CCATYPE & ccaParam) << (cPHY_CTRL4_CCATYPE_Shift_c));
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t)PHY_CTRL4, phyRegs[0]);
+
+ phyRegs[0] = MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &phyRegs[1], 4);
+
+ // continuous CCA
+ if(cccaMode == gPhyContCcaEnabled)
+ {
+ // start the continuous CCA sequence
+ // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gCCCA_c;
+ // at the end of the scheduled sequence, an interrupt will occur:
+ // CCA , SEQ or TMR3
+ }
+ // normal CCA (not continuous)
+ else
+ {
+ // start the CCA or ED sequence (this depends on CcaType used)
+ // immediately or by TC2', depending on a previous PhyTimeSetEventTrigger() call)
+ phyRegs[PHY_CTRL1] &= (uint8_t) ~(cPHY_CTRL1_XCVSEQ);
+ phyRegs[PHY_CTRL1] |= gCCA_c;
+ // at the end of the scheduled sequence, an interrupt will occur:
+ // CCA , SEQ or TMR3
+ }
+
+ phyRegs[PHY_CTRL2] &= (uint8_t) ~(cPHY_CTRL2_SEQMSK); // unmask SEQ interrupt
+
+ // ensure that no spurious interrupts are raised
+ phyRegs[IRQSTS3] &= 0xF0; // do not change IRQ status
+ phyRegs[IRQSTS3] |= (uint8_t) (cIRQSTS3_TMR3MSK |
+ cIRQSTS3_TMR2IRQ |
+ cIRQSTS3_TMR3IRQ); // mask TMR3 interrupt
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, phyRegs, 3);
+
+ // start the CCA/ED or CCCA sequence
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL2, phyRegs[PHY_CTRL2]);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyRegs[PHY_CTRL1]);
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will set the channel number for the specified PAN
+*
+* \param[in] channel new channel number
+* \param[in] pan the PAN registers (0/1)
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetCurrentChannelRequest
+(
+ uint8_t channel,
+ uint8_t pan
+)
+{
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if((channel < 11) || (channel > 26))
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ if( !pan )
+ {
+ gPhyCurrentChannelPAN0 = channel;
+ MCR20Drv_DirectAccessSPIWrite(PLL_INT0, pll_int[channel - 11]);
+ MCR20Drv_DirectAccessSPIMultiByteWrite(PLL_FRAC0_LSB, (uint8_t *) &pll_frac[channel - 11], 2);
+ }
+ else
+ {
+ gPhyCurrentChannelPAN1 = channel;
+ MCR20Drv_IndirectAccessSPIWrite(PLL_INT1, pll_int[channel - 11]);
+ MCR20Drv_IndirectAccessSPIMultiByteWrite(PLL_FRAC1_LSB, (uint8_t *) &pll_frac[channel - 11], 2);
+ }
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function will return the current channel for a specified PAN
+*
+* \param[in] pan the PAN registers (0/1)
+*
+* \return uint8_t current channel number
+*
+********************************************************************************** */
+uint8_t PhyPlmeGetCurrentChannelRequest
+(
+ uint8_t pan
+)
+{
+ if( !pan )
+ return gPhyCurrentChannelPAN0;
+ else
+ return gPhyCurrentChannelPAN1;
+}
+
+/*! *********************************************************************************
+* \brief This function will set the radio Tx power
+*
+* \param[in] pwrStep the Tx power
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetPwrLevelRequest
+(
+ uint8_t pwrStep
+)
+{
+#ifdef PHY_PARAMETERS_VALIDATION
+ if((pwrStep < 3) || (pwrStep > 31)) //-40 dBm to 16 dBm
+ {
+ return gPhyInvalidParameter_c;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ MCR20Drv_DirectAccessSPIWrite(PA_PWR, (uint8_t)(pwrStep & 0x1F));
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeSetLQIModeRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeSetLQIModeRequest(uint8_t lqiMode)
+{
+ uint8_t currentMode;
+
+ currentMode = MCR20Drv_IndirectAccessSPIRead(CCA_CTRL);
+ lqiMode ? (currentMode |= cCCA_CTRL_LQI_RSSI_NOT_CORR) : (currentMode &= (~((uint8_t)cCCA_CTRL_LQI_RSSI_NOT_CORR)));
+ MCR20Drv_IndirectAccessSPIWrite(CCA_CTRL, currentMode);
+
+ return gPhySuccess_c;
+}
+
+/*---------------------------------------------------------------------------
+ * Name: PhyPlmeGetRSSILevelRequest
+ * Description: -
+ * Parameters: -
+ * Return: -
+ *---------------------------------------------------------------------------*/
+uint8_t PhyPlmeGetRSSILevelRequest(void)
+{
+ return MCR20Drv_IndirectAccessSPIRead(RSSI);
+}
+
+/*! *********************************************************************************
+* \brief This function will set the value of PHY PIBs
+*
+* \param[in] pibId the Id of the PIB
+* \param[in] pibValue the new value of the PIB
+* \param[in] phyRegistrySet the PAN registers (0/1)
+* \param[in] instanceId the instance of the PHY
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeSetPIBRequest(phyPibId_t pibId, uint64_t pibValue, uint8_t phyRegistrySet, instanceId_t instanceId)
+{
+ phyStatus_t result = gPhySuccess_c;
+
+ switch(pibId)
+ {
+ case gPhyPibCurrentChannel_c:
+ {
+ result = PhyPlmeSetCurrentChannelRequest((uint8_t) pibValue, phyRegistrySet);
+ }
+ break;
+ case gPhyPibTransmitPower_c:
+ {
+ result = PhyPlmeSetPwrLevelRequest((uint8_t) pibValue);
+ }
+ break;
+ case gPhyPibLongAddress_c:
+ {
+ uint64_t longAddr = pibValue;
+ result = PhyPpSetLongAddr((uint8_t *) &longAddr, phyRegistrySet);
+ }
+ break;
+ case gPhyPibShortAddress_c:
+ {
+ uint16_t shortAddr = (uint16_t) pibValue;
+ result = PhyPpSetShortAddr((uint8_t *) &shortAddr, phyRegistrySet);
+ }
+ break;
+ case gPhyPibPanId_c:
+ {
+ uint16_t panId = (uint16_t) pibValue;
+ result = PhyPpSetPanId((uint8_t *) &panId, phyRegistrySet);
+ }
+ break;
+ case gPhyPibPanCoordinator_c:
+ {
+ bool_t macRole = (bool_t) pibValue;
+ result = PhyPpSetMacRole(macRole, phyRegistrySet);
+ }
+ break;
+ case gPhyPibCurrentPage_c:
+ {
+ /* Nothinh to do... */
+ }
+ break;
+ case gPhyPibPromiscuousMode_c:
+ {
+ PhyPpSetPromiscuous((uint8_t)pibValue);
+ }
+ break;
+ case gPhyPibRxOnWhenIdle:
+ {
+ PhyPlmeSetRxOnWhenIdle( (bool_t)pibValue, instanceId );
+ }
+ break;
+ case gPhyPibFrameWaitTime_c:
+ {
+ PhyPlmeSetFrameWaitTime( (uint32_t)pibValue, instanceId );
+ }
+ break;
+ case gPhyPibDeferTxIfRxBusy_c:
+ {
+ if( pibValue )
+ phyLocal[instanceId].flags |= gPhyFlagDeferTx_c;
+ else
+ phyLocal[instanceId].flags &= ~gPhyFlagDeferTx_c;
+ }
+ break;
+ default:
+ {
+ result = gPhyUnsupportedAttribute_c;
+ }
+ break;
+ }
+
+ return result;
+}
+
+/*! *********************************************************************************
+* \brief This function will return the value of PHY PIBs
+*
+* \param[in] pibId the Id of the PIB
+* \param[out] pibValue pointer to a location where the value will be stored
+* \param[in] phyRegistrySet the PAN registers (0/1)
+* \param[in] instanceId the instance of the PHY
+*
+* \return phyStatus_t
+*
+********************************************************************************** */
+phyStatus_t PhyPlmeGetPIBRequest(phyPibId_t pibId, uint64_t * pibValue, uint8_t phyRegistrySet, instanceId_t instanceId)
+{
+ phyStatus_t result = gPhySuccess_c;
+ switch(pibId)
+ {
+ case gPhyPibCurrentChannel_c:
+ {
+ *((uint8_t*)pibValue) = (uint64_t) PhyPlmeGetCurrentChannelRequest(phyRegistrySet);
+ }
+ break;
+ case gPhyPibTransmitPower_c:
+ {
+ *((uint8_t*)pibValue) = MCR20Drv_DirectAccessSPIRead(PA_PWR);
+ }
+ break;
+ case gPhyPibLongAddress_c:
+ {
+ if( !phyRegistrySet )
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACLONGADDRS0_0, (uint8_t*)pibValue, 8);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACLONGADDRS1_0, (uint8_t*)pibValue, 8);
+ }
+ break;
+ case gPhyPibShortAddress_c:
+ {
+ if( !phyRegistrySet )
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACSHORTADDRS0_LSB, (uint8_t*)pibValue, 2);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACSHORTADDRS1_LSB, (uint8_t*)pibValue, 2);
+ }
+ break;
+ case gPhyPibPanId_c:
+ {
+ if( !phyRegistrySet )
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACPANID0_LSB, (uint8_t*)pibValue, 2);
+ else
+ MCR20Drv_IndirectAccessSPIMultiByteRead( MACPANID1_LSB, (uint8_t*)pibValue, 2);
+ }
+ break;
+ case gPhyPibPanCoordinator_c:
+ {
+ uint8_t phyReg;
+
+ if( !phyRegistrySet )
+ {
+ phyReg = MCR20Drv_DirectAccessSPIRead( PHY_CTRL4);
+ phyReg = (phyReg & cPHY_CTRL4_PANCORDNTR0) == cPHY_CTRL4_PANCORDNTR0;
+ }
+ else
+ {
+ phyReg = MCR20Drv_IndirectAccessSPIRead( (uint8_t) DUAL_PAN_CTRL);
+ phyReg = (phyReg & cDUAL_PAN_CTRL_PANCORDNTR1) == cDUAL_PAN_CTRL_PANCORDNTR1;
+ }
+
+ *((uint8_t*)pibValue) = phyReg;
+ }
+ break;
+ case gPhyPibRxOnWhenIdle:
+ {
+ *((uint8_t*)pibValue) = !!(phyLocal[instanceId].flags & gPhyFlagRxOnWhenIdle_c);
+ }
+ break;
+ case gPhyPibFrameWaitTime_c:
+ {
+ *((uint8_t*)pibValue) = phyLocal[instanceId].maxFrameWaitTime;
+ }
+ break;
+ case gPhyPibDeferTxIfRxBusy_c:
+ {
+ *((uint8_t*)pibValue) = !!(phyLocal[instanceId].flags & gPhyFlagDeferTx_c);
+ }
+ break;
+ default:
+ {
+ result = gPhyUnsupportedAttribute_c;
+ }
+ break;
+ }
+
+ return result;
+
+}
+
+/************************************************************************************
+*************************************************************************************
+* Private functions
+*************************************************************************************
+************************************************************************************/
+static void PhyRxRetry( uint32_t param )
+{
+ PhyPlmeRxRequest( ((phyRxParams_t*)param)->phyRxMode, (phyRxParams_t*)param );
+}
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/PhyStateMachine.c Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,982 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyStateMachine.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+#ifdef gSrcTask_d
+#undef gSrcTask_d
+#endif
+
+#define gSrcTask_d PHY
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+
+#include "PhyInterface.h"
+#include "Phy.h"
+
+#if 0
+#include "MemManager.h"
+#include "Messaging.h"
+#include "Panic.h"
+#include "FunctionLib.h"
+#endif
+
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+
+#include "AspInterface.h"
+#include "MpmInterface.h"
+
+#include "arm_hal_interrupt.h"
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+#define mPhyMaxIdleRxDuration_c (0xF00000) /* [sym] */
+
+#define ProtectFromXcvrInterrupt() ProtectFromMCR20Interrupt()
+#define UnprotectFromXcvrInterrupt() UnprotectFromMCR20Interrupt()
+
+/************************************************************************************
+*************************************************************************************
+* Private type definitions
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+************************************************************************************/
+static void Phy24Task(Phy_PhyLocalStruct_t *pPhyData);
+
+static phyStatus_t Phy_HandlePdDataReq( Phy_PhyLocalStruct_t *pPhyData, macToPdDataMessage_t * pMsg );
+
+static void Phy_EnterIdle( Phy_PhyLocalStruct_t *pPhyData );
+
+static void PLME_SendMessage(Phy_PhyLocalStruct_t *pPhyData, phyMessageId_t msgType);
+
+static void PD_SendMessage(Phy_PhyLocalStruct_t *pPhyData, phyMessageId_t msgType);
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+Phy_PhyLocalStruct_t phyLocal[gPhyInstancesCnt_c];
+extern volatile uint32_t mPhySeqTimeout;
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief This function creates the PHY task
+*
+********************************************************************************** */
+void Phy_Init(void)
+{
+ uint32_t i;
+
+ PhyHwInit();
+ ASP_Init( 0, gAspInterfaceId );
+ MPM_Init();
+
+ for( i=0; i<gPhyInstancesCnt_c; i++ )
+ {
+ phyLocal[i].flags = gPhyFlagDeferTx_c;
+ phyLocal[i].rxParams.pRxData = NULL;
+
+ /* Prepare input queues.*/
+ //MSG_InitQueue( &phyLocal[i].macPhyInputQueue );
+ phyLocal[i].pMsgIn = NULL;
+ }
+
+ PhyIsrPassRxParams( NULL );
+ PhyPlmeSetPwrState( gPhyDefaultIdlePwrMode_c );
+}
+
+/*! *********************************************************************************
+* \brief This function binds a MAC instance to a PHY instance
+*
+* \param[in] instanceId The instance of the MAC
+*
+* \return The instance of the PHY.
+*
+********************************************************************************** */
+instanceId_t BindToPHY( instanceId_t macInstance )
+{
+ return 0;
+}
+
+/*! *********************************************************************************
+* \brief This function registers the MAC PD and PLME SAP handlers
+*
+* \param[in] pPD_MAC_SapHandler Pointer to the MAC PD handler function
+* \param[in] pPLME_MAC_SapHandler Pointer to the MAC PLME handler function
+* \param[in] instanceId The instance of the PHY
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+void Phy_RegisterSapHandlers( PD_MAC_SapHandler_t pPD_MAC_SapHandler,
+ PLME_MAC_SapHandler_t pPLME_MAC_SapHandler,
+ instanceId_t instanceId )
+{
+ phyLocal[instanceId].PD_MAC_SapHandler = pPD_MAC_SapHandler;
+ phyLocal[instanceId].PLME_MAC_SapHandler = pPLME_MAC_SapHandler;
+}
+
+/*! *********************************************************************************
+* \brief This function represents the PHY's task
+*
+* \param[in] taskParam The instance of the PHY
+*
+********************************************************************************** */
+static void Phy24Task(Phy_PhyLocalStruct_t *pPhyStruct)
+{
+ uint8_t state;
+ phyMessageHeader_t * pMsgIn;
+ phyStatus_t status = gPhySuccess_c;
+
+ ProtectFromXcvrInterrupt();
+ state = PhyGetSeqState();
+
+ /* Handling messages from upper layer */
+ //while( MSG_Pending(&pPhyStruct->macPhyInputQueue) )
+ //{
+ /* PHY doesn't free dynamic alocated messages! */
+ //pMsgIn = MSG_DeQueue( &pPhyStruct->macPhyInputQueue );
+ pMsgIn = pPhyStruct->pMsgIn;
+ pPhyStruct->pMsgIn = NULL;
+ pPhyStruct->currentMacInstance = pMsgIn->macInstance;
+
+ if( gRX_c == state )
+ {
+ if( (pPhyStruct->flags & gPhyFlagDeferTx_c) && (pMsgIn->msgType == gPdDataReq_c) )
+ {
+ macToPdDataMessage_t *pPD = (macToPdDataMessage_t*)pMsgIn;
+ uint8_t phyReg = MCR20Drv_DirectAccessSPIRead(SEQ_STATE) & 0x1F;
+ /* Check for an Rx in progress, and if the packet can be defered.
+ Packet cannot be defered */
+ if( (pPD->msgData.dataReq.CCABeforeTx != gPhyNoCCABeforeTx_c) &&
+ (pPD->msgData.dataReq.startTime == gPhySeqStartAsap_c) &&
+ (pPD->msgData.dataReq.slottedTx == gPhyUnslottedMode_c) &&
+ (phyReg <= 0x06 || phyReg == 0x15 || phyReg == 0x16) )
+ {
+ //MSG_QueueHead( &pPhyStruct->macPhyInputQueue, pMsgIn );
+ pPhyStruct->pMsgIn = pMsgIn;
+ UnprotectFromXcvrInterrupt();
+ return;
+ }
+ }
+
+// if( pPhyStruct->flags & gPhyFlagIdleRx_c )
+ {
+ PhyPlmeForceTrxOffRequest();
+ state = gIdle_c;
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+ }
+ }
+
+ if( gIdle_c != state )
+ {
+ /* try again later */
+ //MSG_QueueHead( &pPhyStruct->macPhyInputQueue, pMsgIn );
+ pPhyStruct->pMsgIn = pMsgIn;
+ UnprotectFromXcvrInterrupt();
+ return;
+ }
+
+#if gMpmIncluded_d
+ if( status == gPhySuccess_c )
+ {
+ status = MPM_PrepareForTx( pMsgIn->macInstance );
+ }
+#endif
+
+ if( status == gPhySuccess_c )
+ {
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+
+ switch( pMsgIn->msgType )
+ {
+ case gPdDataReq_c:
+ status = Phy_HandlePdDataReq( pPhyStruct, (macToPdDataMessage_t *)pMsgIn );
+ break;
+ case gPlmeCcaReq_c:
+ status = PhyPlmeCcaEdRequest(gPhyCCAMode1_c, gPhyContCcaDisabled);
+ break;
+ case gPlmeEdReq_c:
+ status = PhyPlmeCcaEdRequest(gPhyEnergyDetectMode_c, gPhyContCcaDisabled);
+ break;
+ default:
+ status = gPhyInvalidPrimitive_c;
+ }
+ }
+
+ /* Check status */
+ if( gPhySuccess_c == status )
+ {
+ UnprotectFromXcvrInterrupt();
+ return;
+ }
+ else
+ {
+ switch( pMsgIn->msgType )
+ {
+ case gPdDataReq_c:
+ if( ((macToPdDataMessage_t*)pMsgIn)->msgData.dataReq.CCABeforeTx == gPhyNoCCABeforeTx_c )
+ {
+ PD_SendMessage(pPhyStruct, gPdDataCnf_c);
+ break;
+ }
+ /* Fallthorough */
+ case gPlmeCcaReq_c:
+ pPhyStruct->channelParams.channelStatus = gPhyChannelBusy_c;
+ PLME_SendMessage(pPhyStruct, gPlmeCcaCnf_c);
+ break;
+ case gPlmeEdReq_c:
+ pPhyStruct->channelParams.energyLeveldB = 0;
+ PLME_SendMessage(pPhyStruct, gPlmeEdCnf_c);
+ break;
+ default:
+ PLME_SendMessage(pPhyStruct, gPlmeTimeoutInd_c);
+ }
+ }
+ //}/* while( MSG_Pending(&pPhyStruct->macPhyInputQueue) ) */
+
+ UnprotectFromXcvrInterrupt();
+
+ /* Check if PHY can enter Idle state */
+ if( gIdle_c == state )
+ {
+ Phy_EnterIdle( pPhyStruct );
+ }
+}
+
+/*! *********************************************************************************
+* \brief This is the PD SAP message handler
+*
+* \param[in] pMsg Pointer to the PD request message
+* \param[in] instanceId The instance of the PHY
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+phyStatus_t MAC_PD_SapHandler(macToPdDataMessage_t *pMsg, instanceId_t phyInstance)
+{
+ phyStatus_t result = gPhySuccess_c;
+ uint8_t baseIndex = 0;
+
+ if( NULL == pMsg )
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+#if gMpmIncluded_d
+ if( pMsg->msgType == gPdIndQueueInsertReq_c || pMsg->msgType == gPdIndQueueRemoveReq_c )
+ {
+ baseIndex = MPM_GetRegSet( MPM_GetPanIndex( pMsg->macInstance ) ) *
+ (gPhyIndirectQueueSize_c/gMpmPhyPanRegSets_c);
+ }
+#endif
+
+ switch( pMsg->msgType )
+ {
+ case gPdIndQueueInsertReq_c:
+ result = PhyPp_IndirectQueueInsert(baseIndex + pMsg->msgData.indQueueInsertReq.index,
+ pMsg->msgData.indQueueInsertReq.checksum,
+ phyInstance);
+ break;
+
+ case gPdIndQueueRemoveReq_c:
+ result = PhyPp_RemoveFromIndirect(baseIndex + pMsg->msgData.indQueueRemoveReq.index,
+ phyInstance);
+ break;
+
+ case gPdDataReq_c:
+ //MSG_Queue(&phyLocal[phyInstance].macPhyInputQueue, pMsg);
+ phyLocal[phyInstance].pMsgIn = (phyMessageHeader_t *)pMsg;
+ Phy24Task( &phyLocal[phyInstance] );
+ break;
+
+ default:
+ result = gPhyInvalidPrimitive_c;
+ }
+
+ return result;
+}
+
+/*! *********************************************************************************
+* \brief This is the PLME SAP message handler
+*
+* \param[in] pMsg Pointer to the PLME request message
+* \param[in] instanceId The instance of the PHY
+*
+* \return phyStatus_t The status of the operation.
+*
+********************************************************************************** */
+phyStatus_t MAC_PLME_SapHandler(macToPlmeMessage_t * pMsg, instanceId_t phyInstance)
+{
+ Phy_PhyLocalStruct_t *pPhyStruct = &phyLocal[phyInstance];
+ uint8_t phyRegSet = 0;
+#if gMpmIncluded_d
+ phyStatus_t result;
+ int32_t panIdx = MPM_GetPanIndex( pMsg->macInstance );
+
+ phyRegSet = MPM_GetRegSet( panIdx );
+#endif
+
+ if( NULL == pMsg )
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ switch( pMsg->msgType )
+ {
+ case gPlmeEdReq_c:
+ case gPlmeCcaReq_c:
+ //MSG_Queue(&phyLocal[phyInstance].macPhyInputQueue, pMsg);
+ phyLocal[phyInstance].pMsgIn = (phyMessageHeader_t *)pMsg;
+ Phy24Task( &phyLocal[phyInstance] );
+ break;
+
+ case gPlmeSetReq_c:
+#if gMpmIncluded_d
+ result = MPM_SetPIB(pMsg->msgData.setReq.PibAttribute,
+ &pMsg->msgData.setReq.PibAttributeValue,
+ panIdx );
+ if( !MPM_isPanActive(panIdx) )
+ {
+ return result;
+ }
+#endif
+ return PhyPlmeSetPIBRequest(pMsg->msgData.setReq.PibAttribute, pMsg->msgData.setReq.PibAttributeValue, phyRegSet, phyInstance);
+
+ case gPlmeGetReq_c:
+#if gMpmIncluded_d
+ if( gPhySuccess_c == MPM_GetPIB(pMsg->msgData.getReq.PibAttribute, pMsg->msgData.getReq.pPibAttributeValue, panIdx) )
+ {
+ break;
+ }
+#endif
+ return PhyPlmeGetPIBRequest( pMsg->msgData.getReq.PibAttribute, pMsg->msgData.getReq.pPibAttributeValue, phyRegSet, phyInstance);
+
+ case gPlmeSetTRxStateReq_c:
+ if(gPhySetRxOn_c == pMsg->msgData.setTRxStateReq.state)
+ {
+ if( PhyIsIdleRx(phyInstance) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ }
+ else if( gIdle_c != PhyGetSeqState() )
+ {
+ return gPhyBusy_c;
+ }
+#if gMpmIncluded_d
+ /* If another PAN has the RxOnWhenIdle PIB set, enable the DualPan Auto mode */
+ if( gPhySuccess_c != MPM_PrepareForRx( pMsg->macInstance ) )
+ return gPhyBusy_c;
+#endif
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+ Phy_SetSequenceTiming(pMsg->msgData.setTRxStateReq.startTime,
+ pMsg->msgData.setTRxStateReq.rxDuration);
+
+ return PhyPlmeRxRequest(pMsg->msgData.setTRxStateReq.slottedMode, (phyRxParams_t *) &pPhyStruct->rxParams);
+ }
+ else if (gPhyForceTRxOff_c == pMsg->msgData.setTRxStateReq.state)
+ {
+#if gMpmIncluded_d
+ if( !MPM_isPanActive(panIdx) )
+ return gPhySuccess_c;
+#endif
+ pPhyStruct->flags &= ~(gPhyFlagIdleRx_c);
+ PhyPlmeForceTrxOffRequest();
+ }
+ break;
+
+ default:
+ return gPhyInvalidPrimitive_c;
+ }
+
+ return gPhySuccess_c;
+}
+
+/*! *********************************************************************************
+* \brief This function programs a new TX sequence
+*
+* \param[in] pMsg Pointer to the PD request message
+* \param[in] pPhyData pointer to PHY data
+*
+* \return The status of the operation.
+*
+********************************************************************************** */
+static phyStatus_t Phy_HandlePdDataReq( Phy_PhyLocalStruct_t *pPhyData, macToPdDataMessage_t * pMsg )
+{
+ phyStatus_t status = gPhySuccess_c;
+ uint32_t time;
+
+ if( NULL == pMsg->msgData.dataReq.pPsdu )
+ {
+ return gPhyInvalidParameter_c;
+ }
+
+ ProtectFromXcvrInterrupt();
+
+ if( pMsg->msgData.dataReq.startTime != gPhySeqStartAsap_c )
+ {
+ PhyTimeSetEventTrigger( (uint16_t) pMsg->msgData.dataReq.startTime );
+ }
+
+ status = PhyPdDataRequest(&pMsg->msgData.dataReq , &pPhyData->rxParams, &pPhyData->txParams);
+
+ if( pMsg->msgData.dataReq.txDuration != gPhySeqStartAsap_c )
+ {
+ arm_enter_critical();
+ PhyTimeReadClock( &time );
+ time += pMsg->msgData.dataReq.txDuration;
+ /* Compensate PHY overhead, including WU time */
+ time += 54;
+ PhyTimeSetEventTimeout( &time );
+ arm_exit_critical();
+ }
+
+ UnprotectFromXcvrInterrupt();
+
+ if( gPhySuccess_c != status )
+ {
+ PhyTimeDisableEventTrigger();
+ PhyTimeDisableEventTimeout();
+ }
+
+ return status;
+}
+
+/*! *********************************************************************************
+* \brief This function sets the start time and the timeout value for a sequence.
+*
+* \param[in] startTime The absolute start time for the sequence.
+* If startTime is gPhySeqStartAsap_c, the start timer is disabled.
+* \param[in] seqDuration The duration of the sequence.
+* If seqDuration is 0xFFFFFFFF, the timeout is disabled.
+*
+********************************************************************************** */
+void Phy_SetSequenceTiming(uint32_t startTime, uint32_t seqDuration)
+{
+ uint32_t endTime;
+
+ arm_enter_critical();
+
+ if( gPhySeqStartAsap_c == startTime )
+ {
+ PhyTimeReadClock( &endTime );
+ }
+ else
+ {
+ PhyTimeSetEventTrigger( (uint16_t) startTime );
+ endTime = startTime & gPhyTimeMask_c;
+ }
+
+ if( 0xFFFFFFFF != seqDuration )
+ {
+ endTime += seqDuration;
+ endTime = endTime & gPhyTimeMask_c;
+
+ PhyTimeSetEventTimeout( &(endTime) );
+ }
+
+ arm_exit_critical();
+}
+
+/*! *********************************************************************************
+* \brief This function starts the IdleRX if the PhyRxOnWhenIdle PIB is set
+*
+* \param[in] pPhyData pointer to PHY data
+*
+********************************************************************************** */
+void Phy_EnterIdle( Phy_PhyLocalStruct_t *pPhyData )
+{
+ if( (pPhyData->flags & gPhyFlagRxOnWhenIdle_c)
+#if gMpmIncluded_d
+ /* Prepare the Active PAN/PANs */
+ && (gPhySuccess_c == MPM_PrepareForRx(gInvalidInstanceId_c))
+#endif
+ )
+ {
+ pPhyData->flags |= gPhyFlagIdleRx_c;
+ Phy_SetSequenceTiming( gPhySeqStartAsap_c, mPhyMaxIdleRxDuration_c );
+ (void)PhyPlmeRxRequest( gPhyUnslottedMode_c, (phyRxParams_t*)&pPhyData->rxParams );
+ }
+ else
+ {
+ pPhyData->flags &= ~(gPhyFlagIdleRx_c);
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function sets the value of the maxFrameWaitTime PIB
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] time The maxFrameWaitTime value
+*
+********************************************************************************** */
+void PhyPlmeSetFrameWaitTime( uint32_t time, instanceId_t instanceId )
+{
+ phyLocal[instanceId].maxFrameWaitTime = time;
+}
+
+/*! *********************************************************************************
+* \brief This function sets the state of the PhyRxOnWhenIdle PIB
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] state The PhyRxOnWhenIdle value
+*
+********************************************************************************** */
+void PhyPlmeSetRxOnWhenIdle( bool_t state, instanceId_t instanceId )
+{
+ uint8_t radioState = PhyGetSeqState();
+#if gMpmIncluded_d
+ /* Check if at least one PAN has RxOnWhenIdle set */
+ if( FALSE == state )
+ {
+ uint32_t i;
+
+ for( i=0; i<gMpmMaxPANs_c; i++ )
+ {
+ MPM_GetPIB( gPhyPibRxOnWhenIdle, &state, i );
+ if( state )
+ break;
+ }
+ }
+#endif
+ if( state )
+ {
+ phyLocal[instanceId].flags |= gPhyFlagRxOnWhenIdle_c;
+ if( radioState == gIdle_c)
+ {
+ Phy_EnterIdle( &phyLocal[instanceId] );
+ }
+#if gMpmIncluded_d
+ else if( (radioState == gRX_c) && (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ Phy_EnterIdle( &phyLocal[instanceId] );
+ }
+#endif
+ }
+ else
+ {
+ phyLocal[instanceId].flags &= ~gPhyFlagRxOnWhenIdle_c;
+ if( (radioState == gRX_c) && (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
+ {
+ PhyPlmeForceTrxOffRequest();
+ phyLocal[instanceId].flags &= ~gPhyFlagIdleRx_c;
+ }
+ }
+}
+
+/*! *********************************************************************************
+* \brief This function starts the IdleRX if the PhyRxOnWhenIdle PIB is set
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+bool_t PhyIsIdleRx( instanceId_t instanceId )
+{
+ if( (phyLocal[instanceId].flags & gPhyFlagIdleRx_c) && (gRX_c == PhyGetSeqState()))
+ return TRUE;
+
+ return FALSE;
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a TX operation completed successfully.
+* If the received ACK has FP=1, then the radio will enter RX state for
+* maxFrameWaitTime duration.
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] framePending The value of the framePending bit for the received ACK
+*
+********************************************************************************** */
+void Radio_Phy_PdDataConfirm(instanceId_t instanceId, bool_t framePending)
+{
+ PhyTimeDisableEventTimeout();
+
+ if( framePending )
+ {
+ phyLocal[instanceId].flags |= gPhyFlagFramePending_c;
+ if( phyLocal[instanceId].maxFrameWaitTime > 0 )
+ {
+ /* Restart Rx asap if an ACK with FP=1 is received */
+ phyLocal[instanceId].flags &= ~(gPhyFlagIdleRx_c);
+ Phy_SetSequenceTiming( gPhySeqStartAsap_c, phyLocal[instanceId].maxFrameWaitTime );
+ PhyPlmeRxRequest( gPhyUnslottedMode_c, (phyRxParams_t *) &phyLocal[instanceId].rxParams );
+ }
+ }
+ else
+ {
+ phyLocal[instanceId].flags &= ~gPhyFlagFramePending_c;
+ }
+
+ PD_SendMessage(&phyLocal[instanceId], gPdDataCnf_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that new data has been received
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_PdDataIndication(instanceId_t instanceId)
+{
+ PhyTimeDisableEventTimeout();
+
+ PD_SendMessage(&phyLocal[instanceId], gPdDataInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that timer1 compare match occured
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_TimeWaitTimeoutIndication(instanceId_t instanceId)
+{
+ PhyTime_ISR();
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a CCA sequence has finished
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] phyChannelStatus The status of the channel: Idle/Busy
+*
+* \return None.
+*
+********************************************************************************** */
+void Radio_Phy_PlmeCcaConfirm(phyStatus_t phyChannelStatus, instanceId_t instanceId)
+{
+ PhyTimeDisableEventTimeout();
+
+ phyLocal[instanceId].channelParams.channelStatus = phyChannelStatus;
+
+ PLME_SendMessage(&phyLocal[instanceId], gPlmeCcaCnf_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a ED sequence has finished
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] energyLevel The enetgy level on the channel.
+* \param[in] energyLeveldB The energy level in DB
+*
+********************************************************************************** */
+void Radio_Phy_PlmeEdConfirm(uint8_t energyLeveldB, instanceId_t instanceId)
+{
+ PhyTimeDisableEventTimeout();
+
+ phyLocal[instanceId].channelParams.energyLeveldB = energyLeveldB;
+
+ PLME_SendMessage(&phyLocal[instanceId], gPlmeEdCnf_c);
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that the programmed sequence has timed out
+* The Radio is forced to Idle.
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_TimeRxTimeoutIndication(instanceId_t instanceId)
+{
+ if( !(phyLocal[instanceId].flags & gPhyFlagIdleRx_c) )
+ PLME_SendMessage(&phyLocal[instanceId], gPlmeTimeoutInd_c);
+
+ Phy24Task(&phyLocal[instanceId]);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that the programmed sequence has started
+*
+* \param[in] instanceId The instance of the PHY
+*
+* \return None.
+*
+********************************************************************************** */
+void Radio_Phy_TimeStartEventIndication(instanceId_t instanceId)
+{
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_StartEventInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+#endif
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a SFD was detected.
+* Also, if there is not enough time to receive the entire packet, the
+* RX timeout will be extended.
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] frameLen the length of the PSDU
+*
+********************************************************************************** */
+void Radio_Phy_PlmeRxSfdDetect(instanceId_t instanceId, uint32_t frameLen)
+{
+ if( phyLocal[instanceId].flags & gPhyFlagDeferTx_c )
+ {
+ uint32_t currentTime;
+ uint32_t time;
+
+ arm_enter_critical();
+
+ //Read currentTime and Timeout values [sym]
+ PhyTimeReadClock(¤tTime);
+
+ frameLen = frameLen * 2 + 12 + 22 + 2; //Convert to symbols and add IFS and ACK duration
+
+ if( mPhySeqTimeout > currentTime )
+ {
+ time = mPhySeqTimeout - currentTime;
+ }
+ else
+ {
+ time = (gPhyTimeMask_c - currentTime + mPhySeqTimeout) & gPhyTimeMask_c;
+ }
+
+ if( time > 4 )
+ {
+ mPhySeqTimeout = (currentTime + frameLen) & gPhyTimeMask_c;
+ MCR20Drv_DirectAccessSPIMultiByteWrite( T3CMP_LSB, (uint8_t *)&mPhySeqTimeout, 3);
+ }
+
+ arm_exit_critical();
+ }
+
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_RxSfdDetectInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+#endif
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a Sync Loss occured (PLL unlock)
+* The Radio is forced to Idle.
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_PlmeSyncLossIndication(instanceId_t instanceId)
+{
+ PhyPlmeForceTrxOffRequest();
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_SyncLossInd_c);
+#endif
+ Radio_Phy_TimeRxTimeoutIndication(instanceId);
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that a Filter Fail occured
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_PlmeFilterFailRx(instanceId_t instanceId)
+{
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_FilterFailInd_c);
+ Phy24Task(&phyLocal[instanceId]);
+#endif
+}
+
+/*! *********************************************************************************
+* \brief This function signals the PHY task that an unexpected Transceiver Reset
+* occured and force the TRX to Off
+*
+* \param[in] instanceId The instance of the PHY
+*
+********************************************************************************** */
+void Radio_Phy_UnexpectedTransceiverReset(instanceId_t instanceId)
+{
+ PhyPlmeForceTrxOffRequest();
+#ifdef MAC_PHY_DEBUG
+ PLME_SendMessage(&phyLocal[instanceId], gPlme_UnexpectedRadioResetInd_c);
+#endif
+ Radio_Phy_TimeRxTimeoutIndication(instanceId);
+}
+
+/*! *********************************************************************************
+* \brief Senf a PLME message to upper layer
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] msgType The type of message to be sent
+*
+********************************************************************************** */
+static void PLME_SendMessage(Phy_PhyLocalStruct_t *pPhyStruct, phyMessageId_t msgType)
+{
+ //plmeToMacMessage_t * pMsg = MEM_BufferAlloc(sizeof(plmeToMacMessage_t));
+ plmeToMacMessage_t * pMsg = (plmeToMacMessage_t *)malloc(sizeof(plmeToMacMessage_t));
+
+ if(NULL == pMsg)
+ {
+ //panic(0,(uint32_t)PLME_SendMessage,0,msgType);
+ return;
+ }
+
+ pMsg->msgType = msgType;
+
+ switch(msgType)
+ {
+ case gPlmeCcaCnf_c:
+ pMsg->msgData.ccaCnf.status = pPhyStruct->channelParams.channelStatus;
+ break;
+
+ case gPlmeEdCnf_c:
+ pMsg->msgData.edCnf.status = gPhySuccess_c;
+ pMsg->msgData.edCnf.energyLeveldB = pPhyStruct->channelParams.energyLeveldB;
+ pMsg->msgData.edCnf.energyLevel = Phy_GetEnergyLevel(pPhyStruct->channelParams.energyLeveldB);
+ break;
+
+ default:
+ /* No aditional info needs to be filled */
+ break;
+ }
+
+ pPhyStruct->PLME_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+}
+
+/*! *********************************************************************************
+* \brief Senf a PD message to upper layer
+*
+* \param[in] instanceId The instance of the PHY
+* \param[in] msgType The type of message to be sent
+*
+********************************************************************************** */
+static void PD_SendMessage(Phy_PhyLocalStruct_t *pPhyStruct, phyMessageId_t msgType)
+{
+ pdDataToMacMessage_t *pMsg;
+
+ if( msgType == gPdDataInd_c )
+ {
+ uint32_t temp;
+ uint16_t len = pPhyStruct->rxParams.psduLength - 2; //Excluding FCS (2 bytes);
+
+ pMsg = pPhyStruct->rxParams.pRxData;
+ pPhyStruct->rxParams.pRxData = NULL;
+
+#if !gUsePBTransferThereshold_d
+ MCR20Drv_PB_SPIBurstRead( (uint8_t *)(pMsg->msgData.dataInd.pPsdu), len );
+#endif
+
+ pMsg->msgType = gPdDataInd_c;
+ pMsg->msgData.dataInd.ppduLinkQuality = pPhyStruct->rxParams.linkQuality;
+ pMsg->msgData.dataInd.psduLength = len;
+
+ pMsg->msgData.dataInd.timeStamp = PhyTime_GetTimestamp(); //current timestamp (64bit)
+ temp = (uint32_t)(pMsg->msgData.dataInd.timeStamp & gPhyTimeMask_c); //convert to 24bit
+ pMsg->msgData.dataInd.timeStamp -= (temp - pPhyStruct->rxParams.timeStamp) & gPhyTimeMask_c;
+#if !(gMpmIncluded_d)
+ pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+#else
+ {
+ uint32_t i, bitMask = PhyPpGetPanOfRxPacket();
+
+ for( i=0; i<gMpmPhyPanRegSets_c; i++ )
+ {
+ if( bitMask & (1 << i) )
+ {
+ bitMask &= ~(1 << i);
+ pPhyStruct->currentMacInstance = MPM_GetMacInstanceFromRegSet(i);
+
+ /* If the packet passed filtering on muliple PANs, send a copy to each one */
+ if( bitMask )
+ {
+ pdDataToMacMessage_t *pDataIndCopy;
+
+ //pDataIndCopy = MEM_BufferAlloc(sizeof(pdDataToMacMessage_t) + len);
+ pDataIndCopy = (pdDataToMacMessage_t *)malloc(sizeof(pdDataToMacMessage_t) + len);
+ if( pDataIndCopy )
+ {
+ FLib_MemCpy(pDataIndCopy, pMsg, sizeof(pdDataToMacMessage_t) + len);
+ pPhyStruct->PD_MAC_SapHandler(pDataIndCopy, pPhyStruct->currentMacInstance);
+ }
+ }
+ else
+ {
+ pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+ break;
+ }
+ }
+ }
+ }
+#endif
+ }
+ else
+ {
+ //pMsg = MEM_BufferAlloc( sizeof(pdDataToMacMessage_t) );
+ pMsg = (pdDataToMacMessage_t *) malloc( sizeof(pdDataToMacMessage_t) );
+
+ if(NULL == pMsg)
+ {
+ //panic(0,(uint32_t)PD_SendMessage,0,gPdDataCnf_c);
+ return;
+ }
+
+ pMsg->msgType = gPdDataCnf_c;
+
+ if( pPhyStruct->flags & gPhyFlagFramePending_c )
+ {
+ pPhyStruct->flags &= ~(gPhyFlagFramePending_c);
+ pMsg->msgData.dataCnf.status = gPhyFramePending_c;
+ }
+ else
+ {
+ pMsg->msgData.dataCnf.status = gPhySuccess_c;
+ }
+
+ pPhyStruct->PD_MAC_SapHandler(pMsg, pPhyStruct->currentMacInstance);
+ }
+}
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/PhyTime.c Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,703 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyTime.c
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+#include "EmbeddedTypes.h"
+//#include "fsl_os_abstraction.h"
+#include "MCR20Drv.h"
+#include "MCR20Reg.h"
+#include "Phy.h"
+
+//#include "FunctionLib.h"
+#include "arm_hal_interrupt.h"
+
+/************************************************************************************
+*************************************************************************************
+* Private macros
+*************************************************************************************
+************************************************************************************/
+#define gPhyTimeMinSetupTime_c (10) /* symbols */
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+void (*gpfPhyTimeNotify)(void) = NULL;
+
+/************************************************************************************
+*************************************************************************************
+* Private memory declarations
+*************************************************************************************
+************************************************************************************/
+static phyTimeEvent_t mPhyTimers[gMaxPhyTimers_c];
+static phyTimeEvent_t *pNextEvent;
+volatile uint32_t mPhySeqTimeout;
+volatile uint64_t gPhyTimerOverflow;
+
+/************************************************************************************
+*************************************************************************************
+* Private prototypes
+*************************************************************************************
+************************************************************************************/
+static void PhyTime_OverflowCB( uint32_t param );
+static phyTimeEvent_t* PhyTime_GetNextEvent( void );
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+/*! *********************************************************************************
+* \brief Sets the start time of a sequence
+*
+* \param[in] startTime the start time for a sequence
+*
+********************************************************************************** */
+void PhyTimeSetEventTrigger
+(
+ uint32_t startTime
+)
+{
+ uint8_t phyReg, phyCtrl3Reg;
+
+ arm_enter_critical();
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg |= cPHY_CTRL1_TMRTRIGEN; // enable autosequence start by TC2 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyCtrl3Reg &= ~(cPHY_CTRL3_TMR2CMP_EN);// disable TMR2 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T2PRIMECMP_LSB, (uint8_t *) &startTime, 2);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change other IRQs status
+ phyReg &= ~(cIRQSTS3_TMR2MSK); // unmask TMR2 interrupt
+ phyReg |= (cIRQSTS3_TMR2IRQ); // aknowledge TMR2 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ // TC2PRIME_EN must be enabled in PHY_CTRL4 register
+ phyCtrl3Reg |= cPHY_CTRL3_TMR2CMP_EN; // enable TMR2 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ arm_exit_critical();
+}
+
+/*! *********************************************************************************
+* \brief Disable the time trigger for a sequence.
+*
+* \remarks The sequence will start asap
+*
+********************************************************************************** */
+void PhyTimeDisableEventTrigger
+(
+ void
+)
+{
+ uint8_t phyReg;
+
+ arm_enter_critical();
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
+ phyReg &= ~(cPHY_CTRL1_TMRTRIGEN); // disable autosequence start by TC2 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL1, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR2CMP_EN);// disable TMR2 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change other IRQs status
+ phyReg |= (cIRQSTS3_TMR2MSK); // mask TMR2 interrupt
+ phyReg |= (cIRQSTS3_TMR2IRQ); // aknowledge TMR2 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ arm_exit_critical();
+}
+
+/*! *********************************************************************************
+* \brief Sets the timeout value for a sequence
+*
+* \param[in] pEndTime the absolute time when a sequence should terminate
+*
+* \remarks If the sequence does not finish until the timeout, it will be aborted
+*
+********************************************************************************** */
+void PhyTimeSetEventTimeout
+(
+ uint32_t *pEndTime
+)
+{
+ uint8_t phyReg, phyCtrl3Reg;
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pEndTime)
+ {
+ return;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ arm_enter_critical();
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyCtrl3Reg &= ~(cPHY_CTRL3_TMR3CMP_EN);// disable TMR3 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyReg |= cPHY_CTRL4_TC3TMOUT; // enable autosequence stop by TC3 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
+
+ mPhySeqTimeout = *pEndTime & 0x00FFFFFF;
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T3CMP_LSB, (uint8_t *) pEndTime, 3);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change IRQ status
+// phyReg &= ~(cIRQSTS3_TMR3MSK); // unmask TMR3 interrupt
+ phyReg |= (cIRQSTS3_TMR3IRQ); // aknowledge TMR3 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ phyCtrl3Reg |= cPHY_CTRL3_TMR3CMP_EN; // enable TMR3 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ arm_exit_critical();
+}
+
+/*! *********************************************************************************
+* \brief Return the timeout value for the current sequence
+*
+* \return uint32_t the timeout value
+*
+********************************************************************************** */
+uint32_t PhyTimeGetEventTimeout( void )
+{
+ return mPhySeqTimeout;
+}
+
+/*! *********************************************************************************
+* \brief Disables the sequence timeout
+*
+********************************************************************************** */
+void PhyTimeDisableEventTimeout
+(
+ void
+)
+{
+ uint8_t phyReg;
+
+ arm_enter_critical();
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyReg &= ~(cPHY_CTRL4_TC3TMOUT); // disable autosequence stop by TC3 match
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR3CMP_EN);// disable TMR3 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change IRQ status
+ phyReg |= cIRQSTS3_TMR3IRQ; // aknowledge TMR3 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ arm_exit_critical();
+}
+
+/*! *********************************************************************************
+* \brief Reads the absolute clock from the radio
+*
+* \param[out] pRetClk pointer to a location where the current clock will be stored
+*
+********************************************************************************** */
+void PhyTimeReadClock
+(
+ uint32_t *pRetClk
+)
+{
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pRetClk)
+ {
+ return;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ arm_enter_critical();
+
+ MCR20Drv_DirectAccessSPIMultiByteRead( (uint8_t) EVENT_TMR_LSB, (uint8_t *) pRetClk, 3);
+ *(((uint8_t *)pRetClk) + 3) = 0;
+
+ arm_exit_critical();
+
+}
+
+/*! *********************************************************************************
+* \brief Initialize the Event Timer
+*
+* \param[in] pAbsTime pointer to the location where the new time is stored
+*
+********************************************************************************** */
+void PhyTimeInitEventTimer
+(
+ uint32_t *pAbsTime
+)
+{
+ uint8_t phyCtrl4Reg;
+
+#ifdef PHY_PARAMETERS_VALIDATION
+ if(NULL == pAbsTime)
+ {
+ return;
+ }
+#endif // PHY_PARAMETERS_VALIDATION
+
+ arm_enter_critical();
+
+ phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
+ phyCtrl4Reg |= cPHY_CTRL4_TMRLOAD; // self clearing bit
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T1CMP_LSB, (uint8_t *) pAbsTime, 3);
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL4, phyCtrl4Reg);
+
+ arm_exit_critical();
+}
+
+/*! *********************************************************************************
+* \brief Set TMR1 timeout value
+*
+* \param[in] pWaitTimeout the timeout value
+*
+********************************************************************************** */
+void PhyTimeSetWaitTimeout
+(
+ uint32_t *pWaitTimeout
+)
+{
+ uint8_t phyCtrl3Reg, irqSts3Reg;
+
+ arm_enter_critical();
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyCtrl3Reg &= ~(cPHY_CTRL3_TMR1CMP_EN);// disable TMR1 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T1CMP_LSB, (uint8_t *) pWaitTimeout, 3);
+
+ irqSts3Reg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ irqSts3Reg &= ~(cIRQSTS3_TMR1MSK); // unmask TMR1 interrupt
+ irqSts3Reg &= 0xF0; // do not change other IRQs status
+ irqSts3Reg |= (cIRQSTS3_TMR1IRQ); // aknowledge TMR1 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, irqSts3Reg);
+
+ phyCtrl3Reg |= cPHY_CTRL3_TMR1CMP_EN; // enable TMR1 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ arm_exit_critical();
+
+}
+
+/*! *********************************************************************************
+* \brief Disable the TMR1 timeout
+*
+********************************************************************************** */
+void PhyTimeDisableWaitTimeout
+(
+ void
+)
+{
+ uint8_t phyReg;
+
+ arm_enter_critical();
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR1CMP_EN);// disable TMR1 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ phyReg &= 0xF0; // do not change IRQ status
+ phyReg |= cIRQSTS3_TMR1IRQ; // aknowledge TMR1 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ arm_exit_critical();
+}
+
+/*! *********************************************************************************
+* \brief Set TMR4 timeout value
+*
+* \param[in] pWakeUpTime absolute time
+*
+********************************************************************************** */
+void PhyTimeSetWakeUpTime
+(
+ uint32_t *pWakeUpTime
+)
+{
+ uint8_t phyCtrl3Reg, irqSts3Reg;
+
+ arm_enter_critical();
+
+ phyCtrl3Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+// phyCtrl3Reg &= ~(cPHY_CTRL3_TMR4CMP_EN);// disable TMR4 compare
+// MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ MCR20Drv_DirectAccessSPIMultiByteWrite( (uint8_t) T4CMP_LSB, (uint8_t *) pWakeUpTime, 3);
+
+ irqSts3Reg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+ irqSts3Reg &= ~(cIRQSTS3_TMR4MSK); // unmask TMR4 interrupt
+ irqSts3Reg &= 0xF0; // do not change other IRQs status
+ irqSts3Reg |= (cIRQSTS3_TMR4IRQ); // aknowledge TMR4 IRQ
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, irqSts3Reg);
+
+ phyCtrl3Reg |= cPHY_CTRL3_TMR4CMP_EN; // enable TMR4 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyCtrl3Reg);
+
+ arm_exit_critical();
+}
+
+/*! *********************************************************************************
+* \brief Check if TMR4 IRQ occured, and aknowledge it
+*
+* \return TRUE if TMR4 IRQ occured
+*
+********************************************************************************** */
+bool_t PhyTimeIsWakeUpTimeExpired
+(
+ void
+)
+{
+ bool_t wakeUpIrq = FALSE;
+ uint8_t phyReg;
+
+ arm_enter_critical();
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL3);
+ phyReg &= ~(cPHY_CTRL3_TMR4CMP_EN);// disable TMR4 compare
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) PHY_CTRL3, phyReg);
+
+ phyReg = MCR20Drv_DirectAccessSPIRead(IRQSTS3);
+
+ if( (phyReg & cIRQSTS3_TMR4IRQ) == cIRQSTS3_TMR4IRQ )
+ {
+ wakeUpIrq = TRUE;
+ }
+
+ phyReg &= ~(cIRQSTS3_TMR4MSK); // unmask TMR4 interrupt
+ phyReg &= 0xF0; // do not change other IRQs status
+ phyReg |= (cIRQSTS3_TMR4IRQ); // aknowledge TMR2 IRQ
+
+ MCR20Drv_DirectAccessSPIWrite( (uint8_t) IRQSTS3, phyReg);
+
+ arm_exit_critical();
+
+ return wakeUpIrq;
+}
+
+
+/*! *********************************************************************************
+* \brief PHY Timer Interrupt Service Routine
+*
+********************************************************************************** */
+void PhyTime_ISR(void)
+{
+ if( pNextEvent->callback == PhyTime_OverflowCB )
+ {
+ gPhyTimerOverflow++;
+ }
+
+ if( gpfPhyTimeNotify )
+ {
+ gpfPhyTimeNotify();
+ }
+ else
+ {
+ PhyTime_RunCallback();
+ PhyTime_Maintenance();
+ }
+}
+
+/*! *********************************************************************************
+* \brief Initialize the PHY Timer module
+*
+* \return phyTimeStatus_t
+*
+********************************************************************************** */
+phyTimeStatus_t PhyTime_TimerInit( void (*cb)(void) )
+{
+ if( gpfPhyTimeNotify )
+ return gPhyTimeError_c;
+
+ gpfPhyTimeNotify = cb;
+ gPhyTimerOverflow = 0;
+ FLib_MemSet( mPhyTimers, 0, sizeof(mPhyTimers) );
+
+ /* Schedule Overflow Calback */
+ pNextEvent = &mPhyTimers[0];
+ pNextEvent->callback = PhyTime_OverflowCB;
+ pNextEvent->timestamp = (gPhyTimerOverflow+1) << gPhyTimeShift_c;
+ PhyTimeSetWaitTimeout( (uint32_t*)&pNextEvent->timestamp );
+
+ return gPhyTimeOk_c;
+}
+
+/*! *********************************************************************************
+* \brief Returns a 64bit timestamp value to be used by the MAC Layer
+*
+* \return phyTimeTimestamp_t PHY timestamp
+*
+********************************************************************************** */
+phyTimeTimestamp_t PhyTime_GetTimestamp(void)
+{
+ phyTimeTimestamp_t time = 0;
+
+ arm_enter_critical();
+ PhyTimeReadClock( (uint32_t*)&time );
+ time |= (gPhyTimerOverflow << gPhyTimeShift_c);
+ arm_exit_critical();
+
+ return time;
+}
+
+/*! *********************************************************************************
+* \brief Schedules an event
+*
+* \param[in] pEvent event to be scheduled
+*
+* \return phyTimeTimerId_t the id of the alocated timer
+*
+********************************************************************************** */
+phyTimeTimerId_t PhyTime_ScheduleEvent( phyTimeEvent_t *pEvent )
+{
+ phyTimeTimerId_t tmr;
+
+ /* Parameter validation */
+ if( NULL == pEvent->callback )
+ {
+ return gInvalidTimerId_c;
+ }
+
+ /* Search for a free slot (slot 0 is reserved for the Overflow calback) */
+ arm_enter_critical();
+ for( tmr=1; tmr<gMaxPhyTimers_c; tmr++ )
+ {
+ if( mPhyTimers[tmr].callback == NULL )
+ {
+ mPhyTimers[tmr] = *pEvent;
+ break;
+ }
+ }
+ arm_exit_critical();
+
+ if( tmr >= gMaxPhyTimers_c )
+ return gInvalidTimerId_c;
+
+ /* Program the next event */
+ if((NULL == pNextEvent) ||
+ (NULL != pNextEvent && mPhyTimers[tmr].timestamp < pNextEvent->timestamp))
+ {
+ PhyTime_Maintenance();
+ }
+
+ return tmr;
+}
+
+/*! *********************************************************************************
+* \brief Cancel an event
+*
+* \param[in] timerId the Id of the timer
+*
+* \return phyTimeStatus_t
+*
+********************************************************************************** */
+phyTimeStatus_t PhyTime_CancelEvent( phyTimeTimerId_t timerId )
+{
+ if( (timerId == 0) || (timerId >= gMaxPhyTimers_c) || (NULL == mPhyTimers[timerId].callback) )
+ {
+ return gPhyTimeNotFound_c;
+ }
+
+ arm_enter_critical();
+ if( pNextEvent == &mPhyTimers[timerId] )
+ pNextEvent = NULL;
+
+ mPhyTimers[timerId].callback = NULL;
+ arm_exit_critical();
+
+ return gPhyTimeOk_c;
+}
+
+/*! *********************************************************************************
+* \brief Cancel all event with the specified paameter
+*
+* \param[in] param event parameter
+*
+* \return phyTimeStatus_t
+*
+********************************************************************************** */
+phyTimeStatus_t PhyTime_CancelEventsWithParam ( uint32_t param )
+{
+ uint32_t i;
+ phyTimeStatus_t status = gPhyTimeNotFound_c;
+
+ arm_enter_critical();
+ for( i=1; i<gMaxPhyTimers_c; i++ )
+ {
+ if( mPhyTimers[i].callback && (param == mPhyTimers[i].parameter) )
+ {
+ status = gPhyTimeOk_c;
+ mPhyTimers[i].callback = NULL;
+ if( pNextEvent == &mPhyTimers[i] )
+ pNextEvent = NULL;
+ }
+ }
+ arm_exit_critical();
+
+ return status;
+}
+
+/*! *********************************************************************************
+* \brief Run the callback for the recently expired event
+*
+********************************************************************************** */
+void PhyTime_RunCallback( void )
+{
+ uint32_t param;
+ phyTimeCallback_t cb;
+
+ if( pNextEvent )
+ {
+ arm_enter_critical();
+
+ param = pNextEvent->parameter;
+ cb = pNextEvent->callback;
+ pNextEvent->callback = NULL;
+ pNextEvent = NULL;
+
+ arm_exit_critical();
+
+ cb(param);
+ }
+}
+
+/*! *********************************************************************************
+* \brief Expire events too close to be scheduled.
+* Program the next event
+*
+********************************************************************************** */
+void PhyTime_Maintenance( void )
+{
+ phyTimeTimestamp_t currentTime;
+ phyTimeEvent_t *pEv;
+
+ PhyTimeDisableWaitTimeout();
+
+ while(1)
+ {
+ arm_enter_critical();
+
+ pEv = PhyTime_GetNextEvent();
+ currentTime = PhyTime_GetTimestamp();
+
+ /* Program next event if exists */
+ if( pEv )
+ {
+ pNextEvent = pEv;
+
+ if( pEv->timestamp > (currentTime + gPhyTimeMinSetupTime_c) )
+ {
+ PhyTimeSetWaitTimeout( (uint32_t*)&pEv->timestamp );
+ pEv = NULL;
+ }
+ }
+
+ arm_exit_critical();
+
+ if( !pEv )
+ break;
+
+ PhyTime_RunCallback();
+ }
+
+}
+
+
+/*! *********************************************************************************
+* \brief Timer Overflow callback
+*
+* \param[in] param
+*
+********************************************************************************** */
+static void PhyTime_OverflowCB( uint32_t param )
+{
+ (void)param;
+
+ /* Reprogram the next overflow callback */
+ mPhyTimers[0].callback = PhyTime_OverflowCB;
+ mPhyTimers[0].timestamp = (gPhyTimerOverflow+1) << 24;
+}
+
+/*! *********************************************************************************
+* \brief Search for the next event to be scheduled
+*
+* \return phyTimeEvent_t pointer to the next event to be scheduled
+*
+********************************************************************************** */
+static phyTimeEvent_t* PhyTime_GetNextEvent( void )
+{
+ phyTimeEvent_t *pEv = NULL;
+ uint32_t i;
+
+ /* Search for the next event to be serviced */
+ for( i=0; i<gMaxPhyTimers_c; i++ )
+ {
+ if( NULL != mPhyTimers[i].callback )
+ {
+ if( NULL == pEv )
+ {
+ pEv = &mPhyTimers[i];
+ }
+ /* Check which event expires first */
+ else if( mPhyTimers[i].timestamp < pEv->timestamp )
+ {
+ pEv = &mPhyTimers[i];
+ }
+ }
+ }
+
+ return pEv;
+}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/PhyTypes.h Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,363 @@
+/*!
+* Copyright (c) 2015, Freescale Semiconductor, Inc.
+* All rights reserved.
+*
+* \file PhyTypes.h
+*
+* Redistribution and use in source and binary forms, with or without modification,
+* are permitted provided that the following conditions are met:
+*
+* o Redistributions of source code must retain the above copyright notice, this list
+* of conditions and the following disclaimer.
+*
+* o Redistributions in binary form must reproduce the above copyright notice, this
+* list of conditions and the following disclaimer in the documentation and/or
+* other materials provided with the distribution.
+*
+* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+* contributors may be used to endorse or promote products derived from this
+* software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _PHY_TYPES_H
+#define _PHY_TYPES_H
+
+
+/************************************************************************************
+*************************************************************************************
+* Include
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public macros
+*************************************************************************************
+************************************************************************************/
+
+/* WARNING!!! Only one frequency can be declared at a time! */
+#ifdef gPHY_802_15_4g_d
+ #ifndef gFreqBand_470__510MHz_d
+ #define gFreqBand_470__510MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_779__787MHz_d
+ #define gFreqBand_779__787MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_863__870MHz_d
+ #define gFreqBand_863__870MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_902__928MHz_d
+ #define gFreqBand_902__928MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_920__928MHz_d
+ #define gFreqBand_920__928MHz_d 1
+ #endif
+
+ #ifndef gFreqBand_863__876MHz_d
+ #define gFreqBand_863__876MHz_d 0
+ #endif
+
+ #ifndef gFreqBand_915__921MHz_d
+ #define gFreqBand_915__921MHz_d 0
+ #endif
+
+ #if gFreqBand_470__510MHz_d
+ #define gFreqBandId_d gFreq470__510MHz_c
+
+ #elif gFreqBand_779__787MHz_d
+ #define gFreqBandId_d gFreq779__787MHz_c
+
+ #elif gFreqBand_863__870MHz_d
+ #define gFreqBandId_d gFreq863__870MHz_c
+
+ #elif gFreqBand_902__928MHz_d
+ #define gFreqBandId_d gFreq902__928MHz_c
+
+ #elif gFreqBand_920__928MHz_d
+ #define gFreqBandId_d gFreq920__928MHz_c
+
+ #elif gFreqBand_863__876MHz_d
+ #define gFreqBandId_d gFreq863__876MHz_c
+
+ #elif gFreqBand_915__921MHz_d
+ #define gFreqBandId_d gFreq915__921MHz_c
+
+ #else
+ #error "No frequency band declared!!!"
+ #endif
+#endif // gPHY_802_15_4g_d
+
+/// \note MUST REMAIN UNCHANGED:
+#ifdef gPHY_802_15_4g_d
+ #define gPhySymbolsPerOctet_c 8
+ #define gPhyMRFSKPHRLength_c 2 /* [bytes] */
+#if (gFreqBand_863__876MHz_d || gFreqBand_915__921MHz_d)
+ #define gPhyFSKPreambleLength_c 8 /* [bytes] */
+#else
+ #define gPhyFSKPreambleLength_c 16 /* [bytes] */
+#endif
+ #define gPhyMRFSKSFDLength_c 2 /* [bytes] */
+ #define gMinPHYPacketSize_c 5
+ #define gMaxPHYPacketSize_c 254 /* maximum number of bytes that the PHY can transmit or receive */
+ #define gPhyFCSSize_c 2 /* [bytes] */
+ #define gCCADurationDefault_c 13 /* [symbols] */
+ #define gPhySHRDuration_c (gPhySymbolsPerOctet_c * (gPhyFSKPreambleLength_c + gPhyMRFSKSFDLength_c)) /* [symbols] */
+ #define gPhyMaxFrameDuration_c (gPhySHRDuration_c + (gPhyMRFSKPHRLength_c + gMaxPHYPacketSize_c) * gPhySymbolsPerOctet_c) /* [symbols] 802.15.4g page 48 formula */
+#else
+ #define gCCATime_c 8 /* [symbols] */
+ #define gPhyTurnaroundTime_c 12 /* [symbols] RX-to-TX or TX-to-RX maximum turnaround time (in symbol periods)*/
+ #define gMinPHYPacketSize_c 5
+ #define gMaxPHYPacketSize_c (127) /* maximum number of bytes that the PHY can transmit or receive */
+ #define gPhySHRDuration_c (10) /* [symbols] */
+ #define gPhySymbolsPerOctet_c (2)
+ #define gPhyFCSSize_c (2) /* [bytes] */
+ #define gPhyMaxFrameDuration_c (gPhySHRDuration_c + (gMaxPHYPacketSize_c + 1) * gPhySymbolsPerOctet_c)
+ #define gUnitBackoffPeriod_c 20 /* [symbols] */
+#endif // gPHY_802_15_4g_d
+
+// Phy flags
+#define gPhyFlagRxOnWhenIdle_c (1 << 0)
+#define gPhyFlagFramePending_c (1 << 1)
+#define gPhyFlagIdleRx_c (1 << 2)
+#define gPhyFlagDeferTx_c (1 << 3)
+
+#ifdef gPHY_802_15_4g_d
+#ifndef gAfcRxTimeout_c
+#define gAfcRxTimeout_c gPhySHRDuration_c /* [symbols] */
+#endif
+#endif
+
+/************************************************************************************
+*************************************************************************************
+* Public prototypes
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public type definitions
+*************************************************************************************
+************************************************************************************/
+typedef enum
+{
+ gPhyChannelBusy_c = 0x00, /*The CCA attempt has detected a busy channel.*/
+ gPhyBusyRx_c = 0x01, /*The transceiver is asked to change its state while receiving.*/
+ gPhyBusyTx_c = 0x02, /*The transceiver is asked to change its state while transmitting.*/
+ gPhyChannelIdle_c = 0x04, /*The CCA attempt has detected an idle channel.*/
+ gPhyInvalidParameter_c = 0x05, /*A SET request was issued with a parameter in the primitive that is out of the valid range.*/
+ gPhyRxOn_c = 0x06, /*The transceiver is in the receiver enabled state.*/
+ gPhySuccess_c = 0x07, /*A SET/GET, an ED operation, a data request, an indirect queue insert, or a transceiver state change was successful.*/
+ gPhyTRxOff_c = 0x08, /*The transceiver is in the transceiver disabled state.*/
+ gPhyTxOn_c = 0x09, /*The transceiver is in the transmitter enabled state.*/
+ gPhyUnsupportedAttribute_c = 0x0a, /*A SET/GET request was issued with the identifier of an attribute that is not supported.*/
+ gPhyReadOnly_c = 0x0b, /*A SET request was issued with the identifier of an attribute that is read-only.*/
+ gPhyIndexUsed_c = 0x11, /*The indirect queue insert operation has detected an used index.*/
+ gPhyNoAck_c = 0x14, /*No ACK was received for the last transmission.*/
+ gPhyFramePending_c = 0x15, /*The ACK of a Data Request frame indicates a pending frame in the coordinators indirect TX queue.*/
+ gPhyBusy_c = 0xF1, //
+ gPhyInvalidPrimitive_c = 0xF2 //
+}phyStatus_t;
+
+typedef enum
+{
+ gPhySlottedMode_c = 0x0c,
+ gPhyUnslottedMode_c = 0x0d
+}phySlottedMode_t;
+
+typedef enum
+{
+ gPhyEnergyDetectMode_c = 0x00,
+ gPhyCCAMode1_c = 0x01,
+ gPhyCCAMode2_c = 0x02,
+ gPhyCCAMode3_c = 0x03,
+ gPhyNoCCABeforeTx_c = 0x04
+}phyCCAType_t;
+
+typedef enum
+{
+ gPhyContCcaEnabled = 0x00,
+ gPhyContCcaDisabled
+}phyContCCAMode_t;
+
+typedef enum
+{
+ gPhyForceTRxOff_c = 0x03, /*The transceiver is to be switched off immediately.*/
+ gPhySetRxOn_c = 0x12, /*The transceiver is to be configured into the receiver enabled state.*/
+ gPhySetTRxOff_c = 0x13, /*The transceiver is to be configured into the transceiver disabled state.*/
+}phyState_t;
+
+typedef enum
+{
+ gPhyRxAckRqd_c = 0x00, /*A receive Ack frame is expected to follow the transmit frame (non-Ack frames are rejected)*/
+ gPhyNoAckRqd_c = 0x01, /*An ordinary receive frame (any type of frame) follows the transmit frame*/
+#ifdef gPHY_802_15_4g_d
+ gPhyEnhancedAckReq = 0x02
+#endif // gPHY_802_15_4g_d
+}phyAckRequired_t;
+
+typedef enum
+{
+ gPhyPibCurrentChannel_c = 0x00, /*The channel currently used.*/
+ gPhyPibCurrentPage_c = 0x01, /*The channel page currently used.*/
+ gPhyPibTransmitPower_c = 0x02, /*The power used for TX operations.*/
+ gPhyPibLongAddress_c = 0x03, /*The MAC long address to be used by the PHYs source address matching feature.*/
+ gPhyPibShortAddress_c = 0x04, /*The MAC short address to be used by the PHYs source address matching feature.*/
+ gPhyPibPanId_c = 0x05, /*The MAC PAN ID to be used by the PHYs source address matching feature.*/
+ gPhyPibPanCoordinator_c = 0x06, /*Indicates if the device is a PAN coordinator or not.*/
+ gPhyPibSrcAddrEnable_c = 0x07, /*Enables or disables the PHYs source address matching feature.*/
+ gPhyPibPromiscuousMode_c = 0x08, /*Selects between normal, promiscuous and active promiscuous mode.*/
+ gPhyPibAutoAckEnable_c = 0x09, /*Enables or disables automatic transmission of ACK frames.*/
+ gPhyPibFrameVersion_c = 0x0A, /*Used in checking for allowed frame versions (0x00 - any version accepted, 0x01 - accept Frame Version 0 packets (2003 compliant), 0x02 - accept Frame Version 1 packets (2006 compliant), 0x03 - accept Frame Version 0 and 1 packets).*/
+ gPhyPibFrameEnable_c = 0x0B, /*Used for enabling or disabling reception of MAC frames.*/
+ gPhyPibAckFramePending_c = 0x0C, /*Used to copy its contents to the outgoing ACK frame's Frame Pending field as a response to a received Data Request frame with Source Address Matching disabled.*/
+ gPhyPibRxOnWhenIdle = 0x0D, /*Enable RX when the radio is IDLE*/
+ gPhyPibFrameWaitTime_c = 0x0E, /*The number of symbols the Rx should be on after receiving an ACK with FP=1 */
+ gPhyPibDeferTxIfRxBusy_c = 0x0F,
+#ifdef gPHY_802_15_4g_d
+ gPhyPibPhyModeSupported_c = 0x10,
+ gPhyPibCurrentMode_c = 0x11,
+ gPhyPibFSKPreambleRepetitions_c = 0x12,
+ gPhyPibFSKScramblePSDU_c = 0x13,
+ gPhyPibCCADuration_c = 0x14,
+ gPhyPibCSLRxEnabled_c = 0x15,
+ gPhyPibCSLTxEnabled_c = 0x16,
+ gPhyPibFreqBandId_c = 0x17,
+ gPhyPibAckWaitDuration_c = 0x18
+#endif // gPHY_802_15_4g_d
+}phyPibId_t;
+
+typedef struct phyFlags_tag
+{
+ union{
+ uint32_t mask;
+ struct{
+ uint32_t rxOnWhenIdle :1;
+ uint32_t rxFramePending :1;
+ uint32_t idleRx :1;
+#ifdef gPHY_802_15_4g_d
+ uint32_t slotted :1;
+ uint32_t ccaBfrTX :1;
+ uint32_t rxAckRqd :1;
+ uint32_t autoAck :1;
+ uint32_t panCordntr :1;
+ uint32_t promiscuous :1;
+ uint32_t activePromiscuous :1;
+ uint32_t cslRxEnabled :1;
+ uint32_t cslTxEnabled :1;
+ uint32_t rxEnhAckRqd :1;
+ uint32_t ccaEdScan :1; // set for a CCA or ED request
+ uint32_t ccaComplete :1; // set when a CCA period is over
+ uint32_t waitTurnaroundComplete :1; // set when a Auto ACK send or receive sequence started
+ uint32_t reserved :16;
+#else
+ uint32_t phyState :3;
+ uint32_t reserved :26;
+#endif // gPHY_802_15_4g_d
+ };
+ };
+}phyFlags_t;
+
+#define gInvalidTimerId_c (gMaxPhyTimers_c)
+
+#ifdef gPHY_802_15_4g_d
+#define gPhyTimeShift_c (16) // 16bit hw timer
+#define gPhyTimeMask_c (0x000000000000FFFF)
+#else
+#define gPhyTimeShift_c (24) // 24bit hw timer
+#define gPhyTimeMask_c (0x00FFFFFF)
+#endif
+
+typedef uint8_t phyTimeTimerId_t;
+typedef uint64_t phyTimeTimestamp_t;
+
+#ifdef gPHY_802_15_4g_d
+typedef uint64_t phyTime_t;
+#else
+typedef uint32_t phyTime_t;
+#endif
+
+typedef void (*phyTimeCallback_t) ( uint32_t param );
+
+typedef enum
+{
+ gPhyTimeOk_c = 0x00,
+ gPhyTimeAlreadyPassed_c = 0x01,
+ gPhyTimeTooClose_c = 0x02,
+ gPhyTimeTooMany_c = 0x03,
+ gPhyTimeInvalidParameter_c = 0x04,
+ gPhyTimeNotFound_c = 0x05,
+ gPhyTimeError_c = 0x06
+}phyTimeStatus_t;
+
+#ifdef gPHY_802_15_4g_d
+typedef struct phyPHR_tag
+{
+ union{
+ uint16_t mask;
+ uint8_t byteAccess[2];
+ struct{
+ uint8_t modeSwitch :1;
+ uint8_t reserved :2;
+ uint8_t fcsType :1;
+ uint8_t dataWhitening :1;
+ uint8_t frameLengthRsvd :3; // Max psdu 254
+ uint8_t frameLength;
+ };
+ };
+}phyPHR_t;
+
+typedef enum{
+ gPhyMode1_c = 0x00,
+ gPhyMode2_c = 0x01,
+ gPhyMode3_c = 0x02,
+ gPhyMode4_c = 0x03,
+ gPhyMode1ARIB_c = 0x04,
+ gPhyMode2ARIB_c = 0x05,
+ gPhyMode3ARIB_c = 0x06,
+}phyMode_t;
+
+//802.15.4g MAC sub-1GHz frequency bands
+typedef enum{
+ gFreq470__510MHz_c = 0x02, // 470-510 (China)
+ gFreq779__787MHz_c = 0x03, // 779-787 (China)
+ gFreq863__870MHz_c = 0x04, // 863-870 (Europe)
+ gFreq902__928MHz_c = 0x07, // 902-928 (U.S.)
+ gFreq920__928MHz_c = 0x09, // 920-928 (Japan) - Includes ARIB modes
+ gFreq863__876MHz_c = 0x0E, // 863-876 (UK) custom mode
+ gFreq915__921MHz_c = 0x0F, // 915-921 (UK) custom mode
+}phyFreqBand_t;
+
+#ifndef gPhyModeDefault_d
+#define gPhyModeDefault_d gPhyMode1_c
+#endif
+
+#endif // gPHY_802_15_4g_d
+
+/************************************************************************************
+*************************************************************************************
+* Public memory declarations
+*************************************************************************************
+************************************************************************************/
+
+/************************************************************************************
+*************************************************************************************
+* Public functions
+*************************************************************************************
+************************************************************************************/
+
+#endif /* _PHY_TYPES_H */
--- a/RF_Drivers_Freescale/driverRFPhy_c.txt Sun Mar 08 04:19:44 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,153 +0,0 @@
-/*!
-* Copyright (c) 2015, Freescale Semiconductor, Inc.
-* All rights reserved.
-*
-* \file MCR20Drv.c
-*
-* Redistribution and use in source and binary forms, with or without modification,
-* are permitted provided that the following conditions are met:
-*
-* o Redistributions of source code must retain the above copyright notice, this list
-* of conditions and the following disclaimer.
-*
-* o Redistributions in binary form must reproduce the above copyright notice, this
-* list of conditions and the following disclaimer in the documentation and/or
-* other materials provided with the distribution.
-*
-* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
-* contributors may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-
-/*****************************************************************************
-* INCLUDED HEADERS *
-*---------------------------------------------------------------------------*
-* Add to this section all the headers that this module needs to include. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-
-#include "arm_hal_phy.h"
-#include "arm_hal_interrupt.h"
-
-
-/*****************************************************************************
-* PRIVATE VARIABLES *
-*---------------------------------------------------------------------------*
-* Add to this section all the variables and constants that have local *
-* (file) scope. *
-* Each of this declarations shall be preceded by the 'static' keyword. *
-* These variables / constants cannot be accessed outside this module. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-static uint8_t mac_eui64[8];
-static phy_device_driver_s device_driver;
-static int8_t rf_radio_driver_id = -1;
-static phy_device_channel_info_s channel_info;
-
-/*****************************************************************************
-* PUBLIC VARIABLES *
-*---------------------------------------------------------------------------*
-* Add to this section all the variables and constants that have global *
-* (project) scope. *
-* These variables / constants can be accessed outside this module. *
-* These variables / constants shall be preceded by the 'extern' keyword in *
-* the interface header. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-/*****************************************************************************
-* PRIVATE FUNCTIONS PROTOTYPES *
-*---------------------------------------------------------------------------*
-* Add to this section all the functions prototypes that have local (file) *
-* scope. *
-* These functions cannot be accessed outside this module. *
-* These declarations shall be preceded by the 'static' keyword. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-/*****************************************************************************
-* PRIVATE FUNCTIONS *
-*---------------------------------------------------------------------------*
-* Add to this section all the functions that have local (file) scope. *
-* These functions cannot be accessed outside this module. *
-* These definitions shall be preceded by the 'static' keyword. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-
-/*****************************************************************************
-* PUBLIC FUNCTIONS *
-*---------------------------------------------------------------------------*
-* Add to this section all the functions that have global (project) scope. *
-* These functions can be accessed outside this module. *
-* These functions shall have their declarations (prototypes) within the *
-* interface header file and shall be preceded by the 'extern' keyword. *
-*---------------------------------------------------------------------------*
-*****************************************************************************/
-
-
-/*
- * \brief Function initialises and registers the RF driver.
- *
- * \param none
- *
- * \return rf_radio_driver_id Driver ID given by NET library
- */
-int8_t rf_device_register(void)
-{
- rf_init();
- /*Set pointer to MAC address*/
- device_driver.PHY_MAC = mac_eui64;
- device_driver.driver_description = "Freescale_MAC";
-#if PHY_LINK_15_4_2_4GHZ_TYPE
- /*Number of channels in PHY*/
- channel_info.channel_count = 16;
- /*Channel mask 26-11*/
- channel_info.channel_mask = 0x07FFF800;
- /*Type of RF PHY is SubGHz*/
- device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
- device_driver.link_channel_info = &channel_info;
-#else
- /*Number of channels in PHY*/
- channel_info.channel_count = 11;
- /*Channel mask 0-10*/
- channel_info.channel_mask = 0x000007ff;
- /*Type of RF PHY is SubGHz*/
- device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
- device_driver.link_channel_info = &channel_info;
-#endif
- /*Maximum size of payload is 127*/
- device_driver.phy_MTU = 127;
- /*No header in PHY*/
- device_driver.phy_header_length = 0;
- /*No tail in PHY*/
- device_driver.phy_tail_length = 0;
- /*Set address write function*/
- device_driver.phy_xx_address_write = &rf_address_write;
- /*Set RF extension function*/
- device_driver.phy_xx_extension = &rf_extension;
- /*Set RF state control function*/
- device_driver.phy_xx_state_control = &rf_interface_state_control;
- /*Set transmit function*/
- device_driver.phy_xx_tx = &rf_start_cca;
- printf("RF Device Registration...");
- /*Register device driver*/
- rf_radio_driver_id = arm_net_phy_register(&device_driver);
- printf("OK\r\n");
- return rf_radio_driver_id;
-}
-
--- a/RF_Drivers_Freescale/driverRFPhy_h.txt Sun Mar 08 04:19:44 2015 +0000
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,77 +0,0 @@
-/*
- * driverRFPhy.h
- *
- * Created on: 14 July 2014
- * Author: mBed Team
- */
-
-#ifndef DRIVERRFPHY_H_
-#define DRIVERRFPHY_H_
-
-#include "arm_hal_phy.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*Run calibration every 5 minutes*/
-#define RF_CALIBRATION_INTERVAL 6000000
-/*Wait ACK for 2.5ms*/
-#define RF_ACK_WAIT_TIMEOUT 50
-
-#define RF_BUFFER_SIZE 128
-#define RF_DEFAULT_CHANNEL 11
-
-/*Radio RX and TX state definitions*/
-#define RFF_ON 0x01
-#define RFF_RX 0x02
-#define RFF_TX 0x04
-#define RFF_CCA 0x08
-
-/*Atmel RF states*/
-typedef enum
-{
- NOP = 0x00,
- BUSY_RX = 0x01,
- RF_TX_START = 0x02,
- FORCE_TRX_OFF = 0x03,
- FORCE_PLL_ON = 0x04,
- RX_ON = 0x06,
- TRX_OFF = 0x08,
- PLL_ON = 0x09,
- BUSY_RX_AACK = 0x11,
- SLEEP = 0x0F,
- RX_AACK_ON = 0x16,
- TX_ARET_ON = 0x19
-}rf_trx_states_t;
-
-extern void rf_ack_wait_timer_start(uint16_t slots);
-extern void rf_ack_wait_timer_stop(void);
-extern void rf_handle_cca_ed_done(void);
-extern void rf_handle_tx_end(void);
-extern void rf_handle_rx_end(void);
-extern void rf_on(void);
-extern void rf_receive(void);
-extern void rf_poll_trx_state_change(rf_trx_states_t trx_state);
-extern void rf_init(void);
-extern void rf_set_mac_address(const uint8_t *ptr);
-extern int8_t rf_device_register(void);
-extern int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle);
-extern void rf_cca_abort(void);
-extern void rf_read_mac_address(uint8_t *ptr);
-extern int8_t rf_read_random(void);
-extern void rf_calibration_cb(void);
-extern uint8_t rf_init_phy_mode(void);
-extern void rf_ack_wait_timer_interrupt(void);
-extern void rf_calibration_timer_interrupt(void);
-extern void rf_calibration_timer_start(uint32_t slots);
-extern void rf_front_end_rx_lna(void);
-extern void rf_front_end_sleep(void);
-static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
-static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
-static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
-
- #ifdef __cplusplus
-}
-#endif
-#endif /* DRIVERRFPHY_H_ */
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/driverRFinterface.c Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,333 @@
+/*
+ * driverRFinterface.c
+ *
+ * Created on: 12 March 2015
+ * Author: mBed Team
+ */
+
+#include "EmbeddedTypes.h"
+#include "Phy.h"
+#include "driverRFinterface.h"
+
+#include "arm_hal_interrupt.h"
+#include "arm_hal_phy.h"
+
+#include <string.h>
+#include <stdio.h>
+
+
+static uint8_t fsl_MAC[8];
+static phy_device_driver_s device_driver;
+static phy_device_channel_info_s channel_info;
+
+static uint8_t rf_channel;
+static int8_t rf_radio_driver_id = -1;
+
+static uint8_t mac_tx_handle = 0;
+static uint8_t tx_sequence = 0xff;
+
+ /*
+ * \brief Function sets the MAC address array.
+ *
+ * \param ptr Pointer to given MAC address array
+ *
+ * \return none
+ */
+void rf_set_mac_address(const uint8_t *ptr)
+{
+ memcpy(fsl_MAC,ptr,8);
+}
+
+/*
+ * \brief Function initialises and registers the RF driver.
+ *
+ * \param none
+ *
+ * \return rf_radio_driver_id Driver ID given by NET library
+ */
+int8_t rf_device_register(void)
+{
+ //rf_init();
+
+ Phy_Init();
+ rf_channel_set(RF_DEFAULT_CHANNEL);
+
+ /*Set pointer to MAC address*/
+ device_driver.PHY_MAC = fsl_MAC;
+ device_driver.driver_description = "FSL_MAC";
+#if PHY_LINK_15_4_2_4GHZ_TYPE
+ /*Number of channels in PHY*/
+ channel_info.channel_count = 16;
+ /*Channel mask 26-11*/
+ channel_info.channel_mask = 0x07FFF800;
+ /*Type of RF PHY is SubGHz*/
+ device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
+ device_driver.link_channel_info = &channel_info;
+#else
+ /*Number of channels in PHY*/
+ channel_info.channel_count = 11;
+ /*Channel mask 0-10*/
+ channel_info.channel_mask = 0x000007ff;
+ /*Type of RF PHY is SubGHz*/
+ device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
+ device_driver.link_channel_info = &channel_info;
+#endif
+ /*Maximum size of payload is 127*/
+ device_driver.phy_MTU = 127;
+ /*No header in PHY*/
+ device_driver.phy_header_length = 0;
+ /*No tail in PHY*/
+ device_driver.phy_tail_length = 0;
+ /*Set address write function*/
+ device_driver.phy_xx_address_write = &rf_address_write;
+ /*Set RF extension function*/
+ device_driver.phy_xx_extension = &rf_extension;
+ /*Set RF state control function*/
+ device_driver.phy_xx_state_control = &rf_interface_state_control;
+ /*Set transmit function*/
+ device_driver.phy_xx_tx = &rf_tx;
+ printf("RF Device Registration...");
+ /*Register device driver*/
+ rf_radio_driver_id = arm_net_phy_register(&device_driver);
+ printf("OK\r\n");
+ return rf_radio_driver_id;
+}
+
+/*
+ * \brief Function sets the addresses to RF address filters.
+ *
+ * \param address_type Type of address
+ * \param address_ptr Pointer to given address
+ *
+ * \return 0 Success
+ */
+static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
+{
+ int8_t ret_val = 0;
+ uint64_t temp64 = 0;
+ uint16_t temp16 = 0;
+
+ switch (address_type)
+ {
+ /*Set 48-bit address*/
+ case PHY_MAC_48BIT:
+ break;
+ /*Set 64-bit address*/
+ case PHY_MAC_64BIT:
+ temp64 = atouint64(address_ptr);
+ PhyPlmeSetPIBRequest(gPhyPibLongAddress_c, temp64, 0, 0 );
+ break;
+ /*Set 16-bit address*/
+ case PHY_MAC_16BIT:
+ temp16 = atouint16(address_ptr);
+ PhyPlmeSetPIBRequest(gPhyPibShortAddress_c, temp16, 0, 0 );
+ break;
+ /*Set PAN Id*/
+ case PHY_MAC_PANID:
+ temp16 = atouint16(address_ptr);
+ PhyPlmeSetPIBRequest(gPhyPibPanId_c, temp16, 0, 0 );
+ break;
+ }
+ return ret_val;
+}
+
+/*
+ * \brief Function controls the ACK pending, channel setting and energy detection.
+ *
+ * \param extension_type Type of control
+ * \param data_ptr Data from NET library
+ *
+ * \return 0 Success
+ */
+static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
+{
+ switch (extension_type)
+ {
+ /*Control MAC pending bit for Indirect data transmission*/
+ case PHY_EXTENSION_CTRL_PENDING_BIT:
+ if(*data_ptr)
+ {
+ //rf_if_ack_pending_ctrl(1);
+ }
+ else
+ {
+ //rf_if_ack_pending_ctrl(0);
+ }
+ break;
+ /*Return frame pending status*/
+ case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS:
+ //*data_ptr = rf_if_last_acked_pending();
+ break;
+ /*Set channel*/
+ case PHY_EXTENSION_SET_CHANNEL:
+ break;
+ /*Read energy on the channel*/
+ case PHY_EXTENSION_READ_CHANNEL_ENERGY:
+ break;
+ /*Read status of the link*/
+ case PHY_EXTENSION_READ_LINK_STATUS:
+ break;
+ }
+ return 0;
+}
+
+/*
+ * \brief Function gives the control of RF states to MAC.
+ *
+ * \param new_state RF state
+ * \param rf_channel RF channel
+ *
+ * \return 0 Success
+ */
+static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
+{
+ int8_t ret_val = 0;
+ switch (new_state)
+ {
+ /*Reset PHY driver and set to idle*/
+ case PHY_INTERFACE_RESET:
+ break;
+ /*Disable PHY Interface driver*/
+ case PHY_INTERFACE_DOWN:
+ //rf_shutdown();
+ break;
+ /*Enable PHY Interface driver*/
+ case PHY_INTERFACE_UP:
+ rf_channel_set(rf_channel);
+ //rf_receive();
+ break;
+ /*Enable wireless interface ED scan mode*/
+ case PHY_INTERFACE_RX_ENERGY_STATE:
+ break;
+ }
+ return ret_val;
+}
+
+
+/*
+ * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO.
+ *
+ * \param data_ptr Pointer to TX data
+ * \param data_length Length of the TX data
+ * \param tx_handle Handle to transmission
+ * \return 0 Success
+ * \return -1 Busy
+ */
+int8_t rf_tx(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle)
+{
+ /*Store TX handle*/
+ mac_tx_handle = tx_handle;
+
+ /*Store the sequence number for ACK handling*/
+ tx_sequence = *(data_ptr + 2);
+
+ macToPdDataMessage_t *pPdSapMsg = (macToPdDataMessage_t *)malloc( sizeof(macToPdDataMessage_t));
+ pPdSapMsg->macInstance = 0;
+ pPdSapMsg->msgType = gPdDataReq_c;
+
+ /*Check if transmitted data needs to be acked*/
+ if(*data_ptr & 0x20)
+ {
+ pPdSapMsg->msgData.dataReq.ackRequired = gPhyRxAckRqd_c;
+ }
+ else
+ {
+ pPdSapMsg->msgData.dataReq.ackRequired = gPhyNoAckRqd_c;
+ }
+
+ pPdSapMsg->msgData.dataReq.startTime = gPhySeqStartAsap_c;
+ pPdSapMsg->msgData.dataReq.txDuration = gPhySeqStartAsap_c;
+ pPdSapMsg->msgData.dataReq.CCABeforeTx = gPhyCCAMode1_c;
+ pPdSapMsg->msgData.dataReq.slottedTx = gPhyUnslottedMode_c;
+ pPdSapMsg->msgData.dataReq.pPsdu = data_ptr;
+ pPdSapMsg->msgData.dataReq.psduLength = data_length;
+
+ MAC_PD_SapHandler(pPdSapMsg, 0);
+
+
+#if 0
+ /*Check if transmitter is busy*/
+ if((rf_if_read_trx_state() == BUSY_RX_AACK) || (rf_if_read_trx_state() == BUSY_RX))
+ {
+ /*Return busy*/
+ return -1;
+ }
+ else
+ {
+ arm_enter_critical();
+ /*Check if transmitted data needs to be acked*/
+ if(*data_ptr & 0x20)
+ need_ack = 1;
+ else
+ need_ack = 0;
+ /*Store the sequence number for ACK handling*/
+ tx_sequence = *(data_ptr + 2);
+ /*Set radio in RX state to read channel*/
+ rf_receive();
+ /*Write TX FIFO*/
+ rf_if_write_frame_buffer(data_ptr, (uint8_t)data_length);
+ rf_flags_set(RFF_CCA);
+ /*Start CCA process*/
+ rf_if_enable_cca_ed_done_interrupt();
+ rf_if_start_cca_process();
+ /*Store TX handle*/
+ mac_tx_handle = tx_handle;
+ arm_exit_critical();
+ }
+#endif
+
+ /*Return success*/
+ return 0;
+}
+
+/*
+ * \brief Function sets the RF channel.
+ *
+ * \param ch New channel
+ *
+ * \return none
+ */
+void rf_channel_set(uint8_t ch)
+{
+ //arm_enter_critical();
+ rf_channel = ch;
+ if(ch < 0x1f)
+ {
+ PhyPlmeSetPIBRequest(gPhyPibCurrentChannel_c, ch, 0, 0 );
+ //rf_if_set_channel_register(ch);
+ }
+ //arm_exit_critical();
+}
+
+uint16_t atouint16
+(
+ uint8_t* pArray
+)
+{
+ uuint16_t out;
+
+ out.u8[1] = *pArray++;
+ out.u8[0] = *pArray;
+
+ return out.u16;
+}
+
+uint64_t atouint64
+(
+ uint8_t* pArray
+)
+{
+ uuint64_t out;
+
+ out.u8[7] = *pArray++;
+ out.u8[6] = *pArray++;
+ out.u8[5] = *pArray++;
+ out.u8[4] = *pArray++;
+ out.u8[3] = *pArray++;
+ out.u8[2] = *pArray++;
+ out.u8[1] = *pArray++;
+ out.u8[0] = *pArray;
+
+ return out.u64;
+}
+
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/RF_Drivers_Freescale/driverRFinterface.h Sun Mar 15 00:56:28 2015 -0500
@@ -0,0 +1,55 @@
+/*
+ * driverRFinterface.h
+ *
+ * Created on: 12 March 2015
+ * Author: mBed Team
+ */
+
+#ifndef DRIVERRFINTERFACE_H_
+#define DRIVERRFINTERFACE_H_
+
+#include "arm_hal_phy.h"
+#include "EmbeddedTypes.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RF_BUFFER_SIZE 128
+#define RF_DEFAULT_CHANNEL 11
+
+typedef union uuint16_tag
+{
+ uint16_t u16;
+ uint8_t u8[2];
+} uuint16_t;
+
+typedef union uuint32_tag
+{
+ uint32_t u32;
+ uint16_t u16[2];
+ uint8_t u8[4];
+} uuint32_t;
+
+typedef union uuint64_tag
+{
+ uint64_t u64;
+ uint32_t u32[2];
+ uint16_t u16[4];
+ uint8_t u8[8];
+} uuint64_t;
+
+extern void rf_set_mac_address(const uint8_t *ptr);
+extern void rf_channel_set(uint8_t ch);
+extern uint64_t atouint64(uint8_t* pArray);
+extern uint16_t atouint16(uint8_t* pArray);
+extern int8_t rf_tx(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle);
+static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
+static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
+static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* DRIVERRFINTERFACE_H_ */
\ No newline at end of file
--- a/main.cpp Sun Mar 08 04:19:44 2015 +0000
+++ b/main.cpp Sun Mar 15 00:56:28 2015 -0500
@@ -333,14 +333,16 @@
debug("\r\nApplication Start\r\n");
ns_dyn_mem_init(app_defined_stack_heap, APP_DEV_HEAP_SIZE, app_heap_error_handler,0);
rf_set_mac_address(app_MAC_address);
-
+
// init RF interface
debug("Init RF Interface...\r\n");
rf_phy_device_register_id = rf_device_register();
+
randLIB_seed_random();
debug("Init ARM Timer...\r\n");
arm_timer_init();//Init Timer
+
//Init nanostack & Event OS
debug("Init Net Core...\r\n");
net_init_core();
@@ -352,6 +354,7 @@
error("Tasklet create fail..");
while(1);
}
+
debug("Event Dispatch\r\n");
event_dispatch();
}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/mcr20_helloworld.ewt Sun Mar 15 00:56:28 2015 -0500 @@ -0,0 +1,796 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<project> + <fileVersion>2</fileVersion> + <configuration> + <name>Debug</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>RuntimeChecking</name> + <archiveVersion>0</archiveVersion> + <data> + <version>2</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>GenRtcDebugHeap</name> + <state>0</state> + </option> + <option> + <name>GenRtcEnableBoundsChecking</name> + <state>0</state> + </option> + <option> + <name>GenRtcCheckPtrsNonInstrMem</name> + <state>1</state> + </option> + <option> + <name>GenRtcTrackPointerBounds</name> + <state>1</state> + </option> + <option> + <name>GenRtcCheckAccesses</name> + <state>1</state> + </option> + <option> + <name>GenRtcGenerateEntries</name> + <state>0</state> + </option> + <option> + <name>GenRtcNrTrackedPointers</name> + <state>1000</state> + </option> + <option> + <name>GenRtcIntOverflow</name> + <state>0</state> + </option> + <option> + <name>GenRtcIncUnsigned</name> + <state>0</state> + </option> + <option> + <name>GenRtcIntConversion</name> + <state>0</state> + </option> + <option> + <name>GenRtcInclExplicit</name> + <state>0</state> + </option> + <option> + <name>GenRtcIntShiftOverflow</name> + <state>0</state> + </option> + <option> + <name>GenRtcInclUnsignedShiftOverflow</name> + <state>0</state> + </option> + <option> + <name>GenRtcUnhandledCase</name> + <state>0</state> + </option> + <option> + <name>GenRtcDivByZero</name> + <state>0</state> + </option> + <option> + <name>GenRtcEnable</name> + <state>0</state> + </option> + <option> + <name>GenRtcCheckPtrsNonInstrFunc</name> + <state>1</state> + </option> + </data> + </settings> + </configuration> + <group> + <name>FXOS8700Q_TapDetector</name> + <file> + <name>$PROJ_DIR$\FXOS8700Q_TapDetector\FXOS8700Q_TD.cpp</name> + </file> + <file> + <name>$PROJ_DIR$\FXOS8700Q_TapDetector\FXOS8700Q_TD.h</name> + </file> + </group> + <group> + <name>mBed</name> + <file> + <name>$PROJ_DIR$\mbed\AnalogIn.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\analogin_api.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\AnalogOut.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\analogout_api.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\BusIn.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\BusInOut.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\BusOut.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\CallChain.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\CAN.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\can_api.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\can_helper.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\cmsis.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\cmsis_nvic.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\core_ca9.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\core_ca_mmu.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\core_caFunc.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\core_caInstr.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cm0.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cm0plus.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cm3.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cm4.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cm4_simd.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cmFunc.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\core_cmInstr.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\TARGET_Freescale\TARGET_KPSDK_MCUS\TARGET_MCU_K64F\TARGET_FRDM\device.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\DigitalIn.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\DigitalInOut.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\DigitalOut.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\DirHandle.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\Ethernet.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\ethernet_api.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\FileBase.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\FileHandle.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\FileLike.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\FilePath.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\FileSystemLike.h</name> + </file> + <file> + <name>$PROJ_DIR$\mbed\TARGET_K64F\TARGET_Freescale\TARGET_KPSDK_MCUS\TARGET_MCU_K64F\device\MK64F12\fsl_bitaccess.h</name> + </file> + <file> + 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