Maxim Integrated / MAX17055_EZconfig

This is a library for the MAX17055 Li+ Battery Fuel Gauge.

Dependents:   Low_Power_Long_Distance_IR_Vision_Robot MAX17055_EZconfig MAX17055_EZconfig_Sample Low_Power_Long_Distance_IR_Vision_Robot

Fork of max17055 by Maxim Integrated

max17055.cpp@6:5ced10109ebf, 2017-10-05 (annotated)

Committer:
fneirab
Date:
Thu Oct 05 02:37:59 2017 +0000
Revision:
6:5ced10109ebf
Parent:
5:a18a189588dc
Child:
7:479a36909ced
modifications to init function for EZ config. ;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
fneirab 4:a4d6ae2182c2 1 /******************************************************************//**
fneirab 4:a4d6ae2182c2 2 * @file max17055.cpp
fneirab 4:a4d6ae2182c2 3 *
fneirab 4:a4d6ae2182c2 4 * @author Felipe Neira - Maxim Integrated - TTS
fneirab 4:a4d6ae2182c2 5 *
fneirab 4:a4d6ae2182c2 6 * @version 1.0
fneirab 4:a4d6ae2182c2 7 *
fneirab 4:a4d6ae2182c2 8 * Started: 11SEP17
fneirab 4:a4d6ae2182c2 9 *
fneirab 5:a18a189588dc 10 * Updated:
fneirab 4:a4d6ae2182c2 11 *
fneirab 4:a4d6ae2182c2 12 * @brief Source file for MAX31855 class
fneirab 4:a4d6ae2182c2 13 *
fneirab 4:a4d6ae2182c2 14 ********************************************************************************
fneirab 4:a4d6ae2182c2 15 * Copyright (C) 2017 Maxim Integrated Products, Inc., All Rights Reserved.
fneirab 4:a4d6ae2182c2 16 *
fneirab 4:a4d6ae2182c2 17 * Permission is hereby granted, free of charge, to any person obtaining a
fneirab 4:a4d6ae2182c2 18 * copy of this software and associated documentation files (the "Software"),
fneirab 4:a4d6ae2182c2 19 * to deal in the Software without restriction, including without limitation
fneirab 4:a4d6ae2182c2 20 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
fneirab 4:a4d6ae2182c2 21 * and/or sell copies of the Software, and to permit persons to whom the
fneirab 4:a4d6ae2182c2 22 * Software is furnished to do so, subject to the following conditions:
fneirab 4:a4d6ae2182c2 23 *
fneirab 4:a4d6ae2182c2 24 * The above copyright notice and this permission notice shall be included
fneirab 4:a4d6ae2182c2 25 * in all copies or substantial portions of the Software.
fneirab 4:a4d6ae2182c2 26 *
fneirab 4:a4d6ae2182c2 27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
fneirab 4:a4d6ae2182c2 28 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
fneirab 4:a4d6ae2182c2 29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
fneirab 4:a4d6ae2182c2 30 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
fneirab 4:a4d6ae2182c2 31 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
fneirab 4:a4d6ae2182c2 32 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
fneirab 4:a4d6ae2182c2 33 * OTHER DEALINGS IN THE SOFTWARE.
fneirab 4:a4d6ae2182c2 34 *
fneirab 4:a4d6ae2182c2 35 * Except as contained in this notice, the name of Maxim Integrated
fneirab 4:a4d6ae2182c2 36 * Products, Inc. shall not be used except as stated in the Maxim Integrated
fneirab 4:a4d6ae2182c2 37 * Products, Inc. Branding Policy.
fneirab 4:a4d6ae2182c2 38 *
fneirab 4:a4d6ae2182c2 39 * The mere transfer of this software does not imply any licenses
fneirab 4:a4d6ae2182c2 40 * of trade secrets, proprietary technology, copyrights, patents,
fneirab 4:a4d6ae2182c2 41 * trademarks, maskwork rights, or any other form of intellectual
fneirab 4:a4d6ae2182c2 42 * property whatsoever. Maxim Integrated Products, Inc. retains all
fneirab 4:a4d6ae2182c2 43 * ownership rights.
fneirab 4:a4d6ae2182c2 44 *
fneirab 4:a4d6ae2182c2 45 ******************************************************************************/
fneirab 0:80c39eb8f3ba 46
fneirab 0:80c39eb8f3ba 47 #include "mbed.h"
fneirab 0:80c39eb8f3ba 48 #include "max17055.h"
fneirab 0:80c39eb8f3ba 49
fneirab 5:a18a189588dc 50 #define DRV_NAME "max17055"
fneirab 5:a18a189588dc 51
fneirab 5:a18a189588dc 52 /* CONFIG register bits */
fneirab 5:a18a189588dc 53 #define MAX17055_CONFIG_ALRT_EN (1 << 2)
fneirab 5:a18a189588dc 54 #define MAX17055_CONFIG2_LDMDL (1 << 5)
fneirab 5:a18a189588dc 55
fneirab 5:a18a189588dc 56 /* STATUS register bits */
fneirab 5:a18a189588dc 57 #define MAX17055_STATUS_BST (1 << 3)
fneirab 5:a18a189588dc 58 #define MAX17055_STATUS_POR (1 << 1)
fneirab 5:a18a189588dc 59
fneirab 5:a18a189588dc 60 /* MODELCFG register bits */
fneirab 5:a18a189588dc 61 #define MAX17055_MODELCFG_REFRESH (1 << 15)
fneirab 5:a18a189588dc 62
fneirab 5:a18a189588dc 63 /* TALRTTH register bits */
fneirab 5:a18a189588dc 64 #define MIN_TEMP_ALERT 0
fneirab 5:a18a189588dc 65 #define MAX_TEMP_ALERT 8
fneirab 5:a18a189588dc 66
fneirab 5:a18a189588dc 67 /* FSTAT register bits */
fneirab 5:a18a189588dc 68 #define MAX17055_FSTAT_DNR (1)
fneirab 5:a18a189588dc 69
fneirab 5:a18a189588dc 70 /* STATUS interrupt status bits */
fneirab 5:a18a189588dc 71 #define MAX17055_STATUS_ALRT_CLR_MASK (0x88BB)
fneirab 5:a18a189588dc 72 #define MAX17055_STATUS_SOC_MAX_ALRT (1 << 14)
fneirab 5:a18a189588dc 73 #define MAX17055_STATUS_TEMP_MAX_ALRT (1 << 13)
fneirab 5:a18a189588dc 74 #define MAX17055_STATUS_VOLT_MAX_ALRT (1 << 12)
fneirab 5:a18a189588dc 75 #define MAX17055_STATUS_SOC_MIN_ALRT (1 << 10)
fneirab 5:a18a189588dc 76 #define MAX17055_STATUS_TEMP_MIN_ALRT (1 << 9)
fneirab 5:a18a189588dc 77 #define MAX17055_STATUS_VOLT_MIN_ALRT (1 << 8)
fneirab 5:a18a189588dc 78 #define MAX17055_STATUS_CURR_MAX_ALRT (1 << 6)
fneirab 5:a18a189588dc 79 #define MAX17055_STATUS_CURR_MIN_ALRT (1 << 2)
fneirab 5:a18a189588dc 80
fneirab 5:a18a189588dc 81 #define MAX17055_VMAX_TOLERANCE 50 /* 50 mV */
fneirab 4:a4d6ae2182c2 82
fneirab 0:80c39eb8f3ba 83
fneirab 6:5ced10109ebf 84 ///////////////////////////////////////////////////////////////////////////////
fneirab 5:a18a189588dc 85
fneirab 5:a18a189588dc 86 MAX17055::MAX17055(I2C &i2c):
fneirab 5:a18a189588dc 87 m_i2cBus(i2c)
fneirab 0:80c39eb8f3ba 88 {
fneirab 5:a18a189588dc 89 //empty block
fneirab 0:80c39eb8f3ba 90 }
fneirab 0:80c39eb8f3ba 91
fneirab 6:5ced10109ebf 92 ///////////////////////////////////////////////////////////////////////////////
fneirab 0:80c39eb8f3ba 93 MAX17055::~MAX17055()
fneirab 0:80c39eb8f3ba 94 {
fneirab 0:80c39eb8f3ba 95 //empty block
fneirab 0:80c39eb8f3ba 96 }
fneirab 5:a18a189588dc 97
fneirab 5:a18a189588dc 98
fneirab 1:a031f0c6a71e 99 ///////////////////////////////////////////////////////////////////////////////
fneirab 0:80c39eb8f3ba 100
fneirab 0:80c39eb8f3ba 101 /**
fneirab 0:80c39eb8f3ba 102 * \brief Write a value to a MAX17055 register
fneirab 0:80c39eb8f3ba 103 * \par Details
fneirab 0:80c39eb8f3ba 104 * This function writes a value to a MAX17055 register
fneirab 0:80c39eb8f3ba 105 *
fneirab 1:a031f0c6a71e 106 * \param[in] reg_addr - register address
fneirab 1:a031f0c6a71e 107 * \param[in] reg_data - register data
fneirab 0:80c39eb8f3ba 108 *
fneirab 1:a031f0c6a71e 109 * \retval 1 on success
fneirab 0:80c39eb8f3ba 110 */
fneirab 0:80c39eb8f3ba 111
fneirab 0:80c39eb8f3ba 112 int MAX17055::writeReg(Registers_e reg_addr, uint16_t reg_data)
fneirab 0:80c39eb8f3ba 113 {
fneirab 0:80c39eb8f3ba 114
fneirab 5:a18a189588dc 115
fneirab 1:a031f0c6a71e 116 uint8_t dataLSB;
fneirab 1:a031f0c6a71e 117 uint8_t dataMSB;
fneirab 5:a18a189588dc 118
fneirab 1:a031f0c6a71e 119 dataLSB = reg_data & 0x00FF;
fneirab 5:a18a189588dc 120 dataMSB = (reg_data >> 8) & 0x00FF;
fneirab 5:a18a189588dc 121
fneirab 1:a031f0c6a71e 122 char add_plus_data[3] = {reg_addr, dataLSB, dataMSB};
fneirab 5:a18a189588dc 123
fneirab 1:a031f0c6a71e 124 if ( m_i2cBus.write(I2C_W_ADRS, add_plus_data, 3, false) == 0)
fneirab 0:80c39eb8f3ba 125 return 1;
fneirab 0:80c39eb8f3ba 126 else
fneirab 0:80c39eb8f3ba 127 return 0;
fneirab 0:80c39eb8f3ba 128
fneirab 0:80c39eb8f3ba 129 }
fneirab 1:a031f0c6a71e 130 ///////////////////////////////////////////////////////////////////////////////
fneirab 0:80c39eb8f3ba 131 /**
fneirab 0:80c39eb8f3ba 132 * \brief Read a MAX17055 register
fneirab 0:80c39eb8f3ba 133 * \par Details
fneirab 0:80c39eb8f3ba 134 * This function reads a MAX17055 register
fneirab 0:80c39eb8f3ba 135 *
fneirab 1:a031f0c6a71e 136 * \param[in] reg_addr - register address
fneirab 1:a031f0c6a71e 137 * \param[out] &value - pointer that stores the register data
fneirab 0:80c39eb8f3ba 138 *
fneirab 0:80c39eb8f3ba 139 * \retval 1 on success
fneirab 0:80c39eb8f3ba 140 */
fneirab 0:80c39eb8f3ba 141
fneirab 0:80c39eb8f3ba 142
fneirab 1:a031f0c6a71e 143 int32_t MAX17055::readReg(Registers_e reg_addr, uint16_t &value)
fneirab 0:80c39eb8f3ba 144 {
fneirab 0:80c39eb8f3ba 145 int32_t result;
fneirab 1:a031f0c6a71e 146 //int16_t value2;
fneirab 1:a031f0c6a71e 147 //int16_t twoBytes;
fneirab 1:a031f0c6a71e 148 char local_data[1];
fneirab 0:80c39eb8f3ba 149 local_data[0] = reg_addr;
fneirab 1:a031f0c6a71e 150 char read_data[2];
fneirab 5:a18a189588dc 151
fneirab 0:80c39eb8f3ba 152 result = m_i2cBus.write(I2C_W_ADRS, local_data, 1);
fneirab 5:a18a189588dc 153 if(result == 0) {
fneirab 1:a031f0c6a71e 154 result = m_i2cBus.read(I2C_R_ADRS, read_data , 2, false);
fneirab 5:a18a189588dc 155 if (result == 0) {
fneirab 1:a031f0c6a71e 156 value = ( ((read_data[1] & 0x00FF) << 8) + (read_data[0]));
fneirab 1:a031f0c6a71e 157 result = 1;
fneirab 5:a18a189588dc 158 }
fneirab 0:80c39eb8f3ba 159 }
fneirab 5:a18a189588dc 160
fneirab 0:80c39eb8f3ba 161 return result;
fneirab 5:a18a189588dc 162
fneirab 0:80c39eb8f3ba 163 }
fneirab 0:80c39eb8f3ba 164
fneirab 2:ff7db397b70f 165 ///////////////////////////////////////////////////////////////////////////////
fneirab 1:a031f0c6a71e 166 /**
fneirab 1:a031f0c6a71e 167 * \brief Write and Verify a MAX17055 register
fneirab 1:a031f0c6a71e 168 * \par Details
fneirab 1:a031f0c6a71e 169 * This function wites and verifies if the writing process was successful
fneirab 1:a031f0c6a71e 170 *
fneirab 1:a031f0c6a71e 171 * \param[in] reg_addr - register address
fneirab 5:a18a189588dc 172 * \param[out] reg_data - the variable that contains the data to write
fneirab 1:a031f0c6a71e 173 * to the register address
fneirab 1:a031f0c6a71e 174 *
fneirab 1:a031f0c6a71e 175 * \retval 1 on success
fneirab 1:a031f0c6a71e 176 */
fneirab 1:a031f0c6a71e 177
fneirab 1:a031f0c6a71e 178
fneirab 5:a18a189588dc 179 int MAX17055::write_and_verify_reg(Registers_e reg_addr, uint16_t reg_data)
fneirab 5:a18a189588dc 180 {
fneirab 1:a031f0c6a71e 181 int retries = 8;
fneirab 1:a031f0c6a71e 182 int ret;
fneirab 1:a031f0c6a71e 183 int statusRead;
fneirab 1:a031f0c6a71e 184 int statusWrite;
fneirab 1:a031f0c6a71e 185 uint16_t read_data;
fneirab 5:a18a189588dc 186
fneirab 1:a031f0c6a71e 187 do {
fneirab 1:a031f0c6a71e 188 statusWrite = writeReg(reg_addr, reg_data);
fneirab 1:a031f0c6a71e 189 if (statusWrite != 1)
fneirab 1:a031f0c6a71e 190 ret = -1;
fneirab 1:a031f0c6a71e 191 wait_ms(3);
fneirab 5:a18a189588dc 192 statusRead = readReg(reg_addr, read_data);
fneirab 1:a031f0c6a71e 193 if (statusRead != 1)
fneirab 1:a031f0c6a71e 194 ret = -2;
fneirab 5:a18a189588dc 195 if (read_data != reg_data) {
fneirab 1:a031f0c6a71e 196 ret = -3;
fneirab 1:a031f0c6a71e 197 retries--;
fneirab 1:a031f0c6a71e 198 }
fneirab 5:a18a189588dc 199 } while (retries && read_data != reg_data);
fneirab 5:a18a189588dc 200
fneirab 6:5ced10109ebf 201 if (ret<0)
fneirab 1:a031f0c6a71e 202 return ret;
fneirab 6:5ced10109ebf 203 else
fneirab 1:a031f0c6a71e 204 return 1;
fneirab 1:a031f0c6a71e 205 }
fneirab 2:ff7db397b70f 206
fneirab 2:ff7db397b70f 207 ////////////////////////////////////////////////////////////////////////////////
fneirab 2:ff7db397b70f 208
fneirab 2:ff7db397b70f 209 /**
fneirab 3:f77a8345b0e3 210 * \brief Initialise Function for MAX17055
fneirab 3:f77a8345b0e3 211 * \par Details
fneirab 3:f77a8345b0e3 212 * This function intitializes the MAX17055
fneirab 3:f77a8345b0e3 213 *
fneirab 5:a18a189588dc 214 * \retval 1 on success
fneirab 3:f77a8345b0e3 215 * 0 if device is not present
fneirab 3:f77a8345b0e3 216 * -1 if errors exist
fneirab 3:f77a8345b0e3 217 */
fneirab 5:a18a189588dc 218
fneirab 5:a18a189588dc 219
fneirab 6:5ced10109ebf 220 int MAX17055::init(max17055_platform_data des_data)
fneirab 2:ff7db397b70f 221 {
fneirab 6:5ced10109ebf 222
fneirab 5:a18a189588dc 223 int status, ret;
fneirab 6:5ced10109ebf 224 uint16_t read_data, hibcfg_value, dpacc, reg;
fneirab 5:a18a189588dc 225
fneirab 5:a18a189588dc 226
fneirab 2:ff7db397b70f 227 status = readReg(MAX17055_VERSION_REG, read_data);
fneirab 2:ff7db397b70f 228 if (status == 0)
fneirab 2:ff7db397b70f 229 return status; //Device is not present in the i2c Bus
fneirab 5:a18a189588dc 230
fneirab 2:ff7db397b70f 231 /* Step 0: Check for POR */
fneirab 2:ff7db397b70f 232 /* Skip load model if POR bit is cleared */
fneirab 5:a18a189588dc 233
fneirab 2:ff7db397b70f 234 readReg(MAX17055_STATUS_REG, read_data);
fneirab 2:ff7db397b70f 235
fneirab 2:ff7db397b70f 236 if (!(read_data & MAX17055_STATUS_POR ) )
fneirab 5:a18a189588dc 237 return -1; //POR is not set. Skip Initialization.
fneirab 2:ff7db397b70f 238
fneirab 2:ff7db397b70f 239 /* Step 1: Check if FStat.DNR == 0 */
fneirab 3:f77a8345b0e3 240 // Do not continue until FSTAT.DNR == 0
fneirab 6:5ced10109ebf 241 printf("step 0 check \r\n");
fneirab 6:5ced10109ebf 242
fneirab 6:5ced10109ebf 243 int time_out = 500;
fneirab 6:5ced10109ebf 244 ret = max17055_poll_flag_clear (MAX17055_FSTAT_REG, MAX17055_FSTAT_DNR, time_out);
fneirab 6:5ced10109ebf 245 if (ret < 0){
fneirab 6:5ced10109ebf 246 printf("Unsuccessful init: Data Not Ready!\n");
fneirab 6:5ced10109ebf 247 return ret;
fneirab 3:f77a8345b0e3 248 }
fneirab 5:a18a189588dc 249
fneirab 5:a18a189588dc 250 /* Force exit from hibernate */
fneirab 5:a18a189588dc 251 hibcfg_value = forcedExitHyberMode();
fneirab 6:5ced10109ebf 252
fneirab 6:5ced10109ebf 253 printf("step 1 check \r\n");
fneirab 5:a18a189588dc 254
fneirab 5:a18a189588dc 255 /* Step 2: Initialize configuration */
fneirab 5:a18a189588dc 256 switch (1) {
fneirab 5:a18a189588dc 257 case MODEL_LOADING_OPTION1:
fneirab 5:a18a189588dc 258 /* Step 2.1: Option 1 EZ Config */
fneirab 6:5ced10109ebf 259 writeReg(MAX17055_DESIGNCAP_REG, des_data.designcap);
fneirab 6:5ced10109ebf 260 writeReg(MAX17055_DQACC_REG, des_data.designcap >> 5);
fneirab 6:5ced10109ebf 261 writeReg(MAX17055_ICHGTERM_REG, des_data.ichgterm);
fneirab 6:5ced10109ebf 262 writeReg(MAX17055_VEMPTY_REG, des_data.vempty);
fneirab 5:a18a189588dc 263
fneirab 6:5ced10109ebf 264 if (design_data.vcharge > 4275) { //Need to know what this 4275 is
fneirab 6:5ced10109ebf 265 dpacc = (des_data.designcap >> 5) * 0xC800 / des_data.designcap;
fneirab 5:a18a189588dc 266 writeReg(MAX17055_DPACC_REG, dpacc);
fneirab 5:a18a189588dc 267 writeReg(MAX17055_MODELCFG_REG, 0x8400); //Why 0x8400
fneirab 5:a18a189588dc 268 } else {
fneirab 6:5ced10109ebf 269 dpacc = (des_data.designcap >> 5) * 0xAC6A / des_data.designcap;
fneirab 5:a18a189588dc 270 writeReg(MAX17055_DPACC_REG, dpacc);
fneirab 5:a18a189588dc 271 writeReg(MAX17055_MODELCFG_REG, 0x8000);
fneirab 5:a18a189588dc 272 }
fneirab 5:a18a189588dc 273
fneirab 5:a18a189588dc 274 /* Poll ModelCFG.ModelRefresh bit for clear */
fneirab 5:a18a189588dc 275 ret = max17055_poll_flag_clear(MAX17055_MODELCFG_REG, MAX17055_MODELCFG_REFRESH, 500);
fneirab 5:a18a189588dc 276 if(ret < 0) {
fneirab 5:a18a189588dc 277 //dev_err(priv->dev, "Option1 model refresh not completed!\n");
fneirab 5:a18a189588dc 278 return ret;
fneirab 5:a18a189588dc 279 }
fneirab 5:a18a189588dc 280 break;
fneirab 5:a18a189588dc 281 }
fneirab 5:a18a189588dc 282 /* Restore original HibCfg */
fneirab 5:a18a189588dc 283 writeReg(MAX17055_HIBCFG_REG, hibcfg_value);
fneirab 6:5ced10109ebf 284 printf("Last section check \r\n");
fneirab 6:5ced10109ebf 285
fneirab 5:a18a189588dc 286
fneirab 5:a18a189588dc 287 /* Optional step - alert threshold initialization */
fneirab 5:a18a189588dc 288 //max17055_set_alert_thresholds(priv);
fneirab 5:a18a189588dc 289
fneirab 5:a18a189588dc 290 /* Clear Status.POR */
fneirab 5:a18a189588dc 291 readReg(MAX17055_STATUS_REG, reg);
fneirab 5:a18a189588dc 292 write_and_verify_reg(MAX17055_STATUS_REG, (reg & ~MAX17055_STATUS_POR));
fneirab 5:a18a189588dc 293
fneirab 2:ff7db397b70f 294 return 1;
fneirab 5:a18a189588dc 295 }
fneirab 5:a18a189588dc 296
fneirab 5:a18a189588dc 297
fneirab 5:a18a189588dc 298 ///////////////////////////////////////////////////////////////////////////////
fneirab 5:a18a189588dc 299
fneirab 5:a18a189588dc 300 /**
fneirab 5:a18a189588dc 301 * \brief Poll Flag clear
fneirab 5:a18a189588dc 302 * \par Details
fneirab 5:a18a189588dc 303 * This function clears status flags for the MAX17055
fneirab 5:a18a189588dc 304 *
fneirab 5:a18a189588dc 305 * \param[in] reg_addr - register address
fneirab 5:a18a189588dc 306 * \param[in] mask - register address
fneirab 5:a18a189588dc 307 * \param[in] timeout - register data
fneirab 5:a18a189588dc 308 *
fneirab 5:a18a189588dc 309 * \retval 1 on success
fneirab 5:a18a189588dc 310 * -1 on Failure
fneirab 5:a18a189588dc 311 */
fneirab 5:a18a189588dc 312
fneirab 6:5ced10109ebf 313 int MAX17055::max17055_poll_flag_clear (Registers_e reg_addr, int mask, int timeout)
fneirab 5:a18a189588dc 314 {
fneirab 5:a18a189588dc 315 uint16_t data;
fneirab 5:a18a189588dc 316 int ret;
fneirab 5:a18a189588dc 317
fneirab 5:a18a189588dc 318 do {
fneirab 5:a18a189588dc 319 wait(50);
fneirab 6:5ced10109ebf 320 ret = readReg(reg_addr, data);
fneirab 5:a18a189588dc 321 if(ret < 0)
fneirab 5:a18a189588dc 322 return ret;
fneirab 5:a18a189588dc 323
fneirab 5:a18a189588dc 324 if(!(data & mask))
fneirab 5:a18a189588dc 325 return 1;
fneirab 5:a18a189588dc 326
fneirab 5:a18a189588dc 327 timeout -= 50;
fneirab 5:a18a189588dc 328 } while(timeout > 0);
fneirab 5:a18a189588dc 329
fneirab 5:a18a189588dc 330 return -1;
fneirab 5:a18a189588dc 331 }
fneirab 5:a18a189588dc 332
fneirab 5:a18a189588dc 333
fneirab 2:ff7db397b70f 334
fneirab 2:ff7db397b70f 335 ////////////////////////////////////////////////////////////////////////////////
fneirab 2:ff7db397b70f 336
fneirab 2:ff7db397b70f 337 /**
fneirab 3:f77a8345b0e3 338 * \brief Get Internal Temperature Function for MAX17055
fneirab 3:f77a8345b0e3 339 * \par Details
fneirab 3:f77a8345b0e3 340 * This function sends a request to access the internal
fneirab 3:f77a8345b0e3 341 * of the MAX17055
fneirab 3:f77a8345b0e3 342 *
fneirab 3:f77a8345b0e3 343 * \param[in] reg_addr - register address
fneirab 5:a18a189588dc 344 * \param[out] reg_data - the variable that contains the data to write
fneirab 3:f77a8345b0e3 345 * to the register address
fneirab 5:a18a189588dc 346 * \retval 1 on success
fneirab 5:a18a189588dc 347 *
fneirab 3:f77a8345b0e3 348 * -1 if errors exist
fneirab 3:f77a8345b0e3 349 */
fneirab 5:a18a189588dc 350
fneirab 5:a18a189588dc 351
fneirab 2:ff7db397b70f 352 int MAX17055::get_temperature(int *temp)
fneirab 2:ff7db397b70f 353 {
fneirab 5:a18a189588dc 354
fneirab 2:ff7db397b70f 355 int ret;
fneirab 2:ff7db397b70f 356 uint16_t data;
fneirab 5:a18a189588dc 357
fneirab 2:ff7db397b70f 358 ret = readReg(MAX17055_TEMP_REG, data);
fneirab 2:ff7db397b70f 359 if (ret < 0)
fneirab 2:ff7db397b70f 360 return ret;
fneirab 2:ff7db397b70f 361
fneirab 2:ff7db397b70f 362 *temp = data;
fneirab 2:ff7db397b70f 363 /* The value is signed. */
fneirab 2:ff7db397b70f 364 if (*temp & 0x8000)
fneirab 2:ff7db397b70f 365 *temp |= 0xFFFF0000;
fneirab 2:ff7db397b70f 366
fneirab 2:ff7db397b70f 367 /* The value is converted into centigrade scale */
fneirab 2:ff7db397b70f 368 /* Units of LSB = 1 / 256 degree Celsius */
fneirab 2:ff7db397b70f 369 *temp >>= 8;
fneirab 2:ff7db397b70f 370
fneirab 2:ff7db397b70f 371 return 1;
fneirab 5:a18a189588dc 372 }
fneirab 3:f77a8345b0e3 373
fneirab 3:f77a8345b0e3 374
fneirab 3:f77a8345b0e3 375 ////////////////////////////////////////////////////////////////////////////////
fneirab 3:f77a8345b0e3 376
fneirab 3:f77a8345b0e3 377 /**
fneirab 3:f77a8345b0e3 378 * \brief Forced Exit Hibernate Mode Function for MAX17055
fneirab 3:f77a8345b0e3 379 * \par Details
fneirab 5:a18a189588dc 380 * This function executes a force exit from hibernate mode.
fneirab 3:f77a8345b0e3 381 *
fneirab 3:f77a8345b0e3 382 * \retval returns HibCFG original value before forced Exit Hybernate mode
fneirab 3:f77a8345b0e3 383 *
fneirab 3:f77a8345b0e3 384 */
fneirab 5:a18a189588dc 385
fneirab 5:a18a189588dc 386
fneirab 3:f77a8345b0e3 387 uint16_t MAX17055::forcedExitHyberMode()
fneirab 3:f77a8345b0e3 388 {
fneirab 3:f77a8345b0e3 389 uint16_t hibcfg;
fneirab 5:a18a189588dc 390
fneirab 5:a18a189588dc 391 /* Force exit from hibernate */
fneirab 3:f77a8345b0e3 392
fneirab 3:f77a8345b0e3 393 //STEP 0: Store original HibCFG value
fneirab 3:f77a8345b0e3 394 readReg(MAX17055_HIBCFG_REG, hibcfg);
fneirab 3:f77a8345b0e3 395
fneirab 3:f77a8345b0e3 396 //STEP 1: Write to Soft-Wakeup Commannd Register
fneirab 3:f77a8345b0e3 397 writeReg(MAX17055_VFSOC0_QH0_LOCK_REG, 0x90); //Soft-Wakeup from hybernate
fneirab 5:a18a189588dc 398
fneirab 3:f77a8345b0e3 399 //STEP 2: Write to Hibernate Configuration register
fneirab 3:f77a8345b0e3 400 writeReg(MAX17055_HIBCFG_REG, 0x0); //disable hibernate mode
fneirab 5:a18a189588dc 401
fneirab 3:f77a8345b0e3 402 //STEP 3:Write to Soft-Wakeup Commannd Register
fneirab 3:f77a8345b0e3 403 writeReg(MAX17055_VFSOC0_QH0_LOCK_REG, 0x0); //Clear All commnads
fneirab 5:a18a189588dc 404
fneirab 3:f77a8345b0e3 405 return hibcfg;
fneirab 5:a18a189588dc 406 }