MBSD_assignment / Controller_Slave

Slave controller for AEB and QA item

Controller_Slave.h@0:88fb7562377b, 2016-07-06 (annotated)

Committer:
AndreaAndreoli
Date:
Wed Jul 06 09:21:22 2016 +0000
Revision:
0:88fb7562377b
Child:
1:370626c9b451
first commit;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AndreaAndreoli 0:88fb7562377b 1 /*
AndreaAndreoli 0:88fb7562377b 2 * Academic License - for use in teaching, academic research, and meeting
AndreaAndreoli 0:88fb7562377b 3 * course requirements at degree granting institutions only. Not for
AndreaAndreoli 0:88fb7562377b 4 * government, commercial, or other organizational use.
AndreaAndreoli 0:88fb7562377b 5 *
AndreaAndreoli 0:88fb7562377b 6 * File: Controller_Slave.h
AndreaAndreoli 0:88fb7562377b 7 *
AndreaAndreoli 0:88fb7562377b 8 * Code generated for Simulink model 'Controller_Slave'.
AndreaAndreoli 0:88fb7562377b 9 *
AndreaAndreoli 0:88fb7562377b 10 * Model version : 1.6
AndreaAndreoli 0:88fb7562377b 11 * Simulink Coder version : 8.10 (R2016a) 10-Feb-2016
AndreaAndreoli 0:88fb7562377b 12 * C/C++ source code generated on : Wed Jul 06 11:19:35 2016
AndreaAndreoli 0:88fb7562377b 13 *
AndreaAndreoli 0:88fb7562377b 14 * Target selection: ert.tlc
AndreaAndreoli 0:88fb7562377b 15 * Embedded hardware selection: NXP->Cortex-M4
AndreaAndreoli 0:88fb7562377b 16 * Code generation objectives: Unspecified
AndreaAndreoli 0:88fb7562377b 17 * Validation result: Not run
AndreaAndreoli 0:88fb7562377b 18 */
AndreaAndreoli 0:88fb7562377b 19
AndreaAndreoli 0:88fb7562377b 20 #ifndef RTW_HEADER_Controller_Slave_h_
AndreaAndreoli 0:88fb7562377b 21 #define RTW_HEADER_Controller_Slave_h_
AndreaAndreoli 0:88fb7562377b 22 #include <math.h>
AndreaAndreoli 0:88fb7562377b 23 #include <string.h>
AndreaAndreoli 0:88fb7562377b 24 #ifndef Controller_Slave_COMMON_INCLUDES_
AndreaAndreoli 0:88fb7562377b 25 # define Controller_Slave_COMMON_INCLUDES_
AndreaAndreoli 0:88fb7562377b 26 #include "rtwtypes.h"
AndreaAndreoli 0:88fb7562377b 27 #endif /* Controller_Slave_COMMON_INCLUDES_ */
AndreaAndreoli 0:88fb7562377b 28
AndreaAndreoli 0:88fb7562377b 29 /* Macros for accessing real-time model data structure */
AndreaAndreoli 0:88fb7562377b 30 #ifndef rtmGetErrorStatus
AndreaAndreoli 0:88fb7562377b 31 # define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)
AndreaAndreoli 0:88fb7562377b 32 #endif
AndreaAndreoli 0:88fb7562377b 33
AndreaAndreoli 0:88fb7562377b 34 #ifndef rtmSetErrorStatus
AndreaAndreoli 0:88fb7562377b 35 # define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))
AndreaAndreoli 0:88fb7562377b 36 #endif
AndreaAndreoli 0:88fb7562377b 37
AndreaAndreoli 0:88fb7562377b 38 /* Forward declaration for rtModel */
AndreaAndreoli 0:88fb7562377b 39 typedef struct tag_RTM_Controller_Slave_T RT_MODEL_Controller_Slave_T;
AndreaAndreoli 0:88fb7562377b 40
AndreaAndreoli 0:88fb7562377b 41 /* Block signals (auto storage) */
AndreaAndreoli 0:88fb7562377b 42 typedef struct {
AndreaAndreoli 0:88fb7562377b 43 real_T Led_Blue; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 44 } B_Controller_Slave_T;
AndreaAndreoli 0:88fb7562377b 45
AndreaAndreoli 0:88fb7562377b 46 /* Block states (auto storage) for system '<Root>' */
AndreaAndreoli 0:88fb7562377b 47 typedef struct {
AndreaAndreoli 0:88fb7562377b 48 uint32_T temporalCounter_i1; /* '<S1>/select_command' */
AndreaAndreoli 0:88fb7562377b 49 uint8_T Memory_PreviousInput; /* '<S1>/Memory' */
AndreaAndreoli 0:88fb7562377b 50 uint8_T is_active_c6_Controller_Slave;/* '<S1>/select_command' */
AndreaAndreoli 0:88fb7562377b 51 uint8_T is_c6_Controller_Slave; /* '<S1>/select_command' */
AndreaAndreoli 0:88fb7562377b 52 uint8_T is_BLINK; /* '<S1>/select_command' */
AndreaAndreoli 0:88fb7562377b 53 uint8_T is_active_c5_Controller_Slave;/* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 54 uint8_T is_QA_ACTIVE; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 55 uint8_T is_APPLICATION_THREAD; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 56 uint8_T is_AEB_ACTIVE; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 57 uint8_T is_ERRORS_CHECK_THREAD; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 58 boolean_T En; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 59 } DW_Controller_Slave_T;
AndreaAndreoli 0:88fb7562377b 60
AndreaAndreoli 0:88fb7562377b 61 /* Real-time Model Data Structure */
AndreaAndreoli 0:88fb7562377b 62 struct tag_RTM_Controller_Slave_T {
AndreaAndreoli 0:88fb7562377b 63 const char_T * volatile errorStatus;
AndreaAndreoli 0:88fb7562377b 64
AndreaAndreoli 0:88fb7562377b 65 /*
AndreaAndreoli 0:88fb7562377b 66 * ModelData:
AndreaAndreoli 0:88fb7562377b 67 * The following substructure contains information regarding
AndreaAndreoli 0:88fb7562377b 68 * the data used in the model.
AndreaAndreoli 0:88fb7562377b 69 */
AndreaAndreoli 0:88fb7562377b 70 struct {
AndreaAndreoli 0:88fb7562377b 71 B_Controller_Slave_T *blockIO;
AndreaAndreoli 0:88fb7562377b 72 DW_Controller_Slave_T *dwork;
AndreaAndreoli 0:88fb7562377b 73 } ModelData;
AndreaAndreoli 0:88fb7562377b 74 };
AndreaAndreoli 0:88fb7562377b 75
AndreaAndreoli 0:88fb7562377b 76 /* Model entry point functions */
AndreaAndreoli 0:88fb7562377b 77 extern void Controller_Slave_initialize(RT_MODEL_Controller_Slave_T *const
AndreaAndreoli 0:88fb7562377b 78 Controller_Slave_M, real_T *Controller_Slave_U_V, real_T
AndreaAndreoli 0:88fb7562377b 79 *Controller_Slave_U_D_S, uint8_T *Controller_Slave_U_Master, boolean_T
AndreaAndreoli 0:88fb7562377b 80 *Controller_Slave_U_QA_EN, uint8_T *Controller_Slave_Y_BRAKE, uint8_T
AndreaAndreoli 0:88fb7562377b 81 *Controller_Slave_Y_ACC, uint8_T *Controller_Slave_Y_LED_RED, uint8_T
AndreaAndreoli 0:88fb7562377b 82 *Controller_Slave_Y_LED_GREEN, uint8_T *Controller_Slave_Y_LED_BLUE, uint8_T
AndreaAndreoli 0:88fb7562377b 83 *Controller_Slave_Y_SLAVE);
AndreaAndreoli 0:88fb7562377b 84 extern void Controller_Slave_step(RT_MODEL_Controller_Slave_T *const
AndreaAndreoli 0:88fb7562377b 85 Controller_Slave_M, real_T Controller_Slave_U_V, real_T Controller_Slave_U_D_S,
AndreaAndreoli 0:88fb7562377b 86 uint8_T Controller_Slave_U_Master, boolean_T Controller_Slave_U_QA_EN, uint8_T
AndreaAndreoli 0:88fb7562377b 87 *Controller_Slave_Y_BRAKE, uint8_T *Controller_Slave_Y_ACC, uint8_T
AndreaAndreoli 0:88fb7562377b 88 *Controller_Slave_Y_LED_RED, uint8_T *Controller_Slave_Y_LED_GREEN, uint8_T
AndreaAndreoli 0:88fb7562377b 89 *Controller_Slave_Y_LED_BLUE, uint8_T *Controller_Slave_Y_SLAVE);
AndreaAndreoli 0:88fb7562377b 90 extern void Controller_Slave_terminate(RT_MODEL_Controller_Slave_T *const
AndreaAndreoli 0:88fb7562377b 91 Controller_Slave_M);
AndreaAndreoli 0:88fb7562377b 92
AndreaAndreoli 0:88fb7562377b 93 /*-
AndreaAndreoli 0:88fb7562377b 94 * The generated code includes comments that allow you to trace directly
AndreaAndreoli 0:88fb7562377b 95 * back to the appropriate location in the model. The basic format
AndreaAndreoli 0:88fb7562377b 96 * is <system>/block_name, where system is the system number (uniquely
AndreaAndreoli 0:88fb7562377b 97 * assigned by Simulink) and block_name is the name of the block.
AndreaAndreoli 0:88fb7562377b 98 *
AndreaAndreoli 0:88fb7562377b 99 * Note that this particular code originates from a subsystem build,
AndreaAndreoli 0:88fb7562377b 100 * and has its own system numbers different from the parent model.
AndreaAndreoli 0:88fb7562377b 101 * Refer to the system hierarchy for this subsystem below, and use the
AndreaAndreoli 0:88fb7562377b 102 * MATLAB hilite_system command to trace the generated code back
AndreaAndreoli 0:88fb7562377b 103 * to the parent model. For example,
AndreaAndreoli 0:88fb7562377b 104 *
AndreaAndreoli 0:88fb7562377b 105 * hilite_system('Controller_Model_07_05_v01/Controller/Controller_Slave') - opens subsystem Controller_Model_07_05_v01/Controller/Controller_Slave
AndreaAndreoli 0:88fb7562377b 106 * hilite_system('Controller_Model_07_05_v01/Controller/Controller_Slave/Kp') - opens and selects block Kp
AndreaAndreoli 0:88fb7562377b 107 *
AndreaAndreoli 0:88fb7562377b 108 * Here is the system hierarchy for this model
AndreaAndreoli 0:88fb7562377b 109 *
AndreaAndreoli 0:88fb7562377b 110 * '<Root>' : 'Controller_Model_07_05_v01/Controller'
AndreaAndreoli 0:88fb7562377b 111 * '<S1>' : 'Controller_Model_07_05_v01/Controller/Controller_Slave'
AndreaAndreoli 0:88fb7562377b 112 * '<S2>' : 'Controller_Model_07_05_v01/Controller/Controller_Slave/AEB_QA'
AndreaAndreoli 0:88fb7562377b 113 * '<S3>' : 'Controller_Model_07_05_v01/Controller/Controller_Slave/select_command'
AndreaAndreoli 0:88fb7562377b 114 */
AndreaAndreoli 0:88fb7562377b 115 #endif /* RTW_HEADER_Controller_Slave_h_ */
AndreaAndreoli 0:88fb7562377b 116
AndreaAndreoli 0:88fb7562377b 117 /*
AndreaAndreoli 0:88fb7562377b 118 * File trailer for generated code.
AndreaAndreoli 0:88fb7562377b 119 *
AndreaAndreoli 0:88fb7562377b 120 * [EOF]
AndreaAndreoli 0:88fb7562377b 121 */
AndreaAndreoli 0:88fb7562377b 122