Slave controller for AEB and QA item

Committer:
AndreaAndreoli
Date:
Mon Jul 11 10:15:51 2016 +0000
Revision:
1:370626c9b451
Parent:
0:88fb7562377b
bug fixed;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AndreaAndreoli 0:88fb7562377b 1 /*
AndreaAndreoli 0:88fb7562377b 2 * Academic License - for use in teaching, academic research, and meeting
AndreaAndreoli 0:88fb7562377b 3 * course requirements at degree granting institutions only. Not for
AndreaAndreoli 0:88fb7562377b 4 * government, commercial, or other organizational use.
AndreaAndreoli 0:88fb7562377b 5 *
AndreaAndreoli 0:88fb7562377b 6 * File: Controller_Slave.h
AndreaAndreoli 0:88fb7562377b 7 *
AndreaAndreoli 0:88fb7562377b 8 * Code generated for Simulink model 'Controller_Slave'.
AndreaAndreoli 0:88fb7562377b 9 *
AndreaAndreoli 1:370626c9b451 10 * Model version : 1.7
AndreaAndreoli 0:88fb7562377b 11 * Simulink Coder version : 8.10 (R2016a) 10-Feb-2016
AndreaAndreoli 1:370626c9b451 12 * C/C++ source code generated on : Sun Jul 10 15:19:51 2016
AndreaAndreoli 0:88fb7562377b 13 *
AndreaAndreoli 0:88fb7562377b 14 * Target selection: ert.tlc
AndreaAndreoli 1:370626c9b451 15 * Embedded hardware selection: ARM Compatible->ARM Cortex
AndreaAndreoli 0:88fb7562377b 16 * Code generation objectives: Unspecified
AndreaAndreoli 0:88fb7562377b 17 * Validation result: Not run
AndreaAndreoli 0:88fb7562377b 18 */
AndreaAndreoli 0:88fb7562377b 19
AndreaAndreoli 0:88fb7562377b 20 #ifndef RTW_HEADER_Controller_Slave_h_
AndreaAndreoli 0:88fb7562377b 21 #define RTW_HEADER_Controller_Slave_h_
AndreaAndreoli 1:370626c9b451 22 #include "rtwtypes.h"
AndreaAndreoli 0:88fb7562377b 23 #include <math.h>
AndreaAndreoli 0:88fb7562377b 24 #include <string.h>
AndreaAndreoli 1:370626c9b451 25 #include <stddef.h>
AndreaAndreoli 0:88fb7562377b 26 #ifndef Controller_Slave_COMMON_INCLUDES_
AndreaAndreoli 0:88fb7562377b 27 # define Controller_Slave_COMMON_INCLUDES_
AndreaAndreoli 0:88fb7562377b 28 #include "rtwtypes.h"
AndreaAndreoli 0:88fb7562377b 29 #endif /* Controller_Slave_COMMON_INCLUDES_ */
AndreaAndreoli 0:88fb7562377b 30
AndreaAndreoli 0:88fb7562377b 31 /* Macros for accessing real-time model data structure */
AndreaAndreoli 1:370626c9b451 32 #ifndef rtmGetBlockIO
AndreaAndreoli 1:370626c9b451 33 # define rtmGetBlockIO(rtm) ((rtm)->ModelData.blockIO)
AndreaAndreoli 1:370626c9b451 34 #endif
AndreaAndreoli 1:370626c9b451 35
AndreaAndreoli 1:370626c9b451 36 #ifndef rtmSetBlockIO
AndreaAndreoli 1:370626c9b451 37 # define rtmSetBlockIO(rtm, val) ((rtm)->ModelData.blockIO = (val))
AndreaAndreoli 1:370626c9b451 38 #endif
AndreaAndreoli 1:370626c9b451 39
AndreaAndreoli 1:370626c9b451 40 #ifndef rtmGetDefaultParam
AndreaAndreoli 1:370626c9b451 41 # define rtmGetDefaultParam(rtm) ((rtm)->ModelData.defaultParam)
AndreaAndreoli 1:370626c9b451 42 #endif
AndreaAndreoli 1:370626c9b451 43
AndreaAndreoli 1:370626c9b451 44 #ifndef rtmSetDefaultParam
AndreaAndreoli 1:370626c9b451 45 # define rtmSetDefaultParam(rtm, val) ((rtm)->ModelData.defaultParam = (val))
AndreaAndreoli 1:370626c9b451 46 #endif
AndreaAndreoli 1:370626c9b451 47
AndreaAndreoli 1:370626c9b451 48 #ifndef rtmGetRootDWork
AndreaAndreoli 1:370626c9b451 49 # define rtmGetRootDWork(rtm) ((rtm)->ModelData.dwork)
AndreaAndreoli 1:370626c9b451 50 #endif
AndreaAndreoli 1:370626c9b451 51
AndreaAndreoli 1:370626c9b451 52 #ifndef rtmSetRootDWork
AndreaAndreoli 1:370626c9b451 53 # define rtmSetRootDWork(rtm, val) ((rtm)->ModelData.dwork = (val))
AndreaAndreoli 1:370626c9b451 54 #endif
AndreaAndreoli 1:370626c9b451 55
AndreaAndreoli 0:88fb7562377b 56 #ifndef rtmGetErrorStatus
AndreaAndreoli 0:88fb7562377b 57 # define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)
AndreaAndreoli 0:88fb7562377b 58 #endif
AndreaAndreoli 0:88fb7562377b 59
AndreaAndreoli 0:88fb7562377b 60 #ifndef rtmSetErrorStatus
AndreaAndreoli 0:88fb7562377b 61 # define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))
AndreaAndreoli 0:88fb7562377b 62 #endif
AndreaAndreoli 0:88fb7562377b 63
AndreaAndreoli 0:88fb7562377b 64 /* Forward declaration for rtModel */
AndreaAndreoli 0:88fb7562377b 65 typedef struct tag_RTM_Controller_Slave_T RT_MODEL_Controller_Slave_T;
AndreaAndreoli 0:88fb7562377b 66
AndreaAndreoli 0:88fb7562377b 67 /* Block signals (auto storage) */
AndreaAndreoli 0:88fb7562377b 68 typedef struct {
AndreaAndreoli 0:88fb7562377b 69 real_T Led_Blue; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 70 } B_Controller_Slave_T;
AndreaAndreoli 0:88fb7562377b 71
AndreaAndreoli 0:88fb7562377b 72 /* Block states (auto storage) for system '<Root>' */
AndreaAndreoli 0:88fb7562377b 73 typedef struct {
AndreaAndreoli 0:88fb7562377b 74 uint32_T temporalCounter_i1; /* '<S1>/select_command' */
AndreaAndreoli 0:88fb7562377b 75 uint8_T Memory_PreviousInput; /* '<S1>/Memory' */
AndreaAndreoli 0:88fb7562377b 76 uint8_T is_active_c6_Controller_Slave;/* '<S1>/select_command' */
AndreaAndreoli 0:88fb7562377b 77 uint8_T is_c6_Controller_Slave; /* '<S1>/select_command' */
AndreaAndreoli 0:88fb7562377b 78 uint8_T is_BLINK; /* '<S1>/select_command' */
AndreaAndreoli 0:88fb7562377b 79 uint8_T is_active_c5_Controller_Slave;/* '<S1>/AEB_QA' */
AndreaAndreoli 1:370626c9b451 80 uint8_T is_ERRORS_CHECK_THREAD; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 81 uint8_T is_APPLICATION_THREAD; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 82 uint8_T is_AEB_ACTIVE; /* '<S1>/AEB_QA' */
AndreaAndreoli 1:370626c9b451 83 uint8_T is_QA_ACTIVE; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 84 boolean_T En; /* '<S1>/AEB_QA' */
AndreaAndreoli 0:88fb7562377b 85 } DW_Controller_Slave_T;
AndreaAndreoli 0:88fb7562377b 86
AndreaAndreoli 1:370626c9b451 87 /* Parameters (auto storage) */
AndreaAndreoli 1:370626c9b451 88 struct P_Controller_Slave_T_ {
AndreaAndreoli 1:370626c9b451 89 uint8_T Memory_X0; /* Computed Parameter: Memory_X0
AndreaAndreoli 1:370626c9b451 90 * Referenced by: '<S1>/Memory'
AndreaAndreoli 1:370626c9b451 91 */
AndreaAndreoli 1:370626c9b451 92 };
AndreaAndreoli 1:370626c9b451 93
AndreaAndreoli 1:370626c9b451 94 /* Parameters (auto storage) */
AndreaAndreoli 1:370626c9b451 95 typedef struct P_Controller_Slave_T_ P_Controller_Slave_T;
AndreaAndreoli 1:370626c9b451 96
AndreaAndreoli 0:88fb7562377b 97 /* Real-time Model Data Structure */
AndreaAndreoli 0:88fb7562377b 98 struct tag_RTM_Controller_Slave_T {
AndreaAndreoli 1:370626c9b451 99 const char_T *errorStatus;
AndreaAndreoli 0:88fb7562377b 100
AndreaAndreoli 0:88fb7562377b 101 /*
AndreaAndreoli 0:88fb7562377b 102 * ModelData:
AndreaAndreoli 0:88fb7562377b 103 * The following substructure contains information regarding
AndreaAndreoli 0:88fb7562377b 104 * the data used in the model.
AndreaAndreoli 0:88fb7562377b 105 */
AndreaAndreoli 0:88fb7562377b 106 struct {
AndreaAndreoli 0:88fb7562377b 107 B_Controller_Slave_T *blockIO;
AndreaAndreoli 1:370626c9b451 108 P_Controller_Slave_T *defaultParam;
AndreaAndreoli 0:88fb7562377b 109 DW_Controller_Slave_T *dwork;
AndreaAndreoli 0:88fb7562377b 110 } ModelData;
AndreaAndreoli 0:88fb7562377b 111 };
AndreaAndreoli 0:88fb7562377b 112
AndreaAndreoli 0:88fb7562377b 113 /* Model entry point functions */
AndreaAndreoli 0:88fb7562377b 114 extern void Controller_Slave_initialize(RT_MODEL_Controller_Slave_T *const
AndreaAndreoli 0:88fb7562377b 115 Controller_Slave_M, real_T *Controller_Slave_U_V, real_T
AndreaAndreoli 0:88fb7562377b 116 *Controller_Slave_U_D_S, uint8_T *Controller_Slave_U_Master, boolean_T
AndreaAndreoli 0:88fb7562377b 117 *Controller_Slave_U_QA_EN, uint8_T *Controller_Slave_Y_BRAKE, uint8_T
AndreaAndreoli 0:88fb7562377b 118 *Controller_Slave_Y_ACC, uint8_T *Controller_Slave_Y_LED_RED, uint8_T
AndreaAndreoli 0:88fb7562377b 119 *Controller_Slave_Y_LED_GREEN, uint8_T *Controller_Slave_Y_LED_BLUE, uint8_T
AndreaAndreoli 0:88fb7562377b 120 *Controller_Slave_Y_SLAVE);
AndreaAndreoli 0:88fb7562377b 121 extern void Controller_Slave_step(RT_MODEL_Controller_Slave_T *const
AndreaAndreoli 0:88fb7562377b 122 Controller_Slave_M, real_T Controller_Slave_U_V, real_T Controller_Slave_U_D_S,
AndreaAndreoli 0:88fb7562377b 123 uint8_T Controller_Slave_U_Master, boolean_T Controller_Slave_U_QA_EN, uint8_T
AndreaAndreoli 0:88fb7562377b 124 *Controller_Slave_Y_BRAKE, uint8_T *Controller_Slave_Y_ACC, uint8_T
AndreaAndreoli 0:88fb7562377b 125 *Controller_Slave_Y_LED_RED, uint8_T *Controller_Slave_Y_LED_GREEN, uint8_T
AndreaAndreoli 0:88fb7562377b 126 *Controller_Slave_Y_LED_BLUE, uint8_T *Controller_Slave_Y_SLAVE);
AndreaAndreoli 0:88fb7562377b 127 extern void Controller_Slave_terminate(RT_MODEL_Controller_Slave_T *const
AndreaAndreoli 0:88fb7562377b 128 Controller_Slave_M);
AndreaAndreoli 0:88fb7562377b 129
AndreaAndreoli 0:88fb7562377b 130 /*-
AndreaAndreoli 0:88fb7562377b 131 * The generated code includes comments that allow you to trace directly
AndreaAndreoli 0:88fb7562377b 132 * back to the appropriate location in the model. The basic format
AndreaAndreoli 0:88fb7562377b 133 * is <system>/block_name, where system is the system number (uniquely
AndreaAndreoli 0:88fb7562377b 134 * assigned by Simulink) and block_name is the name of the block.
AndreaAndreoli 0:88fb7562377b 135 *
AndreaAndreoli 0:88fb7562377b 136 * Note that this particular code originates from a subsystem build,
AndreaAndreoli 0:88fb7562377b 137 * and has its own system numbers different from the parent model.
AndreaAndreoli 0:88fb7562377b 138 * Refer to the system hierarchy for this subsystem below, and use the
AndreaAndreoli 0:88fb7562377b 139 * MATLAB hilite_system command to trace the generated code back
AndreaAndreoli 0:88fb7562377b 140 * to the parent model. For example,
AndreaAndreoli 0:88fb7562377b 141 *
AndreaAndreoli 1:370626c9b451 142 * hilite_system('Controller_Model_07_10_v01/Controller/Controller_Slave') - opens subsystem Controller_Model_07_10_v01/Controller/Controller_Slave
AndreaAndreoli 1:370626c9b451 143 * hilite_system('Controller_Model_07_10_v01/Controller/Controller_Slave/Kp') - opens and selects block Kp
AndreaAndreoli 0:88fb7562377b 144 *
AndreaAndreoli 0:88fb7562377b 145 * Here is the system hierarchy for this model
AndreaAndreoli 0:88fb7562377b 146 *
AndreaAndreoli 1:370626c9b451 147 * '<Root>' : 'Controller_Model_07_10_v01/Controller'
AndreaAndreoli 1:370626c9b451 148 * '<S1>' : 'Controller_Model_07_10_v01/Controller/Controller_Slave'
AndreaAndreoli 1:370626c9b451 149 * '<S2>' : 'Controller_Model_07_10_v01/Controller/Controller_Slave/AEB_QA'
AndreaAndreoli 1:370626c9b451 150 * '<S3>' : 'Controller_Model_07_10_v01/Controller/Controller_Slave/select_command'
AndreaAndreoli 0:88fb7562377b 151 */
AndreaAndreoli 0:88fb7562377b 152 #endif /* RTW_HEADER_Controller_Slave_h_ */
AndreaAndreoli 0:88fb7562377b 153
AndreaAndreoli 0:88fb7562377b 154 /*
AndreaAndreoli 0:88fb7562377b 155 * File trailer for generated code.
AndreaAndreoli 0:88fb7562377b 156 *
AndreaAndreoli 0:88fb7562377b 157 * [EOF]
AndreaAndreoli 0:88fb7562377b 158 */
AndreaAndreoli 0:88fb7562377b 159