Arrow
/
DAPLink Reset
Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
Embed:
(wiki syntax)
TSI_Type Struct Reference
[TSI Peripheral Access Layer]
TSI - Register Layout Typedef. More...
#include <MK20D5.h>
Data Fields | |
| __IO uint32_t | GENCS |
| General Control and Status Register, offset: 0x0. | |
| __IO uint32_t | SCANC |
| SCAN Control Register, offset: 0x4. | |
| __IO uint32_t | PEN |
| Pin Enable Register, offset: 0x8. | |
| __I uint32_t | WUCNTR |
| Wake-Up Channel Counter Register, offset: 0xC. | |
| __I uint32_t | CNTR1 |
| Counter Register, offset: 0x100. | |
| __I uint32_t | CNTR3 |
| Counter Register, offset: 0x104. | |
| __I uint32_t | CNTR5 |
| Counter Register, offset: 0x108. | |
| __I uint32_t | CNTR7 |
| Counter Register, offset: 0x10C. | |
| __I uint32_t | CNTR9 |
| Counter Register, offset: 0x110. | |
| __I uint32_t | CNTR11 |
| Counter Register, offset: 0x114. | |
| __I uint32_t | CNTR13 |
| Counter Register, offset: 0x118. | |
| __I uint32_t | CNTR15 |
| Counter Register, offset: 0x11C. | |
| __IO uint32_t | THRESHOLD |
| Low Power Channel Threshold Register, offset: 0x120. | |
| __IO uint32_t | DATA |
| TSI DATA Register, offset: 0x4. | |
| __IO uint32_t | TSHD |
| TSI Threshold Register, offset: 0x8. | |
Detailed Description
TSI - Register Layout Typedef.
Definition at line 6009 of file MK20D5.h.
Field Documentation
Generated on Tue Jul 12 2022 15:37:38 by
1.7.2