Hi Simon,
I thought I couldn't check it until quite later, because I was stuck with another thing, but I solved that other part, and I have just been able to check this thing of the peripheral clock.
Result: Yes, I am able to change the peripheral clock (just writing to PCLKSEL0) even after PLL0 has been activated (by the mbed initialization code). The errata sheet seems to be wrong or, at least, that problem not always exists. The errata sheet is for LPC1768 revision "-", my LPC1768 (in the mbed) is revision "-" (so, the exact same revision), and that problem does NOT exist for me (at least as far as the PWM peripheral is concerned). I have double checked it in several ways. For instance, I have even been able to generate a PWM signal with a repetition rate of 48 MHz (which is higher than the default 24 MHz clock that all peripherals get). And I have NOT needed to disable PLL0, change PCLKSEL0, and enable PLL0 again.
Conclusion: Don't worry too much about that problem described in the errata sheet.
Thanks.
Hi,
Can we make the clock of any peripheral (say the PWM) be higher than 24 MHz, which is the frequency set by the mbed initialization code?
Thank you.
Cesar Pascual