Hi, does anyone know exactly what the default settings for the clock are? I have looked through a few posts that seem to contradict each other. I am wanting to make sure the analogue channel is running at the maximum 200Khz.

Hi Lee,

The default clock frequency for the main clock is 96MHz. The AnalogIn doesn't currently go at the maximum frequency possible however. I did post up a beta library that has a faster sample rate, but also provides some filtering, so you can see the resultant speeds in this thread:

• http://mbed.org/forum/bugs-suggestions/topic/1980/

If you want absolute maximum throughput, you may want to read the ADC directly. Some basic template code if you do want to really go to this level can be found at:

• http://mbed.org/forum/mbed/topic/131/?page=1#comment-1835

Hope that is useful,

Simon

It's probably easiest just to use a timer to measure the time taken by a call to the ADC library.

But if you are really curious, it is possible to adapt some code from this adc library to find out the actual settings of the ADC clock.

Here is a relevant excerpt from adc.cpp:

ADC::ADC(int sample_rate, int cclk_div)
    {

    int i, adc_clk_freq, pclk, clock_div, max_div=1;

    //Work out CCLK
    adc_clk_freq=CLKS_PER_SAMPLE*sample_rate;
    int m = (LPC_SC->PLL0CFG & 0xFFFF) + 1;
    int n = (LPC_SC->PLL0CFG >> 16) + 1;
    int cclkdiv = LPC_SC->CCLKCFG + 1;
    int Fcco = (2 * m * XTAL_FREQ) / n;
    int cclk = Fcco / cclkdiv;

    //Power up the ADC        
    LPC_SC->PCONP |= (1 << 12);
    //Set clock at cclk / 1.
    LPC_SC->PCLKSEL0 &= ~(0x3 << 24);    
<snip>
    pclk = cclk / cclk_div;
    clock_div=pclk / adc_clk_freq;
<snip>

    _adc_clk_freq=pclk / clock_div;
<snip>
    }

This is code is for setting the ADC clock, but you can easily modify it to read back rather than write the related registers. That will let you work out exactly how the ADC has been configured...

Hi, have tried several methods to access the A/D at full 200Khz but it seems impossible due to the extra code needed to test for the DONE bit and store the results etc. Does anyone else have any experience with this and/or comments?

I am now wondering whether DMA access would be the solution?

See:-

ADC and DMA

Trigger ADC from Timer Match (this is regular trigger using Timer and capture using DMA)