Yihui Xiong / nrf51822_fix_i2c_spi_conflict

Dependencies:   BLE_API eMPL_MPU6050 nRF51822

Fork of Seeed_Tiny_BLE_Flash by Darren Huang

Committer:
yihui
Date:
Tue Nov 17 07:48:56 2015 +0000
Revision:
5:b8c02645e6af
fix i2c & spi conflict

Who changed what in which revision?

UserRevisionLine numberNew contents of line
yihui 5:b8c02645e6af 1 /*******************************************************************************
yihui 5:b8c02645e6af 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
yihui 5:b8c02645e6af 3 *
yihui 5:b8c02645e6af 4 * Permission is hereby granted, free of charge, to any person obtaining a
yihui 5:b8c02645e6af 5 * copy of this software and associated documentation files (the "Software"),
yihui 5:b8c02645e6af 6 * to deal in the Software without restriction, including without limitation
yihui 5:b8c02645e6af 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
yihui 5:b8c02645e6af 8 * and/or sell copies of the Software, and to permit persons to whom the
yihui 5:b8c02645e6af 9 * Software is furnished to do so, subject to the following conditions:
yihui 5:b8c02645e6af 10 *
yihui 5:b8c02645e6af 11 * The above copyright notice and this permission notice shall be included
yihui 5:b8c02645e6af 12 * in all copies or substantial portions of the Software.
yihui 5:b8c02645e6af 13 *
yihui 5:b8c02645e6af 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
yihui 5:b8c02645e6af 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
yihui 5:b8c02645e6af 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
yihui 5:b8c02645e6af 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
yihui 5:b8c02645e6af 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
yihui 5:b8c02645e6af 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
yihui 5:b8c02645e6af 20 * OTHER DEALINGS IN THE SOFTWARE.
yihui 5:b8c02645e6af 21 *
yihui 5:b8c02645e6af 22 * Except as contained in this notice, the name of Maxim Integrated
yihui 5:b8c02645e6af 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
yihui 5:b8c02645e6af 24 * Products, Inc. Branding Policy.
yihui 5:b8c02645e6af 25 *
yihui 5:b8c02645e6af 26 * The mere transfer of this software does not imply any licenses
yihui 5:b8c02645e6af 27 * of trade secrets, proprietary technology, copyrights, patents,
yihui 5:b8c02645e6af 28 * trademarks, maskwork rights, or any other form of intellectual
yihui 5:b8c02645e6af 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
yihui 5:b8c02645e6af 30 * ownership rights.
yihui 5:b8c02645e6af 31 *******************************************************************************
yihui 5:b8c02645e6af 32 */
yihui 5:b8c02645e6af 33
yihui 5:b8c02645e6af 34 #ifndef _MXC_WDT_REGS_H_
yihui 5:b8c02645e6af 35 #define _MXC_WDT_REGS_H_
yihui 5:b8c02645e6af 36
yihui 5:b8c02645e6af 37 #ifdef __cplusplus
yihui 5:b8c02645e6af 38 extern "C" {
yihui 5:b8c02645e6af 39 #endif
yihui 5:b8c02645e6af 40
yihui 5:b8c02645e6af 41 #include <stdint.h>
yihui 5:b8c02645e6af 42
yihui 5:b8c02645e6af 43 /**
yihui 5:b8c02645e6af 44 * @file wdt_regs.h
yihui 5:b8c02645e6af 45 * @addtogroup wdt WDT
yihui 5:b8c02645e6af 46 * @{
yihui 5:b8c02645e6af 47 */
yihui 5:b8c02645e6af 48
yihui 5:b8c02645e6af 49 /**
yihui 5:b8c02645e6af 50 * @brief Defines watchdog timer periods
yihui 5:b8c02645e6af 51 */
yihui 5:b8c02645e6af 52 typedef enum {
yihui 5:b8c02645e6af 53 /** 2^31 cycle period */
yihui 5:b8c02645e6af 54 MXC_E_WDT_PERIOD_2_31_CLKS = 0,
yihui 5:b8c02645e6af 55 /** 2^30 cycle period */
yihui 5:b8c02645e6af 56 MXC_E_WDT_PERIOD_2_30_CLKS,
yihui 5:b8c02645e6af 57 /** 2^29 cycle period */
yihui 5:b8c02645e6af 58 MXC_E_WDT_PERIOD_2_29_CLKS,
yihui 5:b8c02645e6af 59 /** 2^28 cycle period */
yihui 5:b8c02645e6af 60 MXC_E_WDT_PERIOD_2_28_CLKS,
yihui 5:b8c02645e6af 61 /** 2^27 cycle period */
yihui 5:b8c02645e6af 62 MXC_E_WDT_PERIOD_2_27_CLKS,
yihui 5:b8c02645e6af 63 /** 2^26 cycle period */
yihui 5:b8c02645e6af 64 MXC_E_WDT_PERIOD_2_26_CLKS,
yihui 5:b8c02645e6af 65 /** 2^25 cycle period */
yihui 5:b8c02645e6af 66 MXC_E_WDT_PERIOD_2_25_CLKS,
yihui 5:b8c02645e6af 67 /** 2^24 cycle period */
yihui 5:b8c02645e6af 68 MXC_E_WDT_PERIOD_2_24_CLKS,
yihui 5:b8c02645e6af 69 /** 2^23 cycle period */
yihui 5:b8c02645e6af 70 MXC_E_WDT_PERIOD_2_23_CLKS,
yihui 5:b8c02645e6af 71 /** 2^22 cycle period */
yihui 5:b8c02645e6af 72 MXC_E_WDT_PERIOD_2_22_CLKS,
yihui 5:b8c02645e6af 73 /** 2^21 cycle period */
yihui 5:b8c02645e6af 74 MXC_E_WDT_PERIOD_2_21_CLKS,
yihui 5:b8c02645e6af 75 /** 2^20 cycle period */
yihui 5:b8c02645e6af 76 MXC_E_WDT_PERIOD_2_20_CLKS,
yihui 5:b8c02645e6af 77 /** 2^19 cycle period */
yihui 5:b8c02645e6af 78 MXC_E_WDT_PERIOD_2_19_CLKS,
yihui 5:b8c02645e6af 79 /** 2^18 cycle period */
yihui 5:b8c02645e6af 80 MXC_E_WDT_PERIOD_2_18_CLKS,
yihui 5:b8c02645e6af 81 /** 2^17 cycle period */
yihui 5:b8c02645e6af 82 MXC_E_WDT_PERIOD_2_17_CLKS,
yihui 5:b8c02645e6af 83 /** 2^16 cycle period */
yihui 5:b8c02645e6af 84 MXC_E_WDT_PERIOD_2_16_CLKS,
yihui 5:b8c02645e6af 85 } mxc_wdt_period_t;
yihui 5:b8c02645e6af 86
yihui 5:b8c02645e6af 87 /* Offset Register Description
yihui 5:b8c02645e6af 88 ====== ================================================ */
yihui 5:b8c02645e6af 89 typedef struct {
yihui 5:b8c02645e6af 90 __IO uint32_t ctrl; /* 0x0000 Watchdog Timer Control Register */
yihui 5:b8c02645e6af 91 __IO uint32_t clear; /* 0x0004 Watchdog Clear Register (Feed Dog) */
yihui 5:b8c02645e6af 92 __IO uint32_t int_rst_fl; /* 0x0008 Watchdog Interrupt/Reset Flags */
yihui 5:b8c02645e6af 93 __IO uint32_t int_rst_en; /* 0x000C Interrupt/Reset Enable/Disable Controls */
yihui 5:b8c02645e6af 94 __I uint32_t rsv0010; /* 0x0010 */
yihui 5:b8c02645e6af 95 __IO uint32_t lock_ctrl; /* 0x0014 Lock Register Setting for WDT CTRL */
yihui 5:b8c02645e6af 96 } mxc_wdt_regs_t;
yihui 5:b8c02645e6af 97
yihui 5:b8c02645e6af 98 /*
yihui 5:b8c02645e6af 99 Register offsets for module WDT.
yihui 5:b8c02645e6af 100 */
yihui 5:b8c02645e6af 101 #define MXC_R_WDT_OFFS_CTRL ((uint32_t)0x00000000UL)
yihui 5:b8c02645e6af 102 #define MXC_R_WDT_OFFS_CLEAR ((uint32_t)0x00000004UL)
yihui 5:b8c02645e6af 103 #define MXC_R_WDT_OFFS_INT_RST_FL ((uint32_t)0x00000008UL)
yihui 5:b8c02645e6af 104 #define MXC_R_WDT_OFFS_INT_RST_EN ((uint32_t)0x0000000CUL)
yihui 5:b8c02645e6af 105 #define MXC_R_WDT_OFFS_LOCK_CTRL ((uint32_t)0x00000014UL)
yihui 5:b8c02645e6af 106
yihui 5:b8c02645e6af 107 #define MXC_V_WDT_WDLOCK_LOCK_KEY ((uint8_t)0x24)
yihui 5:b8c02645e6af 108 #define MXC_V_WDT_WDLOCK_UNLOCK_KEY ((uint8_t)0x42)
yihui 5:b8c02645e6af 109
yihui 5:b8c02645e6af 110
yihui 5:b8c02645e6af 111 /*
yihui 5:b8c02645e6af 112 Field positions and masks for module WDT.
yihui 5:b8c02645e6af 113 */
yihui 5:b8c02645e6af 114 #define MXC_F_WDT_CTRL_INT_PERIOD_POS 0
yihui 5:b8c02645e6af 115 #define MXC_F_WDT_CTRL_INT_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_INT_PERIOD_POS))
yihui 5:b8c02645e6af 116 #define MXC_F_WDT_CTRL_RST_PERIOD_POS 4
yihui 5:b8c02645e6af 117 #define MXC_F_WDT_CTRL_RST_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_RST_PERIOD_POS))
yihui 5:b8c02645e6af 118 #define MXC_F_WDT_CTRL_EN_TIMER_POS 8
yihui 5:b8c02645e6af 119 #define MXC_F_WDT_CTRL_EN_TIMER ((uint32_t)(0x00000001UL << MXC_F_WDT_CTRL_EN_TIMER_POS))
yihui 5:b8c02645e6af 120 #define MXC_F_WDT_CTRL_EN_CLOCK_POS 9
yihui 5:b8c02645e6af 121 #define MXC_F_WDT_CTRL_EN_CLOCK ((uint32_t)(0x00000001UL << MXC_F_WDT_CTRL_EN_CLOCK_POS))
yihui 5:b8c02645e6af 122 #define MXC_F_WDT_CTRL_WAIT_PERIOD_POS 12
yihui 5:b8c02645e6af 123 #define MXC_F_WDT_CTRL_WAIT_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_WAIT_PERIOD_POS))
yihui 5:b8c02645e6af 124
yihui 5:b8c02645e6af 125 #define MXC_F_WDT_FLAGS_TIMEOUT_POS 0
yihui 5:b8c02645e6af 126 #define MXC_F_WDT_FLAGS_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_TIMEOUT_POS))
yihui 5:b8c02645e6af 127 #define MXC_F_WDT_FLAGS_PRE_WIN_POS 1
yihui 5:b8c02645e6af 128 #define MXC_F_WDT_FLAGS_PRE_WIN ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_PRE_WIN_POS))
yihui 5:b8c02645e6af 129 #define MXC_F_WDT_FLAGS_RESET_OUT_POS 2
yihui 5:b8c02645e6af 130 #define MXC_F_WDT_FLAGS_RESET_OUT ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_RESET_OUT_POS))
yihui 5:b8c02645e6af 131
yihui 5:b8c02645e6af 132 #define MXC_F_WDT_ENABLE_TIMEOUT_POS 0
yihui 5:b8c02645e6af 133 #define MXC_F_WDT_ENABLE_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_TIMEOUT_POS))
yihui 5:b8c02645e6af 134 #define MXC_F_WDT_ENABLE_PRE_WIN_POS 1
yihui 5:b8c02645e6af 135 #define MXC_F_WDT_ENABLE_PRE_WIN ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_PRE_WIN_POS))
yihui 5:b8c02645e6af 136 #define MXC_F_WDT_ENABLE_RESET_OUT_POS 2
yihui 5:b8c02645e6af 137 #define MXC_F_WDT_ENABLE_RESET_OUT ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_RESET_OUT_POS))
yihui 5:b8c02645e6af 138
yihui 5:b8c02645e6af 139 #define MXC_F_WDT_LOCK_CTRL_WDLOCK_POS 0
yihui 5:b8c02645e6af 140 #define MXC_F_WDT_LOCK_CTRL_WDLOCK ((uint32_t)(0x000000FFUL << MXC_F_WDT_LOCK_CTRL_WDLOCK_POS))
yihui 5:b8c02645e6af 141
yihui 5:b8c02645e6af 142 #ifdef __cplusplus
yihui 5:b8c02645e6af 143 }
yihui 5:b8c02645e6af 144 #endif
yihui 5:b8c02645e6af 145
yihui 5:b8c02645e6af 146 /**
yihui 5:b8c02645e6af 147 * @}
yihui 5:b8c02645e6af 148 */
yihui 5:b8c02645e6af 149
yihui 5:b8c02645e6af 150 #endif /* _MXC_WDT_REGS_H_ */