fix nrf51822 i2c & spi conflict
Dependencies: BLE_API eMPL_MPU6050 nRF51822
Fork of Seeed_Tiny_BLE_Flash by
W25Q16BV/W25Q16BV.h@5:b8c02645e6af, 2015-11-17 (annotated)
- Committer:
- yihui
- Date:
- Tue Nov 17 07:48:56 2015 +0000
- Revision:
- 5:b8c02645e6af
- Parent:
- 4:19a0764d6b81
fix i2c & spi conflict
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
SOTB_DA | 4:19a0764d6b81 | 1 | // W25Q16BV.h |
SOTB_DA | 4:19a0764d6b81 | 2 | |
SOTB_DA | 4:19a0764d6b81 | 3 | #ifndef W25Q16BV_H |
SOTB_DA | 4:19a0764d6b81 | 4 | #define W25Q16BV_H |
SOTB_DA | 4:19a0764d6b81 | 5 | |
SOTB_DA | 4:19a0764d6b81 | 6 | #include "mbed.h" |
SOTB_DA | 4:19a0764d6b81 | 7 | //#include "BitBangedSPI.h" |
SOTB_DA | 4:19a0764d6b81 | 8 | |
SOTB_DA | 4:19a0764d6b81 | 9 | #define SPI_FREQ 1000000 |
SOTB_DA | 4:19a0764d6b81 | 10 | #define SPI_MODE 0 |
SOTB_DA | 4:19a0764d6b81 | 11 | #define SPI_NBIT 8 |
SOTB_DA | 4:19a0764d6b81 | 12 | |
SOTB_DA | 4:19a0764d6b81 | 13 | #define POWERUP_INST 0xAB |
SOTB_DA | 4:19a0764d6b81 | 14 | #define STATUS1_INST 0x05 |
SOTB_DA | 4:19a0764d6b81 | 15 | #define STATUS2_INST 0x35 |
SOTB_DA | 4:19a0764d6b81 | 16 | #define JDEC_INST 0x9F |
SOTB_DA | 4:19a0764d6b81 | 17 | #define UNIQUE_INST 0x4B |
SOTB_DA | 4:19a0764d6b81 | 18 | #define WE_INST 0x06 |
SOTB_DA | 4:19a0764d6b81 | 19 | #define WD_INST 0x04 |
SOTB_DA | 4:19a0764d6b81 | 20 | #define R_INST 0x03 |
SOTB_DA | 4:19a0764d6b81 | 21 | #define W_INST 0x02 |
SOTB_DA | 4:19a0764d6b81 | 22 | #define S_ERASE_INST 0x20 /* 4KB sector erase */ |
SOTB_DA | 4:19a0764d6b81 | 23 | #define B_ERASE_INST 0xD8 /* 64KB block erase */ |
SOTB_DA | 4:19a0764d6b81 | 24 | #define C_ERASE_INST 0x60 |
SOTB_DA | 4:19a0764d6b81 | 25 | |
SOTB_DA | 4:19a0764d6b81 | 26 | #define DUMMY_ADDR 0x00 |
SOTB_DA | 4:19a0764d6b81 | 27 | |
SOTB_DA | 4:19a0764d6b81 | 28 | #define WAIT_US_TRES1 5 /* Power Up: 3us */ |
SOTB_DA | 4:19a0764d6b81 | 29 | //#define WAIT_US_TPUW 10000 /* Power Up Write Time: 1-10ms */ |
SOTB_DA | 4:19a0764d6b81 | 30 | //#define WAIT_US_TBP 50 /* Byte Program Time: 20-50us */ |
SOTB_DA | 4:19a0764d6b81 | 31 | //#define WAIT_US_TPP 3000 /* Page Program Time: 0.7-3ms */ |
SOTB_DA | 4:19a0764d6b81 | 32 | //#define WAIT_US_TSE 400000 /* Sector Erase Time: 30-400ms */ |
SOTB_DA | 4:19a0764d6b81 | 33 | //#define WAIT_US_TBE 1000000 /* 64KB Block Erase Time: 1000ms */ |
SOTB_DA | 4:19a0764d6b81 | 34 | //#define WAIT_US_TCE 10000000 /* Chip Erase Time: 3-10s */ |
SOTB_DA | 4:19a0764d6b81 | 35 | |
SOTB_DA | 4:19a0764d6b81 | 36 | //#define ADDR_BMASK2 0x00ff0000 |
SOTB_DA | 4:19a0764d6b81 | 37 | //#define ADDR_BMASK1 0x0000ff00 |
SOTB_DA | 4:19a0764d6b81 | 38 | //#define ADDR_BMASK0 0x000000ff |
SOTB_DA | 4:19a0764d6b81 | 39 | |
SOTB_DA | 4:19a0764d6b81 | 40 | //#define ADDR_BSHIFT2 16 |
SOTB_DA | 4:19a0764d6b81 | 41 | //#define ADDR_BSHIFT1 8 |
SOTB_DA | 4:19a0764d6b81 | 42 | //#define ADDR_BSHIFT0 0 |
SOTB_DA | 4:19a0764d6b81 | 43 | |
SOTB_DA | 4:19a0764d6b81 | 44 | #define PAGE_SIZE 256 |
SOTB_DA | 4:19a0764d6b81 | 45 | #define SECTOR_SIZE 4096 |
SOTB_DA | 4:19a0764d6b81 | 46 | #define NUM_SECTORS 512 |
SOTB_DA | 4:19a0764d6b81 | 47 | #define NUM_64KB_BLOCKS 32 |
SOTB_DA | 4:19a0764d6b81 | 48 | |
SOTB_DA | 4:19a0764d6b81 | 49 | #define STATUS_1_BUSY 0x01 |
SOTB_DA | 4:19a0764d6b81 | 50 | |
SOTB_DA | 4:19a0764d6b81 | 51 | class W25Q16BV /*: public BitBangedSPI*/ { |
SOTB_DA | 4:19a0764d6b81 | 52 | public: |
SOTB_DA | 4:19a0764d6b81 | 53 | W25Q16BV(PinName mosi, PinName miso, PinName sclk, PinName cs); |
SOTB_DA | 4:19a0764d6b81 | 54 | |
SOTB_DA | 4:19a0764d6b81 | 55 | int readByte(int addr); // takes a 24-bit (3 bytes) address and returns the data (1 byte) at that location |
SOTB_DA | 4:19a0764d6b81 | 56 | int readByte(int a2, int a1, int a0); // takes the address in 3 separate bytes A[23,16], A[15,8], A[7,0] |
SOTB_DA | 4:19a0764d6b81 | 57 | void readStream(int addr, char* buf, int count); // takes a 24-bit address, reads count bytes, and stores results in buf |
SOTB_DA | 4:19a0764d6b81 | 58 | |
SOTB_DA | 4:19a0764d6b81 | 59 | void readJEDEC(uint8_t* manId, uint8_t* memType, uint8_t* cap); |
SOTB_DA | 4:19a0764d6b81 | 60 | uint8_t readStatus1(); |
SOTB_DA | 4:19a0764d6b81 | 61 | uint8_t readStatus2(); |
SOTB_DA | 4:19a0764d6b81 | 62 | |
SOTB_DA | 4:19a0764d6b81 | 63 | void writeByte(int addr, int data); // takes a 24-bit (3 bytes) address and a byte of data to write at that location |
SOTB_DA | 4:19a0764d6b81 | 64 | void writeByte(int a2, int a1, int a0, int data); // takes the address in 3 separate bytes A[23,16], A[15,8], A[7,0] |
SOTB_DA | 4:19a0764d6b81 | 65 | void writeStream(int addr, char* buf, int count); // write count bytes of data from buf to memory, starting at addr |
SOTB_DA | 4:19a0764d6b81 | 66 | |
SOTB_DA | 4:19a0764d6b81 | 67 | void chipErase(); // erase all data on chip |
SOTB_DA | 4:19a0764d6b81 | 68 | bool blockErase(int startBlock, int num=1); // erase all data in the specified number of 64KB blocks, return false if block number is invalid |
SOTB_DA | 4:19a0764d6b81 | 69 | bool sectorErase(int startSector, int num=1); // erase all data in the specified number of 4KB sectors, return false if sector number is invalid |
SOTB_DA | 4:19a0764d6b81 | 70 | |
SOTB_DA | 4:19a0764d6b81 | 71 | private: |
SOTB_DA | 4:19a0764d6b81 | 72 | |
SOTB_DA | 4:19a0764d6b81 | 73 | void exitDeepPowerDown(); |
SOTB_DA | 4:19a0764d6b81 | 74 | void waitWhileBusy(); |
SOTB_DA | 4:19a0764d6b81 | 75 | |
SOTB_DA | 4:19a0764d6b81 | 76 | void writeEnable(); // write enable |
SOTB_DA | 4:19a0764d6b81 | 77 | void writeDisable(); // write disable |
SOTB_DA | 4:19a0764d6b81 | 78 | void chipEnable(); // chip enable |
SOTB_DA | 4:19a0764d6b81 | 79 | void chipDisable(); // chip disable |
SOTB_DA | 4:19a0764d6b81 | 80 | |
SOTB_DA | 4:19a0764d6b81 | 81 | // BitBangedSPI _spi; |
SOTB_DA | 4:19a0764d6b81 | 82 | SPI _spi; |
SOTB_DA | 4:19a0764d6b81 | 83 | DigitalOut _cs; |
SOTB_DA | 4:19a0764d6b81 | 84 | }; |
SOTB_DA | 4:19a0764d6b81 | 85 | |
SOTB_DA | 4:19a0764d6b81 | 86 | #endif |
SOTB_DA | 4:19a0764d6b81 | 87 |