Wiljan Arias
Forked from romilly. Changed the way SPI handler is injected in constructor
Fork of
MCP23S17
by 
Romilly Cocking
MCP23S17.h@7:53498e24592c, 2010-08-22 (annotated)
- Committer:
- romilly
- Date:
- Sun Aug 22 15:37:25 2010 +0000
- Revision:
- 7:53498e24592c
- Parent:
- 6:7b5e59c0e71c
- Child:
- 8:841b19734955
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| romilly | 7:53498e24592c | 1 | /* MCP23S17 - drive the Microchip MCP23S17 16-bit Port Extender using SPI |
| romilly | 7:53498e24592c | 2 | * Copyright (c) 2010 Romilly Cocking |
| romilly | 7:53498e24592c | 3 | * Released under the MIT License: http://mbed.org/license/mit |
| romilly | 7:53498e24592c | 4 | * |
| romilly | 7:53498e24592c | 5 | * version 0.2 |
| romilly | 7:53498e24592c | 6 | */ |
| romilly | 7:53498e24592c | 7 | #include "mbed.h" |
| romilly | 7:53498e24592c | 8 | |
| romilly | 7:53498e24592c | 9 | #ifndef MCP23S17_H |
| romilly | 7:53498e24592c | 10 | #define MCP23S17_H |
| romilly | 7:53498e24592c | 11 | |
| romilly | 7:53498e24592c | 12 | #define INTERRUPT_POLARITY_BIT 0x02 |
| romilly | 7:53498e24592c | 13 | #define INTERRUPT_MIRROR_BIT 0x40 |
| romilly | 7:53498e24592c | 14 | |
| romilly | 7:53498e24592c | 15 | // all register addresses assume IOCON.BANK = 0 (POR default) |
| romilly | 7:53498e24592c | 16 | |
| romilly | 7:53498e24592c | 17 | #define IODIRA 0x00 |
| romilly | 7:53498e24592c | 18 | #define IODIRB 0x01 |
| romilly | 7:53498e24592c | 19 | #define GPINTENA 0x04 |
| romilly | 7:53498e24592c | 20 | #define GPINTENB 0x05 |
| romilly | 7:53498e24592c | 21 | #define DEFVALA 0x06 |
| romilly | 7:53498e24592c | 22 | #define INTCONA 0x08 |
| romilly | 7:53498e24592c | 23 | #define IOCON 0x0A |
| romilly | 7:53498e24592c | 24 | #define GPIOA 0x12 |
| romilly | 7:53498e24592c | 25 | #define GPIOB 0x13 |
| romilly | 7:53498e24592c | 26 | #define OLATA 0x14 |
| romilly | 7:53498e24592c | 27 | #define OLATB 0x15 |
| romilly | 7:53498e24592c | 28 | |
| romilly | 7:53498e24592c | 29 | // Control settings |
| romilly | 7:53498e24592c | 30 | |
| romilly | 7:53498e24592c | 31 | #define IOCON_BANK 0x80 // Banked registers |
| romilly | 7:53498e24592c | 32 | #define IOCON_BYTE_MODE 0x20 // Disables sequential operation. If bank = 0, operations toggle between A and B registers |
| romilly | 7:53498e24592c | 33 | #define IOCON_HAEN 0x08 // Hardware address enable |
| romilly | 7:53498e24592c | 34 | |
| romilly | 7:53498e24592c | 35 | enum Polarity { ACTIVE_LOW , ACTIVE_HIGH }; |
| romilly | 7:53498e24592c | 36 | |
| romilly | 7:53498e24592c | 37 | class MCP23S17 { |
| romilly | 7:53498e24592c | 38 | public: |
| romilly | 7:53498e24592c | 39 | MCP23S17(SPI& spi, PinName ncs, char writeOpcode); |
| romilly | 7:53498e24592c | 40 | void directionA(char direction); |
| romilly | 7:53498e24592c | 41 | void directionB(char direction); |
| romilly | 7:53498e24592c | 42 | void interruptEnableA(char interruptsEnabledMask); |
| romilly | 7:53498e24592c | 43 | void interruptEnableB(char interruptsEnabledMask); |
| romilly | 7:53498e24592c | 44 | void interruptPolarity(Polarity polarity); |
| romilly | 7:53498e24592c | 45 | void mirrorInterrupts(bool mirror); |
| romilly | 7:53498e24592c | 46 | void defaultValueA(char valuesToCompare); |
| romilly | 7:53498e24592c | 47 | void interruptControlA(char interruptContolBits); |
| romilly | 7:53498e24592c | 48 | char inputA(); |
| romilly | 7:53498e24592c | 49 | char inputB(); |
| romilly | 7:53498e24592c | 50 | void outputA(char byte); |
| romilly | 7:53498e24592c | 51 | void outputB(char byte); |
| romilly | 7:53498e24592c | 52 | protected: |
| romilly | 7:53498e24592c | 53 | SPI& _spi; |
| romilly | 7:53498e24592c | 54 | DigitalOut _ncs; |
| romilly | 7:53498e24592c | 55 | void _init(); |
| romilly | 7:53498e24592c | 56 | void _write(char address, char data); |
| romilly | 7:53498e24592c | 57 | char _read(char address); |
| romilly | 7:53498e24592c | 58 | char _readOpcode; |
| romilly | 7:53498e24592c | 59 | char _writeOpcode; |
| romilly | 7:53498e24592c | 60 | }; |
| romilly | 7:53498e24592c | 61 | |
| romilly | 2:6144709f1700 | 62 | #endif |