Forked from romilly. Changed the way SPI handler is injected in constructor
Fork of MCP23S17 by
Diff: MCP23S17.h
- Revision:
- 7:53498e24592c
- Parent:
- 6:7b5e59c0e71c
- Child:
- 8:841b19734955
--- a/MCP23S17.h Sun Aug 22 12:41:26 2010 +0000 +++ b/MCP23S17.h Sun Aug 22 15:37:25 2010 +0000 @@ -1,145 +1,62 @@ -/* MCP23S17 - drive the Microchip MCP23S17 16-bit Port Extender using SPI -* Copyright (c) 2010 Romilly Cocking -* Released under the MIT License: http://mbed.org/license/mit -* -* version 0.1 -*/ -#include "mbed.h" - -#ifndef SER23K256_H -#define SER23K256_H - -// all register addresses assume IOCON.BANK = 0 (POR default) - -#define IODIRA 0x00 -#define IODIRB 0x01 -#define GPINTENA 0x04 -#define IOCON 0x0A -#define GPIOA 0x12 -#define GPIOB 0x13 -#define OLATA 0x14 -#define OLATB 0x15 - -// Control settings - -#define IOCON_BANK 0x80 // Banked registers -#define IOCON_BYTE_MODE 0x20 // Disables sequential operation. If bank = 0, operations toggle between A and B registers -#define IOCON_HAEN 0x08 // Hardware address enable - -class MCP23S17 { -public: - MCP23S17(SPI& spi, PinName ncs, char writeOpcode); - void directionA(char direction); - void directionB(char direction); - void gpIntEnA(char interruptsEnabledMask); - char inputA(); - char inputB(); - void outputA(char byte); - void outputB(char byte); -protected: - SPI& _spi; - DigitalOut _ncs; - void _init(); - void _write(char address, char data); - char _read(char address); - char _readOpcode; - char _writeOpcode; -}; - -#endif/* MCP23S17 - drive the Microchip MCP23S17 16-bit Port Extender using SPI -* Copyright (c) 2010 Romilly Cocking -* Released under the MIT License: http://mbed.org/license/mit -* -* version 0.1 -*/ -#include "mbed.h" - -#ifndef SER23K256_H -#define SER23K256_H - -// all register addresses assume IOCON.BANK = 0 (POR default) - -#define IODIRA 0x00 -#define IODIRB 0x01 -#define GPINTENA 0x04 -#define IOCON 0x0A -#define GPIOA 0x12 -#define GPIOB 0x13 -#define OLATA 0x14 -#define OLATB 0x15 - -// Control settings - -#define IOCON_BANK 0x80 // Banked registers -#define IOCON_BYTE_MODE 0x20 // Disables sequential operation. If bank = 0, operations toggle between A and B registers -#define IOCON_HAEN 0x08 // Hardware address enable - -class MCP23S17 { -public: - MCP23S17(SPI& spi, PinName ncs, char writeOpcode); - void directionA(char direction); - void directionB(char direction); - void gpIntEnA(char interruptsEnabledMask); - char inputA(); - char inputB(); - void outputA(char byte); - void outputB(char byte); -protected: - SPI& _spi; - DigitalOut _ncs; - void _init(); - void _write(char address, char data); - char _read(char address); - char _readOpcode; - char _writeOpcode; -}; - -#endif/* MCP23S17 - drive the Microchip MCP23S17 16-bit Port Extender using SPI -* Copyright (c) 2010 Romilly Cocking -* Released under the MIT License: http://mbed.org/license/mit -* -* version 0.1 -*/ -#include "mbed.h" - -#ifndef SER23K256_H -#define SER23K256_H - -// all register addresses assume IOCON.BANK = 0 (POR default) - -#define IODIRA 0x00 -#define IODIRB 0x01 -#define GPINTENA 0x04 -#define IOCON 0x0A -#define GPIOA 0x12 -#define GPIOB 0x13 -#define OLATA 0x14 -#define OLATB 0x15 - -// Control settings - -#define IOCON_BANK 0x80 // Banked registers -#define IOCON_BYTE_MODE 0x20 // Disables sequential operation. If bank = 0, operations toggle between A and B registers -#define IOCON_HAEN 0x08 // Hardware address enable - -class MCP23S17 { -public: - MCP23S17(SPI& spi, PinName ncs, char writeOpcode); - void directionA(char direction); - void directionB(char direction); - void gpIntEnA(char interruptsEnabledMask); - char inputA(); - char inputB(); - void outputA(char byte); - void outputB(char byte); -protected: - SPI& _spi; - DigitalOut _ncs; - void _init(); - void _write(char address, char data); - char _read(char address); - char _readOpcode; - char _writeOpcode; -}; - +/* MCP23S17 - drive the Microchip MCP23S17 16-bit Port Extender using SPI +* Copyright (c) 2010 Romilly Cocking +* Released under the MIT License: http://mbed.org/license/mit +* +* version 0.2 +*/ +#include "mbed.h" + +#ifndef MCP23S17_H +#define MCP23S17_H + +#define INTERRUPT_POLARITY_BIT 0x02 +#define INTERRUPT_MIRROR_BIT 0x40 + +// all register addresses assume IOCON.BANK = 0 (POR default) + +#define IODIRA 0x00 +#define IODIRB 0x01 +#define GPINTENA 0x04 +#define GPINTENB 0x05 +#define DEFVALA 0x06 +#define INTCONA 0x08 +#define IOCON 0x0A +#define GPIOA 0x12 +#define GPIOB 0x13 +#define OLATA 0x14 +#define OLATB 0x15 + +// Control settings + +#define IOCON_BANK 0x80 // Banked registers +#define IOCON_BYTE_MODE 0x20 // Disables sequential operation. If bank = 0, operations toggle between A and B registers +#define IOCON_HAEN 0x08 // Hardware address enable + +enum Polarity { ACTIVE_LOW , ACTIVE_HIGH }; + +class MCP23S17 { +public: + MCP23S17(SPI& spi, PinName ncs, char writeOpcode); + void directionA(char direction); + void directionB(char direction); + void interruptEnableA(char interruptsEnabledMask); + void interruptEnableB(char interruptsEnabledMask); + void interruptPolarity(Polarity polarity); + void mirrorInterrupts(bool mirror); + void defaultValueA(char valuesToCompare); + void interruptControlA(char interruptContolBits); + char inputA(); + char inputB(); + void outputA(char byte); + void outputB(char byte); +protected: + SPI& _spi; + DigitalOut _ncs; + void _init(); + void _write(char address, char data); + char _read(char address); + char _readOpcode; + char _writeOpcode; +}; + #endif \ No newline at end of file