mbed library sources. Supersedes mbed-src. Edited target satm32f446 for user USART3 pins
Fork of mbed-dev by
targets/TARGET_NUVOTON/TARGET_M480/lp_ticker.c@182:a56a73fd2a6f, 2018-03-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Tue Mar 20 16:56:18 2018 +0000
- Revision:
- 182:a56a73fd2a6f
- Parent:
- 179:b0033dcd6934
- Child:
- 184:08ed48f1de7f
mbed-dev library. Release version 160
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 172:7d866c31b3c5 | 1 | /* mbed Microcontroller Library |
AnnaBridge | 172:7d866c31b3c5 | 2 | * Copyright (c) 2015-2016 Nuvoton |
AnnaBridge | 172:7d866c31b3c5 | 3 | * |
AnnaBridge | 172:7d866c31b3c5 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 172:7d866c31b3c5 | 5 | * you may not use this file except in compliance with the License. |
AnnaBridge | 172:7d866c31b3c5 | 6 | * You may obtain a copy of the License at |
AnnaBridge | 172:7d866c31b3c5 | 7 | * |
AnnaBridge | 172:7d866c31b3c5 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 172:7d866c31b3c5 | 9 | * |
AnnaBridge | 172:7d866c31b3c5 | 10 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 172:7d866c31b3c5 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 172:7d866c31b3c5 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 172:7d866c31b3c5 | 13 | * See the License for the specific language governing permissions and |
AnnaBridge | 172:7d866c31b3c5 | 14 | * limitations under the License. |
AnnaBridge | 172:7d866c31b3c5 | 15 | */ |
AnnaBridge | 172:7d866c31b3c5 | 16 | |
AnnaBridge | 172:7d866c31b3c5 | 17 | #include "lp_ticker_api.h" |
AnnaBridge | 172:7d866c31b3c5 | 18 | |
AnnaBridge | 172:7d866c31b3c5 | 19 | #if DEVICE_LOWPOWERTIMER |
AnnaBridge | 172:7d866c31b3c5 | 20 | |
AnnaBridge | 172:7d866c31b3c5 | 21 | #include "sleep_api.h" |
AnnaBridge | 182:a56a73fd2a6f | 22 | #include "mbed_wait_api.h" |
AnnaBridge | 182:a56a73fd2a6f | 23 | #include "mbed_assert.h" |
AnnaBridge | 172:7d866c31b3c5 | 24 | #include "nu_modutil.h" |
AnnaBridge | 172:7d866c31b3c5 | 25 | #include "nu_miscutil.h" |
AnnaBridge | 172:7d866c31b3c5 | 26 | |
AnnaBridge | 182:a56a73fd2a6f | 27 | /* Micro seconds per second */ |
AnnaBridge | 182:a56a73fd2a6f | 28 | #define NU_US_PER_SEC 1000000 |
AnnaBridge | 182:a56a73fd2a6f | 29 | /* Timer clock per lp_ticker tick */ |
AnnaBridge | 182:a56a73fd2a6f | 30 | #define NU_TMRCLK_PER_TICK 1 |
AnnaBridge | 182:a56a73fd2a6f | 31 | /* Timer clock per second */ |
AnnaBridge | 182:a56a73fd2a6f | 32 | #define NU_TMRCLK_PER_SEC (__LXT) |
AnnaBridge | 182:a56a73fd2a6f | 33 | /* Timer max counter bit size */ |
AnnaBridge | 182:a56a73fd2a6f | 34 | #define NU_TMR_MAXCNT_BITSIZE 24 |
AnnaBridge | 182:a56a73fd2a6f | 35 | /* Timer max counter */ |
AnnaBridge | 182:a56a73fd2a6f | 36 | #define NU_TMR_MAXCNT ((1 << NU_TMR_MAXCNT_BITSIZE) - 1) |
AnnaBridge | 172:7d866c31b3c5 | 37 | |
AnnaBridge | 182:a56a73fd2a6f | 38 | static void tmr1_vec(void); |
AnnaBridge | 172:7d866c31b3c5 | 39 | |
AnnaBridge | 182:a56a73fd2a6f | 40 | /* NOTE: To wake the system from power down mode, timer clock source must be ether LXT or LIRC. */ |
AnnaBridge | 182:a56a73fd2a6f | 41 | static const struct nu_modinit_s timer1_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_LXT, 0, TMR1_RST, TMR1_IRQn, (void *) tmr1_vec}; |
AnnaBridge | 182:a56a73fd2a6f | 42 | |
AnnaBridge | 182:a56a73fd2a6f | 43 | #define TIMER_MODINIT timer1_modinit |
AnnaBridge | 182:a56a73fd2a6f | 44 | |
AnnaBridge | 182:a56a73fd2a6f | 45 | static int ticker_inited = 0; |
AnnaBridge | 172:7d866c31b3c5 | 46 | |
AnnaBridge | 172:7d866c31b3c5 | 47 | #define TMR_CMP_MIN 2 |
AnnaBridge | 172:7d866c31b3c5 | 48 | #define TMR_CMP_MAX 0xFFFFFFu |
AnnaBridge | 172:7d866c31b3c5 | 49 | |
AnnaBridge | 172:7d866c31b3c5 | 50 | void lp_ticker_init(void) |
AnnaBridge | 172:7d866c31b3c5 | 51 | { |
AnnaBridge | 182:a56a73fd2a6f | 52 | if (ticker_inited) { |
AnnaBridge | 172:7d866c31b3c5 | 53 | return; |
AnnaBridge | 172:7d866c31b3c5 | 54 | } |
AnnaBridge | 182:a56a73fd2a6f | 55 | ticker_inited = 1; |
AnnaBridge | 172:7d866c31b3c5 | 56 | |
AnnaBridge | 172:7d866c31b3c5 | 57 | // Reset module |
AnnaBridge | 182:a56a73fd2a6f | 58 | SYS_ResetModule(TIMER_MODINIT.rsetidx); |
AnnaBridge | 172:7d866c31b3c5 | 59 | |
AnnaBridge | 172:7d866c31b3c5 | 60 | // Select IP clock source |
AnnaBridge | 182:a56a73fd2a6f | 61 | CLK_SetModuleClock(TIMER_MODINIT.clkidx, TIMER_MODINIT.clksrc, TIMER_MODINIT.clkdiv); |
AnnaBridge | 182:a56a73fd2a6f | 62 | |
AnnaBridge | 172:7d866c31b3c5 | 63 | // Enable IP clock |
AnnaBridge | 182:a56a73fd2a6f | 64 | CLK_EnableModuleClock(TIMER_MODINIT.clkidx); |
AnnaBridge | 172:7d866c31b3c5 | 65 | |
AnnaBridge | 172:7d866c31b3c5 | 66 | // Configure clock |
AnnaBridge | 182:a56a73fd2a6f | 67 | uint32_t clk_timer = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname)); |
AnnaBridge | 182:a56a73fd2a6f | 68 | uint32_t prescale_timer = clk_timer / NU_TMRCLK_PER_SEC - 1; |
AnnaBridge | 182:a56a73fd2a6f | 69 | MBED_ASSERT((prescale_timer != (uint32_t) -1) && prescale_timer <= 127); |
AnnaBridge | 182:a56a73fd2a6f | 70 | MBED_ASSERT((clk_timer % NU_TMRCLK_PER_SEC) == 0); |
AnnaBridge | 182:a56a73fd2a6f | 71 | uint32_t cmp_timer = TMR_CMP_MAX; |
AnnaBridge | 182:a56a73fd2a6f | 72 | MBED_ASSERT(cmp_timer >= TMR_CMP_MIN && cmp_timer <= TMR_CMP_MAX); |
AnnaBridge | 172:7d866c31b3c5 | 73 | // Continuous mode |
AnnaBridge | 172:7d866c31b3c5 | 74 | // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451/M480. In M451/M480, TIMER_CNT is updated continuously by default. |
AnnaBridge | 182:a56a73fd2a6f | 75 | ((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname))->CTL = TIMER_CONTINUOUS_MODE | prescale_timer/* | TIMER_CTL_CNTDATEN_Msk*/; |
AnnaBridge | 182:a56a73fd2a6f | 76 | ((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname))->CMP = cmp_timer; |
AnnaBridge | 172:7d866c31b3c5 | 77 | |
AnnaBridge | 172:7d866c31b3c5 | 78 | // Set vector |
AnnaBridge | 182:a56a73fd2a6f | 79 | NVIC_SetVector(TIMER_MODINIT.irq_n, (uint32_t) TIMER_MODINIT.var); |
AnnaBridge | 172:7d866c31b3c5 | 80 | |
AnnaBridge | 182:a56a73fd2a6f | 81 | NVIC_EnableIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 172:7d866c31b3c5 | 82 | |
AnnaBridge | 182:a56a73fd2a6f | 83 | TIMER_EnableInt((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname)); |
AnnaBridge | 182:a56a73fd2a6f | 84 | TIMER_EnableWakeup((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname)); |
AnnaBridge | 182:a56a73fd2a6f | 85 | /* NOTE: When engine is clocked by low power clock source (LXT/LIRC), we need to wait for 3 engine clocks. */ |
AnnaBridge | 182:a56a73fd2a6f | 86 | wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3); |
AnnaBridge | 182:a56a73fd2a6f | 87 | TIMER_Start((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname)); |
AnnaBridge | 172:7d866c31b3c5 | 88 | } |
AnnaBridge | 172:7d866c31b3c5 | 89 | |
AnnaBridge | 172:7d866c31b3c5 | 90 | timestamp_t lp_ticker_read() |
AnnaBridge | 172:7d866c31b3c5 | 91 | { |
AnnaBridge | 182:a56a73fd2a6f | 92 | if (! ticker_inited) { |
AnnaBridge | 172:7d866c31b3c5 | 93 | lp_ticker_init(); |
AnnaBridge | 172:7d866c31b3c5 | 94 | } |
AnnaBridge | 172:7d866c31b3c5 | 95 | |
AnnaBridge | 182:a56a73fd2a6f | 96 | TIMER_T * timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname); |
AnnaBridge | 172:7d866c31b3c5 | 97 | |
AnnaBridge | 182:a56a73fd2a6f | 98 | return (TIMER_GetCounter(timer_base) / NU_TMRCLK_PER_TICK); |
AnnaBridge | 172:7d866c31b3c5 | 99 | } |
AnnaBridge | 172:7d866c31b3c5 | 100 | |
AnnaBridge | 172:7d866c31b3c5 | 101 | void lp_ticker_set_interrupt(timestamp_t timestamp) |
AnnaBridge | 172:7d866c31b3c5 | 102 | { |
AnnaBridge | 182:a56a73fd2a6f | 103 | /* In continuous mode, counter will be reset to zero with the following sequence: |
AnnaBridge | 182:a56a73fd2a6f | 104 | * 1. Stop counting |
AnnaBridge | 182:a56a73fd2a6f | 105 | * 2. Configure new CMP value |
AnnaBridge | 182:a56a73fd2a6f | 106 | * 3. Restart counting |
AnnaBridge | 182:a56a73fd2a6f | 107 | * |
AnnaBridge | 182:a56a73fd2a6f | 108 | * This behavior is not what we want. To fix it, we could configure new CMP value |
AnnaBridge | 182:a56a73fd2a6f | 109 | * without stopping counting first. |
AnnaBridge | 182:a56a73fd2a6f | 110 | */ |
AnnaBridge | 182:a56a73fd2a6f | 111 | TIMER_T * timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname); |
AnnaBridge | 172:7d866c31b3c5 | 112 | |
AnnaBridge | 182:a56a73fd2a6f | 113 | /* NOTE: Because H/W timer requests min compare value, our implementation would have alarm delay of |
AnnaBridge | 182:a56a73fd2a6f | 114 | * (TMR_CMP_MIN - interval_clk) clocks when interval_clk is between [1, TMR_CMP_MIN). */ |
AnnaBridge | 182:a56a73fd2a6f | 115 | uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK; |
AnnaBridge | 182:a56a73fd2a6f | 116 | cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX); |
AnnaBridge | 182:a56a73fd2a6f | 117 | timer_base->CMP = cmp_timer; |
AnnaBridge | 172:7d866c31b3c5 | 118 | |
AnnaBridge | 182:a56a73fd2a6f | 119 | /* NOTE: When engine is clocked by low power clock source (LXT/LIRC), we need to wait for 3 engine clocks. */ |
AnnaBridge | 182:a56a73fd2a6f | 120 | wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3); |
AnnaBridge | 182:a56a73fd2a6f | 121 | TIMER_Start(timer_base); |
AnnaBridge | 182:a56a73fd2a6f | 122 | } |
AnnaBridge | 182:a56a73fd2a6f | 123 | |
AnnaBridge | 182:a56a73fd2a6f | 124 | void lp_ticker_disable_interrupt(void) |
AnnaBridge | 182:a56a73fd2a6f | 125 | { |
AnnaBridge | 182:a56a73fd2a6f | 126 | TIMER_DisableInt((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname)); |
AnnaBridge | 182:a56a73fd2a6f | 127 | } |
AnnaBridge | 182:a56a73fd2a6f | 128 | |
AnnaBridge | 182:a56a73fd2a6f | 129 | void lp_ticker_clear_interrupt(void) |
AnnaBridge | 182:a56a73fd2a6f | 130 | { |
AnnaBridge | 182:a56a73fd2a6f | 131 | TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname)); |
AnnaBridge | 172:7d866c31b3c5 | 132 | } |
AnnaBridge | 172:7d866c31b3c5 | 133 | |
AnnaBridge | 172:7d866c31b3c5 | 134 | void lp_ticker_fire_interrupt(void) |
AnnaBridge | 172:7d866c31b3c5 | 135 | { |
AnnaBridge | 172:7d866c31b3c5 | 136 | // NOTE: This event was in the past. Set the interrupt as pending, but don't process it here. |
AnnaBridge | 172:7d866c31b3c5 | 137 | // This prevents a recursive loop under heavy load which can lead to a stack overflow. |
AnnaBridge | 182:a56a73fd2a6f | 138 | NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 172:7d866c31b3c5 | 139 | } |
AnnaBridge | 172:7d866c31b3c5 | 140 | |
AnnaBridge | 182:a56a73fd2a6f | 141 | const ticker_info_t* lp_ticker_get_info() |
AnnaBridge | 172:7d866c31b3c5 | 142 | { |
AnnaBridge | 182:a56a73fd2a6f | 143 | static const ticker_info_t info = { |
AnnaBridge | 182:a56a73fd2a6f | 144 | NU_TMRCLK_PER_SEC / NU_TMRCLK_PER_TICK, |
AnnaBridge | 182:a56a73fd2a6f | 145 | NU_TMR_MAXCNT_BITSIZE |
AnnaBridge | 182:a56a73fd2a6f | 146 | }; |
AnnaBridge | 182:a56a73fd2a6f | 147 | return &info; |
AnnaBridge | 172:7d866c31b3c5 | 148 | } |
AnnaBridge | 172:7d866c31b3c5 | 149 | |
AnnaBridge | 182:a56a73fd2a6f | 150 | static void tmr1_vec(void) |
AnnaBridge | 172:7d866c31b3c5 | 151 | { |
AnnaBridge | 182:a56a73fd2a6f | 152 | TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname)); |
AnnaBridge | 182:a56a73fd2a6f | 153 | TIMER_ClearWakeupFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname)); |
AnnaBridge | 182:a56a73fd2a6f | 154 | |
AnnaBridge | 182:a56a73fd2a6f | 155 | // NOTE: lp_ticker_set_interrupt() may get called in lp_ticker_irq_handler(); |
AnnaBridge | 182:a56a73fd2a6f | 156 | lp_ticker_irq_handler(); |
AnnaBridge | 182:a56a73fd2a6f | 157 | } |
AnnaBridge | 172:7d866c31b3c5 | 158 | |
AnnaBridge | 172:7d866c31b3c5 | 159 | #endif |