Genadi Zawidowski / mbed-dev

mbed library sources. Supersedes mbed-src. Edited target satm32f446 for user USART3 pins

Dependents:   IGLOO_board

Fork of mbed-dev by mbed official

targets/TARGET_NUVOTON/TARGET_M480/lp_ticker.c@184:08ed48f1de7f, 2018-04-19 (annotated)

Committer:
AnnaBridge
Date:
Thu Apr 19 17:12:19 2018 +0100
Revision:
184:08ed48f1de7f
Parent:
182:a56a73fd2a6f
Child:
186:707f6e361f3e
mbed-dev library. Release version 161

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:7d866c31b3c5 1 /* mbed Microcontroller Library
AnnaBridge 172:7d866c31b3c5 2 * Copyright (c) 2015-2016 Nuvoton
AnnaBridge 172:7d866c31b3c5 3 *
AnnaBridge 172:7d866c31b3c5 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 172:7d866c31b3c5 5 * you may not use this file except in compliance with the License.
AnnaBridge 172:7d866c31b3c5 6 * You may obtain a copy of the License at
AnnaBridge 172:7d866c31b3c5 7 *
AnnaBridge 172:7d866c31b3c5 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 172:7d866c31b3c5 9 *
AnnaBridge 172:7d866c31b3c5 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 172:7d866c31b3c5 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 172:7d866c31b3c5 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 172:7d866c31b3c5 13 * See the License for the specific language governing permissions and
AnnaBridge 172:7d866c31b3c5 14 * limitations under the License.
AnnaBridge 172:7d866c31b3c5 15 */
AnnaBridge 172:7d866c31b3c5 16
AnnaBridge 172:7d866c31b3c5 17 #include "lp_ticker_api.h"
AnnaBridge 172:7d866c31b3c5 18
AnnaBridge 172:7d866c31b3c5 19 #if DEVICE_LOWPOWERTIMER
AnnaBridge 172:7d866c31b3c5 20
AnnaBridge 172:7d866c31b3c5 21 #include "sleep_api.h"
AnnaBridge 182:a56a73fd2a6f 22 #include "mbed_wait_api.h"
AnnaBridge 182:a56a73fd2a6f 23 #include "mbed_assert.h"
AnnaBridge 172:7d866c31b3c5 24 #include "nu_modutil.h"
AnnaBridge 172:7d866c31b3c5 25 #include "nu_miscutil.h"
AnnaBridge 172:7d866c31b3c5 26
AnnaBridge 182:a56a73fd2a6f 27 /* Micro seconds per second */
AnnaBridge 182:a56a73fd2a6f 28 #define NU_US_PER_SEC 1000000
AnnaBridge 182:a56a73fd2a6f 29 /* Timer clock per lp_ticker tick */
AnnaBridge 182:a56a73fd2a6f 30 #define NU_TMRCLK_PER_TICK 1
AnnaBridge 182:a56a73fd2a6f 31 /* Timer clock per second */
AnnaBridge 182:a56a73fd2a6f 32 #define NU_TMRCLK_PER_SEC (__LXT)
AnnaBridge 182:a56a73fd2a6f 33 /* Timer max counter bit size */
AnnaBridge 182:a56a73fd2a6f 34 #define NU_TMR_MAXCNT_BITSIZE 24
AnnaBridge 182:a56a73fd2a6f 35 /* Timer max counter */
AnnaBridge 182:a56a73fd2a6f 36 #define NU_TMR_MAXCNT ((1 << NU_TMR_MAXCNT_BITSIZE) - 1)
AnnaBridge 172:7d866c31b3c5 37
AnnaBridge 182:a56a73fd2a6f 38 static void tmr1_vec(void);
AnnaBridge 172:7d866c31b3c5 39
AnnaBridge 182:a56a73fd2a6f 40 /* NOTE: To wake the system from power down mode, timer clock source must be ether LXT or LIRC. */
AnnaBridge 182:a56a73fd2a6f 41 static const struct nu_modinit_s timer1_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_LXT, 0, TMR1_RST, TMR1_IRQn, (void *) tmr1_vec};
AnnaBridge 182:a56a73fd2a6f 42
AnnaBridge 182:a56a73fd2a6f 43 #define TIMER_MODINIT timer1_modinit
AnnaBridge 182:a56a73fd2a6f 44
AnnaBridge 182:a56a73fd2a6f 45 static int ticker_inited = 0;
AnnaBridge 172:7d866c31b3c5 46
AnnaBridge 172:7d866c31b3c5 47 #define TMR_CMP_MIN 2
AnnaBridge 172:7d866c31b3c5 48 #define TMR_CMP_MAX 0xFFFFFFu
AnnaBridge 172:7d866c31b3c5 49
AnnaBridge 184:08ed48f1de7f 50 /* NOTE: When system clock is higher than timer clock, we need to add 3 engine clock
AnnaBridge 184:08ed48f1de7f 51 * (recommended by designer) delay to wait for above timer control to take effect. */
AnnaBridge 184:08ed48f1de7f 52
AnnaBridge 172:7d866c31b3c5 53 void lp_ticker_init(void)
AnnaBridge 172:7d866c31b3c5 54 {
AnnaBridge 182:a56a73fd2a6f 55 if (ticker_inited) {
AnnaBridge 172:7d866c31b3c5 56 return;
AnnaBridge 172:7d866c31b3c5 57 }
AnnaBridge 182:a56a73fd2a6f 58 ticker_inited = 1;
AnnaBridge 172:7d866c31b3c5 59
AnnaBridge 172:7d866c31b3c5 60 // Reset module
AnnaBridge 182:a56a73fd2a6f 61 SYS_ResetModule(TIMER_MODINIT.rsetidx);
AnnaBridge 172:7d866c31b3c5 62
AnnaBridge 172:7d866c31b3c5 63 // Select IP clock source
AnnaBridge 182:a56a73fd2a6f 64 CLK_SetModuleClock(TIMER_MODINIT.clkidx, TIMER_MODINIT.clksrc, TIMER_MODINIT.clkdiv);
AnnaBridge 182:a56a73fd2a6f 65
AnnaBridge 172:7d866c31b3c5 66 // Enable IP clock
AnnaBridge 182:a56a73fd2a6f 67 CLK_EnableModuleClock(TIMER_MODINIT.clkidx);
AnnaBridge 172:7d866c31b3c5 68
AnnaBridge 184:08ed48f1de7f 69 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 184:08ed48f1de7f 70
AnnaBridge 172:7d866c31b3c5 71 // Configure clock
AnnaBridge 184:08ed48f1de7f 72 uint32_t clk_timer = TIMER_GetModuleClock(timer_base);
AnnaBridge 182:a56a73fd2a6f 73 uint32_t prescale_timer = clk_timer / NU_TMRCLK_PER_SEC - 1;
AnnaBridge 182:a56a73fd2a6f 74 MBED_ASSERT((prescale_timer != (uint32_t) -1) && prescale_timer <= 127);
AnnaBridge 182:a56a73fd2a6f 75 MBED_ASSERT((clk_timer % NU_TMRCLK_PER_SEC) == 0);
AnnaBridge 182:a56a73fd2a6f 76 uint32_t cmp_timer = TMR_CMP_MAX;
AnnaBridge 182:a56a73fd2a6f 77 MBED_ASSERT(cmp_timer >= TMR_CMP_MIN && cmp_timer <= TMR_CMP_MAX);
AnnaBridge 172:7d866c31b3c5 78 // Continuous mode
AnnaBridge 172:7d866c31b3c5 79 // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451/M480. In M451/M480, TIMER_CNT is updated continuously by default.
AnnaBridge 184:08ed48f1de7f 80 timer_base->CTL = TIMER_CONTINUOUS_MODE | prescale_timer/* | TIMER_CTL_CNTDATEN_Msk*/;
AnnaBridge 184:08ed48f1de7f 81 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 82
AnnaBridge 184:08ed48f1de7f 83 timer_base->CMP = cmp_timer;
AnnaBridge 184:08ed48f1de7f 84 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 172:7d866c31b3c5 85
AnnaBridge 172:7d866c31b3c5 86 // Set vector
AnnaBridge 182:a56a73fd2a6f 87 NVIC_SetVector(TIMER_MODINIT.irq_n, (uint32_t) TIMER_MODINIT.var);
AnnaBridge 172:7d866c31b3c5 88
AnnaBridge 182:a56a73fd2a6f 89 NVIC_EnableIRQ(TIMER_MODINIT.irq_n);
AnnaBridge 172:7d866c31b3c5 90
AnnaBridge 184:08ed48f1de7f 91 TIMER_EnableInt(timer_base);
AnnaBridge 184:08ed48f1de7f 92 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 93
AnnaBridge 184:08ed48f1de7f 94 TIMER_EnableWakeup(timer_base);
AnnaBridge 182:a56a73fd2a6f 95 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 96
AnnaBridge 184:08ed48f1de7f 97 TIMER_Start(timer_base);
AnnaBridge 184:08ed48f1de7f 98 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 99
AnnaBridge 184:08ed48f1de7f 100 /* Wait for timer to start counting and raise active flag */
AnnaBridge 184:08ed48f1de7f 101 while(! (timer_base->CTL & TIMER_CTL_ACTSTS_Msk));
AnnaBridge 172:7d866c31b3c5 102 }
AnnaBridge 172:7d866c31b3c5 103
AnnaBridge 172:7d866c31b3c5 104 timestamp_t lp_ticker_read()
AnnaBridge 172:7d866c31b3c5 105 {
AnnaBridge 182:a56a73fd2a6f 106 if (! ticker_inited) {
AnnaBridge 172:7d866c31b3c5 107 lp_ticker_init();
AnnaBridge 172:7d866c31b3c5 108 }
AnnaBridge 172:7d866c31b3c5 109
AnnaBridge 184:08ed48f1de7f 110 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 172:7d866c31b3c5 111
AnnaBridge 182:a56a73fd2a6f 112 return (TIMER_GetCounter(timer_base) / NU_TMRCLK_PER_TICK);
AnnaBridge 172:7d866c31b3c5 113 }
AnnaBridge 172:7d866c31b3c5 114
AnnaBridge 172:7d866c31b3c5 115 void lp_ticker_set_interrupt(timestamp_t timestamp)
AnnaBridge 172:7d866c31b3c5 116 {
AnnaBridge 182:a56a73fd2a6f 117 /* In continuous mode, counter will be reset to zero with the following sequence:
AnnaBridge 182:a56a73fd2a6f 118 * 1. Stop counting
AnnaBridge 182:a56a73fd2a6f 119 * 2. Configure new CMP value
AnnaBridge 182:a56a73fd2a6f 120 * 3. Restart counting
AnnaBridge 182:a56a73fd2a6f 121 *
AnnaBridge 182:a56a73fd2a6f 122 * This behavior is not what we want. To fix it, we could configure new CMP value
AnnaBridge 182:a56a73fd2a6f 123 * without stopping counting first.
AnnaBridge 182:a56a73fd2a6f 124 */
AnnaBridge 184:08ed48f1de7f 125 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 172:7d866c31b3c5 126
AnnaBridge 182:a56a73fd2a6f 127 /* NOTE: Because H/W timer requests min compare value, our implementation would have alarm delay of
AnnaBridge 182:a56a73fd2a6f 128 * (TMR_CMP_MIN - interval_clk) clocks when interval_clk is between [1, TMR_CMP_MIN). */
AnnaBridge 182:a56a73fd2a6f 129 uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK;
AnnaBridge 182:a56a73fd2a6f 130 cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX);
AnnaBridge 184:08ed48f1de7f 131
AnnaBridge 182:a56a73fd2a6f 132 timer_base->CMP = cmp_timer;
AnnaBridge 182:a56a73fd2a6f 133 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 182:a56a73fd2a6f 134 }
AnnaBridge 182:a56a73fd2a6f 135
AnnaBridge 182:a56a73fd2a6f 136 void lp_ticker_disable_interrupt(void)
AnnaBridge 182:a56a73fd2a6f 137 {
AnnaBridge 182:a56a73fd2a6f 138 TIMER_DisableInt((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 184:08ed48f1de7f 139 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 182:a56a73fd2a6f 140 }
AnnaBridge 182:a56a73fd2a6f 141
AnnaBridge 182:a56a73fd2a6f 142 void lp_ticker_clear_interrupt(void)
AnnaBridge 182:a56a73fd2a6f 143 {
AnnaBridge 182:a56a73fd2a6f 144 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 184:08ed48f1de7f 145 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 172:7d866c31b3c5 146 }
AnnaBridge 172:7d866c31b3c5 147
AnnaBridge 172:7d866c31b3c5 148 void lp_ticker_fire_interrupt(void)
AnnaBridge 172:7d866c31b3c5 149 {
AnnaBridge 172:7d866c31b3c5 150 // NOTE: This event was in the past. Set the interrupt as pending, but don't process it here.
AnnaBridge 172:7d866c31b3c5 151 // This prevents a recursive loop under heavy load which can lead to a stack overflow.
AnnaBridge 182:a56a73fd2a6f 152 NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n);
AnnaBridge 172:7d866c31b3c5 153 }
AnnaBridge 172:7d866c31b3c5 154
AnnaBridge 182:a56a73fd2a6f 155 const ticker_info_t* lp_ticker_get_info()
AnnaBridge 172:7d866c31b3c5 156 {
AnnaBridge 182:a56a73fd2a6f 157 static const ticker_info_t info = {
AnnaBridge 182:a56a73fd2a6f 158 NU_TMRCLK_PER_SEC / NU_TMRCLK_PER_TICK,
AnnaBridge 182:a56a73fd2a6f 159 NU_TMR_MAXCNT_BITSIZE
AnnaBridge 182:a56a73fd2a6f 160 };
AnnaBridge 182:a56a73fd2a6f 161 return &info;
AnnaBridge 172:7d866c31b3c5 162 }
AnnaBridge 172:7d866c31b3c5 163
AnnaBridge 182:a56a73fd2a6f 164 static void tmr1_vec(void)
AnnaBridge 172:7d866c31b3c5 165 {
AnnaBridge 182:a56a73fd2a6f 166 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 184:08ed48f1de7f 167 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 168
AnnaBridge 182:a56a73fd2a6f 169 TIMER_ClearWakeupFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 184:08ed48f1de7f 170 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 171
AnnaBridge 182:a56a73fd2a6f 172 // NOTE: lp_ticker_set_interrupt() may get called in lp_ticker_irq_handler();
AnnaBridge 182:a56a73fd2a6f 173 lp_ticker_irq_handler();
AnnaBridge 182:a56a73fd2a6f 174 }
AnnaBridge 172:7d866c31b3c5 175
AnnaBridge 172:7d866c31b3c5 176 #endif