Genadi Zawidowski
boart test board
Dependencies: USBDevice mbed-dev lwip
Fork of
USBSerial_HelloWorld
by 
Compass Yap
Diff: STM32_FMC.cpp
- Revision:
- 19:8b7595ced647
- Parent:
- 18:c276f3d01630
- Child:
- 20:4b2a3c310b61
--- a/STM32_FMC.cpp Tue Jul 24 19:35:38 2018 +0000
+++ b/STM32_FMC.cpp Tue Jul 24 23:24:53 2018 +0000
@@ -1,10 +1,88 @@
-
+#include "mbed.h"
#include "platform/mbed_critical.h"
#include "platform/mbed_power_mgmt.h"
#include "platform/platform.h"
#include "hal/pinmap.h"
+
+
+#define SDRAM_TIMEOUT ((uint32_t)0xFFFF)
+
+#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
+#define SDRAM_MODEREG_BURST_LENGTH_2 ((uint16_t)0x0001)
+#define SDRAM_MODEREG_BURST_LENGTH_4 ((uint16_t)0x0002)
+#define SDRAM_MODEREG_BURST_LENGTH_8 ((uint16_t)0x0004)
+#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)
+#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)
+#define SDRAM_MODEREG_CAS_LATENCY_2 ((uint16_t)0x0020)
+#define SDRAM_MODEREG_CAS_LATENCY_3 ((uint16_t)0x0030)
+#define SDRAM_MODEREG_OPERATING_MODE_STANDARD ((uint16_t)0x0000)
+#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
+#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)
+
+#define REFRESH_COUNT ((uint32_t)0x056A) /* SDRAM refresh counter (90MHz SDRAM clock) */
+
+/**
+ * @brief Perform the SDRAM exernal memory inialization sequence
+ * @param hsdram: SDRAM handle
+ * @param Command: Pointer to SDRAM command structure
+ * @retval None
+ */
+static void SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command)
+{
+ __IO uint32_t tmpmrd =0;
+ /* Step 3: Configure a clock configuration enable command */
+ Command->CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
+ Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1_2;
+ Command->AutoRefreshNumber = 1;
+ Command->ModeRegisterDefinition = 0;
+
+ /* Send the command */
+ HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
+
+ /* Step 4: Insert 100 ms delay */
+ wait((float)0.1);
+
+ /* Step 5: Configure a PALL (precharge all) command */
+ Command->CommandMode = FMC_SDRAM_CMD_PALL;
+ Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1_2;
+ Command->AutoRefreshNumber = 1;
+ Command->ModeRegisterDefinition = 0;
+
+ /* Send the command */
+ HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
+
+ /* Step 6 : Configure a Auto-Refresh command */
+ Command->CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
+ Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1_2;
+ Command->AutoRefreshNumber = 4;
+ Command->ModeRegisterDefinition = 0;
+
+ /* Send the command */
+ HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
+
+ /* Step 7: Program the external memory mode register */
+ tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |
+ SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |
+ SDRAM_MODEREG_CAS_LATENCY_2 |
+ SDRAM_MODEREG_OPERATING_MODE_STANDARD |
+ SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
+
+ Command->CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
+ Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1_2;
+ Command->AutoRefreshNumber = 1;
+ Command->ModeRegisterDefinition = tmpmrd;
+
+ /* Send the command */
+ HAL_SDRAM_SendCommand(hsdram, Command, 0x1000);
+
+ /* Step 8: Set the refresh rate counter */
+ /* (15.62 us x Freq) - 20 */
+ /* Set the device refresh counter */
+ HAL_SDRAM_ProgramRefreshRate(hsdram, REFRESH_COUNT);
+}
+
typedef class fmc
{
public:
@@ -72,16 +150,17 @@
pin_function(PF_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_A3
pin_function(PF_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_A4
pin_function(PF_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_A5
- pin_function(PC_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_SDNWE
- pin_function(PC_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_SDNE0
- pin_function(PC_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_SDCKE0
- pin_function(PF_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_SDNRAS
pin_function(PF_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_A6
pin_function(PF_13, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_A7
pin_function(PF_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_A8
pin_function(PF_15, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_A9
pin_function(PG_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_A10
pin_function(PG_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_A11
+
+ pin_function(PD_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D0
+ pin_function(PD_15, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D1
+ pin_function(PD_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D2
+ pin_function(PD_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D3
pin_function(PE_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D4
pin_function(PE_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D5
pin_function(PE_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D6
@@ -94,25 +173,28 @@
pin_function(PD_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D13
pin_function(PD_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D14
pin_function(PD_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D15
- pin_function(PD_14, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D0
- pin_function(PD_15, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D1
+
pin_function(PG_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_BA0
pin_function(PG_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_BA1
pin_function(PG_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_SDCLK
- pin_function(PD_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D2
- pin_function(PD_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_D3
+
pin_function(PG_15, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_SDNCAS
+ pin_function(PC_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_SDNWE
+ pin_function(PC_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_SDNE0
+ pin_function(PC_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_SDCKE0
+ pin_function(PF_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_SDNRAS
pin_function(PE_0, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_NBL0
pin_function(PE_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_FMC)); // FMC_NBL1
__HAL_RCC_FMC_CLK_ENABLE();
- FMC_SDRAM_TimingTypeDef SdramTiming;
+ FMC_SDRAM_TimingTypeDef SdramTiming = { 0 };
/** Perform the SDRAM1 memory initialization sequence
*/
- SDRAM_HandleTypeDef hsdram1;
+ SDRAM_HandleTypeDef hsdram1 = { 0 };
+ FMC_SDRAM_CommandTypeDef command = { 0 };
- hsdram1.Instance = FMC_Bank5_6; //FMC_SDRAM_DEVICE;
+ hsdram1.Instance = FMC_Bank5_6;
/* hsdram1.Init */
hsdram1.Init.SDBank = FMC_SDRAM_BANK1;
hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
@@ -136,6 +218,8 @@
if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK) {
//_Error_Handler(__FILE__, __LINE__);
}
+ /* Program the SDRAM external device */
+ SDRAM_Initialization_Sequence(&hsdram1, &command);
core_util_critical_section_exit();
}