Michael Shimniok
2018 revision to classic DataBus AVC code.
Dependencies: LSM303DLM Servo SerialGraphicLCD L3G4200D IncrementalEncoder SimpleShell
Pinouts.md@44:0d72a8a1288a, 2019-01-07 (annotated)
- Committer:
- shimniok
- Date:
- Mon Jan 07 16:47:33 2019 +0000
- Revision:
- 44:0d72a8a1288a
- Parent:
- 9:fc3575d2cbbf
Rewrote TinyGPS -> NMEA, GPS::read() now returns struct
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| shimniok | 9:fc3575d2cbbf | 1 | mbed lpc1768 pinouts |
| shimniok | 9:fc3575d2cbbf | 2 | ==================== |
| shimniok | 9:fc3575d2cbbf | 3 | |
| shimniok | 9:fc3575d2cbbf | 4 | UART |
| shimniok | 9:fc3575d2cbbf | 5 | ---- |
| shimniok | 9:fc3575d2cbbf | 6 | |
| shimniok | 9:fc3575d2cbbf | 7 | * UART0 is the USB connection |
| shimniok | 9:fc3575d2cbbf | 8 | * UART1 |
| shimniok | 9:fc3575d2cbbf | 9 | * rx = p14 |
| shimniok | 9:fc3575d2cbbf | 10 | * tx = p13 |
| shimniok | 9:fc3575d2cbbf | 11 | * UART2 |
| shimniok | 9:fc3575d2cbbf | 12 | * rx = p27 |
| shimniok | 9:fc3575d2cbbf | 13 | * tx = p28 |
| shimniok | 9:fc3575d2cbbf | 14 | * UART3 |
| shimniok | 9:fc3575d2cbbf | 15 | * rx = p18 |
| shimniok | 9:fc3575d2cbbf | 16 | * tx = p17 |
| shimniok | 9:fc3575d2cbbf | 17 | |
| shimniok | 9:fc3575d2cbbf | 18 | I2C |
| shimniok | 9:fc3575d2cbbf | 19 | --- |
| shimniok | 9:fc3575d2cbbf | 20 | * sda = p9 |
| shimniok | 9:fc3575d2cbbf | 21 | * scl = p10 |
| shimniok | 9:fc3575d2cbbf | 22 | |
| shimniok | 9:fc3575d2cbbf | 23 | Encoders |
| shimniok | 9:fc3575d2cbbf | 24 | -------- |
| shimniok | 9:fc3575d2cbbf | 25 | * A (Outermost) |
| shimniok | 9:fc3575d2cbbf | 26 | * ALEFT = p30 |
| shimniok | 9:fc3575d2cbbf | 27 | * ARIGHT = p29 |
| shimniok | 9:fc3575d2cbbf | 28 | * B (Innermost) |
| shimniok | 9:fc3575d2cbbf | 29 | * LEFT = unavailable |
| shimniok | 9:fc3575d2cbbf | 30 | * RIGHT = unavailable |
| shimniok | 9:fc3575d2cbbf | 31 | |
| shimniok | 9:fc3575d2cbbf | 32 | |
| shimniok | 9:fc3575d2cbbf | 33 | GPIO |
| shimniok | 9:fc3575d2cbbf | 34 | ---- |
| shimniok | 9:fc3575d2cbbf | 35 | * Digital |
| shimniok | 9:fc3575d2cbbf | 36 | * IO0 = D0 = p11 |
| shimniok | 9:fc3575d2cbbf | 37 | * IO1 = D1 = p12 |
| shimniok | 9:fc3575d2cbbf | 38 | * IO2 = D2 = P0.21 unavailable |
| shimniok | 9:fc3575d2cbbf | 39 | * IO3 = D7 = P2.12 unavailable |
| shimniok | 9:fc3575d2cbbf | 40 | * IO4 = D8 = P2.13 unavailable |
| shimniok | 9:fc3575d2cbbf | 41 | * PWM |
| shimniok | 9:fc3575d2cbbf | 42 | * PW0 P2 = p25 |
| shimniok | 9:fc3575d2cbbf | 43 | * PW1 P1 = p26 |
| shimniok | 9:fc3575d2cbbf | 44 | * Analog |
| shimniok | 9:fc3575d2cbbf | 45 | * AN0 = A0 = p15 |
| shimniok | 9:fc3575d2cbbf | 46 | * AN1 = A1 = p16 |
| shimniok | 9:fc3575d2cbbf | 47 | * AN2 = A2 = p19 |
| shimniok | 9:fc3575d2cbbf | 48 | * AN3 = A3 = p20 |