Diff: mma8451q.cpp

Revision:

0:cb0046a629c1

Child:

1:778b685c3ad0

diff -r 000000000000 -r cb0046a629c1 mma8451q.cpp
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mma8451q.cpp	Wed Mar 18 00:58:44 2015 +0000
@@ -0,0 +1,139 @@
+#include "mma8451q.h"
+/* turn on: CTRL_REG1 active_bit = 1
+ * back to standby: CTRL_REG1 active_bit = 0
+ */
+
+/* STANDBY: SYSMOD = 00 */
+
+/*
+ * MMA8451 I2C address
+ */ 
+#define MMA8451_I2C_ADDRESS                          0x38 //0x1C
+
+
+MMA8451Q::MMA8451Q(I2C& r) : m_i2c(r)
+{
+/*    char cmd[2];
+    
+    cmd[0] = MMA8451_ID;
+    m_i2c.read(MMA8451_I2C_ADDRESS, cmd, 1);*/
+    
+}
+
+MMA8451Q::~MMA8451Q()
+{
+}
+
+void MMA8451Q::read(uint8_t addr, uint8_t *dst_buf, int length)
+{
+    char cmd[2];
+
+    cmd[0] = addr;
+    if (m_i2c.write(MMA8451_I2C_ADDRESS, cmd, 1, true))
+        printf("MMA8451Q write-fail\n");
+    if (m_i2c.read(MMA8451_I2C_ADDRESS, (char *)dst_buf, length))
+        printf("MMA8451Q read-fail\n");
+}
+
+uint8_t MMA8451Q::read_single(uint8_t addr)
+{
+    char cmd[2];
+
+    cmd[0] = addr;
+    if (m_i2c.write(MMA8451_I2C_ADDRESS, cmd, 1, true))
+        printf("MMA8451Q write-fail\n");
+    if (m_i2c.read(MMA8451_I2C_ADDRESS, cmd, 1))
+        printf("MMA8451Q read-fail\n");
+
+    return cmd[0];
+}
+
+void MMA8451Q::print_regs()
+{
+    printf("ID: %x\n", read_single(MMA8451_ID));
+    printf("sysmod:%x\n", read_single(MMA8451_SYSMOD));
+    ctrl_reg1.octet = read_single(MMA8451_CTRL_REG1);
+    printf("ctrl_reg1:%x\n", ctrl_reg1.octet);
+    printf("ctrl_reg2:%x\n", read_single(MMA8451_CTRL_REG2));
+    printf("status: %x\n", read_single(MMA8451_STATUS)); 
+}
+
+void MMA8451Q::write(uint8_t addr, uint8_t data)
+{
+    uint8_t cmd[2];
+    
+    cmd[0] = addr;
+    cmd[1] = data;
+
+    if (m_i2c.write(MMA8451_I2C_ADDRESS, (char *)cmd, 2))
+        printf("MMA8451Q write-fail\n");
+}
+
+void MMA8451Q::set_active(char arg)
+{
+    char cmd[2];
+    
+    cmd[0] = MMA8451_CTRL_REG1;
+    cmd[1] = arg;
+
+    if (m_i2c.write(MMA8451_I2C_ADDRESS, cmd, 2))
+        printf("write-fail\n");
+}
+
+uint8_t MMA8451Q::get_active(void)
+{
+    uint8_t ret = read_single(MMA8451_CTRL_REG1);
+    printf("CTRL_REG1: %x\n", ret);
+    return ret;
+}
+
+
+void MMA8451Q::transient_detect()
+{
+    ctrl_reg1.octet = read_single(MMA8451_CTRL_REG1);
+    /* AN4071 Sensors Freescale Semiconductor, Inc.
+     * 7.1 Example Steps for Configuring Transient Detection
+     * Change in X or Y > 0.5g for 50 ms at 100 Hz ODR, Normal mode */
+
+    /* Step 1: Put the device in Standby Mode: Register 0x2A CTRL_REG1 */
+    ctrl_reg1.bits.ACTIVE = 0;
+    write(MMA8451_CTRL_REG1, ctrl_reg1.octet);
+    ctrl_reg1.bits.DR = 3; //Set device in 100 Hz ODR, Standby
+    write(MMA8451_CTRL_REG1, ctrl_reg1.octet);
+
+    /* Step 2: Enable X and Y Axes and enable the latch: Register 0x1D Configuration Register */
+    transient_cfg.octet = 0;
+    transient_cfg.bits.ELE = 1; // enable latch
+    transient_cfg.bits.YTEFE = 1;   // enable Y
+    transient_cfg.bits.XTEFE = 1;   // enable X
+    transient_cfg.bits.ZTEFE = 1;   // enable Z
+    write(MMA8451_TRANSIENT_CFG, transient_cfg.octet);
+
+    /* Step 3: Set the Threshold: Register 0x1F 
+     * Note: Step count is 0.063g per count, 0.5g / 0.063g = 7.93.
+     * Therefore set the threshold to 8 counts */
+    write(MMA8451_TRANSIENT_THS, 8);
+
+    /* Step 4: Set the Debounce Counter for 50 ms: Register 0x20
+     * Note: 100 Hz ODR, therefore 10 ms step sizes */
+    write(MMA8451_TRANSIENT_COUNT, 5);
+
+    /* Step 5: Enable Transient Detection Interrupt in the System (CTRL_REG4) */
+    ctrl_reg4.octet = 0;
+    ctrl_reg4.bits.INT_EN_TRANS = 1;
+    write(MMA8451_CTRL_REG4, ctrl_reg4.octet);
+
+    /* Step 6: Route the Transient Interrupt to INT 1 hardware pin (CTRL_REG5) */
+    ctrl_reg5.octet = 0;
+    ctrl_reg5.bits.INT_CFG_TRANS = 1;
+    write(MMA8451_CTRL_REG5, ctrl_reg5.octet);
+
+    /* Step 7: Put the device in Active Mode: Register 0x2A CTRL_REG1 */
+    ctrl_reg1.octet = read_single(MMA8451_CTRL_REG1);
+    ctrl_reg1.bits.ACTIVE = 1;
+    write(MMA8451_CTRL_REG1, ctrl_reg1.octet);
+
+    /* Step 8: Write Interrupt Service Routine Reading the
+     * System Interrupt Status and the Transient Status */
+}
+