shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/gpio_irq_api.c@82:0b31dbcd4769, 2014-01-31 (annotated)

Committer:
mbed_official
Date:
Fri Jan 31 10:00:06 2014 +0000
Revision:
82:0b31dbcd4769
Parent:
targets/hal/TARGET_Freescale/TARGET_KL46Z/gpio_irq_api.c@69:49e45cb70de1
Child:
86:26fc69fd3b6c
Synchronized with git revision 74409cbd593d1daab530a57baaa563f30b04b018



Full URL: https://github.com/mbedmicro/mbed/commit/74409cbd593d1daab530a57baaa563f30b04b018/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 31:42176bc3c368 1 /* mbed Microcontroller Library
mbed_official 31:42176bc3c368 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 31:42176bc3c368 3 *
mbed_official 31:42176bc3c368 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 31:42176bc3c368 5 * you may not use this file except in compliance with the License.
mbed_official 31:42176bc3c368 6 * You may obtain a copy of the License at
mbed_official 31:42176bc3c368 7 *
mbed_official 31:42176bc3c368 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 31:42176bc3c368 9 *
mbed_official 31:42176bc3c368 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 31:42176bc3c368 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 31:42176bc3c368 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 31:42176bc3c368 13 * See the License for the specific language governing permissions and
mbed_official 31:42176bc3c368 14 * limitations under the License.
mbed_official 31:42176bc3c368 15 */
mbed_official 31:42176bc3c368 16 #include <stddef.h>
mbed_official 31:42176bc3c368 17 #include "cmsis.h"
mbed_official 31:42176bc3c368 18
mbed_official 31:42176bc3c368 19 #include "gpio_irq_api.h"
mbed_official 31:42176bc3c368 20 #include "error.h"
mbed_official 31:42176bc3c368 21
mbed_official 69:49e45cb70de1 22 #define CHANNEL_NUM 96
mbed_official 31:42176bc3c368 23
mbed_official 31:42176bc3c368 24 static uint32_t channel_ids[CHANNEL_NUM] = {0};
mbed_official 31:42176bc3c368 25 static gpio_irq_handler irq_handler;
mbed_official 31:42176bc3c368 26
mbed_official 31:42176bc3c368 27 #define IRQ_DISABLED (0)
mbed_official 31:42176bc3c368 28 #define IRQ_RAISING_EDGE PORT_PCR_IRQC(9)
mbed_official 31:42176bc3c368 29 #define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
mbed_official 31:42176bc3c368 30 #define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
mbed_official 31:42176bc3c368 31
mbed_official 31:42176bc3c368 32 static void handle_interrupt_in(PORT_Type *port, int ch_base) {
mbed_official 31:42176bc3c368 33 uint32_t mask = 0, i;
mbed_official 31:42176bc3c368 34
mbed_official 31:42176bc3c368 35 for (i = 0; i < 32; i++) {
mbed_official 31:42176bc3c368 36 uint32_t pmask = (1 << i);
mbed_official 31:42176bc3c368 37 if (port->ISFR & pmask) {
mbed_official 31:42176bc3c368 38 mask |= pmask;
mbed_official 31:42176bc3c368 39 uint32_t id = channel_ids[ch_base + i];
mbed_official 69:49e45cb70de1 40 if (id == 0)
mbed_official 69:49e45cb70de1 41 continue;
mbed_official 31:42176bc3c368 42
mbed_official 31:42176bc3c368 43 FGPIO_Type *gpio;
mbed_official 31:42176bc3c368 44 gpio_irq_event event = IRQ_NONE;
mbed_official 31:42176bc3c368 45 switch (port->PCR[i] & PORT_PCR_IRQC_MASK) {
mbed_official 31:42176bc3c368 46 case IRQ_RAISING_EDGE:
mbed_official 31:42176bc3c368 47 event = IRQ_RISE;
mbed_official 31:42176bc3c368 48 break;
mbed_official 31:42176bc3c368 49
mbed_official 31:42176bc3c368 50 case IRQ_FALLING_EDGE:
mbed_official 31:42176bc3c368 51 event = IRQ_FALL;
mbed_official 31:42176bc3c368 52 break;
mbed_official 31:42176bc3c368 53
mbed_official 31:42176bc3c368 54 case IRQ_EITHER_EDGE:
mbed_official 69:49e45cb70de1 55 if (port == PORTA) {
mbed_official 69:49e45cb70de1 56 gpio = FPTA;
mbed_official 69:49e45cb70de1 57 } else if (port == PORTC) {
mbed_official 69:49e45cb70de1 58 gpio = FPTC;
mbed_official 69:49e45cb70de1 59 } else {
mbed_official 69:49e45cb70de1 60 gpio = FPTD;
mbed_official 69:49e45cb70de1 61 }
mbed_official 31:42176bc3c368 62 event = (gpio->PDIR & pmask) ? (IRQ_RISE) : (IRQ_FALL);
mbed_official 31:42176bc3c368 63 break;
mbed_official 31:42176bc3c368 64 }
mbed_official 31:42176bc3c368 65 if (event != IRQ_NONE)
mbed_official 31:42176bc3c368 66 irq_handler(id, event);
mbed_official 31:42176bc3c368 67 }
mbed_official 31:42176bc3c368 68 }
mbed_official 31:42176bc3c368 69 port->ISFR = mask;
mbed_official 31:42176bc3c368 70 }
mbed_official 31:42176bc3c368 71
mbed_official 69:49e45cb70de1 72 void gpio_irqA(void) {
mbed_official 69:49e45cb70de1 73 handle_interrupt_in(PORTA, 0);
mbed_official 69:49e45cb70de1 74 }
mbed_official 69:49e45cb70de1 75
mbed_official 69:49e45cb70de1 76 /* PORTC and PORTD share same vector */
mbed_official 69:49e45cb70de1 77 void gpio_irqCD(void) {
mbed_official 69:49e45cb70de1 78 if ((SIM->SCGC5 & SIM_SCGC5_PORTC_MASK) && (PORTC->ISFR)) {
mbed_official 69:49e45cb70de1 79 handle_interrupt_in(PORTC, 32);
mbed_official 69:49e45cb70de1 80 } else if ((SIM->SCGC5 & SIM_SCGC5_PORTD_MASK) && (PORTD->ISFR)) {
mbed_official 69:49e45cb70de1 81 handle_interrupt_in(PORTD, 64);
mbed_official 69:49e45cb70de1 82 }
mbed_official 69:49e45cb70de1 83 }
mbed_official 31:42176bc3c368 84
mbed_official 31:42176bc3c368 85 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
mbed_official 69:49e45cb70de1 86 if (pin == NC)
mbed_official 69:49e45cb70de1 87 return -1;
mbed_official 31:42176bc3c368 88
mbed_official 31:42176bc3c368 89 irq_handler = handler;
mbed_official 31:42176bc3c368 90
mbed_official 31:42176bc3c368 91 obj->port = pin >> PORT_SHIFT;
mbed_official 31:42176bc3c368 92 obj->pin = (pin & 0x7F) >> 2;
mbed_official 31:42176bc3c368 93
mbed_official 31:42176bc3c368 94 uint32_t ch_base, vector;
mbed_official 31:42176bc3c368 95 IRQn_Type irq_n;
mbed_official 31:42176bc3c368 96 switch (obj->port) {
mbed_official 31:42176bc3c368 97 case PortA:
mbed_official 31:42176bc3c368 98 ch_base = 0; irq_n = PORTA_IRQn; vector = (uint32_t)gpio_irqA;
mbed_official 31:42176bc3c368 99 break;
mbed_official 31:42176bc3c368 100
mbed_official 69:49e45cb70de1 101 case PortC:
mbed_official 69:49e45cb70de1 102 ch_base = 32; irq_n = PORTC_PORTD_IRQn; vector = (uint32_t)gpio_irqCD;
mbed_official 69:49e45cb70de1 103 break;
mbed_official 69:49e45cb70de1 104
mbed_official 31:42176bc3c368 105 case PortD:
mbed_official 69:49e45cb70de1 106 ch_base = 64; irq_n = PORTC_PORTD_IRQn; vector = (uint32_t)gpio_irqCD;
mbed_official 31:42176bc3c368 107 break;
mbed_official 31:42176bc3c368 108
mbed_official 31:42176bc3c368 109 default:
mbed_official 69:49e45cb70de1 110 error("gpio_irq only supported on port A,C and D\n");
mbed_official 31:42176bc3c368 111 break;
mbed_official 31:42176bc3c368 112 }
mbed_official 31:42176bc3c368 113 NVIC_SetVector(irq_n, vector);
mbed_official 31:42176bc3c368 114 NVIC_EnableIRQ(irq_n);
mbed_official 31:42176bc3c368 115
mbed_official 31:42176bc3c368 116 obj->ch = ch_base + obj->pin;
mbed_official 31:42176bc3c368 117 channel_ids[obj->ch] = id;
mbed_official 31:42176bc3c368 118
mbed_official 31:42176bc3c368 119 return 0;
mbed_official 31:42176bc3c368 120 }
mbed_official 31:42176bc3c368 121
mbed_official 31:42176bc3c368 122 void gpio_irq_free(gpio_irq_t *obj) {
mbed_official 31:42176bc3c368 123 channel_ids[obj->ch] = 0;
mbed_official 31:42176bc3c368 124 }
mbed_official 31:42176bc3c368 125
mbed_official 31:42176bc3c368 126 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
mbed_official 31:42176bc3c368 127 PORT_Type *port = (PORT_Type *)(PORTA_BASE + 0x1000 * obj->port);
mbed_official 31:42176bc3c368 128
mbed_official 31:42176bc3c368 129 uint32_t irq_settings = IRQ_DISABLED;
mbed_official 31:42176bc3c368 130
mbed_official 31:42176bc3c368 131 switch (port->PCR[obj->pin] & PORT_PCR_IRQC_MASK) {
mbed_official 31:42176bc3c368 132 case IRQ_DISABLED:
mbed_official 31:42176bc3c368 133 if (enable) {
mbed_official 31:42176bc3c368 134 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_FALLING_EDGE);
mbed_official 31:42176bc3c368 135 }
mbed_official 31:42176bc3c368 136 break;
mbed_official 31:42176bc3c368 137
mbed_official 31:42176bc3c368 138 case IRQ_RAISING_EDGE:
mbed_official 31:42176bc3c368 139 if (enable) {
mbed_official 31:42176bc3c368 140 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 31:42176bc3c368 141 } else {
mbed_official 31:42176bc3c368 142 if (event == IRQ_FALL)
mbed_official 31:42176bc3c368 143 irq_settings = IRQ_RAISING_EDGE;
mbed_official 31:42176bc3c368 144 }
mbed_official 31:42176bc3c368 145 break;
mbed_official 31:42176bc3c368 146
mbed_official 31:42176bc3c368 147 case IRQ_FALLING_EDGE:
mbed_official 31:42176bc3c368 148 if (enable) {
mbed_official 31:42176bc3c368 149 irq_settings = (event == IRQ_FALL) ? (IRQ_FALLING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 31:42176bc3c368 150 } else {
mbed_official 31:42176bc3c368 151 if (event == IRQ_RISE)
mbed_official 31:42176bc3c368 152 irq_settings = IRQ_FALLING_EDGE;
mbed_official 31:42176bc3c368 153 }
mbed_official 31:42176bc3c368 154 break;
mbed_official 31:42176bc3c368 155
mbed_official 31:42176bc3c368 156 case IRQ_EITHER_EDGE:
mbed_official 31:42176bc3c368 157 if (enable) {
mbed_official 31:42176bc3c368 158 irq_settings = IRQ_EITHER_EDGE;
mbed_official 31:42176bc3c368 159 } else {
mbed_official 31:42176bc3c368 160 irq_settings = (event == IRQ_RISE) ? (IRQ_FALLING_EDGE) : (IRQ_RAISING_EDGE);
mbed_official 31:42176bc3c368 161 }
mbed_official 31:42176bc3c368 162 break;
mbed_official 31:42176bc3c368 163 }
mbed_official 31:42176bc3c368 164
mbed_official 31:42176bc3c368 165 // Interrupt configuration and clear interrupt
mbed_official 31:42176bc3c368 166 port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
mbed_official 31:42176bc3c368 167 }
mbed_official 35:371630885ad6 168
mbed_official 35:371630885ad6 169 void gpio_irq_enable(gpio_irq_t *obj) {
mbed_official 35:371630885ad6 170 if (obj->port == PortA) {
mbed_official 35:371630885ad6 171 NVIC_EnableIRQ(PORTA_IRQn);
mbed_official 69:49e45cb70de1 172 } else {
mbed_official 69:49e45cb70de1 173 NVIC_EnableIRQ(PORTC_PORTD_IRQn);
mbed_official 35:371630885ad6 174 }
mbed_official 35:371630885ad6 175 }
mbed_official 35:371630885ad6 176
mbed_official 35:371630885ad6 177 void gpio_irq_disable(gpio_irq_t *obj) {
mbed_official 35:371630885ad6 178 if (obj->port == PortA) {
mbed_official 35:371630885ad6 179 NVIC_DisableIRQ(PORTA_IRQn);
mbed_official 69:49e45cb70de1 180 } else {
mbed_official 69:49e45cb70de1 181 NVIC_DisableIRQ(PORTC_PORTD_IRQn);
mbed_official 35:371630885ad6 182 }
mbed_official 35:371630885ad6 183 }