shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

Fork of mbed-src by mbed official

targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/gpio_irq_api.c@86:26fc69fd3b6c, 2014-02-08 (annotated)

Committer:
mbed_official
Date:
Sat Feb 08 12:00:07 2014 +0000
Revision:
86:26fc69fd3b6c
Parent:
82:0b31dbcd4769
Child:
113:65a335a675de
Synchronized with git revision 8c4fcca8c8e600391a5ccb90a3f889019733d082



Full URL: https://github.com/mbedmicro/mbed/commit/8c4fcca8c8e600391a5ccb90a3f889019733d082/



PWM update for Freescale Targets

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 31:42176bc3c368 1 /* mbed Microcontroller Library
mbed_official 31:42176bc3c368 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 31:42176bc3c368 3 *
mbed_official 31:42176bc3c368 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 31:42176bc3c368 5 * you may not use this file except in compliance with the License.
mbed_official 31:42176bc3c368 6 * You may obtain a copy of the License at
mbed_official 31:42176bc3c368 7 *
mbed_official 31:42176bc3c368 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 31:42176bc3c368 9 *
mbed_official 31:42176bc3c368 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 31:42176bc3c368 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 31:42176bc3c368 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 31:42176bc3c368 13 * See the License for the specific language governing permissions and
mbed_official 31:42176bc3c368 14 * limitations under the License.
mbed_official 31:42176bc3c368 15 */
mbed_official 31:42176bc3c368 16 #include <stddef.h>
mbed_official 31:42176bc3c368 17 #include "cmsis.h"
mbed_official 31:42176bc3c368 18
mbed_official 31:42176bc3c368 19 #include "gpio_irq_api.h"
mbed_official 31:42176bc3c368 20 #include "error.h"
mbed_official 31:42176bc3c368 21
mbed_official 69:49e45cb70de1 22 #define CHANNEL_NUM 96
mbed_official 31:42176bc3c368 23
mbed_official 31:42176bc3c368 24 static uint32_t channel_ids[CHANNEL_NUM] = {0};
mbed_official 31:42176bc3c368 25 static gpio_irq_handler irq_handler;
mbed_official 31:42176bc3c368 26
mbed_official 31:42176bc3c368 27 #define IRQ_DISABLED (0)
mbed_official 31:42176bc3c368 28 #define IRQ_RAISING_EDGE PORT_PCR_IRQC(9)
mbed_official 31:42176bc3c368 29 #define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
mbed_official 31:42176bc3c368 30 #define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
mbed_official 31:42176bc3c368 31
mbed_official 31:42176bc3c368 32 static void handle_interrupt_in(PORT_Type *port, int ch_base) {
mbed_official 31:42176bc3c368 33 uint32_t mask = 0, i;
mbed_official 31:42176bc3c368 34
mbed_official 31:42176bc3c368 35 for (i = 0; i < 32; i++) {
mbed_official 31:42176bc3c368 36 uint32_t pmask = (1 << i);
mbed_official 31:42176bc3c368 37 if (port->ISFR & pmask) {
mbed_official 31:42176bc3c368 38 mask |= pmask;
mbed_official 31:42176bc3c368 39 uint32_t id = channel_ids[ch_base + i];
mbed_official 86:26fc69fd3b6c 40 if (id == 0) {
mbed_official 69:49e45cb70de1 41 continue;
mbed_official 86:26fc69fd3b6c 42 }
mbed_official 31:42176bc3c368 43
mbed_official 31:42176bc3c368 44 FGPIO_Type *gpio;
mbed_official 31:42176bc3c368 45 gpio_irq_event event = IRQ_NONE;
mbed_official 31:42176bc3c368 46 switch (port->PCR[i] & PORT_PCR_IRQC_MASK) {
mbed_official 31:42176bc3c368 47 case IRQ_RAISING_EDGE:
mbed_official 31:42176bc3c368 48 event = IRQ_RISE;
mbed_official 31:42176bc3c368 49 break;
mbed_official 31:42176bc3c368 50
mbed_official 31:42176bc3c368 51 case IRQ_FALLING_EDGE:
mbed_official 31:42176bc3c368 52 event = IRQ_FALL;
mbed_official 31:42176bc3c368 53 break;
mbed_official 31:42176bc3c368 54
mbed_official 31:42176bc3c368 55 case IRQ_EITHER_EDGE:
mbed_official 69:49e45cb70de1 56 if (port == PORTA) {
mbed_official 69:49e45cb70de1 57 gpio = FPTA;
mbed_official 69:49e45cb70de1 58 } else if (port == PORTC) {
mbed_official 69:49e45cb70de1 59 gpio = FPTC;
mbed_official 69:49e45cb70de1 60 } else {
mbed_official 69:49e45cb70de1 61 gpio = FPTD;
mbed_official 69:49e45cb70de1 62 }
mbed_official 31:42176bc3c368 63 event = (gpio->PDIR & pmask) ? (IRQ_RISE) : (IRQ_FALL);
mbed_official 31:42176bc3c368 64 break;
mbed_official 31:42176bc3c368 65 }
mbed_official 31:42176bc3c368 66 if (event != IRQ_NONE)
mbed_official 31:42176bc3c368 67 irq_handler(id, event);
mbed_official 31:42176bc3c368 68 }
mbed_official 31:42176bc3c368 69 }
mbed_official 31:42176bc3c368 70 port->ISFR = mask;
mbed_official 31:42176bc3c368 71 }
mbed_official 31:42176bc3c368 72
mbed_official 69:49e45cb70de1 73 void gpio_irqA(void) {
mbed_official 69:49e45cb70de1 74 handle_interrupt_in(PORTA, 0);
mbed_official 69:49e45cb70de1 75 }
mbed_official 69:49e45cb70de1 76
mbed_official 69:49e45cb70de1 77 /* PORTC and PORTD share same vector */
mbed_official 69:49e45cb70de1 78 void gpio_irqCD(void) {
mbed_official 69:49e45cb70de1 79 if ((SIM->SCGC5 & SIM_SCGC5_PORTC_MASK) && (PORTC->ISFR)) {
mbed_official 69:49e45cb70de1 80 handle_interrupt_in(PORTC, 32);
mbed_official 69:49e45cb70de1 81 } else if ((SIM->SCGC5 & SIM_SCGC5_PORTD_MASK) && (PORTD->ISFR)) {
mbed_official 69:49e45cb70de1 82 handle_interrupt_in(PORTD, 64);
mbed_official 69:49e45cb70de1 83 }
mbed_official 69:49e45cb70de1 84 }
mbed_official 31:42176bc3c368 85
mbed_official 31:42176bc3c368 86 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
mbed_official 69:49e45cb70de1 87 if (pin == NC)
mbed_official 69:49e45cb70de1 88 return -1;
mbed_official 31:42176bc3c368 89
mbed_official 31:42176bc3c368 90 irq_handler = handler;
mbed_official 31:42176bc3c368 91
mbed_official 31:42176bc3c368 92 obj->port = pin >> PORT_SHIFT;
mbed_official 31:42176bc3c368 93 obj->pin = (pin & 0x7F) >> 2;
mbed_official 31:42176bc3c368 94
mbed_official 31:42176bc3c368 95 uint32_t ch_base, vector;
mbed_official 31:42176bc3c368 96 IRQn_Type irq_n;
mbed_official 31:42176bc3c368 97 switch (obj->port) {
mbed_official 31:42176bc3c368 98 case PortA:
mbed_official 31:42176bc3c368 99 ch_base = 0; irq_n = PORTA_IRQn; vector = (uint32_t)gpio_irqA;
mbed_official 31:42176bc3c368 100 break;
mbed_official 31:42176bc3c368 101
mbed_official 69:49e45cb70de1 102 case PortC:
mbed_official 69:49e45cb70de1 103 ch_base = 32; irq_n = PORTC_PORTD_IRQn; vector = (uint32_t)gpio_irqCD;
mbed_official 69:49e45cb70de1 104 break;
mbed_official 69:49e45cb70de1 105
mbed_official 31:42176bc3c368 106 case PortD:
mbed_official 69:49e45cb70de1 107 ch_base = 64; irq_n = PORTC_PORTD_IRQn; vector = (uint32_t)gpio_irqCD;
mbed_official 31:42176bc3c368 108 break;
mbed_official 31:42176bc3c368 109
mbed_official 31:42176bc3c368 110 default:
mbed_official 69:49e45cb70de1 111 error("gpio_irq only supported on port A,C and D\n");
mbed_official 31:42176bc3c368 112 break;
mbed_official 31:42176bc3c368 113 }
mbed_official 31:42176bc3c368 114 NVIC_SetVector(irq_n, vector);
mbed_official 31:42176bc3c368 115 NVIC_EnableIRQ(irq_n);
mbed_official 31:42176bc3c368 116
mbed_official 31:42176bc3c368 117 obj->ch = ch_base + obj->pin;
mbed_official 31:42176bc3c368 118 channel_ids[obj->ch] = id;
mbed_official 31:42176bc3c368 119
mbed_official 31:42176bc3c368 120 return 0;
mbed_official 31:42176bc3c368 121 }
mbed_official 31:42176bc3c368 122
mbed_official 31:42176bc3c368 123 void gpio_irq_free(gpio_irq_t *obj) {
mbed_official 31:42176bc3c368 124 channel_ids[obj->ch] = 0;
mbed_official 31:42176bc3c368 125 }
mbed_official 31:42176bc3c368 126
mbed_official 31:42176bc3c368 127 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
mbed_official 31:42176bc3c368 128 PORT_Type *port = (PORT_Type *)(PORTA_BASE + 0x1000 * obj->port);
mbed_official 31:42176bc3c368 129
mbed_official 31:42176bc3c368 130 uint32_t irq_settings = IRQ_DISABLED;
mbed_official 31:42176bc3c368 131
mbed_official 31:42176bc3c368 132 switch (port->PCR[obj->pin] & PORT_PCR_IRQC_MASK) {
mbed_official 31:42176bc3c368 133 case IRQ_DISABLED:
mbed_official 31:42176bc3c368 134 if (enable) {
mbed_official 31:42176bc3c368 135 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_FALLING_EDGE);
mbed_official 31:42176bc3c368 136 }
mbed_official 31:42176bc3c368 137 break;
mbed_official 31:42176bc3c368 138
mbed_official 31:42176bc3c368 139 case IRQ_RAISING_EDGE:
mbed_official 31:42176bc3c368 140 if (enable) {
mbed_official 31:42176bc3c368 141 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 31:42176bc3c368 142 } else {
mbed_official 31:42176bc3c368 143 if (event == IRQ_FALL)
mbed_official 31:42176bc3c368 144 irq_settings = IRQ_RAISING_EDGE;
mbed_official 31:42176bc3c368 145 }
mbed_official 31:42176bc3c368 146 break;
mbed_official 31:42176bc3c368 147
mbed_official 31:42176bc3c368 148 case IRQ_FALLING_EDGE:
mbed_official 31:42176bc3c368 149 if (enable) {
mbed_official 31:42176bc3c368 150 irq_settings = (event == IRQ_FALL) ? (IRQ_FALLING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 31:42176bc3c368 151 } else {
mbed_official 31:42176bc3c368 152 if (event == IRQ_RISE)
mbed_official 31:42176bc3c368 153 irq_settings = IRQ_FALLING_EDGE;
mbed_official 31:42176bc3c368 154 }
mbed_official 31:42176bc3c368 155 break;
mbed_official 31:42176bc3c368 156
mbed_official 31:42176bc3c368 157 case IRQ_EITHER_EDGE:
mbed_official 31:42176bc3c368 158 if (enable) {
mbed_official 31:42176bc3c368 159 irq_settings = IRQ_EITHER_EDGE;
mbed_official 31:42176bc3c368 160 } else {
mbed_official 31:42176bc3c368 161 irq_settings = (event == IRQ_RISE) ? (IRQ_FALLING_EDGE) : (IRQ_RAISING_EDGE);
mbed_official 31:42176bc3c368 162 }
mbed_official 31:42176bc3c368 163 break;
mbed_official 31:42176bc3c368 164 }
mbed_official 31:42176bc3c368 165
mbed_official 31:42176bc3c368 166 // Interrupt configuration and clear interrupt
mbed_official 31:42176bc3c368 167 port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
mbed_official 31:42176bc3c368 168 }
mbed_official 35:371630885ad6 169
mbed_official 35:371630885ad6 170 void gpio_irq_enable(gpio_irq_t *obj) {
mbed_official 35:371630885ad6 171 if (obj->port == PortA) {
mbed_official 35:371630885ad6 172 NVIC_EnableIRQ(PORTA_IRQn);
mbed_official 69:49e45cb70de1 173 } else {
mbed_official 69:49e45cb70de1 174 NVIC_EnableIRQ(PORTC_PORTD_IRQn);
mbed_official 35:371630885ad6 175 }
mbed_official 35:371630885ad6 176 }
mbed_official 35:371630885ad6 177
mbed_official 35:371630885ad6 178 void gpio_irq_disable(gpio_irq_t *obj) {
mbed_official 35:371630885ad6 179 if (obj->port == PortA) {
mbed_official 35:371630885ad6 180 NVIC_DisableIRQ(PORTA_IRQn);
mbed_official 69:49e45cb70de1 181 } else {
mbed_official 69:49e45cb70de1 182 NVIC_DisableIRQ(PORTC_PORTD_IRQn);
mbed_official 35:371630885ad6 183 }
mbed_official 35:371630885ad6 184 }
mbed_official 86:26fc69fd3b6c 185
mbed_official 86:26fc69fd3b6c 186 // Change the NMI pin to an input. This allows NMI pin to
mbed_official 86:26fc69fd3b6c 187 // be used as a low power mode wakeup. The application will
mbed_official 86:26fc69fd3b6c 188 // need to change the pin back to NMI_b or wakeup only occurs once!
mbed_official 86:26fc69fd3b6c 189 extern void gpio_init(gpio_t *obj, PinName pin, PinDirection direction);
mbed_official 86:26fc69fd3b6c 190 void NMI_Handler(void)
mbed_official 86:26fc69fd3b6c 191 {
mbed_official 86:26fc69fd3b6c 192 gpio_t gpio;
mbed_official 86:26fc69fd3b6c 193 gpio_init(&gpio, PTA4, PIN_INPUT);
mbed_official 86:26fc69fd3b6c 194 }