shao ziyang / mbed-src-kl05

mbed library sources

Dependents:   frdm_kl05z_gpio_test

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targets/hal/TARGET_Freescale/TARGET_KL46Z/gpio_irq_api.c@31:42176bc3c368, 2013-09-25 (annotated)

Committer:
mbed_official
Date:
Wed Sep 25 11:30:05 2013 +0100
Revision:
31:42176bc3c368
Child:
35:371630885ad6
Synchronized with git revision f580c008b139a952d38ac5c7c53bbae375739c67

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 31:42176bc3c368 1 /* mbed Microcontroller Library
mbed_official 31:42176bc3c368 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 31:42176bc3c368 3 *
mbed_official 31:42176bc3c368 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 31:42176bc3c368 5 * you may not use this file except in compliance with the License.
mbed_official 31:42176bc3c368 6 * You may obtain a copy of the License at
mbed_official 31:42176bc3c368 7 *
mbed_official 31:42176bc3c368 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 31:42176bc3c368 9 *
mbed_official 31:42176bc3c368 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 31:42176bc3c368 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 31:42176bc3c368 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 31:42176bc3c368 13 * See the License for the specific language governing permissions and
mbed_official 31:42176bc3c368 14 * limitations under the License.
mbed_official 31:42176bc3c368 15 */
mbed_official 31:42176bc3c368 16 #include <stddef.h>
mbed_official 31:42176bc3c368 17 #include "cmsis.h"
mbed_official 31:42176bc3c368 18
mbed_official 31:42176bc3c368 19 #include "gpio_irq_api.h"
mbed_official 31:42176bc3c368 20 #include "error.h"
mbed_official 31:42176bc3c368 21
mbed_official 31:42176bc3c368 22 #define CHANNEL_NUM 64
mbed_official 31:42176bc3c368 23
mbed_official 31:42176bc3c368 24 static uint32_t channel_ids[CHANNEL_NUM] = {0};
mbed_official 31:42176bc3c368 25 static gpio_irq_handler irq_handler;
mbed_official 31:42176bc3c368 26
mbed_official 31:42176bc3c368 27 #define IRQ_DISABLED (0)
mbed_official 31:42176bc3c368 28 #define IRQ_RAISING_EDGE PORT_PCR_IRQC(9)
mbed_official 31:42176bc3c368 29 #define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
mbed_official 31:42176bc3c368 30 #define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
mbed_official 31:42176bc3c368 31
mbed_official 31:42176bc3c368 32 static void handle_interrupt_in(PORT_Type *port, int ch_base) {
mbed_official 31:42176bc3c368 33 uint32_t mask = 0, i;
mbed_official 31:42176bc3c368 34
mbed_official 31:42176bc3c368 35 for (i = 0; i < 32; i++) {
mbed_official 31:42176bc3c368 36 uint32_t pmask = (1 << i);
mbed_official 31:42176bc3c368 37 if (port->ISFR & pmask) {
mbed_official 31:42176bc3c368 38 mask |= pmask;
mbed_official 31:42176bc3c368 39 uint32_t id = channel_ids[ch_base + i];
mbed_official 31:42176bc3c368 40 if (id == 0) continue;
mbed_official 31:42176bc3c368 41
mbed_official 31:42176bc3c368 42 FGPIO_Type *gpio;
mbed_official 31:42176bc3c368 43 gpio_irq_event event = IRQ_NONE;
mbed_official 31:42176bc3c368 44 switch (port->PCR[i] & PORT_PCR_IRQC_MASK) {
mbed_official 31:42176bc3c368 45 case IRQ_RAISING_EDGE:
mbed_official 31:42176bc3c368 46 event = IRQ_RISE;
mbed_official 31:42176bc3c368 47 break;
mbed_official 31:42176bc3c368 48
mbed_official 31:42176bc3c368 49 case IRQ_FALLING_EDGE:
mbed_official 31:42176bc3c368 50 event = IRQ_FALL;
mbed_official 31:42176bc3c368 51 break;
mbed_official 31:42176bc3c368 52
mbed_official 31:42176bc3c368 53 case IRQ_EITHER_EDGE:
mbed_official 31:42176bc3c368 54 gpio = (port == PORTA) ? (FPTA) : (FPTD);
mbed_official 31:42176bc3c368 55 event = (gpio->PDIR & pmask) ? (IRQ_RISE) : (IRQ_FALL);
mbed_official 31:42176bc3c368 56 break;
mbed_official 31:42176bc3c368 57 }
mbed_official 31:42176bc3c368 58 if (event != IRQ_NONE)
mbed_official 31:42176bc3c368 59 irq_handler(id, event);
mbed_official 31:42176bc3c368 60 }
mbed_official 31:42176bc3c368 61 }
mbed_official 31:42176bc3c368 62 port->ISFR = mask;
mbed_official 31:42176bc3c368 63 }
mbed_official 31:42176bc3c368 64
mbed_official 31:42176bc3c368 65 void gpio_irqA(void) {handle_interrupt_in(PORTA, 0);}
mbed_official 31:42176bc3c368 66 void gpio_irqD(void) {handle_interrupt_in(PORTD, 32);}
mbed_official 31:42176bc3c368 67
mbed_official 31:42176bc3c368 68 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
mbed_official 31:42176bc3c368 69 if (pin == NC) return -1;
mbed_official 31:42176bc3c368 70
mbed_official 31:42176bc3c368 71 irq_handler = handler;
mbed_official 31:42176bc3c368 72
mbed_official 31:42176bc3c368 73 obj->port = pin >> PORT_SHIFT;
mbed_official 31:42176bc3c368 74 obj->pin = (pin & 0x7F) >> 2;
mbed_official 31:42176bc3c368 75
mbed_official 31:42176bc3c368 76 uint32_t ch_base, vector;
mbed_official 31:42176bc3c368 77 IRQn_Type irq_n;
mbed_official 31:42176bc3c368 78 switch (obj->port) {
mbed_official 31:42176bc3c368 79 case PortA:
mbed_official 31:42176bc3c368 80 ch_base = 0; irq_n = PORTA_IRQn; vector = (uint32_t)gpio_irqA;
mbed_official 31:42176bc3c368 81 break;
mbed_official 31:42176bc3c368 82
mbed_official 31:42176bc3c368 83 case PortD:
mbed_official 31:42176bc3c368 84 ch_base = 32; irq_n = PORTD_IRQn; vector = (uint32_t)gpio_irqD;
mbed_official 31:42176bc3c368 85 break;
mbed_official 31:42176bc3c368 86
mbed_official 31:42176bc3c368 87 default:
mbed_official 31:42176bc3c368 88 error("gpio_irq only supported on port A and D\n");
mbed_official 31:42176bc3c368 89 break;
mbed_official 31:42176bc3c368 90 }
mbed_official 31:42176bc3c368 91 NVIC_SetVector(irq_n, vector);
mbed_official 31:42176bc3c368 92 NVIC_EnableIRQ(irq_n);
mbed_official 31:42176bc3c368 93
mbed_official 31:42176bc3c368 94 obj->ch = ch_base + obj->pin;
mbed_official 31:42176bc3c368 95 channel_ids[obj->ch] = id;
mbed_official 31:42176bc3c368 96
mbed_official 31:42176bc3c368 97 return 0;
mbed_official 31:42176bc3c368 98 }
mbed_official 31:42176bc3c368 99
mbed_official 31:42176bc3c368 100 void gpio_irq_free(gpio_irq_t *obj) {
mbed_official 31:42176bc3c368 101 channel_ids[obj->ch] = 0;
mbed_official 31:42176bc3c368 102 }
mbed_official 31:42176bc3c368 103
mbed_official 31:42176bc3c368 104 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
mbed_official 31:42176bc3c368 105 PORT_Type *port = (PORT_Type *)(PORTA_BASE + 0x1000 * obj->port);
mbed_official 31:42176bc3c368 106
mbed_official 31:42176bc3c368 107 uint32_t irq_settings = IRQ_DISABLED;
mbed_official 31:42176bc3c368 108
mbed_official 31:42176bc3c368 109 switch (port->PCR[obj->pin] & PORT_PCR_IRQC_MASK) {
mbed_official 31:42176bc3c368 110 case IRQ_DISABLED:
mbed_official 31:42176bc3c368 111 if (enable) {
mbed_official 31:42176bc3c368 112 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_FALLING_EDGE);
mbed_official 31:42176bc3c368 113 }
mbed_official 31:42176bc3c368 114 break;
mbed_official 31:42176bc3c368 115
mbed_official 31:42176bc3c368 116 case IRQ_RAISING_EDGE:
mbed_official 31:42176bc3c368 117 if (enable) {
mbed_official 31:42176bc3c368 118 irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 31:42176bc3c368 119 } else {
mbed_official 31:42176bc3c368 120 if (event == IRQ_FALL)
mbed_official 31:42176bc3c368 121 irq_settings = IRQ_RAISING_EDGE;
mbed_official 31:42176bc3c368 122 }
mbed_official 31:42176bc3c368 123 break;
mbed_official 31:42176bc3c368 124
mbed_official 31:42176bc3c368 125 case IRQ_FALLING_EDGE:
mbed_official 31:42176bc3c368 126 if (enable) {
mbed_official 31:42176bc3c368 127 irq_settings = (event == IRQ_FALL) ? (IRQ_FALLING_EDGE) : (IRQ_EITHER_EDGE);
mbed_official 31:42176bc3c368 128 } else {
mbed_official 31:42176bc3c368 129 if (event == IRQ_RISE)
mbed_official 31:42176bc3c368 130 irq_settings = IRQ_FALLING_EDGE;
mbed_official 31:42176bc3c368 131 }
mbed_official 31:42176bc3c368 132 break;
mbed_official 31:42176bc3c368 133
mbed_official 31:42176bc3c368 134 case IRQ_EITHER_EDGE:
mbed_official 31:42176bc3c368 135 if (enable) {
mbed_official 31:42176bc3c368 136 irq_settings = IRQ_EITHER_EDGE;
mbed_official 31:42176bc3c368 137 } else {
mbed_official 31:42176bc3c368 138 irq_settings = (event == IRQ_RISE) ? (IRQ_FALLING_EDGE) : (IRQ_RAISING_EDGE);
mbed_official 31:42176bc3c368 139 }
mbed_official 31:42176bc3c368 140 break;
mbed_official 31:42176bc3c368 141 }
mbed_official 31:42176bc3c368 142
mbed_official 31:42176bc3c368 143 // Interrupt configuration and clear interrupt
mbed_official 31:42176bc3c368 144 port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
mbed_official 31:42176bc3c368 145 }