Mode1 Optical Validation

Dependencies:   max32630fthr

Revision:
55:04c9fad147d4
Parent:
54:2f19a5a83a62
Child:
56:60b61d5c8154
--- a/main.cpp	Fri May 13 18:02:15 2022 +0000
+++ b/main.cpp	Fri May 20 00:17:29 2022 +0000
@@ -51,9 +51,9 @@
 
 /*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*/
 // define one and only one of the following three platforms
-#define MAXM86146_CFG 1  // tested on MAXM86146EVSYS_sensorBrd+MAXM86161_ADAPTER_REVB+MAX32630FTHR 33.13.12
+//#define MAXM86146_CFG 1  // tested on MAXM86146EVSYS_sensorBrd+MAXM86161_ADAPTER_REVB+MAX32630FTHR 33.13.12
 //#define MAXREFDES103_CFG  // not tested
-//#define MAXM86161_CFG 1  // tested on MAXM86161+MAX32630FTHR v32.9.22, 32.13.12
+#define MAXM86161_CFG 1  // tested on MAXM86161+MAX32630FTHR v32.9.22, 32.13.12
 /*****************************************************************************/
 
 /*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*/
@@ -88,14 +88,18 @@
 //#define ALGO_ONLY 1  // define this if you only want algo data
 //#define RAW  // define this if you want AFE+accel data, no algorithm, tested on 33.13.31
   //#define RAW_HZ 25   // Raw data rate
-  #define RAW_HZ 50   // Raw data rate
-  //#define RAW_HZ 100   // Raw data rate
+  //#define RAW_HZ 50   // Raw data rate
+  #define RAW_HZ 100   // Raw data rate
   //#define RAW_HZ 200   // Raw data rate
   //#define RAW_HZ 2004   // Raw data rate 200 Hz, ave 4
 //#define SPO2_CAL_RPT 1
+#define MAXM86161_OPT_VALIDATION_RED 1 // Optical validatation
+#define MAXM86161_OPT_VALIDATION_IR 1 // Optical validatation
+#define MAXM86161_OPT_VALIDATION_GRN 1 // Optical validatation
+#define SENSOR_ONLY 1
 
 // Comment out both of the below for Normal Algorithm Samples Format
-//#define EXTENDED_ALGO 1  // define this if you want the extended algo samples report format 
+//#define EXTENDED_ALGO 1  // define this if you want the extended algo samples report format
 //#define PACKED_NORMAL_ALGO 1  // define this if you want the packed normal algo samples report format, 33.13.31
 //#define PCK_CFG_MASK  1 // define this and the above if you want to config mask out some of the packed data, 33.13.31
 //#define AGC 1 // define this for AGC, otherwise the default is AEC
@@ -175,7 +179,7 @@
 // read_sh_fifo
 /*****************************************************************************/
 /*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*#*/
-#define OPTIMIZE_FIFO_READ 1  // Assume that the FIFO is filled at the specified rate, so just periodically check then number of samples in the FIFO to save power
+//#define OPTIMIZE_FIFO_READ 1  // Assume that the FIFO is filled at the specified rate, so just periodically check then number of samples in the FIFO to save power
 #ifdef OPTIMIZE_FIFO_READ     // tested on MAXM86146EVSYS
     int32_t check_fifo_countdown;
     #define MAX_FIFO_CNT 20   // Only send the 0x00 0x00 (step 2.0), and 0x12 0x00 (step 2.1) commands every MAX_FIFO_CNT frames.
@@ -219,7 +223,7 @@
 #endif
 // 2.2
 #if defined(PACKED_NORMAL_ALGO) || defined(USE_SYN)
-        cmd[0] = 0x20; 
+        cmd[0] = 0x20;
         sh_i2c.write(SH_ADDR, cmd, 1);
 #else
         cmd[0] = 0x12; cmd[1] = 0x00;
@@ -270,7 +274,7 @@
   #if RAW_HZ <= 100
             pc.printf("%d,%d,", ppg[4], ppg[5]);
   #endif
-#endif 
+#endif
 #ifdef MAXM86146_CFG
 #if defined(RAW) || defined(SPO2_CAL_RPT)
             ppg[6] = (rsp[ptr+18] << 16) | (rsp[ptr+19] << 8) | (rsp[ptr+20]);
@@ -293,7 +297,8 @@
 
 #endif  //!defined(ALGO_ONLY)
 
-#ifndef RAW
+#if !defined(RAW) && !defined(SENSOR_ONLY)
+
 #ifdef EXTENDED_ALGO
 //            pc.printf("ptr %d ttlsiz %d ", ptr, TTL_SZ);
             opmode = rsp[ptr];
@@ -433,7 +438,7 @@
             pc.printf("%d,%d,%d,%d,", spo2_lopi,spo2_unrel, spo2_state, scd);
             pc.printf("%d,", ibi_offset);
             pc.printf("%d,", inappro_ori);
-     #endif       
+     #endif
   #else  // print some
             if (heading_printed == 0) {
                 heading_printed = 1;
@@ -473,7 +478,7 @@
 //            ibi_offset = rsp[ptr+20];
 
             sptr += (TTL_SZ);
-  
+
 #if 0
             if (heading_printed == 0) {
                 heading_printed = 1;
@@ -499,7 +504,7 @@
             pc.printf("%d,%d,%d,%d,", spo2_lopi,spo2_unrel,spo2_state, scd);
 #endif
 #endif  // end normal algo size
-#endif // !RAW
+#endif // !RAW && !SENSOR_ONLY
 
             pc.printf("\n\r");
         }
@@ -534,17 +539,7 @@
 }
 #endif // MAXREFDES103_CFG
 
-/*****************************************************************************/
-// init_sh_algo
-/*****************************************************************************/
-void init_sh_algo(void) {
-    char cmd[64];
-    char rsp[256];
-
-#ifdef OPTIMIZE_FIFO_READ
-    check_fifo_countdown = MAX_FIFO_CNT;
-#endif
-
+void reset_sh(void) {
     // switch to application mode
     rst = 0;
     mfio = 1;
@@ -556,11 +551,25 @@
 #endif
 // 33.13.31 needs at least 1.6s
 //  thread_sleep_for(100);
+}
+
+/*****************************************************************************/
+// init_sh_algo
+/*****************************************************************************/
+void init_sh_algo(void) {
+    char cmd[64];
+    char rsp[256];
+
+    reset_sh();
+
+#ifdef OPTIMIZE_FIFO_READ
+    check_fifo_countdown = MAX_FIFO_CNT;
+#endif
 
     mfio = 0; wait_us(300);
 #ifdef REDUCE_RPT_PERIOD
 //Change report period to 25
-    cmd[0] = 0x10; cmd[1] = 0x02; cmd[2] = REDUCE_RPT_PERIOD; 
+    cmd[0] = 0x10; cmd[1] = 0x02; cmd[2] = REDUCE_RPT_PERIOD;
     sh_i2c.write(SH_ADDR, cmd, 3);
     mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
     sh_i2c.read(SH_ADDR, rsp, 1);
@@ -706,7 +715,7 @@
 #endif
 
 #if defined(MAXM86161_CFG) //only use Red and IR
-//1.20   map leds to slots 
+//1.20   map leds to slots
     cmd[0] = 0x50; cmd[1] = 0x07; cmd[2] = 0x19; cmd[3] = 0x23; cmd[4] = 0x00; cmd[5] = 0x00;
     sh_i2c.write(SH_ADDR, cmd, 6);
     mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
@@ -798,7 +807,7 @@
 #endif
 #if 0
 //write SpO2 coefficients 0x00000000 FFD7FBDD 00AB61FE
-    cmd[0] = 0x50; cmd[1] = 0x07; cmd[2] = 0x00; 
+    cmd[0] = 0x50; cmd[1] = 0x07; cmd[2] = 0x00;
     cmd[3] = 0x00; cmd[4] = 0x00; cmd[5] = 0x00; cmd[6] = 0x00;
     cmd[7] = 0xFF; cmd[8] = 0xD7; cmd[9] = 0xFB; cmd[10] = 0xDD;
     cmd[11] = 0x00; cmd[12] = 0xAB; cmd[13] = 0x61; cmd[14] = 0xFE;
@@ -808,7 +817,7 @@
     mfio = 1; mfio = 0; wait_us(300);
     pc.printf("Wr Spo2 Coeff %x\n\r", rsp[0]);
 #endif
-//1.26 rd SpO2 Coefficients 
+//1.26 rd SpO2 Coefficients
     cmd[0] = 0x51; cmd[1] = 0x07; cmd[2] = 0x00;
     sh_i2c.write(SH_ADDR, cmd, 3);
     mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
@@ -873,15 +882,8 @@
 void init_sh_raw(void) {
     char cmd[16];
     char rsp[256];
-    // switch to application mode
-    rst = 0;
-    mfio = 1;
-    thread_sleep_for(10);
-    rst = 1;
-    thread_sleep_for(1500);
-#ifdef MAXREFDES103_CFG
-    init_max20303_pmic();
-#endif
+
+    reset_sh();
 
     mfio = 0; wait_us(300);
 
@@ -939,24 +941,34 @@
     pc.printf("map SpO2 to slots/PDs %x\n\r", rsp[0]);
 #endif
 
+//#if defined(MAXM86146_CFG) || defined(MAXM86161_CFG)
+#if 0
 // raw enable sh accel
     cmd[0] = 0x44; cmd[1] = 0x04; cmd[2] = 0x01; cmd[3] = 0x00;
     sh_i2c.write(SH_ADDR, cmd, 4);
     mfio = 1; thread_sleep_for(20); mfio = 0; wait_us(300);
     sh_i2c.read(SH_ADDR, rsp, 1);
     mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
-    pc.printf("raw1.4 Status: %x\n\r", rsp[0]);
+    pc.printf("raw1.10 accel Status: %x\n\r", rsp[0]);
 // raw enable AFE
-//    cmd[0] = 0x44; cmd[1] = 0x00; cmd[2] = 0x01; cmd[3] = 0x00; 
+//    cmd[0] = 0x44; cmd[1] = 0x00; cmd[2] = 0x01; cmd[3] = 0x00;
 //    sh_i2c.write(SH_ADDR, cmd, 4);
     cmd[0] = 0x44; cmd[1] = 0x00; cmd[2] = 0x01;  // 3 bytes // tested on 33.13.31/12
     sh_i2c.write(SH_ADDR, cmd, 3);
-    cmd[0] = 0x44; cmd[1] = 0xFF; cmd[2] = 0x02; cmd[3] = 0x04; cmd[4] = 0x01; cmd[5] = 0x00; cmd[6] = 0x00; cmd[7] = 0x01; cmd[8] = 0x00; 
+//    cmd[0] = 0x44; cmd[1] = 0xFF; cmd[2] = 0x02; cmd[3] = 0x04; cmd[4] = 0x01; cmd[5] = 0x00; cmd[6] = 0x00; cmd[7] = 0x01; cmd[8] = 0x00;
+//    sh_i2c.write(SH_ADDR, cmd, 9);
+    mfio = 1; thread_sleep_for(465); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    pc.printf("raw1.11 afe en Status: %x\n\r", rsp[0]);
+#else
+    cmd[0] = 0x44; cmd[1] = 0xFF; cmd[2] = 0x02; cmd[3] = 0x04; cmd[4] = 0x01; cmd[5] = 0x00; cmd[6] = 0x00; cmd[7] = 0x01; cmd[8] = 0x00;
     sh_i2c.write(SH_ADDR, cmd, 9);
     mfio = 1; thread_sleep_for(465); mfio = 0; wait_us(300);
     sh_i2c.read(SH_ADDR, rsp, 1);
     mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
-    pc.printf("raw1.6 Status: %x\n\r", rsp[0]);
+    pc.printf("raw1.10/11 accel, afe en Status: %x\n\r", rsp[0]);
+#endif
 
 /// raw 1.20  AFE part id
     cmd[0] = 0x41; cmd[1] = 0x00; cmd[2] = 0xFF;
@@ -973,7 +985,7 @@
     mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
     pc.printf("1.7 Who Status: %x %x\n\r", rsp[0], rsp[1]);
 
-// raw1.8 sample rate 
+// raw1.8 sample rate
 #if RAW_HZ == 25
     cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x12; cmd[3] = 0x00;  // set AFE reg 0x12 to 25 Hz, ave 1
 #elif RAW_HZ == 50
@@ -1062,6 +1074,211 @@
 mfio = 1;
 }
 
+
+void set_seq_green(void) {
+    char cmd[16];
+    char rsp[32];
+    // Set Sequence to ambient, LED1
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x20; cmd[3] = 0x91;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+//    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+    // Set Sequence to LED4, LED3 to ambient, ambient
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x21; cmd[3] = 0x99;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+//    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+}
+
+void set_green_reg(void) {
+    char cmd[16];
+    char rsp[32];
+
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x09; cmd[3] = 0x7D;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x11; cmd[3] = 0x3F;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x12; cmd[3] = 0x30;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x13; cmd[3] = 0xC0;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+
+#if 1
+    // set seq1 reg
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x20; cmd[3] = 0x21;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+
+    // set seq2 reg
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x21; cmd[3] = 0x03;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+#endif
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x22; cmd[3] = 0x00;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x09; cmd[3] = 0x7D;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x23; cmd[3] = 0xA7;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x24; cmd[3] = 0x00;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x25; cmd[3] = 0x00;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+
+    cmd[0] = 0x40; cmd[1] = 0x00; cmd[2] = 0x2A; cmd[3] = 0x3F;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("wr afe reg Status: %x\n\r", rsp[0]);
+}
+
+
+/*****************************************************************************/
+// init_sh_opt  Mode1 optical validation for MAXM86161
+/*****************************************************************************/
+void init_sh_opt(void) {
+    char cmd[16];
+    char rsp[32];
+
+    reset_sh();
+
+    mfio = 0;wait_us(300);
+//1.0 read operating mode
+    cmd[0] = 0x02; cmd[1] = 0x00;
+    sh_i2c.write(SH_ADDR, cmd, 2);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 2);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    pc.printf("\n\r 0x02 0x00 Status, Read Operating Mode: %x %x\n\r", rsp[0], rsp[1]);
+//1.1 rd ver
+    cmd[0] = 0xFF; cmd[1] = 0x03;
+    sh_i2c.write(SH_ADDR, cmd, 2);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 4);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("Ver: %d %d %d %d\n\r", rsp[0], rsp[1], rsp[2], rsp[3]);
+
+//  Sensor Data only
+    cmd[0] = 0x10; cmd[1] = 0x00; cmd[2] = 0x01;
+    sh_i2c.write(SH_ADDR, cmd, 3);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("Sensor data Status: %x\n\r", rsp[0]);
+
+//  HRM, SpO2
+    cmd[0] = 0x50; cmd[1] = 0x07; cmd[2] = 0x0A; cmd[3] = 0x00;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("HR, SPO2 Status: %x\n\r", rsp[0]);
+//  Disable AEC
+    cmd[0] = 0x50; cmd[1] = 0x07; cmd[2] = 0x0B; cmd[3] = 0x00;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("Disable AEC Status: %x\n\r", rsp[0]);
+//  Disable Auto PD
+    cmd[0] = 0x50; cmd[1] = 0x07; cmd[2] = 0x12; cmd[3] = 0x00;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("Disable Auto PD Status: %x\n\r", rsp[0]);
+//  Disable SCD
+    cmd[0] = 0x50; cmd[1] = 0x07; cmd[2] = 0x0C; cmd[3] = 0x00;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("Disable SCD Status: %x\n\r", rsp[0]);
+
+
+//  Enable Algo, normal report
+    cmd[0] = 0x52; cmd[1] = 0x07; cmd[2] = 0x01;
+    sh_i2c.write(SH_ADDR, cmd, 4);
+    mfio = 1; thread_sleep_for(465); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 1);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("Disable SCD Status: %x\n\r", rsp[0]);
+
+#if 1
+//1.31 rd AFE part id
+    cmd[0] = 0x41; cmd[1] = 0x00; cmd[2] = 0xFF;
+    sh_i2c.write(SH_ADDR, cmd, 3);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 2);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("1.31 part id afe %x %x\n\r", rsp[0], rsp[1]);
+//1.32 rd accel who
+    cmd[0] = 0x41; cmd[1] = 0x04; cmd[2] = 0x0F;
+    sh_i2c.write(SH_ADDR, cmd, 3);
+    mfio = 1; thread_sleep_for(2); mfio = 0; wait_us(300);
+    sh_i2c.read(SH_ADDR, rsp, 2);
+    mfio = 1; mfio = 0; wait_us(300);
+    pc.printf("1.32 who accel %x %x\n\r", rsp[0], rsp[1]);
+#endif
+
+    set_green_reg();
+
+mfio = 1;
+}
 /*****************************************************************************/
 // main
 /*****************************************************************************/
@@ -1075,6 +1292,7 @@
 #if 0 // test disable algo
     char cmd[8];
     char rsp[256];
+
     // 3.1 Disable algo
     mfio = 1; mfio = 0; wait_us(300);
     cmd[0] = 0x52; cmd[1] = 0x07; cmd[2] = 0x00;
@@ -1088,6 +1306,8 @@
     //ticker.attach(callback(&blink_timer), BLINKING_RATE_MS);  /* set timer for one second */
 #ifdef RAW
     init_sh_raw();
+#elif defined(MAXM86161_OPT_VALIDATION_RED) || defined(MAXM86161_OPT_VALIDATION_IR) || defined(MAXM86161_OPT_VALIDATION_GRN)
+    init_sh_opt();
 #else
     init_sh_algo();
 #endif
@@ -1097,7 +1317,7 @@
     Timer tmr1;
     while (1) {
         tmr1.start();
-#if defined(RAW) 
+#if defined(RAW)
   #if RAW_HZ == 25
         if (tmr1.read_ms() >= 40) {
   #elif RAW_HZ == 50
@@ -1126,6 +1346,11 @@
 #endif
             tmr1.reset();
             read_sh_fifo();
+
+#if defined(MAXM86161_OPT_VALIDATION_GRN)
+//            set_seq_green();
+#endif
+
             if ((ledcnt++ % 50) == 0)
                 gLED = !gLED;
         }