Component library for PCA9546A. The PCA9546A is a quad bidirectional translating switch controlled via the I2C-bus. The SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the programmable control register.
PCA9546A.cpp@0:2d50d8bba33e, 2015-02-23 (annotated)
- Committer:
- okano
- Date:
- Mon Feb 23 06:07:04 2015 +0000
- Revision:
- 0:2d50d8bba33e
initial version
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
okano | 0:2d50d8bba33e | 1 | /** |
okano | 0:2d50d8bba33e | 2 | * PCA9546A library |
okano | 0:2d50d8bba33e | 3 | * |
okano | 0:2d50d8bba33e | 4 | * @author Tedd OKANO |
okano | 0:2d50d8bba33e | 5 | * @version 0.1 |
okano | 0:2d50d8bba33e | 6 | * @date Feb-2015 |
okano | 0:2d50d8bba33e | 7 | * |
okano | 0:2d50d8bba33e | 8 | * PCA9546A: an I2C bus switch control library |
okano | 0:2d50d8bba33e | 9 | * |
okano | 0:2d50d8bba33e | 10 | * The PCA9546A is a quad bidirectional translating switch controlled |
okano | 0:2d50d8bba33e | 11 | * via the I2C-bus. The SCL/SDA upstream pair fans out to four downstream |
okano | 0:2d50d8bba33e | 12 | * pairs, or channels. Any individual SCx/SDx channel or combination of |
okano | 0:2d50d8bba33e | 13 | * channels can be selected, determined by the contents of the programmable |
okano | 0:2d50d8bba33e | 14 | * control register. |
okano | 0:2d50d8bba33e | 15 | * |
okano | 0:2d50d8bba33e | 16 | * For more information about PCA9546A: |
okano | 0:2d50d8bba33e | 17 | * http://www.nxp.com/documents/data_sheet/PCA9546A.pdf |
okano | 0:2d50d8bba33e | 18 | * |
okano | 0:2d50d8bba33e | 19 | */ |
okano | 0:2d50d8bba33e | 20 | |
okano | 0:2d50d8bba33e | 21 | #include "PCA9546A.h" |
okano | 0:2d50d8bba33e | 22 | |
okano | 0:2d50d8bba33e | 23 | PCA9546A::PCA9546A( PinName sda, PinName scl, char i2c_address ) |
okano | 0:2d50d8bba33e | 24 | : i2c_p( new I2C( sda, scl ) ), i2c( *i2c_p ), i2c_addr( i2c_address ), enable_pattern( 0x00 ) |
okano | 0:2d50d8bba33e | 25 | { |
okano | 0:2d50d8bba33e | 26 | // do nothing. |
okano | 0:2d50d8bba33e | 27 | // leave it in default state. |
okano | 0:2d50d8bba33e | 28 | } |
okano | 0:2d50d8bba33e | 29 | |
okano | 0:2d50d8bba33e | 30 | PCA9546A::PCA9546A( I2C &i2c_, char i2c_address ) |
okano | 0:2d50d8bba33e | 31 | : i2c_p( NULL ), i2c( i2c_ ), i2c_addr( i2c_address ), enable_pattern( 0x00 ) |
okano | 0:2d50d8bba33e | 32 | { |
okano | 0:2d50d8bba33e | 33 | // do nothing. |
okano | 0:2d50d8bba33e | 34 | // leave it in default state. |
okano | 0:2d50d8bba33e | 35 | } |
okano | 0:2d50d8bba33e | 36 | |
okano | 0:2d50d8bba33e | 37 | PCA9546A::~PCA9546A() |
okano | 0:2d50d8bba33e | 38 | { |
okano | 0:2d50d8bba33e | 39 | if ( NULL != i2c_p ) |
okano | 0:2d50d8bba33e | 40 | delete i2c_p; |
okano | 0:2d50d8bba33e | 41 | } |
okano | 0:2d50d8bba33e | 42 | |
okano | 0:2d50d8bba33e | 43 | void PCA9546A::on( char channel ) |
okano | 0:2d50d8bba33e | 44 | { |
okano | 0:2d50d8bba33e | 45 | enable_pattern |= 0x1 << channel; |
okano | 0:2d50d8bba33e | 46 | |
okano | 0:2d50d8bba33e | 47 | bitpattern( enable_pattern ); |
okano | 0:2d50d8bba33e | 48 | } |
okano | 0:2d50d8bba33e | 49 | |
okano | 0:2d50d8bba33e | 50 | void PCA9546A::off( char channel ) |
okano | 0:2d50d8bba33e | 51 | { |
okano | 0:2d50d8bba33e | 52 | enable_pattern &= ~(0x1 << channel); |
okano | 0:2d50d8bba33e | 53 | |
okano | 0:2d50d8bba33e | 54 | bitpattern( enable_pattern ); |
okano | 0:2d50d8bba33e | 55 | } |
okano | 0:2d50d8bba33e | 56 | |
okano | 0:2d50d8bba33e | 57 | void PCA9546A::bitpattern( char pattern ) |
okano | 0:2d50d8bba33e | 58 | { |
okano | 0:2d50d8bba33e | 59 | i2c.write( i2c_addr, &pattern, 1 ); |
okano | 0:2d50d8bba33e | 60 | } |