Tedd OKANO / MARY_CAMERA

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MARY_CAMERA.cpp@31:7599da3895e1, 2014-03-24 (annotated)

Committer:
okano
Date:
Mon Mar 24 04:32:12 2014 +0000
Revision:
31:7599da3895e1
Parent:
30:5d8e86cd337d 
test code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okano 0:f4584dba3bac 1 #include "mbed.h"
okano 0:f4584dba3bac 2 #include "MARY_CAMERA.h"
okano 0:f4584dba3bac 3
okano 28:b5d5a2f7f0d0 4
okano 2:ee71ffdf317e 5 #define CAM_I2C_ADDR 0x42
okano 2:ee71ffdf317e 6
okano 2:ee71ffdf317e 7 #define COMMAND_WRITE 0x00
okano 2:ee71ffdf317e 8 #define COMMAND_READ 0x80
okano 2:ee71ffdf317e 9 #define COMMAND_ADDR_INCREMENT 0x20
okano 0:f4584dba3bac 10
okano 2:ee71ffdf317e 11 #define MEMORY_ADDR_LOW__REGISTER 0x0
okano 2:ee71ffdf317e 12 #define MEMORY_ADDR_MID__REGISTER 0x1
okano 2:ee71ffdf317e 13 #define MEMORY_ADDR_HIGH_REGISTER 0x2
okano 2:ee71ffdf317e 14 #define CAMERA_DATA_REGISTER 0x8
okano 2:ee71ffdf317e 15 #define CONTROL_DATA_REGISTER 0x3
okano 2:ee71ffdf317e 16 #define STATUS_REGISTER 0x4
okano 2:ee71ffdf317e 17
okano 2:ee71ffdf317e 18 #define CONTROL__PAUSE_BUFFER_UPDATE 0x01
okano 2:ee71ffdf317e 19 #define CONTROL__RESUME_BUFFER_UPDATE 0x00
okano 0:f4584dba3bac 20
okano 0:f4584dba3bac 21
okano 0:f4584dba3bac 22 MARY_CAMERA::MARY_CAMERA(
okano 4:cb0ef3fd89c9 23 PinName SPI_mosi,
okano 4:cb0ef3fd89c9 24 PinName SPI_miso,
okano 4:cb0ef3fd89c9 25 PinName SPI_sck,
okano 4:cb0ef3fd89c9 26 PinName SPI_cs,
okano 0:f4584dba3bac 27 PinName cam_reset,
okano 4:cb0ef3fd89c9 28 PinName I2C_sda,
okano 4:cb0ef3fd89c9 29 PinName I2C_scl
okano 2:ee71ffdf317e 30 ) :
okano 4:cb0ef3fd89c9 31 _spi( SPI_mosi, SPI_miso, SPI_sck ),
okano 4:cb0ef3fd89c9 32 _cs( SPI_cs ),
okano 4:cb0ef3fd89c9 33 _reset( cam_reset ),
okano 4:cb0ef3fd89c9 34 _i2c( I2C_sda, I2C_scl )
okano 0:f4584dba3bac 35 {
okano 11:61a025e8ab68 36 #ifdef IGNORE_INITIALIZATION_ERROR
okano 0:f4584dba3bac 37 init();
okano 11:61a025e8ab68 38 #else
okano 22:1a923c255be6 39 if ( 0 != init() )
okano 11:61a025e8ab68 40 error( "camera initialization failed." );
okano 11:61a025e8ab68 41 #endif
okano 0:f4584dba3bac 42 }
okano 0:f4584dba3bac 43
okano 28:b5d5a2f7f0d0 44 int MARY_CAMERA::init( CameraResolution res )
okano 11:61a025e8ab68 45 {
okano 29:4432c5282c7b 46 #define PARAM_NUM 99
okano 29:4432c5282c7b 47 #define RES_CHANGE_PARAM_NUM 12
okano 29:4432c5282c7b 48 #define RESET_PULSE_WIDTH 100 // mili-seconds
okano 29:4432c5282c7b 49 #define RESET_RECOVERY_TIME 100 // mili-seconds
okano 29:4432c5282c7b 50 #define COMMAND_INTERVAL 20 // mili-seconds
okano 29:4432c5282c7b 51
okano 28:b5d5a2f7f0d0 52 char camera_register_setting[ PARAM_NUM ][ 2 ] = {
okano 23:214896356355 53 { 0x01, 0x40 }, { 0x02, 0x60 }, { 0x03, 0x02 }, { 0x0C, 0x0C },
okano 31:7599da3895e1 54 // { 0x0E, 0x61 }, { 0x0F, 0x4B }, { 0x11, 0x81 }, { 0x12, 0x04 },
okano 31:7599da3895e1 55 // { 0x0E, 0x61 }, { 0x0F, 0x4B }, { 0x11, 0xC0 }, { 0x12, 0x04 },
okano 31:7599da3895e1 56 { 0x0E, 0x61 }, { 0x0F, 0x4B }, { 0x11, 0x80 }, { 0x12, 0x04 },
okano 23:214896356355 57 { 0x15, 0x00 }, { 0x16, 0x02 }, { 0x17, 0x39 }, { 0x18, 0x03 },
okano 23:214896356355 58 { 0x19, 0x03 }, { 0x1A, 0x7B }, { 0x1E, 0x37 }, { 0x21, 0x02 },
okano 23:214896356355 59 { 0x22, 0x91 }, { 0x29, 0x07 }, { 0x32, 0x80 }, { 0x33, 0x0B },
okano 23:214896356355 60 { 0x34, 0x11 }, { 0x35, 0x0B }, { 0x37, 0x1D }, { 0x38, 0x71 },
okano 23:214896356355 61 { 0x39, 0x2A }, { 0x3B, 0x12 }, { 0x3C, 0x78 }, { 0x3D, 0xC3 },
okano 23:214896356355 62 { 0x3E, 0x11 }, { 0x3F, 0x00 }, { 0x40, 0xD0 }, { 0x41, 0x08 },
okano 23:214896356355 63 { 0x41, 0x38 }, { 0x43, 0x0A }, { 0x44, 0xF0 }, { 0x45, 0x34 },
okano 23:214896356355 64 { 0x46, 0x58 }, { 0x47, 0x28 }, { 0x48, 0x3A }, { 0x4B, 0x09 },
okano 23:214896356355 65 { 0x4C, 0x00 }, { 0x4D, 0x40 }, { 0x4E, 0x20 }, { 0x4F, 0x80 },
okano 23:214896356355 66 { 0x50, 0x80 }, { 0x51, 0x00 }, { 0x52, 0x22 }, { 0x53, 0x5E },
okano 23:214896356355 67 { 0x54, 0x80 }, { 0x56, 0x40 }, { 0x58, 0x9E }, { 0x59, 0x88 },
okano 23:214896356355 68 { 0x5A, 0x88 }, { 0x5B, 0x44 }, { 0x5C, 0x67 }, { 0x5D, 0x49 },
okano 23:214896356355 69 { 0x5E, 0x0E }, { 0x69, 0x00 }, { 0x6A, 0x40 }, { 0x6B, 0x0A },
okano 23:214896356355 70 { 0x6C, 0x0A }, { 0x6D, 0x55 }, { 0x6E, 0x11 }, { 0x6F, 0x9F },
okano 23:214896356355 71 { 0x70, 0x3A }, { 0x71, 0x35 }, { 0x72, 0x11 }, { 0x73, 0xF1 },
okano 23:214896356355 72 { 0x74, 0x10 }, { 0x75, 0x05 }, { 0x76, 0xE1 }, { 0x77, 0x01 },
okano 23:214896356355 73 { 0x78, 0x04 }, { 0x79, 0x01 }, { 0x8D, 0x4F }, { 0x8E, 0x00 },
okano 23:214896356355 74 { 0x8F, 0x00 }, { 0x90, 0x00 }, { 0x91, 0x00 }, { 0x96, 0x00 },
okano 23:214896356355 75 { 0x96, 0x00 }, { 0x97, 0x30 }, { 0x98, 0x20 }, { 0x99, 0x30 },
okano 23:214896356355 76 { 0x9A, 0x00 }, { 0x9A, 0x84 }, { 0x9B, 0x29 }, { 0x9C, 0x03 },
okano 23:214896356355 77 { 0x9D, 0x4C }, { 0x9E, 0x3F }, { 0xA2, 0x52 }, { 0xA4, 0x88 },
okano 23:214896356355 78 { 0xB0, 0x84 }, { 0xB1, 0x0C }, { 0xB2, 0x0E }, { 0xB3, 0x82 },
okano 23:214896356355 79 { 0xB8, 0x0A }, { 0xC8, 0xF0 }, { 0xC9, 0x60 },
okano 13:210f4bbd0cd6 80 };
okano 28:b5d5a2f7f0d0 81 const char res_change_param[ 5 ][ RES_CHANGE_PARAM_NUM ] = {
okano 28:b5d5a2f7f0d0 82 { 0x17, 0x18, 0x32, 0x19, 0x1a, 0x03, 0x0c, 0x3e, 0x71, 0x72, 0x73, 0xa2 }, // register addr
okano 28:b5d5a2f7f0d0 83 { 0x39, 0x03, 0x80, 0x03, 0x7b, 0x02, 0x0c, 0x11, 0x35, 0x11, 0xf1, 0x52 }, // QSIF
okano 28:b5d5a2f7f0d0 84 { 0x13, 0x01, 0xb6, 0x02, 0x7a, 0x0a, 0x00, 0x00, 0x35, 0x11, 0xf0, 0x02 }, // VGA
okano 28:b5d5a2f7f0d0 85 { 0x16, 0x04, 0x80, 0x02, 0x7a, 0x0a, 0x04, 0x19, 0x35, 0x11, 0xf1, 0x02 }, // QVGA
okano 28:b5d5a2f7f0d0 86 { 0x16, 0x04, 0xa4, 0x02, 0x7a, 0x0a, 0x04, 0x1a, 0x35, 0x22, 0xf2, 0x02 }, // QQVGA
okano 28:b5d5a2f7f0d0 87 };
okano 27:f31bff7335ae 88 const char camera_reset_command[] = { 0x12, 0x80 };
okano 19:1d07d6d762a9 89
okano 11:61a025e8ab68 90 // SPI settings
okano 11:61a025e8ab68 91
okano 11:61a025e8ab68 92 _cs = 1; // set ChipSelect signal HIGH
okano 11:61a025e8ab68 93 _spi.format( 8 ); // camera SPI : 8bits/transfer
okano 11:61a025e8ab68 94 _spi.frequency( SPI_FREQUENCY ); // SPI frequency setting
okano 11:61a025e8ab68 95
okano 11:61a025e8ab68 96 // reset
okano 0:f4584dba3bac 97
okano 4:cb0ef3fd89c9 98 _reset = 0;
okano 11:61a025e8ab68 99 wait_ms( RESET_PULSE_WIDTH ); // assert RESET signal
okano 4:cb0ef3fd89c9 100 _reset = 1;
okano 30:5d8e86cd337d 101 wait_ms( RESET_RECOVERY_TIME ); // deassert RESET signal
okano 27:f31bff7335ae 102
okano 27:f31bff7335ae 103 if ( 0 != (_error_state = _i2c.write( CAM_I2C_ADDR, camera_reset_command, 2 )) )
okano 27:f31bff7335ae 104 return _error_state; // return non-zero if I2C access failed
okano 27:f31bff7335ae 105
okano 30:5d8e86cd337d 106 wait_ms( 100 ); // deassert RESET signal
okano 0:f4584dba3bac 107
okano 22:1a923c255be6 108 _horizontal_size = QCIF_PIXEL_PER_LINE;
okano 22:1a923c255be6 109 _vertical_size = QCIF_LINE_PER_FRAME;
okano 19:1d07d6d762a9 110
okano 29:4432c5282c7b 111 #ifdef UNIFIED_RESOLUTION_CHANGE
okano 28:b5d5a2f7f0d0 112 if ( QCIF != res ) {
okano 28:b5d5a2f7f0d0 113 for ( int i = 0; i < RES_CHANGE_PARAM_NUM; i++ ) {
okano 28:b5d5a2f7f0d0 114 for ( int j = 0; j < PARAM_NUM; j++ ) {
okano 28:b5d5a2f7f0d0 115 if ( camera_register_setting[ j ][ 0 ] == res_change_param[ 0 ][ i ] ) {
okano 28:b5d5a2f7f0d0 116 camera_register_setting[ j ][ 1 ] = res_change_param[ res ][ i ];
okano 28:b5d5a2f7f0d0 117 }
okano 28:b5d5a2f7f0d0 118 }
okano 28:b5d5a2f7f0d0 119 }
okano 28:b5d5a2f7f0d0 120 }
okano 29:4432c5282c7b 121
okano 29:4432c5282c7b 122 switch ( res ) {
okano 29:4432c5282c7b 123 case QCIF:
okano 29:4432c5282c7b 124 _horizontal_size = QCIF_PIXEL_PER_LINE;
okano 29:4432c5282c7b 125 _vertical_size = QCIF_LINE_PER_FRAME;
okano 29:4432c5282c7b 126 break;
okano 29:4432c5282c7b 127 case VGA:
okano 29:4432c5282c7b 128 _horizontal_size = VGA_PIXEL_PER_LINE;
okano 29:4432c5282c7b 129 _vertical_size = VGA_LINE_PER_FRAME;
okano 29:4432c5282c7b 130 break;
okano 29:4432c5282c7b 131 case QVGA:
okano 29:4432c5282c7b 132 _horizontal_size = VGA_PIXEL_PER_LINE / 2;
okano 29:4432c5282c7b 133 _vertical_size = VGA_LINE_PER_FRAME / 2;
okano 29:4432c5282c7b 134 break;
okano 29:4432c5282c7b 135 case QQVGA:
okano 29:4432c5282c7b 136 _horizontal_size = VGA_PIXEL_PER_LINE / 4;
okano 29:4432c5282c7b 137 _vertical_size = VGA_LINE_PER_FRAME / 4;
okano 29:4432c5282c7b 138 break;
okano 29:4432c5282c7b 139 }
okano 28:b5d5a2f7f0d0 140
okano 30:5d8e86cd337d 141 #endif
okano 30:5d8e86cd337d 142
okano 22:1a923c255be6 143 for ( int i = 0; i < PARAM_NUM; i++ ) {
okano 22:1a923c255be6 144 if ( 0 != (_error_state = _i2c.write( CAM_I2C_ADDR, camera_register_setting[ i ], 2 )) )
okano 22:1a923c255be6 145 break;
okano 22:1a923c255be6 146
okano 29:4432c5282c7b 147 wait_ms( COMMAND_INTERVAL ); // camera register writing requires this interval
okano 22:1a923c255be6 148 }
okano 22:1a923c255be6 149
okano 29:4432c5282c7b 150 #ifndef UNIFIED_RESOLUTION_CHANGE
okano 30:5d8e86cd337d 151 if ( QCIF != res ) {
okano 30:5d8e86cd337d 152 char d[ 2 ];
okano 30:5d8e86cd337d 153 for ( int i = 0; i < RES_CHANGE_PARAM_NUM; i++ ) {
okano 30:5d8e86cd337d 154 d[ 0 ] = res_change_param[ 0 ][ i ];
okano 30:5d8e86cd337d 155 d[ 1 ] = res_change_param[ res ][ i ];
okano 30:5d8e86cd337d 156
okano 30:5d8e86cd337d 157 if ( 0 != (_error_state = _i2c.write( CAM_I2C_ADDR, d, 2 )) )
okano 30:5d8e86cd337d 158 break;
okano 30:5d8e86cd337d 159
okano 30:5d8e86cd337d 160 wait_ms( COMMAND_INTERVAL ); // camera register writing requires this interval
okano 30:5d8e86cd337d 161 }
okano 30:5d8e86cd337d 162 }
okano 29:4432c5282c7b 163
okano 30:5d8e86cd337d 164 switch ( res ) {
okano 30:5d8e86cd337d 165 case QCIF:
okano 30:5d8e86cd337d 166 _horizontal_size = QCIF_PIXEL_PER_LINE;
okano 30:5d8e86cd337d 167 _vertical_size = QCIF_LINE_PER_FRAME;
okano 30:5d8e86cd337d 168 break;
okano 30:5d8e86cd337d 169 case VGA:
okano 30:5d8e86cd337d 170 _horizontal_size = VGA_PIXEL_PER_LINE;
okano 30:5d8e86cd337d 171 _vertical_size = VGA_LINE_PER_FRAME;
okano 30:5d8e86cd337d 172 break;
okano 30:5d8e86cd337d 173 case QVGA:
okano 30:5d8e86cd337d 174 _horizontal_size = VGA_PIXEL_PER_LINE / 2;
okano 30:5d8e86cd337d 175 _vertical_size = VGA_LINE_PER_FRAME / 2;
okano 30:5d8e86cd337d 176 break;
okano 30:5d8e86cd337d 177 case QQVGA:
okano 30:5d8e86cd337d 178 _horizontal_size = VGA_PIXEL_PER_LINE / 4;
okano 30:5d8e86cd337d 179 _vertical_size = VGA_LINE_PER_FRAME / 4;
okano 29:4432c5282c7b 180 break;
okano 29:4432c5282c7b 181 }
okano 30:5d8e86cd337d 182
okano 30:5d8e86cd337d 183 printf( "resolution : h,v = %d,%d\r\n", _horizontal_size, _vertical_size );
okano 29:4432c5282c7b 184 #endif
okano 29:4432c5282c7b 185
okano 22:1a923c255be6 186 return _error_state; // return non-zero if I2C access failed
okano 22:1a923c255be6 187 }
okano 22:1a923c255be6 188
okano 20:fa4a54e25fc4 189 void MARY_CAMERA::colorbar( SwitchState sw )
okano 20:fa4a54e25fc4 190 {
okano 20:fa4a54e25fc4 191 char s[ 2 ];
okano 22:1a923c255be6 192
okano 20:fa4a54e25fc4 193 s[ 0 ] = 0x12;
okano 20:fa4a54e25fc4 194 s[ 1 ] = sw ? 0x06 : 0x04;
okano 22:1a923c255be6 195
okano 20:fa4a54e25fc4 196 _error_state = _i2c.write( CAM_I2C_ADDR, s, 2 );
okano 20:fa4a54e25fc4 197 }
okano 20:fa4a54e25fc4 198
okano 19:1d07d6d762a9 199 int MARY_CAMERA::horizontal_size( void )
okano 19:1d07d6d762a9 200 {
okano 19:1d07d6d762a9 201 return _horizontal_size; // return last state of I2C access
okano 19:1d07d6d762a9 202 }
okano 2:ee71ffdf317e 203
okano 19:1d07d6d762a9 204 int MARY_CAMERA::vertical_size( void )
okano 19:1d07d6d762a9 205 {
okano 19:1d07d6d762a9 206 return _vertical_size; // return last state of I2C access
okano 0:f4584dba3bac 207 }
okano 0:f4584dba3bac 208
okano 13:210f4bbd0cd6 209 int MARY_CAMERA::ready( void )
okano 13:210f4bbd0cd6 210 {
okano 11:61a025e8ab68 211 return _error_state; // return last state of I2C access
okano 8:23d14d5254d2 212 }
okano 8:23d14d5254d2 213
okano 24:cc4271d1545f 214 extern int read_order_change;
okano 24:cc4271d1545f 215
okano 13:210f4bbd0cd6 216 void MARY_CAMERA::transfer_a_line( short *p, int line_number, int x_offset, int n_of_pixels )
okano 13:210f4bbd0cd6 217 {
okano 24:cc4271d1545f 218 #if 0
okano 24:cc4271d1545f 219
okano 9:c1e24f1bec19 220 char tmp;
okano 24:cc4271d1545f 221
okano 23:214896356355 222 if ( line_number < 0 )
okano 23:214896356355 223 return;
okano 10:82394d226c74 224
okano 11:61a025e8ab68 225 // set camera module's buffer address
okano 19:1d07d6d762a9 226 set_address( line_number * horizontal_size() * BYTE_PER_PIXEL + x_offset * BYTE_PER_PIXEL );
okano 0:f4584dba3bac 227
okano 11:61a025e8ab68 228 // put a read command, first return byte should be ignored
okano 0:f4584dba3bac 229 read_register( CAMERA_DATA_REGISTER );
okano 11:61a025e8ab68 230
okano 10:82394d226c74 231 for( int x = 0; x < n_of_pixels; x++ ) {
okano 11:61a025e8ab68 232 // perform 2 bytes read. a pixel data is in RGB565 format (16bits)
okano 11:61a025e8ab68 233 tmp = read_register( CAMERA_DATA_REGISTER ); // read lower byte
okano 11:61a025e8ab68 234 *p++ = (read_register( CAMERA_DATA_REGISTER ) << 8) | tmp; // read upper byte
okano 9:c1e24f1bec19 235 }
okano 24:cc4271d1545f 236
okano 24:cc4271d1545f 237 #else
okano 24:cc4271d1545f 238
okano 24:cc4271d1545f 239
okano 24:cc4271d1545f 240 short tmp;
okano 24:cc4271d1545f 241
okano 24:cc4271d1545f 242 if ( line_number < 0 )
okano 24:cc4271d1545f 243 return;
okano 24:cc4271d1545f 244
okano 24:cc4271d1545f 245 // set camera module's buffer address
okano 24:cc4271d1545f 246 set_address( line_number * horizontal_size() * BYTE_PER_PIXEL + x_offset * BYTE_PER_PIXEL );
okano 24:cc4271d1545f 247
okano 24:cc4271d1545f 248 // put a read command, first return byte should be ignored
okano 24:cc4271d1545f 249 read_register( CAMERA_DATA_REGISTER );
okano 24:cc4271d1545f 250
okano 24:cc4271d1545f 251
okano 24:cc4271d1545f 252 if ( read_order_change ) {
okano 24:cc4271d1545f 253
okano 24:cc4271d1545f 254 read_register( CAMERA_DATA_REGISTER );
okano 24:cc4271d1545f 255
okano 24:cc4271d1545f 256 for( int x = 0; x < n_of_pixels; x++ ) {
okano 24:cc4271d1545f 257 // perform 2 bytes read. a pixel data is in RGB565 format (16bits)
okano 24:cc4271d1545f 258 tmp = read_register( CAMERA_DATA_REGISTER ) << 8; // read lower byte
okano 24:cc4271d1545f 259 *p++ = (read_register( CAMERA_DATA_REGISTER ) << 0) | tmp; // read upper byte
okano 24:cc4271d1545f 260 }
okano 24:cc4271d1545f 261
okano 24:cc4271d1545f 262 } else {
okano 24:cc4271d1545f 263
okano 24:cc4271d1545f 264 for( int x = 0; x < n_of_pixels; x++ ) {
okano 24:cc4271d1545f 265 // perform 2 bytes read. a pixel data is in RGB565 format (16bits)
okano 24:cc4271d1545f 266 tmp = read_register( CAMERA_DATA_REGISTER ); // read lower byte
okano 24:cc4271d1545f 267 *p++ = (read_register( CAMERA_DATA_REGISTER ) << 8) | tmp; // read upper byte
okano 24:cc4271d1545f 268 }
okano 24:cc4271d1545f 269
okano 24:cc4271d1545f 270 }
okano 24:cc4271d1545f 271
okano 24:cc4271d1545f 272 #endif
okano 0:f4584dba3bac 273 }
okano 0:f4584dba3bac 274
okano 13:210f4bbd0cd6 275 void MARY_CAMERA::open_transfer( void )
okano 13:210f4bbd0cd6 276 {
okano 11:61a025e8ab68 277 // send command to pause the camera buffer update
okano 0:f4584dba3bac 278 write_register( CONTROL_DATA_REGISTER, CONTROL__PAUSE_BUFFER_UPDATE );
okano 0:f4584dba3bac 279
okano 11:61a025e8ab68 280 // read status register (first return byte should be ignored)
okano 0:f4584dba3bac 281 read_register( STATUS_REGISTER );
okano 7:942d8d0a1760 282
okano 11:61a025e8ab68 283 // wait until the status register become 0x51(ready to transfer data)
okano 11:61a025e8ab68 284 while ( 0x51 != read_register( STATUS_REGISTER ) )
okano 11:61a025e8ab68 285 ;
okano 0:f4584dba3bac 286 }
okano 0:f4584dba3bac 287
okano 13:210f4bbd0cd6 288 void MARY_CAMERA::close_transfer( void )
okano 13:210f4bbd0cd6 289 {
okano 11:61a025e8ab68 290 // send command to resume the camera buffer update
okano 0:f4584dba3bac 291 write_register( CONTROL_DATA_REGISTER, CONTROL__RESUME_BUFFER_UPDATE );
okano 0:f4584dba3bac 292
okano 11:61a025e8ab68 293 // read status register (first return byte should be ignored)
okano 0:f4584dba3bac 294 read_register( STATUS_REGISTER );
okano 7:942d8d0a1760 295
okano 11:61a025e8ab68 296 // wait until the status register become 0x50(camera updating the buffer)
okano 11:61a025e8ab68 297 while ( 0x50 != read_register( STATUS_REGISTER ) )
okano 11:61a025e8ab68 298 ;
okano 0:f4584dba3bac 299 }
okano 0:f4584dba3bac 300
okano 13:210f4bbd0cd6 301 void MARY_CAMERA::set_address( int address )
okano 13:210f4bbd0cd6 302 {
okano 11:61a025e8ab68 303 // set memory address (3 bytes)
okano 12:614be3290c47 304
okano 0:f4584dba3bac 305 write_register( MEMORY_ADDR_LOW__REGISTER, (address >> 0) & 0xFF );
okano 0:f4584dba3bac 306 write_register( MEMORY_ADDR_MID__REGISTER, (address >> 8) & 0xFF );
okano 0:f4584dba3bac 307 write_register( MEMORY_ADDR_HIGH_REGISTER, (address >> 16) & 0xFF );
okano 0:f4584dba3bac 308 }
okano 0:f4584dba3bac 309
okano 13:210f4bbd0cd6 310 void MARY_CAMERA::write_register( char reg, char value )
okano 13:210f4bbd0cd6 311 {
okano 11:61a025e8ab68 312 // camera register write
okano 12:614be3290c47 313
okano 11:61a025e8ab68 314 send_spi( COMMAND_WRITE | reg ); // send command and register number
okano 11:61a025e8ab68 315 send_spi( value ); // send register value
okano 11:61a025e8ab68 316 }
okano 11:61a025e8ab68 317
okano 13:210f4bbd0cd6 318 int MARY_CAMERA::read_register( char reg )
okano 13:210f4bbd0cd6 319 {
okano 11:61a025e8ab68 320 // camera register read
okano 11:61a025e8ab68 321 // returning current data in SPI buffer (data returned by previous command)
okano 11:61a025e8ab68 322
okano 11:61a025e8ab68 323 return ( send_spi( COMMAND_READ | reg | ((reg == CAMERA_DATA_REGISTER) ? COMMAND_ADDR_INCREMENT : 0x00) ) );
okano 11:61a025e8ab68 324 }
okano 10:82394d226c74 325
okano 13:210f4bbd0cd6 326 int MARY_CAMERA::send_spi( char data )
okano 13:210f4bbd0cd6 327 {
okano 0:f4584dba3bac 328 int tmp;
okano 12:614be3290c47 329
okano 11:61a025e8ab68 330 // SPI access
okano 0:f4584dba3bac 331
okano 4:cb0ef3fd89c9 332 _cs = 0;
okano 4:cb0ef3fd89c9 333 tmp = _spi.write( data );
okano 4:cb0ef3fd89c9 334 _cs = 1;
okano 12:614be3290c47 335
okano 0:f4584dba3bac 336 return ( tmp );
okano 0:f4584dba3bac 337 }