Tedd OKANO / MARY_CAMERA

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MARY_CAMERA.h@0:f4584dba3bac, 2014-02-14 (annotated)

Committer:
okano
Date:
Fri Feb 14 14:19:49 2014 +0000
Revision:
0:f4584dba3bac
Child:
1:1e51936de820
Child:
2:ee71ffdf317e
first trial *doesn't work*

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okano 0:f4584dba3bac 1 #ifndef MBED_MARY_CAMERA
okano 0:f4584dba3bac 2 #define MBED_MARY_CAMERA
okano 0:f4584dba3bac 3
okano 0:f4584dba3bac 4 #define PARAM_NUM 99
okano 0:f4584dba3bac 5 #define CAM_I2C_ADDR 0x42
okano 0:f4584dba3bac 6
okano 0:f4584dba3bac 7 #define COMMAND_WRITE 0x00
okano 0:f4584dba3bac 8 #define COMMAND_READ 0x80
okano 0:f4584dba3bac 9 #define COMMAND_ADDR_INCREMENT 0x20
okano 0:f4584dba3bac 10
okano 0:f4584dba3bac 11 #define MEMORY_ADDR_LOW__REGISTER 0x0
okano 0:f4584dba3bac 12 #define MEMORY_ADDR_MID__REGISTER 0x1
okano 0:f4584dba3bac 13 #define MEMORY_ADDR_HIGH_REGISTER 0x2
okano 0:f4584dba3bac 14 #define CAMERA_DATA_REGISTER 0x8
okano 0:f4584dba3bac 15 #define CONTROL_DATA_REGISTER 0x3
okano 0:f4584dba3bac 16 #define STATUS_REGISTER 0x4
okano 0:f4584dba3bac 17
okano 0:f4584dba3bac 18 #define CONTROL__PAUSE_BUFFER_UPDATE 0x01
okano 0:f4584dba3bac 19 #define CONTROL__RESUME_BUFFER_UPDATE 0x00
okano 0:f4584dba3bac 20
okano 0:f4584dba3bac 21 #define PIXEL_PER_LINE 176
okano 0:f4584dba3bac 22 #define BYTE_PER_PIXEL 2
okano 0:f4584dba3bac 23 #define BYTE_PER_LINE (PIXEL_PER_LINE * BYTE_PER_PIXEL)
okano 0:f4584dba3bac 24
okano 0:f4584dba3bac 25 #define SPI_FREQUENCY 1000000
okano 0:f4584dba3bac 26
okano 0:f4584dba3bac 27 // sample MARY_CAMERA camera( p5, p6, p7, p22, p9, p26, p28, p27 )
okano 0:f4584dba3bac 28
okano 0:f4584dba3bac 29
okano 0:f4584dba3bac 30 class MARY_CAMERA
okano 0:f4584dba3bac 31 {
okano 0:f4584dba3bac 32 public:
okano 0:f4584dba3bac 33
okano 0:f4584dba3bac 34 /** Create a MARY_CAMERA instance connected to specified SPI and DigitalOut pins with specified address
okano 0:f4584dba3bac 35 *
okano 0:f4584dba3bac 36 * @param I2C_sda I2C-bus SDA pin
okano 0:f4584dba3bac 37 * @param I2C_scl I2C-bus SCL pin
okano 0:f4584dba3bac 38 * @param steps_per_rotation motor specific setting. This determines how many steps are needed to execute one full turn of motor shaft (360°).
okano 0:f4584dba3bac 39 * @param I2C_address I2C-bus address (default: 0x42)
okano 0:f4584dba3bac 40 */
okano 0:f4584dba3bac 41
okano 0:f4584dba3bac 42 MARY_CAMERA(
okano 0:f4584dba3bac 43 PinName spi_mosi,
okano 0:f4584dba3bac 44 PinName spi_miso,
okano 0:f4584dba3bac 45 PinName spi_sck,
okano 0:f4584dba3bac 46 PinName spi_cs,
okano 0:f4584dba3bac 47 PinName cam_vsync,
okano 0:f4584dba3bac 48 PinName cam_reset,
okano 0:f4584dba3bac 49 PinName i2c_sda,
okano 0:f4584dba3bac 50 PinName i2c_scl
okano 0:f4584dba3bac 51 );
okano 0:f4584dba3bac 52 void init( void );
okano 0:f4584dba3bac 53 void open_transfer( void );
okano 0:f4584dba3bac 54 void close_transfer( void );
okano 0:f4584dba3bac 55 void transfer_a_line( short *p, int line_number, int x_offset, int n_of_pixels );
okano 0:f4584dba3bac 56
okano 0:f4584dba3bac 57 private:
okano 0:f4584dba3bac 58 int send_spi( char data );
okano 0:f4584dba3bac 59 void write_register( char reg, char value );
okano 0:f4584dba3bac 60 int read_register( char reg );
okano 0:f4584dba3bac 61 void set_address( int address );
okano 0:f4584dba3bac 62
okano 0:f4584dba3bac 63
okano 0:f4584dba3bac 64 SPI spi;
okano 0:f4584dba3bac 65 DigitalOut cs;
okano 0:f4584dba3bac 66 DigitalOut vsync;
okano 0:f4584dba3bac 67 DigitalOut reset;
okano 0:f4584dba3bac 68 I2C i2c;
okano 0:f4584dba3bac 69 };
okano 0:f4584dba3bac 70
okano 0:f4584dba3bac 71
okano 0:f4584dba3bac 72
okano 0:f4584dba3bac 73
okano 0:f4584dba3bac 74 #if 0
okano 0:f4584dba3bac 75 SPI camspi( p5, p6, p7 );
okano 0:f4584dba3bac 76 DigitalOut cs2( p22 );
okano 0:f4584dba3bac 77 DigitalOut vsync( p9 );
okano 0:f4584dba3bac 78 DigitalOut camera_reset( p26 );
okano 0:f4584dba3bac 79 #endif
okano 0:f4584dba3bac 80
okano 0:f4584dba3bac 81 #define COMMAND_WRITE 0x00
okano 0:f4584dba3bac 82 #define COMMAND_READ 0x80
okano 0:f4584dba3bac 83 #define COMMAND_ADDR_INCREMENT 0x20
okano 0:f4584dba3bac 84
okano 0:f4584dba3bac 85 #define MEMORY_ADDR_LOW__REGISTER 0x0
okano 0:f4584dba3bac 86 #define MEMORY_ADDR_MID__REGISTER 0x1
okano 0:f4584dba3bac 87 #define MEMORY_ADDR_HIGH_REGISTER 0x2
okano 0:f4584dba3bac 88 #define CAMERA_DATA_REGISTER 0x8
okano 0:f4584dba3bac 89 #define CONTROL_DATA_REGISTER 0x3
okano 0:f4584dba3bac 90 #define STATUS_REGISTER 0x4
okano 0:f4584dba3bac 91
okano 0:f4584dba3bac 92 #define CONTROL__PAUSE_BUFFER_UPDATE 0x01
okano 0:f4584dba3bac 93 #define CONTROL__RESUME_BUFFER_UPDATE 0x00
okano 0:f4584dba3bac 94
okano 0:f4584dba3bac 95 #endif // MBED_MARY_CAMERA